From: Sasha Levin Date: Fri, 10 Nov 2023 17:35:08 +0000 (-0500) Subject: Fixes for 5.4 X-Git-Tag: v4.14.330~66 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=c2539fa5f8254bfb41abbe1430504f9ef11f0d9d;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.4 Signed-off-by: Sasha Levin --- diff --git a/queue-5.4/acpi-sysfs-fix-create_pnp_modalias-and-create_of_mod.patch b/queue-5.4/acpi-sysfs-fix-create_pnp_modalias-and-create_of_mod.patch new file mode 100644 index 00000000000..e466904394b --- /dev/null +++ b/queue-5.4/acpi-sysfs-fix-create_pnp_modalias-and-create_of_mod.patch @@ -0,0 +1,62 @@ +From 97bcf848854e406ad109c87977419c3cc43c0c38 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 23 Oct 2023 20:32:54 +0200 +Subject: ACPI: sysfs: Fix create_pnp_modalias() and create_of_modalias() + +From: Christophe JAILLET + +[ Upstream commit 48cf49d31994ff97b33c4044e618560ec84d35fb ] + +snprintf() does not return negative values on error. + +To know if the buffer was too small, the returned value needs to be +compared with the length of the passed buffer. If it is greater or +equal, the output has been truncated, so add checks for the truncation +to create_pnp_modalias() and create_of_modalias(). Also make them +return -ENOMEM in that case, as they already do that elsewhere. + +Moreover, the remaining size of the buffer used by snprintf() needs to +be updated after the first write to avoid out-of-bounds access as +already done correctly in create_pnp_modalias(), but not in +create_of_modalias(), so change the latter accordingly. + +Fixes: 8765c5ba1949 ("ACPI / scan: Rework modalias creation when "compatible" is present") +Signed-off-by: Christophe JAILLET +[ rjw: Merge two patches into one, combine changelogs, add subject ] +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +--- + drivers/acpi/device_sysfs.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/acpi/device_sysfs.c b/drivers/acpi/device_sysfs.c +index fe8c7e79f4726..566067a855a13 100644 +--- a/drivers/acpi/device_sysfs.c ++++ b/drivers/acpi/device_sysfs.c +@@ -156,8 +156,8 @@ static int create_pnp_modalias(struct acpi_device *acpi_dev, char *modalias, + return 0; + + len = snprintf(modalias, size, "acpi:"); +- if (len <= 0) +- return len; ++ if (len >= size) ++ return -ENOMEM; + + size -= len; + +@@ -210,8 +210,10 @@ static int create_of_modalias(struct acpi_device *acpi_dev, char *modalias, + len = snprintf(modalias, size, "of:N%sT", (char *)buf.pointer); + ACPI_FREE(buf.pointer); + +- if (len <= 0) +- return len; ++ if (len >= size) ++ return -ENOMEM; ++ ++ size -= len; + + of_compatible = acpi_dev->data.of_compatible; + if (of_compatible->type == ACPI_TYPE_PACKAGE) { +-- +2.42.0 + diff --git a/queue-5.4/arm-9321-1-memset-cast-the-constant-byte-to-unsigned.patch b/queue-5.4/arm-9321-1-memset-cast-the-constant-byte-to-unsigned.patch new file mode 100644 index 00000000000..e1e41a71c30 --- /dev/null +++ b/queue-5.4/arm-9321-1-memset-cast-the-constant-byte-to-unsigned.patch @@ -0,0 +1,63 @@ +From abfc1cf3bc23620e165f2b9f80f23c4e05a478b8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 22 Aug 2023 15:06:06 +0100 +Subject: ARM: 9321/1: memset: cast the constant byte to unsigned char + +From: Kursad Oney + +[ Upstream commit c0e824661f443b8cab3897006c1bbc69fd0e7bc4 ] + +memset() description in ISO/IEC 9899:1999 (and elsewhere) says: + + The memset function copies the value of c (converted to an + unsigned char) into each of the first n characters of the + object pointed to by s. + +The kernel's arm32 memset does not cast c to unsigned char. This results +in the following code to produce erroneous output: + + char a[128]; + memset(a, -128, sizeof(a)); + +This is because gcc will generally emit the following code before +it calls memset() : + + mov r0, r7 + mvn r1, #127 ; 0x7f + bl 00000000 + +r1 ends up with 0xffffff80 before being used by memset() and the +'a' array will have -128 once in every four bytes while the other +bytes will be set incorrectly to -1 like this (printing the first +8 bytes) : + + test_module: -128 -1 -1 -1 + test_module: -1 -1 -1 -128 + +The change here is to 'and' r1 with 255 before it is used. + +Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") +Reviewed-by: Ard Biesheuvel +Reviewed-by: Linus Walleij +Signed-off-by: Kursad Oney +Signed-off-by: Russell King (Oracle) +Signed-off-by: Sasha Levin +--- + arch/arm/lib/memset.S | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S +index 6ca4535c47fb6..e36d053a8a903 100644 +--- a/arch/arm/lib/memset.S ++++ b/arch/arm/lib/memset.S +@@ -16,6 +16,7 @@ + ENTRY(mmioset) + ENTRY(memset) + UNWIND( .fnstart ) ++ and r1, r1, #255 @ cast to unsigned char + ands r3, r0, #3 @ 1 unaligned? + mov ip, r0 @ preserve r0 as return value + bne 6f @ 1 +-- +2.42.0 + diff --git a/queue-5.4/arm-dts-qcom-mdm9615-populate-vsdcc-fixed-regulator.patch b/queue-5.4/arm-dts-qcom-mdm9615-populate-vsdcc-fixed-regulator.patch new file mode 100644 index 00000000000..910d116f632 --- /dev/null +++ b/queue-5.4/arm-dts-qcom-mdm9615-populate-vsdcc-fixed-regulator.patch @@ -0,0 +1,51 @@ +From ebb8ef77aa43bc921a8b03a2a18953e032c7b514 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 24 Sep 2023 20:39:13 +0200 +Subject: ARM: dts: qcom: mdm9615: populate vsdcc fixed regulator + +From: Krzysztof Kozlowski + +[ Upstream commit 09f8ee81b6da5f76de8b83c8bfc4475b54e101e0 ] + +Fixed regulator put under "regulators" node will not be populated, +unless simple-bus or something similar is used. Drop the "regulators" +wrapper node to fix this. + +Fixes: 2c5e596524e7 ("ARM: dts: Add MDM9615 dtsi") +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20230924183914.51414-3-krzysztof.kozlowski@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/qcom-mdm9615.dtsi | 14 ++++++-------- + 1 file changed, 6 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi +index ffb4dcdb62d2b..8b3eb93ec451f 100644 +--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi ++++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi +@@ -82,14 +82,12 @@ cxo_board { + }; + }; + +- regulators { +- vsdcc_fixed: vsdcc-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "SDCC Power"; +- regulator-min-microvolt = <2700000>; +- regulator-max-microvolt = <2700000>; +- regulator-always-on; +- }; ++ vsdcc_fixed: vsdcc-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "SDCC Power"; ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <2700000>; ++ regulator-always-on; + }; + + soc: soc { +-- +2.42.0 + diff --git a/queue-5.4/arm64-dts-qcom-sdm845-mtp-fix-wifi-configuration.patch b/queue-5.4/arm64-dts-qcom-sdm845-mtp-fix-wifi-configuration.patch new file mode 100644 index 00000000000..bf4937f2769 --- /dev/null +++ b/queue-5.4/arm64-dts-qcom-sdm845-mtp-fix-wifi-configuration.patch @@ -0,0 +1,37 @@ +From 038b0118def30271836856c6133f886cab285cca Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 27 Aug 2023 01:19:11 +0300 +Subject: arm64: dts: qcom: sdm845-mtp: fix WiFi configuration + +From: Dmitry Baryshkov + +[ Upstream commit b33868a52f342d9b1f20aa5bffe40cbd69bd0a4b ] + +Enable the host-cap-8bit quirk on this device. It is required for the +WiFi to function properly. + +Fixes: 022bccb840b7 ("arm64: dts: sdm845: Add WCN3990 WLAN module device node") +Signed-off-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20230826221915.846937-2-dmitry.baryshkov@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +index c57548b7b250a..e5331a81249b1 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts ++++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +@@ -468,6 +468,8 @@ &wifi { + vdd-1.8-xo-supply = <&vreg_l7a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; ++ ++ qcom,snoc-host-cap-8bit-quirk; + }; + + /* PINCTRL - additions to nodes defined in sdm845.dtsi */ +-- +2.42.0 + diff --git a/queue-5.4/asoc-ams-delta.c-use-component-after-check.patch b/queue-5.4/asoc-ams-delta.c-use-component-after-check.patch new file mode 100644 index 00000000000..37b59a2700a --- /dev/null +++ b/queue-5.4/asoc-ams-delta.c-use-component-after-check.patch @@ -0,0 +1,56 @@ +From b6ddcac8e40cf131f2da964a11611b6600e35cdd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 27 Oct 2023 00:09:56 +0000 +Subject: ASoC: ams-delta.c: use component after check + +From: Kuninori Morimoto + +[ Upstream commit bd0f7498bc9084d8cccc5484cd004b40f314b763 ] + + static void cx81801_close() + { + ... +(A) struct snd_soc_dapm_context *dapm = &component->card->dapm; + ... +(B) if (!component) + return; + } + +(A) uses component before NULL check (B). This patch moves it after (B). + +Fixes: d0fdfe34080c ("ASoC: cx20442: replace codec to component") +Reported-by: Dan Carpenter +Closes: https://lore.kernel.org/r/3e608474-e99a-4866-ae98-3054a4221f09@moroto.mountain +Signed-off-by: Kuninori Morimoto +Link: https://lore.kernel.org/r/87ttqdq623.wl-kuninori.morimoto.gx@renesas.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/ti/ams-delta.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/sound/soc/ti/ams-delta.c b/sound/soc/ti/ams-delta.c +index 8e2fb81ad05c7..84cbd7446b1e5 100644 +--- a/sound/soc/ti/ams-delta.c ++++ b/sound/soc/ti/ams-delta.c +@@ -303,7 +303,7 @@ static int cx81801_open(struct tty_struct *tty) + static void cx81801_close(struct tty_struct *tty) + { + struct snd_soc_component *component = tty->disc_data; +- struct snd_soc_dapm_context *dapm = &component->card->dapm; ++ struct snd_soc_dapm_context *dapm; + + del_timer_sync(&cx81801_timer); + +@@ -315,6 +315,8 @@ static void cx81801_close(struct tty_struct *tty) + + v253_ops.close(tty); + ++ dapm = &component->card->dapm; ++ + /* Revert back to default audio input/output constellation */ + snd_soc_dapm_mutex_lock(dapm); + +-- +2.42.0 + diff --git a/queue-5.4/asoc-intel-skylake-fix-mem-leak-when-parsing-uuids-f.patch b/queue-5.4/asoc-intel-skylake-fix-mem-leak-when-parsing-uuids-f.patch new file mode 100644 index 00000000000..5170ebed6a9 --- /dev/null +++ b/queue-5.4/asoc-intel-skylake-fix-mem-leak-when-parsing-uuids-f.patch @@ -0,0 +1,40 @@ +From 0159fca3bcabf9df08eb94447ea74262e167368c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 26 Oct 2023 10:25:58 +0200 +Subject: ASoC: Intel: Skylake: Fix mem leak when parsing UUIDs fails +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Cezary Rojewski + +[ Upstream commit 168d97844a61db302dec76d44406e9d4d7106b8e ] + +Error path in snd_skl_parse_uuids() shall free last allocated module if +its instance_id allocation fails. + +Fixes: f8e066521192 ("ASoC: Intel: Skylake: Fix uuid_module memory leak in failure case") +Signed-off-by: Cezary Rojewski +Signed-off-by: Amadeusz Sławiński +Link: https://lore.kernel.org/r/20231026082558.1864910-1-amadeuszx.slawinski@linux.intel.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/intel/skylake/skl-sst-utils.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/sound/soc/intel/skylake/skl-sst-utils.c b/sound/soc/intel/skylake/skl-sst-utils.c +index d43cbf4a71ef2..d4db64d72b2c5 100644 +--- a/sound/soc/intel/skylake/skl-sst-utils.c ++++ b/sound/soc/intel/skylake/skl-sst-utils.c +@@ -299,6 +299,7 @@ int snd_skl_parse_uuids(struct sst_dsp *ctx, const struct firmware *fw, + module->instance_id = devm_kzalloc(ctx->dev, size, GFP_KERNEL); + if (!module->instance_id) { + ret = -ENOMEM; ++ kfree(module); + goto free_uuid_list; + } + +-- +2.42.0 + diff --git a/queue-5.4/can-dev-can_restart-don-t-crash-kernel-if-carrier-is.patch b/queue-5.4/can-dev-can_restart-don-t-crash-kernel-if-carrier-is.patch new file mode 100644 index 00000000000..7ad7f5102a8 --- /dev/null +++ b/queue-5.4/can-dev-can_restart-don-t-crash-kernel-if-carrier-is.patch @@ -0,0 +1,46 @@ +From f7ac17a9c29e0eb8634834c742b7a6558be5aeaa Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 28 Sep 2023 21:58:23 +0200 +Subject: can: dev: can_restart(): don't crash kernel if carrier is OK + +From: Marc Kleine-Budde + +[ Upstream commit fe5c9940dfd8ba0c73672dddb30acd1b7a11d4c7 ] + +During testing, I triggered a can_restart() with the netif carrier +being OK [1]. The BUG_ON, which checks if the carrier is OK, results +in a fatal kernel crash. This is neither helpful for debugging nor for +a production system. + +[1] The root cause is a race condition in can_restart() which will be +fixed in the next patch. + +Do not crash the kernel, issue an error message instead, and continue +restarting the CAN device anyway. + +Fixes: 39549eef3587 ("can: CAN Network device driver and Netlink interface") +Link: https://lore.kernel.org/all/20231005-can-dev-fix-can-restart-v2-1-91b5c1fd922c@pengutronix.de +Reviewed-by: Vincent Mailhol +Signed-off-by: Marc Kleine-Budde +Signed-off-by: Sasha Levin +--- + drivers/net/can/dev/dev.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/can/dev/dev.c b/drivers/net/can/dev/dev.c +index 322da89cb9c60..b0f3bbc1d354f 100644 +--- a/drivers/net/can/dev/dev.c ++++ b/drivers/net/can/dev/dev.c +@@ -552,7 +552,8 @@ static void can_restart(struct net_device *dev) + struct can_frame *cf; + int err; + +- BUG_ON(netif_carrier_ok(dev)); ++ if (netif_carrier_ok(dev)) ++ netdev_err(dev, "Attempt to restart for bus-off recovery, but carrier is OK?\n"); + + /* No synchronization needed because the device is bus-off and + * no messages can come in or go out. +-- +2.42.0 + diff --git a/queue-5.4/can-dev-can_restart-fix-race-condition-between-contr.patch b/queue-5.4/can-dev-can_restart-fix-race-condition-between-contr.patch new file mode 100644 index 00000000000..79dcdd86bd6 --- /dev/null +++ b/queue-5.4/can-dev-can_restart-fix-race-condition-between-contr.patch @@ -0,0 +1,102 @@ +From 063de59d9cfe49cc7c0211489883ee9710239247 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 29 Sep 2023 10:25:11 +0200 +Subject: can: dev: can_restart(): fix race condition between controller + restart and netif_carrier_on() + +From: Marc Kleine-Budde + +[ Upstream commit 6841cab8c4504835e4011689cbdb3351dec693fd ] + +This race condition was discovered while updating the at91_can driver +to use can_bus_off(). The following scenario describes how the +converted at91_can driver would behave. + +When a CAN device goes into BUS-OFF state, the driver usually +stops/resets the CAN device and calls can_bus_off(). + +This function sets the netif carrier to off, and (if configured by +user space) schedules a delayed work that calls can_restart() to +restart the CAN device. + +The can_restart() function first checks if the carrier is off and +triggers an error message if the carrier is OK. + +Then it calls the driver's do_set_mode() function to restart the +device, then it sets the netif carrier to on. There is a race window +between these two calls. + +The at91 CAN controller (observed on the sama5d3, a single core 32 bit +ARM CPU) has a hardware limitation. If the device goes into bus-off +while sending a CAN frame, there is no way to abort the sending of +this frame. After the controller is enabled again, another attempt is +made to send it. + +If the bus is still faulty, the device immediately goes back to the +bus-off state. The driver calls can_bus_off(), the netif carrier is +switched off and another can_restart is scheduled. This occurs within +the race window before the original can_restart() handler marks the +netif carrier as OK. This would cause the 2nd can_restart() to be +called with an OK netif carrier, resulting in an error message. + +The flow of the 1st can_restart() looks like this: + +can_restart() + // bail out if netif_carrier is OK + + netif_carrier_ok(dev) + priv->do_set_mode(dev, CAN_MODE_START) + // enable CAN controller + // sama5d3 restarts sending old message + + // CAN devices goes into BUS_OFF, triggers IRQ + +// IRQ handler start + at91_irq() + at91_irq_err_line() + can_bus_off() + netif_carrier_off() + schedule_delayed_work() +// IRQ handler end + + netif_carrier_on() + +The 2nd can_restart() will be called with an OK netif carrier and the +error message will be printed. + +To close the race window, first set the netif carrier to on, then +restart the controller. In case the restart fails with an error code, +roll back the netif carrier to off. + +Fixes: 39549eef3587 ("can: CAN Network device driver and Netlink interface") +Link: https://lore.kernel.org/all/20231005-can-dev-fix-can-restart-v2-2-91b5c1fd922c@pengutronix.de +Reviewed-by: Vincent Mailhol +Signed-off-by: Marc Kleine-Budde +Signed-off-by: Sasha Levin +--- + drivers/net/can/dev/dev.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/can/dev/dev.c b/drivers/net/can/dev/dev.c +index b0f3bbc1d354f..05a2c873af56d 100644 +--- a/drivers/net/can/dev/dev.c ++++ b/drivers/net/can/dev/dev.c +@@ -578,11 +578,12 @@ static void can_restart(struct net_device *dev) + priv->can_stats.restarts++; + + /* Now restart the device */ +- err = priv->do_set_mode(dev, CAN_MODE_START); +- + netif_carrier_on(dev); +- if (err) ++ err = priv->do_set_mode(dev, CAN_MODE_START); ++ if (err) { + netdev_err(dev, "Error %d during restart", err); ++ netif_carrier_off(dev); ++ } + } + + static void can_restart_work(struct work_struct *work) +-- +2.42.0 + diff --git a/queue-5.4/chtls-fix-tp-rcv_tstamp-initialization.patch b/queue-5.4/chtls-fix-tp-rcv_tstamp-initialization.patch new file mode 100644 index 00000000000..eec4df7bcf8 --- /dev/null +++ b/queue-5.4/chtls-fix-tp-rcv_tstamp-initialization.patch @@ -0,0 +1,36 @@ +From 0a4a8df57bfadff3f6600ad79183dfa8fc7bc8b5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 20 Oct 2023 12:57:36 +0000 +Subject: chtls: fix tp->rcv_tstamp initialization + +From: Eric Dumazet + +[ Upstream commit 225d9ddbacb102621af6d28ff7bf5a0b4ce249d8 ] + +tp->rcv_tstamp should be set to tcp_jiffies, not tcp_time_stamp(). + +Fixes: cc35c88ae4db ("crypto : chtls - CPL handler definition") +Signed-off-by: Eric Dumazet +Cc: Ayush Sawal +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/crypto/chelsio/chtls/chtls_cm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/crypto/chelsio/chtls/chtls_cm.c b/drivers/crypto/chelsio/chtls/chtls_cm.c +index 3b79bcd03e7bc..40054731f8008 100644 +--- a/drivers/crypto/chelsio/chtls/chtls_cm.c ++++ b/drivers/crypto/chelsio/chtls/chtls_cm.c +@@ -2092,7 +2092,7 @@ static void chtls_rx_ack(struct sock *sk, struct sk_buff *skb) + + if (tp->snd_una != snd_una) { + tp->snd_una = snd_una; +- tp->rcv_tstamp = tcp_time_stamp(tp); ++ tp->rcv_tstamp = tcp_jiffies32; + if (tp->snd_una == tp->snd_nxt && + !csk_flag_nochk(csk, CSK_TX_FAILOVER)) + csk_reset_flag(csk, CSK_TX_WAIT_IDLE); +-- +2.42.0 + diff --git a/queue-5.4/clk-imx-select-mxc_clk-for-clk_imx8qxp.patch b/queue-5.4/clk-imx-select-mxc_clk-for-clk_imx8qxp.patch new file mode 100644 index 00000000000..eee88ce67ca --- /dev/null +++ b/queue-5.4/clk-imx-select-mxc_clk-for-clk_imx8qxp.patch @@ -0,0 +1,43 @@ +From 59c9c51de44e6a2bbd05ae0b3148ee6bf6e99bf6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Sep 2023 12:23:54 +0300 +Subject: clk: imx: Select MXC_CLK for CLK_IMX8QXP + +From: Abel Vesa + +[ Upstream commit 317e69c49b4ceef8aebb47d771498ccb3571bdf9 ] + +If the i.MX8QXP clock provider is built-in but the MXC_CLK is +built as module, build fails: + +aarch64-linux-ld: drivers/clk/imx/clk-imx8-acm.o: in function `imx8_acm_clk_probe': +clk-imx8-acm.c:(.text+0x3d0): undefined reference to `imx_check_clk_hws' + +Fix that by selecting MXC_CLK in case of CLK_IMX8QXP. + +Fixes: c2cccb6d0b33 ("clk: imx: add imx8qxp clk driver") +Closes: https://lore.kernel.org/all/8b77219e-b59e-40f1-96f1-980a0b2debcf@infradead.org/ +Reported-by: Randy Dunlap +Reviewed-by: Peng Fan +Acked-by: Randy Dunlap +Tested-by: Randy Dunlap +Signed-off-by: Abel Vesa +Signed-off-by: Sasha Levin +--- + drivers/clk/imx/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig +index 1ac0c7990392d..087170a9b1484 100644 +--- a/drivers/clk/imx/Kconfig ++++ b/drivers/clk/imx/Kconfig +@@ -30,5 +30,6 @@ config CLK_IMX8QXP + bool "IMX8QXP SCU Clock" + depends on ARCH_MXC && IMX_SCU && ARM64 + select MXC_CLK_SCU ++ select MXC_CLK + help + Build the driver for IMX8QXP SCU based clocks. +-- +2.42.0 + diff --git a/queue-5.4/clk-keystone-pll-fix-a-couple-null-vs-is_err-checks.patch b/queue-5.4/clk-keystone-pll-fix-a-couple-null-vs-is_err-checks.patch new file mode 100644 index 00000000000..c6611433844 --- /dev/null +++ b/queue-5.4/clk-keystone-pll-fix-a-couple-null-vs-is_err-checks.patch @@ -0,0 +1,61 @@ +From f9be773c163932e9ecfc4204990a4853892a3c19 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 5 Oct 2023 17:01:57 +0300 +Subject: clk: keystone: pll: fix a couple NULL vs IS_ERR() checks + +From: Dan Carpenter + +[ Upstream commit a5d14f8b551eb1551c10053653ee8e27f19672fa ] + +The clk_register_divider() and clk_register_mux() functions returns +error pointers on error but this code checks for NULL. Fix that. + +Fixes: b9e0d40c0d83 ("clk: keystone: add Keystone PLL clock driver") +Signed-off-by: Dan Carpenter +Link: https://lore.kernel.org/r/d9da4c97-0da9-499f-9a21-1f8e3f148dc1@moroto.mountain +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/keystone/pll.c | 15 +++++++++------ + 1 file changed, 9 insertions(+), 6 deletions(-) + +diff --git a/drivers/clk/keystone/pll.c b/drivers/clk/keystone/pll.c +index ee5c72369334f..6bbdd4705d71f 100644 +--- a/drivers/clk/keystone/pll.c ++++ b/drivers/clk/keystone/pll.c +@@ -281,12 +281,13 @@ static void __init of_pll_div_clk_init(struct device_node *node) + + clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift, + mask, 0, NULL); +- if (clk) { +- of_clk_add_provider(node, of_clk_src_simple_get, clk); +- } else { ++ if (IS_ERR(clk)) { + pr_err("%s: error registering divider %s\n", __func__, clk_name); + iounmap(reg); ++ return; + } ++ ++ of_clk_add_provider(node, of_clk_src_simple_get, clk); + } + CLK_OF_DECLARE(pll_divider_clock, "ti,keystone,pll-divider-clock", of_pll_div_clk_init); + +@@ -328,10 +329,12 @@ static void __init of_pll_mux_clk_init(struct device_node *node) + clk = clk_register_mux(NULL, clk_name, (const char **)&parents, + ARRAY_SIZE(parents) , 0, reg, shift, mask, + 0, NULL); +- if (clk) +- of_clk_add_provider(node, of_clk_src_simple_get, clk); +- else ++ if (IS_ERR(clk)) { + pr_err("%s: error registering mux %s\n", __func__, clk_name); ++ return; ++ } ++ ++ of_clk_add_provider(node, of_clk_src_simple_get, clk); + } + CLK_OF_DECLARE(pll_mux_clock, "ti,keystone,pll-mux-clock", of_pll_mux_clk_init); + +-- +2.42.0 + diff --git a/queue-5.4/clk-mediatek-clk-mt2701-add-check-for-mtk_alloc_clk_.patch b/queue-5.4/clk-mediatek-clk-mt2701-add-check-for-mtk_alloc_clk_.patch new file mode 100644 index 00000000000..aec5f5766a2 --- /dev/null +++ b/queue-5.4/clk-mediatek-clk-mt2701-add-check-for-mtk_alloc_clk_.patch @@ -0,0 +1,66 @@ +From 6c65e888eb12eb30580db61a6981552ab35ed321 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 1 Sep 2023 10:46:58 +0800 +Subject: clk: mediatek: clk-mt2701: Add check for mtk_alloc_clk_data + +From: Jiasheng Jiang + +[ Upstream commit 0d6e24b422a2166a9297a8286ff2e6ab9a5e8cd3 ] + +Add the check for the return value of mtk_alloc_clk_data() in order to +avoid NULL pointer dereference. + +Fixes: e9862118272a ("clk: mediatek: Add MT2701 clock support") +Signed-off-by: Jiasheng Jiang +Link: https://lore.kernel.org/r/20230901024658.23405-1-jiasheng@iscas.ac.cn +Reviewed-by: Markus Schneider-Pargmann +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/mediatek/clk-mt2701.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c +index 695be0f774270..c67cd73aca171 100644 +--- a/drivers/clk/mediatek/clk-mt2701.c ++++ b/drivers/clk/mediatek/clk-mt2701.c +@@ -675,6 +675,8 @@ static int mtk_topckgen_init(struct platform_device *pdev) + return PTR_ERR(base); + + clk_data = mtk_alloc_clk_data(CLK_TOP_NR); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), + clk_data); +@@ -742,6 +744,8 @@ static void __init mtk_infrasys_init_early(struct device_node *node) + + if (!infra_clk_data) { + infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR); ++ if (!infra_clk_data) ++ return; + + for (i = 0; i < CLK_INFRA_NR; i++) + infra_clk_data->clks[i] = ERR_PTR(-EPROBE_DEFER); +@@ -768,6 +772,8 @@ static int mtk_infrasys_init(struct platform_device *pdev) + + if (!infra_clk_data) { + infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR); ++ if (!infra_clk_data) ++ return -ENOMEM; + } else { + for (i = 0; i < CLK_INFRA_NR; i++) { + if (infra_clk_data->clks[i] == ERR_PTR(-EPROBE_DEFER)) +@@ -896,6 +902,8 @@ static int mtk_pericfg_init(struct platform_device *pdev) + return PTR_ERR(base); + + clk_data = mtk_alloc_clk_data(CLK_PERI_NR); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), + clk_data); +-- +2.42.0 + diff --git a/queue-5.4/clk-mediatek-clk-mt6779-add-check-for-mtk_alloc_clk_.patch b/queue-5.4/clk-mediatek-clk-mt6779-add-check-for-mtk_alloc_clk_.patch new file mode 100644 index 00000000000..10b1c7e0ed1 --- /dev/null +++ b/queue-5.4/clk-mediatek-clk-mt6779-add-check-for-mtk_alloc_clk_.patch @@ -0,0 +1,47 @@ +From e99ba02b71db1c22da222095079d360a26f21496 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Sep 2023 17:34:04 +0800 +Subject: clk: mediatek: clk-mt6779: Add check for mtk_alloc_clk_data + +From: Jiasheng Jiang + +[ Upstream commit 1f57f78fbacf630430bf954e5a84caafdfea30c0 ] + +Add the check for the return value of mtk_alloc_clk_data() in order to +avoid NULL pointer dereference. + +Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support") +Signed-off-by: Jiasheng Jiang +Link: https://lore.kernel.org/r/20230912093407.21505-2-jiasheng@iscas.ac.cn +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/mediatek/clk-mt6779.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c +index 00920182bbe63..f7b5ec749ab96 100644 +--- a/drivers/clk/mediatek/clk-mt6779.c ++++ b/drivers/clk/mediatek/clk-mt6779.c +@@ -1216,6 +1216,8 @@ static int clk_mt6779_apmixed_probe(struct platform_device *pdev) + struct device_node *node = pdev->dev.of_node; + + clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); + +@@ -1237,6 +1239,8 @@ static int clk_mt6779_top_probe(struct platform_device *pdev) + return PTR_ERR(base); + + clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), + clk_data); +-- +2.42.0 + diff --git a/queue-5.4/clk-mediatek-clk-mt6797-add-check-for-mtk_alloc_clk_.patch b/queue-5.4/clk-mediatek-clk-mt6797-add-check-for-mtk_alloc_clk_.patch new file mode 100644 index 00000000000..a224b432cbf --- /dev/null +++ b/queue-5.4/clk-mediatek-clk-mt6797-add-check-for-mtk_alloc_clk_.patch @@ -0,0 +1,56 @@ +From e68d75d45c7e3d6e0c27a2bda1797e3fa4ed5ab4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Sep 2023 17:34:05 +0800 +Subject: clk: mediatek: clk-mt6797: Add check for mtk_alloc_clk_data + +From: Jiasheng Jiang + +[ Upstream commit 606f6366a35a3329545e38129804d65ef26ed7d2 ] + +Add the check for the return value of mtk_alloc_clk_data() in order to +avoid NULL pointer dereference. + +Fixes: 96596aa06628 ("clk: mediatek: add clk support for MT6797") +Signed-off-by: Jiasheng Jiang +Link: https://lore.kernel.org/r/20230912093407.21505-3-jiasheng@iscas.ac.cn +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/mediatek/clk-mt6797.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/clk/mediatek/clk-mt6797.c b/drivers/clk/mediatek/clk-mt6797.c +index f62b0428da0ee..9bef47161bde9 100644 +--- a/drivers/clk/mediatek/clk-mt6797.c ++++ b/drivers/clk/mediatek/clk-mt6797.c +@@ -392,6 +392,8 @@ static int mtk_topckgen_init(struct platform_device *pdev) + return PTR_ERR(base); + + clk_data = mtk_alloc_clk_data(CLK_TOP_NR); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs), + clk_data); +@@ -564,6 +566,8 @@ static void mtk_infrasys_init_early(struct device_node *node) + + if (!infra_clk_data) { + infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR); ++ if (!infra_clk_data) ++ return; + + for (i = 0; i < CLK_INFRA_NR; i++) + infra_clk_data->clks[i] = ERR_PTR(-EPROBE_DEFER); +@@ -588,6 +592,8 @@ static int mtk_infrasys_init(struct platform_device *pdev) + + if (!infra_clk_data) { + infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR); ++ if (!infra_clk_data) ++ return -ENOMEM; + } else { + for (i = 0; i < CLK_INFRA_NR; i++) { + if (infra_clk_data->clks[i] == ERR_PTR(-EPROBE_DEFER)) +-- +2.42.0 + diff --git a/queue-5.4/clk-mediatek-clk-mt7629-add-check-for-mtk_alloc_clk_.patch b/queue-5.4/clk-mediatek-clk-mt7629-add-check-for-mtk_alloc_clk_.patch new file mode 100644 index 00000000000..c7d8ed2534b --- /dev/null +++ b/queue-5.4/clk-mediatek-clk-mt7629-add-check-for-mtk_alloc_clk_.patch @@ -0,0 +1,56 @@ +From 35f20c6e760c3bec35ca838919311bb3f96021e4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Sep 2023 17:34:07 +0800 +Subject: clk: mediatek: clk-mt7629: Add check for mtk_alloc_clk_data + +From: Jiasheng Jiang + +[ Upstream commit 2befa515c1bb6cdd33c262b909d93d1973a219aa ] + +Add the check for the return value of mtk_alloc_clk_data() in order to +avoid NULL pointer dereference. + +Fixes: 3b5e748615e7 ("clk: mediatek: add clock support for MT7629 SoC") +Signed-off-by: Jiasheng Jiang +Link: https://lore.kernel.org/r/20230912093407.21505-5-jiasheng@iscas.ac.cn +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/mediatek/clk-mt7629.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c +index d6233994af5a3..1e6abbddf02c5 100644 +--- a/drivers/clk/mediatek/clk-mt7629.c ++++ b/drivers/clk/mediatek/clk-mt7629.c +@@ -581,6 +581,8 @@ static int mtk_topckgen_init(struct platform_device *pdev) + return PTR_ERR(base); + + clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), + clk_data); +@@ -605,6 +607,8 @@ static int mtk_infrasys_init(struct platform_device *pdev) + int r; + + clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), + clk_data); +@@ -633,6 +637,8 @@ static int mtk_pericfg_init(struct platform_device *pdev) + return PTR_ERR(base); + + clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), + clk_data); +-- +2.42.0 + diff --git a/queue-5.4/clk-mediatek-clk-mt7629-eth-add-check-for-mtk_alloc_.patch b/queue-5.4/clk-mediatek-clk-mt7629-eth-add-check-for-mtk_alloc_.patch new file mode 100644 index 00000000000..37d7237b24f --- /dev/null +++ b/queue-5.4/clk-mediatek-clk-mt7629-eth-add-check-for-mtk_alloc_.patch @@ -0,0 +1,47 @@ +From fdf572cf3bdb47caaa3a1ecf079966f9379db543 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Sep 2023 17:34:06 +0800 +Subject: clk: mediatek: clk-mt7629-eth: Add check for mtk_alloc_clk_data + +From: Jiasheng Jiang + +[ Upstream commit 0884393c63cc9a1772f7121a6645ba7bd76feeb9 ] + +Add the check for the return value of mtk_alloc_clk_data() in order to +avoid NULL pointer dereference. + +Fixes: 3b5e748615e7 ("clk: mediatek: add clock support for MT7629 SoC") +Signed-off-by: Jiasheng Jiang +Link: https://lore.kernel.org/r/20230912093407.21505-4-jiasheng@iscas.ac.cn +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/mediatek/clk-mt7629-eth.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/clk/mediatek/clk-mt7629-eth.c b/drivers/clk/mediatek/clk-mt7629-eth.c +index 88279d0ea1a76..3ab7b672f8c70 100644 +--- a/drivers/clk/mediatek/clk-mt7629-eth.c ++++ b/drivers/clk/mediatek/clk-mt7629-eth.c +@@ -83,6 +83,8 @@ static int clk_mt7629_ethsys_init(struct platform_device *pdev) + int r; + + clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_gates(node, eth_clks, CLK_ETH_NR_CLK, clk_data); + +@@ -105,6 +107,8 @@ static int clk_mt7629_sgmiisys_init(struct platform_device *pdev) + int r; + + clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK); ++ if (!clk_data) ++ return -ENOMEM; + + mtk_clk_register_gates(node, sgmii_clks[id++], CLK_SGMII_NR_CLK, + clk_data); +-- +2.42.0 + diff --git a/queue-5.4/clk-npcm7xx-fix-incorrect-kfree.patch b/queue-5.4/clk-npcm7xx-fix-incorrect-kfree.patch new file mode 100644 index 00000000000..dbb9b03f935 --- /dev/null +++ b/queue-5.4/clk-npcm7xx-fix-incorrect-kfree.patch @@ -0,0 +1,45 @@ +From 24a957b343924495f7ed8ad18f839e8992ee10af Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 23 Sep 2023 15:31:27 +0200 +Subject: clk: npcm7xx: Fix incorrect kfree +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Jonathan Neuschäfer + +[ Upstream commit bbc5080bef4a245106aa8e8d424ba8847ca7c0ca ] + +The corresponding allocation is: + +> npcm7xx_clk_data = kzalloc(struct_size(npcm7xx_clk_data, hws, +> NPCM7XX_NUM_CLOCKS), GFP_KERNEL); + +... so, kfree should be applied to npcm7xx_clk_data, not +npcm7xx_clk_data->hws. + +Fixes: fcfd14369856 ("clk: npcm7xx: add clock controller") +Signed-off-by: Jonathan Neuschäfer +Link: https://lore.kernel.org/r/20230923133127.1815621-1-j.neuschaefer@gmx.net +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/clk-npcm7xx.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/clk/clk-npcm7xx.c b/drivers/clk/clk-npcm7xx.c +index 27a86b7a34dbf..c82df105b0a21 100644 +--- a/drivers/clk/clk-npcm7xx.c ++++ b/drivers/clk/clk-npcm7xx.c +@@ -647,7 +647,7 @@ static void __init npcm7xx_clk_init(struct device_node *clk_np) + return; + + npcm7xx_init_fail: +- kfree(npcm7xx_clk_data->hws); ++ kfree(npcm7xx_clk_data); + npcm7xx_init_np_err: + iounmap(clk_base); + npcm7xx_init_error: +-- +2.42.0 + diff --git a/queue-5.4/clk-qcom-clk-rcg2-fix-clock-rate-overflow-for-high-p.patch b/queue-5.4/clk-qcom-clk-rcg2-fix-clock-rate-overflow-for-high-p.patch new file mode 100644 index 00000000000..caef40a2966 --- /dev/null +++ b/queue-5.4/clk-qcom-clk-rcg2-fix-clock-rate-overflow-for-high-p.patch @@ -0,0 +1,57 @@ +From fe43c8bd9ddd6221cf7831fab97bb9e4a94bf2db Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 1 Sep 2023 13:06:40 +0530 +Subject: clk: qcom: clk-rcg2: Fix clock rate overflow for high parent + frequencies + +From: Devi Priya + +[ Upstream commit f7b7d30158cff246667273bd2a62fc93ee0725d2 ] + +If the parent clock rate is greater than unsigned long max/2 then +integer overflow happens when calculating the clock rate on 32-bit systems. +As RCG2 uses half integer dividers, the clock rate is first being +multiplied by 2 which will overflow the unsigned long max value. +Hence, replace the common pattern of doing 64-bit multiplication +and then a do_div() call with simpler mult_frac call. + +Fixes: bcd61c0f535a ("clk: qcom: Add support for root clock generators (RCGs)") +Signed-off-by: Devi Priya +Reviewed-by: Marijn Suijten +Link: https://lore.kernel.org/r/20230901073640.4973-1-quic_devipriy@quicinc.com +[bjorn: Also drop unnecessary {} around single statements] +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/clk-rcg2.c | 14 ++++---------- + 1 file changed, 4 insertions(+), 10 deletions(-) + +diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c +index 89c1adeb84d44..40374f3d3d209 100644 +--- a/drivers/clk/qcom/clk-rcg2.c ++++ b/drivers/clk/qcom/clk-rcg2.c +@@ -146,17 +146,11 @@ static int clk_rcg2_set_parent(struct clk_hw *hw, u8 index) + static unsigned long + calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) + { +- if (hid_div) { +- rate *= 2; +- rate /= hid_div + 1; +- } ++ if (hid_div) ++ rate = mult_frac(rate, 2, hid_div + 1); + +- if (mode) { +- u64 tmp = rate; +- tmp *= m; +- do_div(tmp, n); +- rate = tmp; +- } ++ if (mode) ++ rate = mult_frac(rate, m, n); + + return rate; + } +-- +2.42.0 + diff --git a/queue-5.4/clk-qcom-gcc-msm8996-drop-unsupported-clock-sources.patch b/queue-5.4/clk-qcom-gcc-msm8996-drop-unsupported-clock-sources.patch new file mode 100644 index 00000000000..2e3dd02000a --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-msm8996-drop-unsupported-clock-sources.patch @@ -0,0 +1,123 @@ +From db779ffb82bc2173ae7849246192a92d9e32c5f5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 Dec 2021 07:54:12 +0300 +Subject: clk: qcom: gcc-msm8996: drop unsupported clock sources + +From: Dmitry Baryshkov + +[ Upstream commit b554a687b4971ae137e92ee3feddc38e85a38d60 ] + +In preparation of updating the msm8996 gcc driver, drop all unsupported +GPLL sources (gpll1/gpll1_early_div, gpll2/gpll2_early and gpll3). +Downstream kernel also does not provide support for these GPLL sources, +so it is safe to drop them. + +Signed-off-by: Dmitry Baryshkov +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20211228045415.20543-14-dmitry.baryshkov@linaro.org +Stable-dep-of: 4afda5f6bcdf ("clk: qcom: gcc-msm8996: Remove RPM bus clocks") +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-msm8996.c | 55 ++++------------------------------ + 1 file changed, 6 insertions(+), 49 deletions(-) + +diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c +index bb6bf4f1476f1..a166f4cdc0d49 100644 +--- a/drivers/clk/qcom/gcc-msm8996.c ++++ b/drivers/clk/qcom/gcc-msm8996.c +@@ -27,15 +27,10 @@ + enum { + P_XO, + P_GPLL0, +- P_GPLL2, +- P_GPLL3, +- P_GPLL1, +- P_GPLL2_EARLY, + P_GPLL0_EARLY_DIV, + P_SLEEP_CLK, + P_GPLL4, + P_AUD_REF_CLK, +- P_GPLL1_EARLY_DIV + }; + + static const struct parent_map gcc_sleep_clk_map[] = { +@@ -130,44 +125,6 @@ static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = { + "gpll0_early_div" + }; + +-static const struct parent_map gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div_map[] = { +- { P_XO, 0 }, +- { P_GPLL0, 1 }, +- { P_GPLL1_EARLY_DIV, 3 }, +- { P_GPLL1, 4 }, +- { P_GPLL4, 5 }, +- { P_GPLL0_EARLY_DIV, 6 } +-}; +- +-static const char * const gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div[] = { +- "xo", +- "gpll0", +- "gpll1_early_div", +- "gpll1", +- "gpll4", +- "gpll0_early_div" +-}; +- +-static const struct parent_map gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early_div_map[] = { +- { P_XO, 0 }, +- { P_GPLL0, 1 }, +- { P_GPLL2, 2 }, +- { P_GPLL3, 3 }, +- { P_GPLL1, 4 }, +- { P_GPLL2_EARLY, 5 }, +- { P_GPLL0_EARLY_DIV, 6 } +-}; +- +-static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early_div[] = { +- "xo", +- "gpll0", +- "gpll2", +- "gpll3", +- "gpll1", +- "gpll2_early", +- "gpll0_early_div" +-}; +- + static struct clk_fixed_factor xo = { + .mult = 1, + .div = 1, +@@ -285,12 +242,12 @@ static const struct freq_tbl ftbl_system_noc_clk_src[] = { + static struct clk_rcg2 system_noc_clk_src = { + .cmd_rcgr = 0x0401c, + .hid_width = 5, +- .parent_map = gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early_div_map, ++ .parent_map = gcc_xo_gpll0_gpll0_early_div_map, + .freq_tbl = ftbl_system_noc_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "system_noc_clk_src", +- .parent_names = gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early_div, +- .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early_div), ++ .parent_names = gcc_xo_gpll0_gpll0_early_div, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1257,12 +1214,12 @@ static const struct freq_tbl ftbl_qspi_ser_clk_src[] = { + static struct clk_rcg2 qspi_ser_clk_src = { + .cmd_rcgr = 0x8b00c, + .hid_width = 5, +- .parent_map = gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div_map, ++ .parent_map = gcc_xo_gpll0_gpll4_gpll0_early_div_map, + .freq_tbl = ftbl_qspi_ser_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "qspi_ser_clk_src", +- .parent_names = gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div, +- .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div), ++ .parent_names = gcc_xo_gpll0_gpll4_gpll0_early_div, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +-- +2.42.0 + diff --git a/queue-5.4/clk-qcom-gcc-msm8996-move-clock-parent-tables-down.patch b/queue-5.4/clk-qcom-gcc-msm8996-move-clock-parent-tables-down.patch new file mode 100644 index 00000000000..9e1b75c26ad --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-msm8996-move-clock-parent-tables-down.patch @@ -0,0 +1,228 @@ +From f8f51b556fddeae69ee1b248657ffda0731ab063 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 Dec 2021 07:54:13 +0300 +Subject: clk: qcom: gcc-msm8996: move clock parent tables down + +From: Dmitry Baryshkov + +[ Upstream commit 1a2789cff03ccdeb70084157387f4a7bf4d2099f ] + +Move clock parent tables down, after the GPLL declrataions, so that we +can use gpll hw clock fields in the next commit. + +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Marijn Suijten +Reviewed-by: Stephen Boyd +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20211228045415.20543-15-dmitry.baryshkov@linaro.org +Stable-dep-of: 4afda5f6bcdf ("clk: qcom: gcc-msm8996: Remove RPM bus clocks") +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-msm8996.c | 184 ++++++++++++++++----------------- + 1 file changed, 92 insertions(+), 92 deletions(-) + +diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c +index a166f4cdc0d49..dbfbdef4044c7 100644 +--- a/drivers/clk/qcom/gcc-msm8996.c ++++ b/drivers/clk/qcom/gcc-msm8996.c +@@ -33,98 +33,6 @@ enum { + P_AUD_REF_CLK, + }; + +-static const struct parent_map gcc_sleep_clk_map[] = { +- { P_SLEEP_CLK, 5 } +-}; +- +-static const char * const gcc_sleep_clk[] = { +- "sleep_clk" +-}; +- +-static const struct parent_map gcc_xo_gpll0_map[] = { +- { P_XO, 0 }, +- { P_GPLL0, 1 } +-}; +- +-static const char * const gcc_xo_gpll0[] = { +- "xo", +- "gpll0" +-}; +- +-static const struct parent_map gcc_xo_sleep_clk_map[] = { +- { P_XO, 0 }, +- { P_SLEEP_CLK, 5 } +-}; +- +-static const char * const gcc_xo_sleep_clk[] = { +- "xo", +- "sleep_clk" +-}; +- +-static const struct parent_map gcc_xo_gpll0_gpll0_early_div_map[] = { +- { P_XO, 0 }, +- { P_GPLL0, 1 }, +- { P_GPLL0_EARLY_DIV, 6 } +-}; +- +-static const char * const gcc_xo_gpll0_gpll0_early_div[] = { +- "xo", +- "gpll0", +- "gpll0_early_div" +-}; +- +-static const struct parent_map gcc_xo_gpll0_gpll4_map[] = { +- { P_XO, 0 }, +- { P_GPLL0, 1 }, +- { P_GPLL4, 5 } +-}; +- +-static const char * const gcc_xo_gpll0_gpll4[] = { +- "xo", +- "gpll0", +- "gpll4" +-}; +- +-static const struct parent_map gcc_xo_gpll0_aud_ref_clk_map[] = { +- { P_XO, 0 }, +- { P_GPLL0, 1 }, +- { P_AUD_REF_CLK, 2 } +-}; +- +-static const char * const gcc_xo_gpll0_aud_ref_clk[] = { +- "xo", +- "gpll0", +- "aud_ref_clk" +-}; +- +-static const struct parent_map gcc_xo_gpll0_sleep_clk_gpll0_early_div_map[] = { +- { P_XO, 0 }, +- { P_GPLL0, 1 }, +- { P_SLEEP_CLK, 5 }, +- { P_GPLL0_EARLY_DIV, 6 } +-}; +- +-static const char * const gcc_xo_gpll0_sleep_clk_gpll0_early_div[] = { +- "xo", +- "gpll0", +- "sleep_clk", +- "gpll0_early_div" +-}; +- +-static const struct parent_map gcc_xo_gpll0_gpll4_gpll0_early_div_map[] = { +- { P_XO, 0 }, +- { P_GPLL0, 1 }, +- { P_GPLL4, 5 }, +- { P_GPLL0_EARLY_DIV, 6 } +-}; +- +-static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = { +- "xo", +- "gpll0", +- "gpll4", +- "gpll0_early_div" +-}; +- + static struct clk_fixed_factor xo = { + .mult = 1, + .div = 1, +@@ -229,6 +137,98 @@ static struct clk_alpha_pll_postdiv gpll4 = { + }, + }; + ++static const struct parent_map gcc_sleep_clk_map[] = { ++ { P_SLEEP_CLK, 5 } ++}; ++ ++static const char * const gcc_sleep_clk[] = { ++ "sleep_clk" ++}; ++ ++static const struct parent_map gcc_xo_gpll0_map[] = { ++ { P_XO, 0 }, ++ { P_GPLL0, 1 } ++}; ++ ++static const char * const gcc_xo_gpll0[] = { ++ "xo", ++ "gpll0" ++}; ++ ++static const struct parent_map gcc_xo_sleep_clk_map[] = { ++ { P_XO, 0 }, ++ { P_SLEEP_CLK, 5 } ++}; ++ ++static const char * const gcc_xo_sleep_clk[] = { ++ "xo", ++ "sleep_clk" ++}; ++ ++static const struct parent_map gcc_xo_gpll0_gpll0_early_div_map[] = { ++ { P_XO, 0 }, ++ { P_GPLL0, 1 }, ++ { P_GPLL0_EARLY_DIV, 6 } ++}; ++ ++static const char * const gcc_xo_gpll0_gpll0_early_div[] = { ++ "xo", ++ "gpll0", ++ "gpll0_early_div" ++}; ++ ++static const struct parent_map gcc_xo_gpll0_gpll4_map[] = { ++ { P_XO, 0 }, ++ { P_GPLL0, 1 }, ++ { P_GPLL4, 5 } ++}; ++ ++static const char * const gcc_xo_gpll0_gpll4[] = { ++ "xo", ++ "gpll0", ++ "gpll4" ++}; ++ ++static const struct parent_map gcc_xo_gpll0_aud_ref_clk_map[] = { ++ { P_XO, 0 }, ++ { P_GPLL0, 1 }, ++ { P_AUD_REF_CLK, 2 } ++}; ++ ++static const char * const gcc_xo_gpll0_aud_ref_clk[] = { ++ "xo", ++ "gpll0", ++ "aud_ref_clk" ++}; ++ ++static const struct parent_map gcc_xo_gpll0_sleep_clk_gpll0_early_div_map[] = { ++ { P_XO, 0 }, ++ { P_GPLL0, 1 }, ++ { P_SLEEP_CLK, 5 }, ++ { P_GPLL0_EARLY_DIV, 6 } ++}; ++ ++static const char * const gcc_xo_gpll0_sleep_clk_gpll0_early_div[] = { ++ "xo", ++ "gpll0", ++ "sleep_clk", ++ "gpll0_early_div" ++}; ++ ++static const struct parent_map gcc_xo_gpll0_gpll4_gpll0_early_div_map[] = { ++ { P_XO, 0 }, ++ { P_GPLL0, 1 }, ++ { P_GPLL4, 5 }, ++ { P_GPLL0_EARLY_DIV, 6 } ++}; ++ ++static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = { ++ "xo", ++ "gpll0", ++ "gpll4", ++ "gpll0_early_div" ++}; ++ + static const struct freq_tbl ftbl_system_noc_clk_src[] = { + F(19200000, P_XO, 1, 0, 0), + F(50000000, P_GPLL0_EARLY_DIV, 6, 0, 0), +-- +2.42.0 + diff --git a/queue-5.4/clk-qcom-gcc-msm8996-remove-rpm-bus-clocks.patch b/queue-5.4/clk-qcom-gcc-msm8996-remove-rpm-bus-clocks.patch new file mode 100644 index 00000000000..abf58a6bdf0 --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-msm8996-remove-rpm-bus-clocks.patch @@ -0,0 +1,521 @@ +From 218c4a0134c3f832d8738b1294d2fe81f6de4877 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 31 Aug 2023 11:39:14 +0200 +Subject: clk: qcom: gcc-msm8996: Remove RPM bus clocks + +From: Konrad Dybcio + +[ Upstream commit 4afda5f6bcdf673ef2556fcfa458daf3a5a648d8 ] + +The GCC driver contains clocks that are owned (meaning configured and +scaled) by the RPM core. + +Remove them from Linux to stop interjecting the RPM's logic. + +Fixes: b1e010c0730a ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver") +Signed-off-by: Konrad Dybcio +Reviewed-by: Dmitry Baryshkov +Tested-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20230830-topic-rpmbusclocks8996gcc-v1-1-9e99bedcdc3b@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-msm8996.c | 237 +-------------------------------- + 1 file changed, 5 insertions(+), 232 deletions(-) + +diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c +index 5b5ee4b7ae81f..824eb03a5f3e7 100644 +--- a/drivers/clk/qcom/gcc-msm8996.c ++++ b/drivers/clk/qcom/gcc-msm8996.c +@@ -245,71 +245,6 @@ static const struct clk_parent_data gcc_xo_gpll0_gpll4_gpll0_early_div[] = { + { .hw = &gpll0_early_div.hw } + }; + +-static const struct freq_tbl ftbl_system_noc_clk_src[] = { +- F(19200000, P_XO, 1, 0, 0), +- F(50000000, P_GPLL0_EARLY_DIV, 6, 0, 0), +- F(100000000, P_GPLL0, 6, 0, 0), +- F(150000000, P_GPLL0, 4, 0, 0), +- F(200000000, P_GPLL0, 3, 0, 0), +- F(240000000, P_GPLL0, 2.5, 0, 0), +- { } +-}; +- +-static struct clk_rcg2 system_noc_clk_src = { +- .cmd_rcgr = 0x0401c, +- .hid_width = 5, +- .parent_map = gcc_xo_gpll0_gpll0_early_div_map, +- .freq_tbl = ftbl_system_noc_clk_src, +- .clkr.hw.init = &(struct clk_init_data){ +- .name = "system_noc_clk_src", +- .parent_data = gcc_xo_gpll0_gpll0_early_div, +- .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), +- .ops = &clk_rcg2_ops, +- }, +-}; +- +-static const struct freq_tbl ftbl_config_noc_clk_src[] = { +- F(19200000, P_XO, 1, 0, 0), +- F(37500000, P_GPLL0, 16, 0, 0), +- F(75000000, P_GPLL0, 8, 0, 0), +- { } +-}; +- +-static struct clk_rcg2 config_noc_clk_src = { +- .cmd_rcgr = 0x0500c, +- .hid_width = 5, +- .parent_map = gcc_xo_gpll0_map, +- .freq_tbl = ftbl_config_noc_clk_src, +- .clkr.hw.init = &(struct clk_init_data){ +- .name = "config_noc_clk_src", +- .parent_data = gcc_xo_gpll0, +- .num_parents = ARRAY_SIZE(gcc_xo_gpll0), +- .ops = &clk_rcg2_ops, +- }, +-}; +- +-static const struct freq_tbl ftbl_periph_noc_clk_src[] = { +- F(19200000, P_XO, 1, 0, 0), +- F(37500000, P_GPLL0, 16, 0, 0), +- F(50000000, P_GPLL0, 12, 0, 0), +- F(75000000, P_GPLL0, 8, 0, 0), +- F(100000000, P_GPLL0, 6, 0, 0), +- { } +-}; +- +-static struct clk_rcg2 periph_noc_clk_src = { +- .cmd_rcgr = 0x06014, +- .hid_width = 5, +- .parent_map = gcc_xo_gpll0_map, +- .freq_tbl = ftbl_periph_noc_clk_src, +- .clkr.hw.init = &(struct clk_init_data){ +- .name = "periph_noc_clk_src", +- .parent_data = gcc_xo_gpll0, +- .num_parents = ARRAY_SIZE(gcc_xo_gpll0), +- .ops = &clk_rcg2_ops, +- }, +-}; +- + static const struct freq_tbl ftbl_usb30_master_clk_src[] = { + F(19200000, P_XO, 1, 0, 0), + F(120000000, P_GPLL0, 5, 0, 0), +@@ -1298,11 +1233,7 @@ static struct clk_branch gcc_mmss_noc_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mmss_noc_cfg_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ .flags = CLK_IGNORE_UNUSED, + .ops = &clk_branch2_ops, + }, + }, +@@ -1465,11 +1396,6 @@ static struct clk_branch gcc_usb_phy_cfg_ahb2phy_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb_phy_cfg_ahb2phy_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -1499,11 +1425,6 @@ static struct clk_branch gcc_sdcc1_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc1_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -1550,11 +1471,6 @@ static struct clk_branch gcc_sdcc2_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc2_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -1584,11 +1500,6 @@ static struct clk_branch gcc_sdcc3_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc3_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -1618,11 +1529,6 @@ static struct clk_branch gcc_sdcc4_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc4_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -1636,11 +1542,6 @@ static struct clk_branch gcc_blsp1_ahb_clk = { + .enable_mask = BIT(17), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -1978,11 +1879,6 @@ static struct clk_branch gcc_blsp2_ahb_clk = { + .enable_mask = BIT(15), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2319,11 +2215,6 @@ static struct clk_branch gcc_pdm_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pdm_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2354,11 +2245,6 @@ static struct clk_branch gcc_prng_ahb_clk = { + .enable_mask = BIT(13), + .hw.init = &(struct clk_init_data){ + .name = "gcc_prng_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2371,11 +2257,6 @@ static struct clk_branch gcc_tsif_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_tsif_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2423,11 +2304,6 @@ static struct clk_branch gcc_boot_rom_ahb_clk = { + .enable_mask = BIT(10), + .hw.init = &(struct clk_init_data){ + .name = "gcc_boot_rom_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2521,11 +2397,6 @@ static struct clk_branch gcc_pcie_0_slv_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_slv_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2538,11 +2409,6 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_mstr_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2555,11 +2421,6 @@ static struct clk_branch gcc_pcie_0_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_cfg_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2607,11 +2468,6 @@ static struct clk_branch gcc_pcie_1_slv_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_slv_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2624,11 +2480,6 @@ static struct clk_branch gcc_pcie_1_mstr_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_mstr_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2641,11 +2492,6 @@ static struct clk_branch gcc_pcie_1_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_cfg_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2693,11 +2539,6 @@ static struct clk_branch gcc_pcie_2_slv_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_2_slv_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2710,11 +2551,6 @@ static struct clk_branch gcc_pcie_2_mstr_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_2_mstr_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2727,11 +2563,6 @@ static struct clk_branch gcc_pcie_2_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_2_cfg_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2779,11 +2610,6 @@ static struct clk_branch gcc_pcie_phy_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_phy_cfg_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -2830,11 +2656,6 @@ static struct clk_branch gcc_ufs_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -3061,11 +2882,7 @@ static struct clk_branch gcc_aggre0_snoc_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_aggre0_snoc_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -3078,11 +2895,7 @@ static struct clk_branch gcc_aggre0_cnoc_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_aggre0_cnoc_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -3095,11 +2908,7 @@ static struct clk_branch gcc_smmu_aggre0_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_smmu_aggre0_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -3112,11 +2921,7 @@ static struct clk_branch gcc_smmu_aggre0_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_smmu_aggre0_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -3163,10 +2968,6 @@ static struct clk_branch gcc_dcc_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_dcc_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +@@ -3179,10 +2980,6 @@ static struct clk_branch gcc_aggre0_noc_mpu_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_aggre0_noc_mpu_cfg_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +@@ -3195,11 +2992,6 @@ static struct clk_branch gcc_qspi_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_qspi_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &periph_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -3327,10 +3119,6 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_cfg_ahb_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &config_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +@@ -3343,10 +3131,6 @@ static struct clk_branch gcc_mss_mnoc_bimc_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_mnoc_bimc_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +@@ -3359,10 +3143,6 @@ static struct clk_branch gcc_mss_snoc_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_snoc_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +@@ -3375,10 +3155,6 @@ static struct clk_branch gcc_mss_q6_bimc_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_q6_bimc_axi_clk", +- .parent_hws = (const struct clk_hw*[]){ +- &system_noc_clk_src.clkr.hw, +- }, +- .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +@@ -3474,9 +3250,6 @@ static struct clk_regmap *gcc_msm8996_clocks[] = { + [GPLL0] = &gpll0.clkr, + [GPLL4_EARLY] = &gpll4_early.clkr, + [GPLL4] = &gpll4.clkr, +- [SYSTEM_NOC_CLK_SRC] = &system_noc_clk_src.clkr, +- [CONFIG_NOC_CLK_SRC] = &config_noc_clk_src.clkr, +- [PERIPH_NOC_CLK_SRC] = &periph_noc_clk_src.clkr, + [USB30_MASTER_CLK_SRC] = &usb30_master_clk_src.clkr, + [USB30_MOCK_UTMI_CLK_SRC] = &usb30_mock_utmi_clk_src.clkr, + [USB3_PHY_AUX_CLK_SRC] = &usb3_phy_aux_clk_src.clkr, +-- +2.42.0 + diff --git a/queue-5.4/clk-qcom-gcc-msm8996-use-array_size-instead-of-speci.patch b/queue-5.4/clk-qcom-gcc-msm8996-use-array_size-instead-of-speci.patch new file mode 100644 index 00000000000..f51f5f1a988 --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-msm8996-use-array_size-instead-of-speci.patch @@ -0,0 +1,579 @@ +From 5f8aed0d7f81c54b02a0bdfeafa52efbdd75ec72 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 Dec 2021 07:54:11 +0300 +Subject: clk: qcom: gcc-msm8996: use ARRAY_SIZE instead of specifying + num_parents + +From: Dmitry Baryshkov + +[ Upstream commit ed96df3d461eeb2c40cb06ca5fd51644d0f4a2c0 ] + +Use ARRAY_SIZE() instead of manually specifying num_parents. This makes +adding/removing entries to/from parent_data easy and errorproof. + +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Marijn Suijten +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20211228045415.20543-13-dmitry.baryshkov@linaro.org +Stable-dep-of: 4afda5f6bcdf ("clk: qcom: gcc-msm8996: Remove RPM bus clocks") +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-msm8996.c | 122 ++++++++++++++++----------------- + 1 file changed, 61 insertions(+), 61 deletions(-) + +diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c +index c1e1148f0261d..bb6bf4f1476f1 100644 +--- a/drivers/clk/qcom/gcc-msm8996.c ++++ b/drivers/clk/qcom/gcc-msm8996.c +@@ -290,7 +290,7 @@ static struct clk_rcg2 system_noc_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "system_noc_clk_src", + .parent_names = gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early_div, +- .num_parents = 7, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -310,7 +310,7 @@ static struct clk_rcg2 config_noc_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "config_noc_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -332,7 +332,7 @@ static struct clk_rcg2 periph_noc_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "periph_noc_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -353,7 +353,7 @@ static struct clk_rcg2 usb30_master_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb30_master_clk_src", + .parent_names = gcc_xo_gpll0_gpll0_early_div, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -371,7 +371,7 @@ static struct clk_rcg2 usb30_mock_utmi_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb30_mock_utmi_clk_src", + .parent_names = gcc_xo_gpll0_gpll0_early_div, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -389,7 +389,7 @@ static struct clk_rcg2 usb3_phy_aux_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb3_phy_aux_clk_src", + .parent_names = gcc_xo_sleep_clk, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_sleep_clk), + .ops = &clk_rcg2_ops, + }, + }; +@@ -408,7 +408,7 @@ static struct clk_rcg2 usb20_master_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb20_master_clk_src", + .parent_names = gcc_xo_gpll0_gpll0_early_div, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -421,7 +421,7 @@ static struct clk_rcg2 usb20_mock_utmi_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb20_mock_utmi_clk_src", + .parent_names = gcc_xo_gpll0_gpll0_early_div, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -447,7 +447,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc1_apps_clk_src", + .parent_names = gcc_xo_gpll0_gpll4_gpll0_early_div, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4_gpll0_early_div), + .ops = &clk_rcg2_floor_ops, + }, + }; +@@ -467,7 +467,7 @@ static struct clk_rcg2 sdcc1_ice_core_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc1_ice_core_clk_src", + .parent_names = gcc_xo_gpll0_gpll4_gpll0_early_div, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -492,7 +492,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc2_apps_clk_src", + .parent_names = gcc_xo_gpll0_gpll4, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4), + .ops = &clk_rcg2_floor_ops, + }, + }; +@@ -506,7 +506,7 @@ static struct clk_rcg2 sdcc3_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc3_apps_clk_src", + .parent_names = gcc_xo_gpll0_gpll4, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4), + .ops = &clk_rcg2_floor_ops, + }, + }; +@@ -530,7 +530,7 @@ static struct clk_rcg2 sdcc4_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc4_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_floor_ops, + }, + }; +@@ -555,7 +555,7 @@ static struct clk_rcg2 blsp1_qup1_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup1_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -574,7 +574,7 @@ static struct clk_rcg2 blsp1_qup1_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup1_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -607,7 +607,7 @@ static struct clk_rcg2 blsp1_uart1_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart1_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -621,7 +621,7 @@ static struct clk_rcg2 blsp1_qup2_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup2_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -634,7 +634,7 @@ static struct clk_rcg2 blsp1_qup2_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup2_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -648,7 +648,7 @@ static struct clk_rcg2 blsp1_uart2_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart2_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -662,7 +662,7 @@ static struct clk_rcg2 blsp1_qup3_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup3_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -675,7 +675,7 @@ static struct clk_rcg2 blsp1_qup3_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup3_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -689,7 +689,7 @@ static struct clk_rcg2 blsp1_uart3_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart3_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -703,7 +703,7 @@ static struct clk_rcg2 blsp1_qup4_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup4_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -716,7 +716,7 @@ static struct clk_rcg2 blsp1_qup4_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup4_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -730,7 +730,7 @@ static struct clk_rcg2 blsp1_uart4_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart4_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -744,7 +744,7 @@ static struct clk_rcg2 blsp1_qup5_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup5_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -757,7 +757,7 @@ static struct clk_rcg2 blsp1_qup5_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup5_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -771,7 +771,7 @@ static struct clk_rcg2 blsp1_uart5_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart5_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -785,7 +785,7 @@ static struct clk_rcg2 blsp1_qup6_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup6_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -798,7 +798,7 @@ static struct clk_rcg2 blsp1_qup6_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup6_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -812,7 +812,7 @@ static struct clk_rcg2 blsp1_uart6_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart6_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -826,7 +826,7 @@ static struct clk_rcg2 blsp2_qup1_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup1_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -839,7 +839,7 @@ static struct clk_rcg2 blsp2_qup1_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup1_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -853,7 +853,7 @@ static struct clk_rcg2 blsp2_uart1_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart1_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -867,7 +867,7 @@ static struct clk_rcg2 blsp2_qup2_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup2_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -880,7 +880,7 @@ static struct clk_rcg2 blsp2_qup2_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup2_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -894,7 +894,7 @@ static struct clk_rcg2 blsp2_uart2_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart2_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -908,7 +908,7 @@ static struct clk_rcg2 blsp2_qup3_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup3_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -921,7 +921,7 @@ static struct clk_rcg2 blsp2_qup3_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup3_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -935,7 +935,7 @@ static struct clk_rcg2 blsp2_uart3_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart3_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -949,7 +949,7 @@ static struct clk_rcg2 blsp2_qup4_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup4_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -962,7 +962,7 @@ static struct clk_rcg2 blsp2_qup4_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup4_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -976,7 +976,7 @@ static struct clk_rcg2 blsp2_uart4_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart4_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -990,7 +990,7 @@ static struct clk_rcg2 blsp2_qup5_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup5_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1003,7 +1003,7 @@ static struct clk_rcg2 blsp2_qup5_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup5_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1017,7 +1017,7 @@ static struct clk_rcg2 blsp2_uart5_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart5_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1031,7 +1031,7 @@ static struct clk_rcg2 blsp2_qup6_spi_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup6_spi_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1044,7 +1044,7 @@ static struct clk_rcg2 blsp2_qup6_i2c_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup6_i2c_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1058,7 +1058,7 @@ static struct clk_rcg2 blsp2_uart6_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart6_apps_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1076,7 +1076,7 @@ static struct clk_rcg2 pdm2_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "pdm2_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1095,7 +1095,7 @@ static struct clk_rcg2 tsif_ref_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "tsif_ref_clk_src", + .parent_names = gcc_xo_gpll0_aud_ref_clk, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_aud_ref_clk), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1107,7 +1107,7 @@ static struct clk_rcg2 gcc_sleep_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_sleep_clk_src", + .parent_names = gcc_sleep_clk, +- .num_parents = 1, ++ .num_parents = ARRAY_SIZE(gcc_sleep_clk), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1120,7 +1120,7 @@ static struct clk_rcg2 hmss_rbcpr_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "hmss_rbcpr_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1132,7 +1132,7 @@ static struct clk_rcg2 hmss_gpll0_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "hmss_gpll0_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1153,7 +1153,7 @@ static struct clk_rcg2 gp1_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gp1_clk_src", + .parent_names = gcc_xo_gpll0_sleep_clk_gpll0_early_div, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1167,7 +1167,7 @@ static struct clk_rcg2 gp2_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gp2_clk_src", + .parent_names = gcc_xo_gpll0_sleep_clk_gpll0_early_div, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1181,7 +1181,7 @@ static struct clk_rcg2 gp3_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gp3_clk_src", + .parent_names = gcc_xo_gpll0_sleep_clk_gpll0_early_div, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1200,7 +1200,7 @@ static struct clk_rcg2 pcie_aux_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "pcie_aux_clk_src", + .parent_names = gcc_xo_sleep_clk, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_sleep_clk), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1221,7 +1221,7 @@ static struct clk_rcg2 ufs_axi_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "ufs_axi_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1241,7 +1241,7 @@ static struct clk_rcg2 ufs_ice_core_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "ufs_ice_core_clk_src", + .parent_names = gcc_xo_gpll0, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, + }; +@@ -1262,7 +1262,7 @@ static struct clk_rcg2 qspi_ser_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "qspi_ser_clk_src", + .parent_names = gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div, +- .num_parents = 6, ++ .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, + }; +-- +2.42.0 + diff --git a/queue-5.4/clk-qcom-gcc-msm8996-use-parent_hws-_data-instead-of.patch b/queue-5.4/clk-qcom-gcc-msm8996-use-parent_hws-_data-instead-of.patch new file mode 100644 index 00000000000..1918686e81b --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-msm8996-use-parent_hws-_data-instead-of.patch @@ -0,0 +1,2060 @@ +From 147b6cc83355ffcb7ced885e9f034132c6264389 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 Dec 2021 07:54:14 +0300 +Subject: clk: qcom: gcc-msm8996: use parent_hws/_data instead of parent_names + +From: Dmitry Baryshkov + +[ Upstream commit b3867679d460d67aaef5aa76e4512197a5375514 ] + +Convert the clock driver to specify parent data rather than parent +names, to actually bind using 'clock-names' specified in the DTS rather +than global clock names. Use parent_hws where possible to refer parent +clocks directly, skipping the lookup. + +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Marijn Suijten +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20211228045415.20543-16-dmitry.baryshkov@linaro.org +Stable-dep-of: 4afda5f6bcdf ("clk: qcom: gcc-msm8996: Remove RPM bus clocks") +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-msm8996.c | 678 ++++++++++++++++++++++----------- + 1 file changed, 463 insertions(+), 215 deletions(-) + +diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c +index dbfbdef4044c7..5b5ee4b7ae81f 100644 +--- a/drivers/clk/qcom/gcc-msm8996.c ++++ b/drivers/clk/qcom/gcc-msm8996.c +@@ -38,7 +38,9 @@ static struct clk_fixed_factor xo = { + .div = 1, + .hw.init = &(struct clk_init_data){ + .name = "xo", +- .parent_names = (const char *[]){ "xo_board" }, ++ .parent_data = &(const struct clk_parent_data){ ++ .fw_name = "cxo", .name = "xo_board", ++ }, + .num_parents = 1, + .ops = &clk_fixed_factor_ops, + }, +@@ -52,7 +54,9 @@ static struct clk_alpha_pll gpll0_early = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gpll0_early", +- .parent_names = (const char *[]){ "xo" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &xo.hw, ++ }, + .num_parents = 1, + .ops = &clk_alpha_pll_ops, + }, +@@ -64,7 +68,9 @@ static struct clk_fixed_factor gpll0_early_div = { + .div = 2, + .hw.init = &(struct clk_init_data){ + .name = "gpll0_early_div", +- .parent_names = (const char *[]){ "gpll0_early" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gpll0_early.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_fixed_factor_ops, + }, +@@ -75,7 +81,9 @@ static struct clk_alpha_pll_postdiv gpll0 = { + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], + .clkr.hw.init = &(struct clk_init_data){ + .name = "gpll0", +- .parent_names = (const char *[]){ "gpll0_early" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gpll0_early.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_alpha_pll_postdiv_ops, + }, +@@ -88,7 +96,9 @@ static struct clk_branch gcc_mmss_gpll0_div_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mmss_gpll0_div_clk", +- .parent_names = (const char *[]){ "gpll0" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gpll0.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -103,7 +113,9 @@ static struct clk_branch gcc_mss_gpll0_div_clk = { + .enable_mask = BIT(2), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_gpll0_div_clk", +- .parent_names = (const char *[]){ "gpll0" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gpll0.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops +@@ -119,7 +131,9 @@ static struct clk_alpha_pll gpll4_early = { + .enable_mask = BIT(4), + .hw.init = &(struct clk_init_data){ + .name = "gpll4_early", +- .parent_names = (const char *[]){ "xo" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &xo.hw, ++ }, + .num_parents = 1, + .ops = &clk_alpha_pll_ops, + }, +@@ -131,7 +145,9 @@ static struct clk_alpha_pll_postdiv gpll4 = { + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], + .clkr.hw.init = &(struct clk_init_data){ + .name = "gpll4", +- .parent_names = (const char *[]){ "gpll4_early" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gpll4_early.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_alpha_pll_postdiv_ops, + }, +@@ -141,8 +157,8 @@ static const struct parent_map gcc_sleep_clk_map[] = { + { P_SLEEP_CLK, 5 } + }; + +-static const char * const gcc_sleep_clk[] = { +- "sleep_clk" ++static const struct clk_parent_data gcc_sleep_clk[] = { ++ { .fw_name = "sleep_clk", .name = "sleep_clk" } + }; + + static const struct parent_map gcc_xo_gpll0_map[] = { +@@ -150,9 +166,9 @@ static const struct parent_map gcc_xo_gpll0_map[] = { + { P_GPLL0, 1 } + }; + +-static const char * const gcc_xo_gpll0[] = { +- "xo", +- "gpll0" ++static const struct clk_parent_data gcc_xo_gpll0[] = { ++ { .hw = &xo.hw }, ++ { .hw = &gpll0.clkr.hw } + }; + + static const struct parent_map gcc_xo_sleep_clk_map[] = { +@@ -160,9 +176,9 @@ static const struct parent_map gcc_xo_sleep_clk_map[] = { + { P_SLEEP_CLK, 5 } + }; + +-static const char * const gcc_xo_sleep_clk[] = { +- "xo", +- "sleep_clk" ++static const struct clk_parent_data gcc_xo_sleep_clk[] = { ++ { .hw = &xo.hw }, ++ { .fw_name = "sleep_clk", .name = "sleep_clk" } + }; + + static const struct parent_map gcc_xo_gpll0_gpll0_early_div_map[] = { +@@ -171,10 +187,10 @@ static const struct parent_map gcc_xo_gpll0_gpll0_early_div_map[] = { + { P_GPLL0_EARLY_DIV, 6 } + }; + +-static const char * const gcc_xo_gpll0_gpll0_early_div[] = { +- "xo", +- "gpll0", +- "gpll0_early_div" ++static const struct clk_parent_data gcc_xo_gpll0_gpll0_early_div[] = { ++ { .hw = &xo.hw }, ++ { .hw = &gpll0.clkr.hw }, ++ { .hw = &gpll0_early_div.hw } + }; + + static const struct parent_map gcc_xo_gpll0_gpll4_map[] = { +@@ -183,10 +199,10 @@ static const struct parent_map gcc_xo_gpll0_gpll4_map[] = { + { P_GPLL4, 5 } + }; + +-static const char * const gcc_xo_gpll0_gpll4[] = { +- "xo", +- "gpll0", +- "gpll4" ++static const struct clk_parent_data gcc_xo_gpll0_gpll4[] = { ++ { .hw = &xo.hw }, ++ { .hw = &gpll0.clkr.hw }, ++ { .hw = &gpll4.clkr.hw } + }; + + static const struct parent_map gcc_xo_gpll0_aud_ref_clk_map[] = { +@@ -195,10 +211,10 @@ static const struct parent_map gcc_xo_gpll0_aud_ref_clk_map[] = { + { P_AUD_REF_CLK, 2 } + }; + +-static const char * const gcc_xo_gpll0_aud_ref_clk[] = { +- "xo", +- "gpll0", +- "aud_ref_clk" ++static const struct clk_parent_data gcc_xo_gpll0_aud_ref_clk[] = { ++ { .hw = &xo.hw }, ++ { .hw = &gpll0.clkr.hw }, ++ { .fw_name = "aud_ref_clk", .name = "aud_ref_clk" } + }; + + static const struct parent_map gcc_xo_gpll0_sleep_clk_gpll0_early_div_map[] = { +@@ -208,11 +224,11 @@ static const struct parent_map gcc_xo_gpll0_sleep_clk_gpll0_early_div_map[] = { + { P_GPLL0_EARLY_DIV, 6 } + }; + +-static const char * const gcc_xo_gpll0_sleep_clk_gpll0_early_div[] = { +- "xo", +- "gpll0", +- "sleep_clk", +- "gpll0_early_div" ++static const struct clk_parent_data gcc_xo_gpll0_sleep_clk_gpll0_early_div[] = { ++ { .hw = &xo.hw }, ++ { .hw = &gpll0.clkr.hw }, ++ { .fw_name = "sleep_clk", .name = "sleep_clk" }, ++ { .hw = &gpll0_early_div.hw } + }; + + static const struct parent_map gcc_xo_gpll0_gpll4_gpll0_early_div_map[] = { +@@ -222,11 +238,11 @@ static const struct parent_map gcc_xo_gpll0_gpll4_gpll0_early_div_map[] = { + { P_GPLL0_EARLY_DIV, 6 } + }; + +-static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = { +- "xo", +- "gpll0", +- "gpll4", +- "gpll0_early_div" ++static const struct clk_parent_data gcc_xo_gpll0_gpll4_gpll0_early_div[] = { ++ { .hw = &xo.hw }, ++ { .hw = &gpll0.clkr.hw }, ++ { .hw = &gpll4.clkr.hw }, ++ { .hw = &gpll0_early_div.hw } + }; + + static const struct freq_tbl ftbl_system_noc_clk_src[] = { +@@ -246,7 +262,7 @@ static struct clk_rcg2 system_noc_clk_src = { + .freq_tbl = ftbl_system_noc_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "system_noc_clk_src", +- .parent_names = gcc_xo_gpll0_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -266,7 +282,7 @@ static struct clk_rcg2 config_noc_clk_src = { + .freq_tbl = ftbl_config_noc_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "config_noc_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -288,7 +304,7 @@ static struct clk_rcg2 periph_noc_clk_src = { + .freq_tbl = ftbl_periph_noc_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "periph_noc_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -309,7 +325,7 @@ static struct clk_rcg2 usb30_master_clk_src = { + .freq_tbl = ftbl_usb30_master_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb30_master_clk_src", +- .parent_names = gcc_xo_gpll0_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -327,7 +343,7 @@ static struct clk_rcg2 usb30_mock_utmi_clk_src = { + .freq_tbl = ftbl_usb30_mock_utmi_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb30_mock_utmi_clk_src", +- .parent_names = gcc_xo_gpll0_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -345,7 +361,7 @@ static struct clk_rcg2 usb3_phy_aux_clk_src = { + .freq_tbl = ftbl_usb3_phy_aux_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb3_phy_aux_clk_src", +- .parent_names = gcc_xo_sleep_clk, ++ .parent_data = gcc_xo_sleep_clk, + .num_parents = ARRAY_SIZE(gcc_xo_sleep_clk), + .ops = &clk_rcg2_ops, + }, +@@ -364,7 +380,7 @@ static struct clk_rcg2 usb20_master_clk_src = { + .freq_tbl = ftbl_usb20_master_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb20_master_clk_src", +- .parent_names = gcc_xo_gpll0_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -377,7 +393,7 @@ static struct clk_rcg2 usb20_mock_utmi_clk_src = { + .freq_tbl = ftbl_usb30_mock_utmi_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "usb20_mock_utmi_clk_src", +- .parent_names = gcc_xo_gpll0_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -403,7 +419,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = { + .freq_tbl = ftbl_sdcc1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc1_apps_clk_src", +- .parent_names = gcc_xo_gpll0_gpll4_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_gpll4_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4_gpll0_early_div), + .ops = &clk_rcg2_floor_ops, + }, +@@ -423,7 +439,7 @@ static struct clk_rcg2 sdcc1_ice_core_clk_src = { + .freq_tbl = ftbl_sdcc1_ice_core_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc1_ice_core_clk_src", +- .parent_names = gcc_xo_gpll0_gpll4_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_gpll4_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -448,7 +464,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = { + .freq_tbl = ftbl_sdcc2_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc2_apps_clk_src", +- .parent_names = gcc_xo_gpll0_gpll4, ++ .parent_data = gcc_xo_gpll0_gpll4, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4), + .ops = &clk_rcg2_floor_ops, + }, +@@ -462,7 +478,7 @@ static struct clk_rcg2 sdcc3_apps_clk_src = { + .freq_tbl = ftbl_sdcc2_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc3_apps_clk_src", +- .parent_names = gcc_xo_gpll0_gpll4, ++ .parent_data = gcc_xo_gpll0_gpll4, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4), + .ops = &clk_rcg2_floor_ops, + }, +@@ -486,7 +502,7 @@ static struct clk_rcg2 sdcc4_apps_clk_src = { + .freq_tbl = ftbl_sdcc4_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "sdcc4_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_floor_ops, + }, +@@ -511,7 +527,7 @@ static struct clk_rcg2 blsp1_qup1_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup1_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -530,7 +546,7 @@ static struct clk_rcg2 blsp1_qup1_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup1_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -563,7 +579,7 @@ static struct clk_rcg2 blsp1_uart1_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart1_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -577,7 +593,7 @@ static struct clk_rcg2 blsp1_qup2_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup2_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -590,7 +606,7 @@ static struct clk_rcg2 blsp1_qup2_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup2_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -604,7 +620,7 @@ static struct clk_rcg2 blsp1_uart2_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart2_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -618,7 +634,7 @@ static struct clk_rcg2 blsp1_qup3_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup3_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -631,7 +647,7 @@ static struct clk_rcg2 blsp1_qup3_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup3_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -645,7 +661,7 @@ static struct clk_rcg2 blsp1_uart3_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart3_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -659,7 +675,7 @@ static struct clk_rcg2 blsp1_qup4_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup4_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -672,7 +688,7 @@ static struct clk_rcg2 blsp1_qup4_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup4_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -686,7 +702,7 @@ static struct clk_rcg2 blsp1_uart4_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart4_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -700,7 +716,7 @@ static struct clk_rcg2 blsp1_qup5_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup5_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -713,7 +729,7 @@ static struct clk_rcg2 blsp1_qup5_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup5_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -727,7 +743,7 @@ static struct clk_rcg2 blsp1_uart5_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart5_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -741,7 +757,7 @@ static struct clk_rcg2 blsp1_qup6_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup6_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -754,7 +770,7 @@ static struct clk_rcg2 blsp1_qup6_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_qup6_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -768,7 +784,7 @@ static struct clk_rcg2 blsp1_uart6_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp1_uart6_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -782,7 +798,7 @@ static struct clk_rcg2 blsp2_qup1_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup1_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -795,7 +811,7 @@ static struct clk_rcg2 blsp2_qup1_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup1_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -809,7 +825,7 @@ static struct clk_rcg2 blsp2_uart1_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart1_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -823,7 +839,7 @@ static struct clk_rcg2 blsp2_qup2_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup2_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -836,7 +852,7 @@ static struct clk_rcg2 blsp2_qup2_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup2_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -850,7 +866,7 @@ static struct clk_rcg2 blsp2_uart2_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart2_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -864,7 +880,7 @@ static struct clk_rcg2 blsp2_qup3_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup3_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -877,7 +893,7 @@ static struct clk_rcg2 blsp2_qup3_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup3_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -891,7 +907,7 @@ static struct clk_rcg2 blsp2_uart3_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart3_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -905,7 +921,7 @@ static struct clk_rcg2 blsp2_qup4_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup4_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -918,7 +934,7 @@ static struct clk_rcg2 blsp2_qup4_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup4_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -932,7 +948,7 @@ static struct clk_rcg2 blsp2_uart4_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart4_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -946,7 +962,7 @@ static struct clk_rcg2 blsp2_qup5_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup5_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -959,7 +975,7 @@ static struct clk_rcg2 blsp2_qup5_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup5_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -973,7 +989,7 @@ static struct clk_rcg2 blsp2_uart5_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart5_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -987,7 +1003,7 @@ static struct clk_rcg2 blsp2_qup6_spi_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_spi_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup6_spi_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -1000,7 +1016,7 @@ static struct clk_rcg2 blsp2_qup6_i2c_apps_clk_src = { + .freq_tbl = ftbl_blsp1_qup1_i2c_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_qup6_i2c_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -1014,7 +1030,7 @@ static struct clk_rcg2 blsp2_uart6_apps_clk_src = { + .freq_tbl = ftbl_blsp1_uart1_apps_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "blsp2_uart6_apps_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -1032,7 +1048,7 @@ static struct clk_rcg2 pdm2_clk_src = { + .freq_tbl = ftbl_pdm2_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "pdm2_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -1051,7 +1067,7 @@ static struct clk_rcg2 tsif_ref_clk_src = { + .freq_tbl = ftbl_tsif_ref_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "tsif_ref_clk_src", +- .parent_names = gcc_xo_gpll0_aud_ref_clk, ++ .parent_data = gcc_xo_gpll0_aud_ref_clk, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_aud_ref_clk), + .ops = &clk_rcg2_ops, + }, +@@ -1063,7 +1079,7 @@ static struct clk_rcg2 gcc_sleep_clk_src = { + .parent_map = gcc_sleep_clk_map, + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_sleep_clk_src", +- .parent_names = gcc_sleep_clk, ++ .parent_data = gcc_sleep_clk, + .num_parents = ARRAY_SIZE(gcc_sleep_clk), + .ops = &clk_rcg2_ops, + }, +@@ -1076,7 +1092,7 @@ static struct clk_rcg2 hmss_rbcpr_clk_src = { + .freq_tbl = ftbl_usb30_mock_utmi_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "hmss_rbcpr_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -1088,7 +1104,7 @@ static struct clk_rcg2 hmss_gpll0_clk_src = { + .parent_map = gcc_xo_gpll0_map, + .clkr.hw.init = &(struct clk_init_data){ + .name = "hmss_gpll0_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -1109,7 +1125,7 @@ static struct clk_rcg2 gp1_clk_src = { + .freq_tbl = ftbl_gp1_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "gp1_clk_src", +- .parent_names = gcc_xo_gpll0_sleep_clk_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_sleep_clk_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -1123,7 +1139,7 @@ static struct clk_rcg2 gp2_clk_src = { + .freq_tbl = ftbl_gp1_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "gp2_clk_src", +- .parent_names = gcc_xo_gpll0_sleep_clk_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_sleep_clk_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -1137,7 +1153,7 @@ static struct clk_rcg2 gp3_clk_src = { + .freq_tbl = ftbl_gp1_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "gp3_clk_src", +- .parent_names = gcc_xo_gpll0_sleep_clk_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_sleep_clk_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -1156,7 +1172,7 @@ static struct clk_rcg2 pcie_aux_clk_src = { + .freq_tbl = ftbl_pcie_aux_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "pcie_aux_clk_src", +- .parent_names = gcc_xo_sleep_clk, ++ .parent_data = gcc_xo_sleep_clk, + .num_parents = ARRAY_SIZE(gcc_xo_sleep_clk), + .ops = &clk_rcg2_ops, + }, +@@ -1177,7 +1193,7 @@ static struct clk_rcg2 ufs_axi_clk_src = { + .freq_tbl = ftbl_ufs_axi_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "ufs_axi_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -1197,7 +1213,7 @@ static struct clk_rcg2 ufs_ice_core_clk_src = { + .freq_tbl = ftbl_ufs_ice_core_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "ufs_ice_core_clk_src", +- .parent_names = gcc_xo_gpll0, ++ .parent_data = gcc_xo_gpll0, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), + .ops = &clk_rcg2_ops, + }, +@@ -1218,7 +1234,7 @@ static struct clk_rcg2 qspi_ser_clk_src = { + .freq_tbl = ftbl_qspi_ser_clk_src, + .clkr.hw.init = &(struct clk_init_data){ + .name = "qspi_ser_clk_src", +- .parent_names = gcc_xo_gpll0_gpll4_gpll0_early_div, ++ .parent_data = gcc_xo_gpll0_gpll4_gpll0_early_div, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4_gpll0_early_div), + .ops = &clk_rcg2_ops, + }, +@@ -1231,7 +1247,9 @@ static struct clk_branch gcc_sys_noc_usb3_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sys_noc_usb3_axi_clk", +- .parent_names = (const char *[]){ "usb30_master_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &usb30_master_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1246,7 +1264,9 @@ static struct clk_branch gcc_sys_noc_ufs_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sys_noc_ufs_axi_clk", +- .parent_names = (const char *[]){ "ufs_axi_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_axi_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1261,7 +1281,9 @@ static struct clk_branch gcc_periph_noc_usb20_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_periph_noc_usb20_ahb_clk", +- .parent_names = (const char *[]){ "usb20_master_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &usb20_master_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1276,7 +1298,9 @@ static struct clk_branch gcc_mmss_noc_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mmss_noc_cfg_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, + .ops = &clk_branch2_ops, +@@ -1304,7 +1328,9 @@ static struct clk_branch gcc_usb30_master_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb30_master_clk", +- .parent_names = (const char *[]){ "usb30_master_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &usb30_master_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1319,7 +1345,9 @@ static struct clk_branch gcc_usb30_sleep_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb30_sleep_clk", +- .parent_names = (const char *[]){ "gcc_sleep_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gcc_sleep_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1334,7 +1362,9 @@ static struct clk_branch gcc_usb30_mock_utmi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb30_mock_utmi_clk", +- .parent_names = (const char *[]){ "usb30_mock_utmi_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &usb30_mock_utmi_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1349,7 +1379,9 @@ static struct clk_branch gcc_usb3_phy_aux_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb3_phy_aux_clk", +- .parent_names = (const char *[]){ "usb3_phy_aux_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &usb3_phy_aux_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1365,7 +1397,9 @@ static struct clk_branch gcc_usb3_phy_pipe_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb3_phy_pipe_clk", +- .parent_names = (const char *[]){ "usb3_phy_pipe_clk_src" }, ++ .parent_data = &(const struct clk_parent_data){ ++ .fw_name = "usb3_phy_pipe_clk_src", .name = "usb3_phy_pipe_clk_src", ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1380,7 +1414,9 @@ static struct clk_branch gcc_usb20_master_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb20_master_clk", +- .parent_names = (const char *[]){ "usb20_master_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &usb20_master_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1395,7 +1431,9 @@ static struct clk_branch gcc_usb20_sleep_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb20_sleep_clk", +- .parent_names = (const char *[]){ "gcc_sleep_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gcc_sleep_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1410,7 +1448,9 @@ static struct clk_branch gcc_usb20_mock_utmi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb20_mock_utmi_clk", +- .parent_names = (const char *[]){ "usb20_mock_utmi_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &usb20_mock_utmi_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1425,7 +1465,9 @@ static struct clk_branch gcc_usb_phy_cfg_ahb2phy_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_usb_phy_cfg_ahb2phy_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1440,7 +1482,9 @@ static struct clk_branch gcc_sdcc1_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc1_apps_clk", +- .parent_names = (const char *[]){ "sdcc1_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &sdcc1_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1455,7 +1499,9 @@ static struct clk_branch gcc_sdcc1_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc1_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1470,7 +1516,9 @@ static struct clk_branch gcc_sdcc1_ice_core_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc1_ice_core_clk", +- .parent_names = (const char *[]){ "sdcc1_ice_core_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &sdcc1_ice_core_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1485,7 +1533,9 @@ static struct clk_branch gcc_sdcc2_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc2_apps_clk", +- .parent_names = (const char *[]){ "sdcc2_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &sdcc2_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1500,7 +1550,9 @@ static struct clk_branch gcc_sdcc2_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc2_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1515,7 +1567,9 @@ static struct clk_branch gcc_sdcc3_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc3_apps_clk", +- .parent_names = (const char *[]){ "sdcc3_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &sdcc3_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1530,7 +1584,9 @@ static struct clk_branch gcc_sdcc3_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc3_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1545,7 +1601,9 @@ static struct clk_branch gcc_sdcc4_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc4_apps_clk", +- .parent_names = (const char *[]){ "sdcc4_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &sdcc4_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1560,7 +1618,9 @@ static struct clk_branch gcc_sdcc4_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc4_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1576,7 +1636,9 @@ static struct clk_branch gcc_blsp1_ahb_clk = { + .enable_mask = BIT(17), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1592,7 +1654,9 @@ static struct clk_branch gcc_blsp1_sleep_clk = { + .enable_mask = BIT(16), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_sleep_clk", +- .parent_names = (const char *[]){ "gcc_sleep_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gcc_sleep_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1607,7 +1671,9 @@ static struct clk_branch gcc_blsp1_qup1_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup1_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup1_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup1_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1622,7 +1688,9 @@ static struct clk_branch gcc_blsp1_qup1_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup1_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup1_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup1_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1637,7 +1705,9 @@ static struct clk_branch gcc_blsp1_uart1_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_uart1_apps_clk", +- .parent_names = (const char *[]){ "blsp1_uart1_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_uart1_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1652,7 +1722,9 @@ static struct clk_branch gcc_blsp1_qup2_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup2_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup2_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup2_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1667,7 +1739,9 @@ static struct clk_branch gcc_blsp1_qup2_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup2_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup2_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup2_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1682,7 +1756,9 @@ static struct clk_branch gcc_blsp1_uart2_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_uart2_apps_clk", +- .parent_names = (const char *[]){ "blsp1_uart2_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_uart2_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1697,7 +1773,9 @@ static struct clk_branch gcc_blsp1_qup3_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup3_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup3_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup3_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1712,7 +1790,9 @@ static struct clk_branch gcc_blsp1_qup3_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup3_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup3_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup3_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1727,7 +1807,9 @@ static struct clk_branch gcc_blsp1_uart3_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_uart3_apps_clk", +- .parent_names = (const char *[]){ "blsp1_uart3_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_uart3_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1742,7 +1824,9 @@ static struct clk_branch gcc_blsp1_qup4_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup4_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup4_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup4_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1757,7 +1841,9 @@ static struct clk_branch gcc_blsp1_qup4_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup4_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup4_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup4_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1772,7 +1858,9 @@ static struct clk_branch gcc_blsp1_uart4_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_uart4_apps_clk", +- .parent_names = (const char *[]){ "blsp1_uart4_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_uart4_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1787,7 +1875,9 @@ static struct clk_branch gcc_blsp1_qup5_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup5_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup5_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup5_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1802,7 +1892,9 @@ static struct clk_branch gcc_blsp1_qup5_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup5_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup5_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup5_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1817,7 +1909,9 @@ static struct clk_branch gcc_blsp1_uart5_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_uart5_apps_clk", +- .parent_names = (const char *[]){ "blsp1_uart5_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_uart5_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1832,7 +1926,9 @@ static struct clk_branch gcc_blsp1_qup6_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup6_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup6_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup6_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1847,7 +1943,9 @@ static struct clk_branch gcc_blsp1_qup6_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_qup6_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp1_qup6_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_qup6_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1862,7 +1960,9 @@ static struct clk_branch gcc_blsp1_uart6_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp1_uart6_apps_clk", +- .parent_names = (const char *[]){ "blsp1_uart6_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp1_uart6_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1878,7 +1978,9 @@ static struct clk_branch gcc_blsp2_ahb_clk = { + .enable_mask = BIT(15), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1894,7 +1996,9 @@ static struct clk_branch gcc_blsp2_sleep_clk = { + .enable_mask = BIT(14), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_sleep_clk", +- .parent_names = (const char *[]){ "gcc_sleep_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gcc_sleep_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1909,7 +2013,9 @@ static struct clk_branch gcc_blsp2_qup1_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup1_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup1_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup1_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1924,7 +2030,9 @@ static struct clk_branch gcc_blsp2_qup1_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup1_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup1_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup1_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1939,7 +2047,9 @@ static struct clk_branch gcc_blsp2_uart1_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_uart1_apps_clk", +- .parent_names = (const char *[]){ "blsp2_uart1_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_uart1_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1954,7 +2064,9 @@ static struct clk_branch gcc_blsp2_qup2_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup2_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup2_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup2_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1969,7 +2081,9 @@ static struct clk_branch gcc_blsp2_qup2_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup2_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup2_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup2_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1984,7 +2098,9 @@ static struct clk_branch gcc_blsp2_uart2_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_uart2_apps_clk", +- .parent_names = (const char *[]){ "blsp2_uart2_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_uart2_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -1999,7 +2115,9 @@ static struct clk_branch gcc_blsp2_qup3_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup3_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup3_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup3_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2014,7 +2132,9 @@ static struct clk_branch gcc_blsp2_qup3_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup3_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup3_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup3_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2029,7 +2149,9 @@ static struct clk_branch gcc_blsp2_uart3_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_uart3_apps_clk", +- .parent_names = (const char *[]){ "blsp2_uart3_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_uart3_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2044,7 +2166,9 @@ static struct clk_branch gcc_blsp2_qup4_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup4_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup4_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup4_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2059,7 +2183,9 @@ static struct clk_branch gcc_blsp2_qup4_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup4_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup4_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup4_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2074,7 +2200,9 @@ static struct clk_branch gcc_blsp2_uart4_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_uart4_apps_clk", +- .parent_names = (const char *[]){ "blsp2_uart4_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_uart4_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2089,7 +2217,9 @@ static struct clk_branch gcc_blsp2_qup5_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup5_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup5_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup5_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2104,7 +2234,9 @@ static struct clk_branch gcc_blsp2_qup5_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup5_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup5_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup5_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2119,7 +2251,9 @@ static struct clk_branch gcc_blsp2_uart5_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_uart5_apps_clk", +- .parent_names = (const char *[]){ "blsp2_uart5_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_uart5_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2134,7 +2268,9 @@ static struct clk_branch gcc_blsp2_qup6_spi_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup6_spi_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup6_spi_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup6_spi_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2149,7 +2285,9 @@ static struct clk_branch gcc_blsp2_qup6_i2c_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_qup6_i2c_apps_clk", +- .parent_names = (const char *[]){ "blsp2_qup6_i2c_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_qup6_i2c_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2164,7 +2302,9 @@ static struct clk_branch gcc_blsp2_uart6_apps_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_blsp2_uart6_apps_clk", +- .parent_names = (const char *[]){ "blsp2_uart6_apps_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &blsp2_uart6_apps_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2179,7 +2319,9 @@ static struct clk_branch gcc_pdm_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pdm_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2194,7 +2336,9 @@ static struct clk_branch gcc_pdm2_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pdm2_clk", +- .parent_names = (const char *[]){ "pdm2_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &pdm2_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2210,7 +2354,9 @@ static struct clk_branch gcc_prng_ahb_clk = { + .enable_mask = BIT(13), + .hw.init = &(struct clk_init_data){ + .name = "gcc_prng_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2225,7 +2371,9 @@ static struct clk_branch gcc_tsif_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_tsif_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2240,7 +2388,9 @@ static struct clk_branch gcc_tsif_ref_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_tsif_ref_clk", +- .parent_names = (const char *[]){ "tsif_ref_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &tsif_ref_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2255,7 +2405,9 @@ static struct clk_branch gcc_tsif_inactivity_timers_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_tsif_inactivity_timers_clk", +- .parent_names = (const char *[]){ "gcc_sleep_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gcc_sleep_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2271,7 +2423,9 @@ static struct clk_branch gcc_boot_rom_ahb_clk = { + .enable_mask = BIT(10), + .hw.init = &(struct clk_init_data){ + .name = "gcc_boot_rom_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2299,7 +2453,9 @@ static struct clk_branch gcc_hmss_rbcpr_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_hmss_rbcpr_clk", +- .parent_names = (const char *[]){ "hmss_rbcpr_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &hmss_rbcpr_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2314,7 +2470,9 @@ static struct clk_branch gcc_gp1_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_gp1_clk", +- .parent_names = (const char *[]){ "gp1_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gp1_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2329,7 +2487,9 @@ static struct clk_branch gcc_gp2_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_gp2_clk", +- .parent_names = (const char *[]){ "gp2_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gp2_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2344,7 +2504,9 @@ static struct clk_branch gcc_gp3_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_gp3_clk", +- .parent_names = (const char *[]){ "gp3_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &gp3_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2359,7 +2521,9 @@ static struct clk_branch gcc_pcie_0_slv_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_slv_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2374,7 +2538,9 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_mstr_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2389,7 +2555,9 @@ static struct clk_branch gcc_pcie_0_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_cfg_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2404,7 +2572,9 @@ static struct clk_branch gcc_pcie_0_aux_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_aux_clk", +- .parent_names = (const char *[]){ "pcie_aux_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &pcie_aux_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2420,7 +2590,9 @@ static struct clk_branch gcc_pcie_0_pipe_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_pipe_clk", +- .parent_names = (const char *[]){ "pcie_0_pipe_clk_src" }, ++ .parent_data = &(const struct clk_parent_data){ ++ .fw_name = "pcie_0_pipe_clk_src", .name = "pcie_0_pipe_clk_src", ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2435,7 +2607,9 @@ static struct clk_branch gcc_pcie_1_slv_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_slv_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2450,7 +2624,9 @@ static struct clk_branch gcc_pcie_1_mstr_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_mstr_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2465,7 +2641,9 @@ static struct clk_branch gcc_pcie_1_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_cfg_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2480,7 +2658,9 @@ static struct clk_branch gcc_pcie_1_aux_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_aux_clk", +- .parent_names = (const char *[]){ "pcie_aux_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &pcie_aux_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2496,7 +2676,9 @@ static struct clk_branch gcc_pcie_1_pipe_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_pipe_clk", +- .parent_names = (const char *[]){ "pcie_1_pipe_clk_src" }, ++ .parent_data = &(const struct clk_parent_data){ ++ .fw_name = "pcie_1_pipe_clk_src", .name = "pcie_1_pipe_clk_src", ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2511,7 +2693,9 @@ static struct clk_branch gcc_pcie_2_slv_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_2_slv_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2526,7 +2710,9 @@ static struct clk_branch gcc_pcie_2_mstr_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_2_mstr_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2541,7 +2727,9 @@ static struct clk_branch gcc_pcie_2_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_2_cfg_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2556,7 +2744,9 @@ static struct clk_branch gcc_pcie_2_aux_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_2_aux_clk", +- .parent_names = (const char *[]){ "pcie_aux_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &pcie_aux_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2572,7 +2762,9 @@ static struct clk_branch gcc_pcie_2_pipe_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_2_pipe_clk", +- .parent_names = (const char *[]){ "pcie_2_pipe_clk_src" }, ++ .parent_data = &(const struct clk_parent_data){ ++ .fw_name = "pcie_2_pipe_clk_src", .name = "pcie_2_pipe_clk_src", ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2587,7 +2779,9 @@ static struct clk_branch gcc_pcie_phy_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_phy_cfg_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2602,7 +2796,9 @@ static struct clk_branch gcc_pcie_phy_aux_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_phy_aux_clk", +- .parent_names = (const char *[]){ "pcie_aux_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &pcie_aux_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2617,7 +2813,9 @@ static struct clk_branch gcc_ufs_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_axi_clk", +- .parent_names = (const char *[]){ "ufs_axi_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_axi_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2632,7 +2830,9 @@ static struct clk_branch gcc_ufs_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2645,7 +2845,9 @@ static struct clk_fixed_factor ufs_tx_cfg_clk_src = { + .div = 16, + .hw.init = &(struct clk_init_data){ + .name = "ufs_tx_cfg_clk_src", +- .parent_names = (const char *[]){ "ufs_axi_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_axi_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_fixed_factor_ops, +@@ -2659,7 +2861,9 @@ static struct clk_branch gcc_ufs_tx_cfg_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_tx_cfg_clk", +- .parent_names = (const char *[]){ "ufs_tx_cfg_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_tx_cfg_clk_src.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2672,7 +2876,9 @@ static struct clk_fixed_factor ufs_rx_cfg_clk_src = { + .div = 16, + .hw.init = &(struct clk_init_data){ + .name = "ufs_rx_cfg_clk_src", +- .parent_names = (const char *[]){ "ufs_axi_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_axi_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_fixed_factor_ops, +@@ -2712,7 +2918,9 @@ static struct clk_branch gcc_ufs_rx_cfg_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_rx_cfg_clk", +- .parent_names = (const char *[]){ "ufs_rx_cfg_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_rx_cfg_clk_src.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2728,7 +2936,9 @@ static struct clk_branch gcc_ufs_tx_symbol_0_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_tx_symbol_0_clk", +- .parent_names = (const char *[]){ "ufs_tx_symbol_0_clk_src" }, ++ .parent_data = &(const struct clk_parent_data){ ++ .fw_name = "ufs_tx_symbol_0_clk_src", .name = "ufs_tx_symbol_0_clk_src", ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2744,7 +2954,9 @@ static struct clk_branch gcc_ufs_rx_symbol_0_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_rx_symbol_0_clk", +- .parent_names = (const char *[]){ "ufs_rx_symbol_0_clk_src" }, ++ .parent_data = &(const struct clk_parent_data){ ++ .fw_name = "ufs_rx_symbol_0_clk_src", .name = "ufs_rx_symbol_0_clk_src", ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2760,7 +2972,9 @@ static struct clk_branch gcc_ufs_rx_symbol_1_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_rx_symbol_1_clk", +- .parent_names = (const char *[]){ "ufs_rx_symbol_1_clk_src" }, ++ .parent_data = &(const struct clk_parent_data){ ++ .fw_name = "ufs_rx_symbol_1_clk_src", .name = "ufs_rx_symbol_1_clk_src", ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2773,7 +2987,9 @@ static struct clk_fixed_factor ufs_ice_core_postdiv_clk_src = { + .div = 2, + .hw.init = &(struct clk_init_data){ + .name = "ufs_ice_core_postdiv_clk_src", +- .parent_names = (const char *[]){ "ufs_ice_core_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_ice_core_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_fixed_factor_ops, +@@ -2787,7 +3003,9 @@ static struct clk_branch gcc_ufs_unipro_core_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_unipro_core_clk", +- .parent_names = (const char *[]){ "ufs_ice_core_postdiv_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_ice_core_postdiv_clk_src.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2802,7 +3020,9 @@ static struct clk_branch gcc_ufs_ice_core_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_ice_core_clk", +- .parent_names = (const char *[]){ "ufs_ice_core_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_ice_core_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2841,7 +3061,9 @@ static struct clk_branch gcc_aggre0_snoc_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_aggre0_snoc_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, +@@ -2856,7 +3078,9 @@ static struct clk_branch gcc_aggre0_cnoc_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_aggre0_cnoc_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, +@@ -2871,7 +3095,9 @@ static struct clk_branch gcc_smmu_aggre0_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_smmu_aggre0_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, +@@ -2886,7 +3112,9 @@ static struct clk_branch gcc_smmu_aggre0_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_smmu_aggre0_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, +@@ -2901,7 +3129,9 @@ static struct clk_branch gcc_aggre2_ufs_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_aggre2_ufs_axi_clk", +- .parent_names = (const char *[]){ "ufs_axi_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &ufs_axi_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2916,7 +3146,9 @@ static struct clk_branch gcc_aggre2_usb3_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_aggre2_usb3_axi_clk", +- .parent_names = (const char *[]){ "usb30_master_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &usb30_master_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2931,7 +3163,9 @@ static struct clk_branch gcc_dcc_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_dcc_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, +@@ -2945,7 +3179,9 @@ static struct clk_branch gcc_aggre0_noc_mpu_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_aggre0_noc_mpu_cfg_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, +@@ -2959,7 +3195,9 @@ static struct clk_branch gcc_qspi_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_qspi_ahb_clk", +- .parent_names = (const char *[]){ "periph_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &periph_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -2974,7 +3212,9 @@ static struct clk_branch gcc_qspi_ser_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_qspi_ser_clk", +- .parent_names = (const char *[]){ "qspi_ser_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &qspi_ser_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, +@@ -3087,7 +3327,9 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_cfg_ahb_clk", +- .parent_names = (const char *[]){ "config_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &config_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, +@@ -3101,7 +3343,9 @@ static struct clk_branch gcc_mss_mnoc_bimc_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_mnoc_bimc_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, +@@ -3115,7 +3359,9 @@ static struct clk_branch gcc_mss_snoc_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_snoc_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, +@@ -3129,7 +3375,9 @@ static struct clk_branch gcc_mss_q6_bimc_axi_clk = { + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_q6_bimc_axi_clk", +- .parent_names = (const char *[]){ "system_noc_clk_src" }, ++ .parent_hws = (const struct clk_hw*[]){ ++ &system_noc_clk_src.clkr.hw, ++ }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, +-- +2.42.0 + diff --git a/queue-5.4/clk-qcom-gcc-sm8150-fix-gcc_sdcc2_apps_clk_src.patch b/queue-5.4/clk-qcom-gcc-sm8150-fix-gcc_sdcc2_apps_clk_src.patch new file mode 100644 index 00000000000..15ed4ae2208 --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-sm8150-fix-gcc_sdcc2_apps_clk_src.patch @@ -0,0 +1,39 @@ +From fc08f229011b286b697e8af99180051b8e2551ff Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Sep 2023 20:56:11 +0300 +Subject: clk: qcom: gcc-sm8150: Fix gcc_sdcc2_apps_clk_src + +From: Danila Tikhonov + +[ Upstream commit 7138c244fb293f24ce8ab782961022eff00a10c4 ] + +Set .flags = CLK_OPS_PARENT_ENABLE to fix "gcc_sdcc2_apps_clk_src: rcg +didn't update its configuration" error. + +Fixes: 2a1d7eb854bb ("clk: qcom: gcc: Add global clock controller driver for SM8150") +Tested-by: Arseniy Velikanov +Signed-off-by: Danila Tikhonov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20230913175612.8685-1-danila@jiaxyga.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-sm8150.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c +index f18502cdc46e0..68ea6a846a154 100644 +--- a/drivers/clk/qcom/gcc-sm8150.c ++++ b/drivers/clk/qcom/gcc-sm8150.c +@@ -801,7 +801,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = { + .name = "gcc_sdcc2_apps_clk_src", + .parent_data = gcc_parents_6, + .num_parents = ARRAY_SIZE(gcc_parents_6), +- .flags = CLK_SET_RATE_PARENT, ++ .flags = CLK_OPS_PARENT_ENABLE, + .ops = &clk_rcg2_floor_ops, + }, + }; +-- +2.42.0 + diff --git a/queue-5.4/clk-qcom-gcc-sm8150-use-array_size-instead-of-specif.patch b/queue-5.4/clk-qcom-gcc-sm8150-use-array_size-instead-of-specif.patch new file mode 100644 index 00000000000..d4affb43a1e --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-sm8150-use-array_size-instead-of-specif.patch @@ -0,0 +1,461 @@ +From aa09603551a493ecb80bddb26380771e94f141bd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 6 Apr 2021 01:47:41 +0300 +Subject: clk: qcom: gcc-sm8150: use ARRAY_SIZE instead of specifying + num_parents + +From: Dmitry Baryshkov + +[ Upstream commit 60ca4670fd6436c07cea38472ebcee3b00f03bc7 ] + +Use ARRAY_SIZE() instead of manually specifying num_parents. This makes +adding/removing entries to/from parent_data easy and errorproof. + +Signed-off-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20210405224743.590029-32-dmitry.baryshkov@linaro.org +Signed-off-by: Stephen Boyd +Stable-dep-of: 7138c244fb29 ("clk: qcom: gcc-sm8150: Fix gcc_sdcc2_apps_clk_src") +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-sm8150.c | 96 +++++++++++++++++------------------ + 1 file changed, 48 insertions(+), 48 deletions(-) + +diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c +index ee908fbfeab17..f18502cdc46e0 100644 +--- a/drivers/clk/qcom/gcc-sm8150.c ++++ b/drivers/clk/qcom/gcc-sm8150.c +@@ -250,7 +250,7 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_cpuss_ahb_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -273,7 +273,7 @@ static struct clk_rcg2 gcc_emac_ptp_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_emac_ptp_clk_src", + .parent_data = gcc_parents_5, +- .num_parents = 5, ++ .num_parents = ARRAY_SIZE(gcc_parents_5), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -299,7 +299,7 @@ static struct clk_rcg2 gcc_emac_rgmii_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_emac_rgmii_clk_src", + .parent_data = gcc_parents_5, +- .num_parents = 5, ++ .num_parents = ARRAY_SIZE(gcc_parents_5), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -323,7 +323,7 @@ static struct clk_rcg2 gcc_gp1_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_gp1_clk_src", + .parent_data = gcc_parents_1, +- .num_parents = 5, ++ .num_parents = ARRAY_SIZE(gcc_parents_1), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -338,7 +338,7 @@ static struct clk_rcg2 gcc_gp2_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_gp2_clk_src", + .parent_data = gcc_parents_1, +- .num_parents = 5, ++ .num_parents = ARRAY_SIZE(gcc_parents_1), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -353,7 +353,7 @@ static struct clk_rcg2 gcc_gp3_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_gp3_clk_src", + .parent_data = gcc_parents_1, +- .num_parents = 5, ++ .num_parents = ARRAY_SIZE(gcc_parents_1), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -374,7 +374,7 @@ static struct clk_rcg2 gcc_pcie_0_aux_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_0_aux_clk_src", + .parent_data = gcc_parents_2, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_parents_2), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -389,7 +389,7 @@ static struct clk_rcg2 gcc_pcie_1_aux_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_1_aux_clk_src", + .parent_data = gcc_parents_2, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_parents_2), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -410,7 +410,7 @@ static struct clk_rcg2 gcc_pcie_phy_refgen_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_pcie_phy_refgen_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -432,7 +432,7 @@ static struct clk_rcg2 gcc_pdm2_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_pdm2_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -455,7 +455,7 @@ static struct clk_rcg2 gcc_qspi_core_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qspi_core_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -489,7 +489,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s0_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap0_s0_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -504,7 +504,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s1_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap0_s1_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -519,7 +519,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s2_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap0_s2_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -534,7 +534,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s3_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap0_s3_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -549,7 +549,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s4_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap0_s4_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -564,7 +564,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s5_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap0_s5_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -579,7 +579,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s6_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap0_s6_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -594,7 +594,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s7_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap0_s7_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -609,7 +609,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap1_s0_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -624,7 +624,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap1_s1_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -639,7 +639,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s2_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap1_s2_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -654,7 +654,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap1_s3_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -669,7 +669,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap1_s4_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -684,7 +684,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap1_s5_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -699,7 +699,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s0_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap2_s0_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -714,7 +714,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s1_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap2_s1_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -729,7 +729,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s2_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap2_s2_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -744,7 +744,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s3_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap2_s3_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -759,7 +759,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s4_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap2_s4_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -774,7 +774,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s5_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_qupv3_wrap2_s5_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -800,7 +800,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc2_apps_clk_src", + .parent_data = gcc_parents_6, +- .num_parents = 5, ++ .num_parents = ARRAY_SIZE(gcc_parents_6), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_floor_ops, + }, +@@ -825,7 +825,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_sdcc4_apps_clk_src", + .parent_data = gcc_parents_3, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_parents_3), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_floor_ops, + }, +@@ -845,7 +845,7 @@ static struct clk_rcg2 gcc_tsif_ref_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_tsif_ref_clk_src", + .parent_data = gcc_parents_7, +- .num_parents = 5, ++ .num_parents = ARRAY_SIZE(gcc_parents_7), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -869,7 +869,7 @@ static struct clk_rcg2 gcc_ufs_card_axi_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_card_axi_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -892,7 +892,7 @@ static struct clk_rcg2 gcc_ufs_card_ice_core_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_card_ice_core_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -912,7 +912,7 @@ static struct clk_rcg2 gcc_ufs_card_phy_aux_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_card_phy_aux_clk_src", + .parent_data = gcc_parents_4, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_parents_4), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -934,7 +934,7 @@ static struct clk_rcg2 gcc_ufs_card_unipro_core_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_card_unipro_core_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -958,7 +958,7 @@ static struct clk_rcg2 gcc_ufs_phy_axi_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_phy_axi_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -973,7 +973,7 @@ static struct clk_rcg2 gcc_ufs_phy_ice_core_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_phy_ice_core_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -988,7 +988,7 @@ static struct clk_rcg2 gcc_ufs_phy_phy_aux_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_phy_phy_aux_clk_src", + .parent_data = gcc_parents_4, +- .num_parents = 2, ++ .num_parents = ARRAY_SIZE(gcc_parents_4), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -1003,7 +1003,7 @@ static struct clk_rcg2 gcc_ufs_phy_unipro_core_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_phy_unipro_core_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -1027,7 +1027,7 @@ static struct clk_rcg2 gcc_usb30_prim_master_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_usb30_prim_master_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -1049,7 +1049,7 @@ static struct clk_rcg2 gcc_usb30_prim_mock_utmi_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_usb30_prim_mock_utmi_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -1064,7 +1064,7 @@ static struct clk_rcg2 gcc_usb30_sec_master_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_usb30_sec_master_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -1079,7 +1079,7 @@ static struct clk_rcg2 gcc_usb30_sec_mock_utmi_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_usb30_sec_mock_utmi_clk_src", + .parent_data = gcc_parents_0, +- .num_parents = 4, ++ .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -1094,7 +1094,7 @@ static struct clk_rcg2 gcc_usb3_prim_phy_aux_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_usb3_prim_phy_aux_clk_src", + .parent_data = gcc_parents_2, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_parents_2), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +@@ -1109,7 +1109,7 @@ static struct clk_rcg2 gcc_usb3_sec_phy_aux_clk_src = { + .clkr.hw.init = &(struct clk_init_data){ + .name = "gcc_usb3_sec_phy_aux_clk_src", + .parent_data = gcc_parents_2, +- .num_parents = 3, ++ .num_parents = ARRAY_SIZE(gcc_parents_2), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, + }, +-- +2.42.0 + diff --git a/queue-5.4/clk-scmi-free-scmi_clk-allocated-when-the-clocks-wit.patch b/queue-5.4/clk-scmi-free-scmi_clk-allocated-when-the-clocks-wit.patch new file mode 100644 index 00000000000..d30823f415c --- /dev/null +++ b/queue-5.4/clk-scmi-free-scmi_clk-allocated-when-the-clocks-wit.patch @@ -0,0 +1,40 @@ +From 656565da09b4f10f61bab7b49f0aa6ef006f83ce Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 4 Oct 2023 20:36:00 +0100 +Subject: clk: scmi: Free scmi_clk allocated when the clocks with invalid info + are skipped + +From: Sudeep Holla + +[ Upstream commit 3537a75e73f3420614a358d0c8b390ea483cc87d ] + +Add the missing devm_kfree() when we skip the clocks with invalid or +missing information from the firmware. + +Cc: Cristian Marussi +Cc: Michael Turquette +Cc: Stephen Boyd +Cc: linux-clk@vger.kernel.org +Fixes: 6d6a1d82eaef ("clk: add support for clocks provided by SCMI") +Link: https://lore.kernel.org/r/20231004193600.66232-1-sudeep.holla@arm.com +Signed-off-by: Sudeep Holla +Signed-off-by: Sasha Levin +--- + drivers/clk/clk-scmi.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c +index e3cdb4a282fea..d68de3773eb10 100644 +--- a/drivers/clk/clk-scmi.c ++++ b/drivers/clk/clk-scmi.c +@@ -170,6 +170,7 @@ static int scmi_clocks_probe(struct scmi_device *sdev) + sclk->info = handle->clk_ops->info_get(handle, idx); + if (!sclk->info) { + dev_dbg(dev, "invalid clock info for idx %d\n", idx); ++ devm_kfree(dev, sclk); + continue; + } + +-- +2.42.0 + diff --git a/queue-5.4/crypto-caam-jr-fix-chacha20-poly1305-self-test-failu.patch b/queue-5.4/crypto-caam-jr-fix-chacha20-poly1305-self-test-failu.patch new file mode 100644 index 00000000000..3cb17c18893 --- /dev/null +++ b/queue-5.4/crypto-caam-jr-fix-chacha20-poly1305-self-test-failu.patch @@ -0,0 +1,39 @@ +From 3bc62b7bc23229e35c6ef594d1059bf75a2ece64 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Sep 2023 18:12:37 +0530 +Subject: crypto: caam/jr - fix Chacha20 + Poly1305 self test failure + +From: Gaurav Jain + +[ Upstream commit a8d3cdcc092fb2f2882acb6c20473a1be0ef4484 ] + +key buffer is not copied in chachapoly_setkey function, +results in wrong output for encryption/decryption operation. + +fix this by memcpy the key in caam_ctx key arrary + +Fixes: d6bbd4eea243 ("crypto: caam/jr - add support for Chacha20 + Poly1305") +Signed-off-by: Gaurav Jain +Signed-off-by: Herbert Xu +Signed-off-by: Sasha Levin +--- + drivers/crypto/caam/caamalg.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c +index fdd994ee55e22..2db88213f13e2 100644 +--- a/drivers/crypto/caam/caamalg.c ++++ b/drivers/crypto/caam/caamalg.c +@@ -553,7 +553,8 @@ static int chachapoly_setkey(struct crypto_aead *aead, const u8 *key, + return -EINVAL; + } + +- ctx->cdata.key_virt = key; ++ memcpy(ctx->key, key, keylen); ++ ctx->cdata.key_virt = ctx->key; + ctx->cdata.keylen = keylen - saltlen; + + return chachapoly_set_sh_desc(aead); +-- +2.42.0 + diff --git a/queue-5.4/crypto-caam-qi2-fix-chacha20-poly1305-self-test-fail.patch b/queue-5.4/crypto-caam-qi2-fix-chacha20-poly1305-self-test-fail.patch new file mode 100644 index 00000000000..30812be7ac6 --- /dev/null +++ b/queue-5.4/crypto-caam-qi2-fix-chacha20-poly1305-self-test-fail.patch @@ -0,0 +1,39 @@ +From cc6fa04d0af1ee7c4979d7be80c4cd8bbbbea98d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Sep 2023 15:14:44 +0530 +Subject: crypto: caam/qi2 - fix Chacha20 + Poly1305 self test failure + +From: Gaurav Jain + +[ Upstream commit 7b8c6aee0d5b864e70c0da82583f9862e374eaf3 ] + +key buffer is not copied in chachapoly_setkey function, +results in wrong output for encryption/decryption operation. + +fix this by memcpy the key in caam_ctx key arrary + +Fixes: c10a53367901 ("crypto: caam/qi2 - add support for Chacha20 + Poly1305") +Signed-off-by: Gaurav Jain +Signed-off-by: Herbert Xu +Signed-off-by: Sasha Levin +--- + drivers/crypto/caam/caamalg_qi2.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/crypto/caam/caamalg_qi2.c b/drivers/crypto/caam/caamalg_qi2.c +index 28692d068176f..b8d277bfbd329 100644 +--- a/drivers/crypto/caam/caamalg_qi2.c ++++ b/drivers/crypto/caam/caamalg_qi2.c +@@ -639,7 +639,8 @@ static int chachapoly_setkey(struct crypto_aead *aead, const u8 *key, + return -EINVAL; + } + +- ctx->cdata.key_virt = key; ++ memcpy(ctx->key, key, keylen); ++ ctx->cdata.key_virt = ctx->key; + ctx->cdata.keylen = keylen - saltlen; + + return chachapoly_set_sh_desc(aead); +-- +2.42.0 + diff --git a/queue-5.4/dmaengine-pxa_dma-remove-an-erroneous-bug_on-in-pxad.patch b/queue-5.4/dmaengine-pxa_dma-remove-an-erroneous-bug_on-in-pxad.patch new file mode 100644 index 00000000000..8e46af0840d --- /dev/null +++ b/queue-5.4/dmaengine-pxa_dma-remove-an-erroneous-bug_on-in-pxad.patch @@ -0,0 +1,43 @@ +From afafd9eaaad578fbc317c95d278c7381c4ef09dd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 7 Oct 2023 13:13:09 +0200 +Subject: dmaengine: pxa_dma: Remove an erroneous BUG_ON() in pxad_free_desc() + +From: Christophe JAILLET + +[ Upstream commit 83c761f568733277ce1f7eb9dc9e890649c29a8c ] + +If pxad_alloc_desc() fails on the first dma_pool_alloc() call, then +sw_desc->nb_desc is zero. +In such a case pxad_free_desc() is called and it will BUG_ON(). + +Remove this erroneous BUG_ON(). + +It is also useless, because if "sw_desc->nb_desc == 0", then, on the first +iteration of the for loop, i is -1 and the loop will not be executed. +(both i and sw_desc->nb_desc are 'int') + +Fixes: a57e16cf0333 ("dmaengine: pxa: add pxa dmaengine driver") +Signed-off-by: Christophe JAILLET +Link: https://lore.kernel.org/r/c8fc5563c9593c914fde41f0f7d1489a21b45a9a.1696676782.git.christophe.jaillet@wanadoo.fr +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/pxa_dma.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/dma/pxa_dma.c b/drivers/dma/pxa_dma.c +index 68d9d60c051d9..9ce75ff9fa1cc 100644 +--- a/drivers/dma/pxa_dma.c ++++ b/drivers/dma/pxa_dma.c +@@ -723,7 +723,6 @@ static void pxad_free_desc(struct virt_dma_desc *vd) + dma_addr_t dma; + struct pxad_desc_sw *sw_desc = to_pxad_sw_desc(vd); + +- BUG_ON(sw_desc->nb_desc == 0); + for (i = sw_desc->nb_desc - 1; i >= 0; i--) { + if (i > 0) + dma = sw_desc->hw_desc[i - 1]->ddadr; +-- +2.42.0 + diff --git a/queue-5.4/dmaengine-ti-edma-handle-irq_of_parse_and_map-errors.patch b/queue-5.4/dmaengine-ti-edma-handle-irq_of_parse_and_map-errors.patch new file mode 100644 index 00000000000..37acfe429dd --- /dev/null +++ b/queue-5.4/dmaengine-ti-edma-handle-irq_of_parse_and_map-errors.patch @@ -0,0 +1,48 @@ +From 3e576be5135e6a5981dab014290a392c6036cd4a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 15 Sep 2023 15:59:59 +0300 +Subject: dmaengine: ti: edma: handle irq_of_parse_and_map() errors + +From: Dan Carpenter + +[ Upstream commit 14f6d317913f634920a640e9047aa2e66f5bdcb7 ] + +Zero is not a valid IRQ for in-kernel code and the irq_of_parse_and_map() +function returns zero on error. So this check for valid IRQs should only +accept values > 0. + +Fixes: 2b6b3b742019 ("ARM/dmaengine: edma: Merge the two drivers under drivers/dma/") +Signed-off-by: Dan Carpenter +Acked-by: Peter Ujfalusi +Link: https://lore.kernel.org/r/f15cb6a7-8449-4f79-98b6-34072f04edbc@moroto.mountain +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/ti/edma.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/dma/ti/edma.c b/drivers/dma/ti/edma.c +index 80b780e499711..b570f08888eeb 100644 +--- a/drivers/dma/ti/edma.c ++++ b/drivers/dma/ti/edma.c +@@ -2361,7 +2361,7 @@ static int edma_probe(struct platform_device *pdev) + if (irq < 0 && node) + irq = irq_of_parse_and_map(node, 0); + +- if (irq >= 0) { ++ if (irq > 0) { + irq_name = devm_kasprintf(dev, GFP_KERNEL, "%s_ccint", + dev_name(dev)); + ret = devm_request_irq(dev, irq, dma_irq_handler, 0, irq_name, +@@ -2377,7 +2377,7 @@ static int edma_probe(struct platform_device *pdev) + if (irq < 0 && node) + irq = irq_of_parse_and_map(node, 2); + +- if (irq >= 0) { ++ if (irq > 0) { + irq_name = devm_kasprintf(dev, GFP_KERNEL, "%s_ccerrint", + dev_name(dev)); + ret = devm_request_irq(dev, irq, dma_ccerr_handler, 0, irq_name, +-- +2.42.0 + diff --git a/queue-5.4/drm-radeon-possible-buffer-overflow.patch b/queue-5.4/drm-radeon-possible-buffer-overflow.patch new file mode 100644 index 00000000000..7be27142734 --- /dev/null +++ b/queue-5.4/drm-radeon-possible-buffer-overflow.patch @@ -0,0 +1,47 @@ +From b263a4902ff558c34d3b9f221c5b6d00b59907b3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 17 Aug 2023 19:33:49 +0800 +Subject: drm/radeon: possible buffer overflow + +From: Konstantin Meskhidze + +[ Upstream commit dd05484f99d16715a88eedfca363828ef9a4c2d4 ] + +Buffer 'afmt_status' of size 6 could overflow, since index 'afmt_idx' is +checked after access. + +Fixes: 5cc4e5fc293b ("drm/radeon: Cleanup HDMI audio interrupt handling for evergreen") +Co-developed-by: Ivanov Mikhail +Signed-off-by: Konstantin Meskhidze +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/radeon/evergreen.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c +index 1d978a3d9c828..2156590c3d159 100644 +--- a/drivers/gpu/drm/radeon/evergreen.c ++++ b/drivers/gpu/drm/radeon/evergreen.c +@@ -4819,14 +4819,15 @@ int evergreen_irq_process(struct radeon_device *rdev) + break; + case 44: /* hdmi */ + afmt_idx = src_data; +- if (!(afmt_status[afmt_idx] & AFMT_AZ_FORMAT_WTRIG)) +- DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); +- + if (afmt_idx > 5) { + DRM_ERROR("Unhandled interrupt: %d %d\n", + src_id, src_data); + break; + } ++ ++ if (!(afmt_status[afmt_idx] & AFMT_AZ_FORMAT_WTRIG)) ++ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); ++ + afmt_status[afmt_idx] &= ~AFMT_AZ_FORMAT_WTRIG; + queue_hdmi = true; + DRM_DEBUG("IH: HDMI%d\n", afmt_idx + 1); +-- +2.42.0 + diff --git a/queue-5.4/drm-rockchip-cdn-dp-fix-some-error-handling-paths-in.patch b/queue-5.4/drm-rockchip-cdn-dp-fix-some-error-handling-paths-in.patch new file mode 100644 index 00000000000..eadf3eaef0a --- /dev/null +++ b/queue-5.4/drm-rockchip-cdn-dp-fix-some-error-handling-paths-in.patch @@ -0,0 +1,60 @@ +From 8f5ef4d553533a0231d7b132b2aca6bdcd12419d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 2 Sep 2023 19:34:31 +0200 +Subject: drm/rockchip: cdn-dp: Fix some error handling paths in cdn_dp_probe() + +From: Christophe JAILLET + +[ Upstream commit 44b968d0d0868b7a9b7a5c64464ada464ff4d532 ] + +cdn_dp_audio_codec_init() can fail. So add some error handling. + +If component_add() fails, the previous cdn_dp_audio_codec_init() call +should be undone, as already done in the remove function. + +Fixes: 88582f564692 ("drm/rockchip: cdn-dp: Don't unregister audio dev when unbinding") +Signed-off-by: Christophe JAILLET +Signed-off-by: Heiko Stuebner +Link: https://patchwork.freedesktop.org/patch/msgid/8494a41602fadb7439630921a9779640698f2f9f.1693676045.git.christophe.jaillet@wanadoo.fr +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/rockchip/cdn-dp-core.c | 15 +++++++++++++-- + 1 file changed, 13 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c +index 2ea672f4420d5..df2656471e31b 100644 +--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c ++++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c +@@ -1147,6 +1147,7 @@ static int cdn_dp_probe(struct platform_device *pdev) + struct cdn_dp_device *dp; + struct extcon_dev *extcon; + struct phy *phy; ++ int ret; + int i; + + dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL); +@@ -1187,9 +1188,19 @@ static int cdn_dp_probe(struct platform_device *pdev) + mutex_init(&dp->lock); + dev_set_drvdata(dev, dp); + +- cdn_dp_audio_codec_init(dp, dev); ++ ret = cdn_dp_audio_codec_init(dp, dev); ++ if (ret) ++ return ret; ++ ++ ret = component_add(dev, &cdn_dp_component_ops); ++ if (ret) ++ goto err_audio_deinit; + +- return component_add(dev, &cdn_dp_component_ops); ++ return 0; ++ ++err_audio_deinit: ++ platform_device_unregister(dp->audio_pdev); ++ return ret; + } + + static int cdn_dp_remove(struct platform_device *pdev) +-- +2.42.0 + diff --git a/queue-5.4/drm-rockchip-vop-fix-call-to-crtc-reset-helper.patch b/queue-5.4/drm-rockchip-vop-fix-call-to-crtc-reset-helper.patch new file mode 100644 index 00000000000..004b5cdbace --- /dev/null +++ b/queue-5.4/drm-rockchip-vop-fix-call-to-crtc-reset-helper.patch @@ -0,0 +1,43 @@ +From 2cb7ad6c824b1ef59b142f0da0fa581e3789fe1e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 21 Jun 2023 22:33:20 +0000 +Subject: drm/rockchip: vop: Fix call to crtc reset helper + +From: Jonas Karlman + +[ Upstream commit 5aacd290837828c089a83ac9795c74c4c9e2c923 ] + +Allocation of crtc_state may fail in vop_crtc_reset, causing an invalid +pointer to be passed to __drm_atomic_helper_crtc_reset. + +Fix this by adding a NULL check of crtc_state, similar to other drivers. + +Fixes: 01e2eaf40c9d ("drm/rockchip: Convert to using __drm_atomic_helper_crtc_reset() for reset.") +Signed-off-by: Jonas Karlman +Reviewed-by: Sascha Hauer +Signed-off-by: Heiko Stuebner +Link: https://patchwork.freedesktop.org/patch/msgid/20230621223311.2239547-4-jonas@kwiboo.se +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +index 52a4b6277188e..20aa93fe9e3f2 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +@@ -1317,7 +1317,10 @@ static void vop_crtc_reset(struct drm_crtc *crtc) + if (crtc->state) + vop_crtc_destroy_state(crtc, crtc->state); + +- __drm_atomic_helper_crtc_reset(crtc, &crtc_state->base); ++ if (crtc_state) ++ __drm_atomic_helper_crtc_reset(crtc, &crtc_state->base); ++ else ++ __drm_atomic_helper_crtc_reset(crtc, NULL); + } + + #ifdef CONFIG_DRM_ANALOGIX_DP +-- +2.42.0 + diff --git a/queue-5.4/drm-rockchip-vop-fix-reset-of-state-in-duplicate-sta.patch b/queue-5.4/drm-rockchip-vop-fix-reset-of-state-in-duplicate-sta.patch new file mode 100644 index 00000000000..655cd389c3c --- /dev/null +++ b/queue-5.4/drm-rockchip-vop-fix-reset-of-state-in-duplicate-sta.patch @@ -0,0 +1,42 @@ +From 5f3c19fd79d46d91081b3e60433113872fb32d09 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 21 Jun 2023 22:33:17 +0000 +Subject: drm/rockchip: vop: Fix reset of state in duplicate state crtc funcs + +From: Jonas Karlman + +[ Upstream commit 13fc28804bf10ca0b7bce3efbba95c534836d7ca ] + +struct rockchip_crtc_state members such as output_type, output_bpc and +enable_afbc is always reset to zero in the atomic_duplicate_state crtc +funcs. + +Fix this by using kmemdup on the subclass rockchip_crtc_state struct. + +Fixes: 4e257d9eee23 ("drm/rockchip: get rid of rockchip_drm_crtc_mode_config") +Signed-off-by: Jonas Karlman +Reviewed-by: Sascha Hauer +Signed-off-by: Heiko Stuebner +Link: https://patchwork.freedesktop.org/patch/msgid/20230621223311.2239547-2-jonas@kwiboo.se +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +index 1795adbd81d38..52a4b6277188e 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +@@ -1291,7 +1291,8 @@ static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc) + if (WARN_ON(!crtc->state)) + return NULL; + +- rockchip_state = kzalloc(sizeof(*rockchip_state), GFP_KERNEL); ++ rockchip_state = kmemdup(to_rockchip_crtc_state(crtc->state), ++ sizeof(*rockchip_state), GFP_KERNEL); + if (!rockchip_state) + return NULL; + +-- +2.42.0 + diff --git a/queue-5.4/ext4-move-ix-sanity-check-to-corrent-position.patch b/queue-5.4/ext4-move-ix-sanity-check-to-corrent-position.patch new file mode 100644 index 00000000000..9cbb12d46a9 --- /dev/null +++ b/queue-5.4/ext4-move-ix-sanity-check-to-corrent-position.patch @@ -0,0 +1,51 @@ +From 64ac88513c06cb526e1353a6968af031fadb0f70 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 6 Sep 2023 09:33:41 +0800 +Subject: ext4: move 'ix' sanity check to corrent position + +From: Gou Hao + +[ Upstream commit af90a8f4a09ec4a3de20142e37f37205d4687f28 ] + +Check 'ix' before it is used. + +Fixes: 80e675f906db ("ext4: optimize memmmove lengths in extent/index insertions") +Signed-off-by: Gou Hao +Link: https://lore.kernel.org/r/20230906013341.7199-1-gouhao@uniontech.com +Signed-off-by: Theodore Ts'o +Signed-off-by: Sasha Levin +--- + fs/ext4/extents.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c +index 478c35d453784..98e1b1ddb4ec7 100644 +--- a/fs/ext4/extents.c ++++ b/fs/ext4/extents.c +@@ -1036,6 +1036,11 @@ static int ext4_ext_insert_index(handle_t *handle, struct inode *inode, + ix = curp->p_idx; + } + ++ if (unlikely(ix > EXT_MAX_INDEX(curp->p_hdr))) { ++ EXT4_ERROR_INODE(inode, "ix > EXT_MAX_INDEX!"); ++ return -EFSCORRUPTED; ++ } ++ + len = EXT_LAST_INDEX(curp->p_hdr) - ix + 1; + BUG_ON(len < 0); + if (len > 0) { +@@ -1045,11 +1050,6 @@ static int ext4_ext_insert_index(handle_t *handle, struct inode *inode, + memmove(ix + 1, ix, len * sizeof(struct ext4_extent_idx)); + } + +- if (unlikely(ix > EXT_MAX_INDEX(curp->p_hdr))) { +- EXT4_ERROR_INODE(inode, "ix > EXT_MAX_INDEX!"); +- return -EFSCORRUPTED; +- } +- + ix->ei_block = cpu_to_le32(logical); + ext4_idx_store_pblock(ix, ptr); + le16_add_cpu(&curp->p_hdr->eh_entries, 1); +-- +2.42.0 + diff --git a/queue-5.4/f2fs-fix-to-initialize-map.m_pblk-in-f2fs_precache_e.patch b/queue-5.4/f2fs-fix-to-initialize-map.m_pblk-in-f2fs_precache_e.patch new file mode 100644 index 00000000000..ba133334e96 --- /dev/null +++ b/queue-5.4/f2fs-fix-to-initialize-map.m_pblk-in-f2fs_precache_e.patch @@ -0,0 +1,37 @@ +From 9158536e20ca1ec90ce6546acaf80671e5a8d5be Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 7 Oct 2023 15:45:52 +0800 +Subject: f2fs: fix to initialize map.m_pblk in f2fs_precache_extents() + +From: Chao Yu + +[ Upstream commit 8b07c1fb0f1ad139373c8253f2fad8bc43fab07d ] + +Otherwise, it may print random physical block address in tracepoint +of f2fs_map_blocks() as below: + +f2fs_map_blocks: dev = (253,16), ino = 2297, file offset = 0, start blkaddr = 0xa356c421, len = 0x0, flags = 0 + +Fixes: c4020b2da4c9 ("f2fs: support F2FS_IOC_PRECACHE_EXTENTS") +Signed-off-by: Chao Yu +Signed-off-by: Jaegeuk Kim +Signed-off-by: Sasha Levin +--- + fs/f2fs/file.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c +index 8d4e66f36cf7e..2330600dbe02e 100644 +--- a/fs/f2fs/file.c ++++ b/fs/f2fs/file.c +@@ -3117,6 +3117,7 @@ int f2fs_precache_extents(struct inode *inode) + return -EOPNOTSUPP; + + map.m_lblk = 0; ++ map.m_pblk = 0; + map.m_next_pgofs = NULL; + map.m_next_extent = &m_next_extent; + map.m_seg_type = NO_CHECK_TYPE; +-- +2.42.0 + diff --git a/queue-5.4/firmware-ti_sci-mark-driver-as-non-removable.patch b/queue-5.4/firmware-ti_sci-mark-driver-as-non-removable.patch new file mode 100644 index 00000000000..bdad649f8e6 --- /dev/null +++ b/queue-5.4/firmware-ti_sci-mark-driver-as-non-removable.patch @@ -0,0 +1,113 @@ +From 1552d25b0fc8c84ed663ffa806876425ee47faa4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Sep 2023 14:40:26 +0530 +Subject: firmware: ti_sci: Mark driver as non removable +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Dhruva Gole + +[ Upstream commit 7b7a224b1ba1703583b25a3641ad9798f34d832a ] + +The TI-SCI message protocol provides a way to communicate between +various compute processors with a central system controller entity. It +provides the fundamental device management capability and clock control +in the SOCs that it's used in. + +The remove function failed to do all the necessary cleanup if +there are registered users. Some things are freed however which +likely results in an oops later on. + +Ensure that the driver isn't unbound by suppressing its bind and unbind +sysfs attributes. As the driver is built-in there is no way to remove +device once bound. + +We can also remove the ti_sci_remove call along with the +ti_sci_debugfs_destroy as there are no callers for it any longer. + +Fixes: aa276781a64a ("firmware: Add basic support for TI System Control Interface (TI-SCI) protocol") +Reported-by: Uwe Kleine-König +Closes: https://lore.kernel.org/linux-arm-kernel/20230216083908.mvmydic5lpi3ogo7@pengutronix.de/ +Suggested-by: Uwe Kleine-König +Acked-by: Uwe Kleine-König +Signed-off-by: Dhruva Gole +Link: https://lore.kernel.org/r/20230921091025.133130-1-d-gole@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Sasha Levin +--- + drivers/firmware/ti_sci.c | 46 +-------------------------------------- + 1 file changed, 1 insertion(+), 45 deletions(-) + +diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c +index 53cee17d01158..54340869e682a 100644 +--- a/drivers/firmware/ti_sci.c ++++ b/drivers/firmware/ti_sci.c +@@ -208,19 +208,6 @@ static int ti_sci_debugfs_create(struct platform_device *pdev, + return 0; + } + +-/** +- * ti_sci_debugfs_destroy() - clean up log debug file +- * @pdev: platform device pointer +- * @info: Pointer to SCI entity information +- */ +-static void ti_sci_debugfs_destroy(struct platform_device *pdev, +- struct ti_sci_info *info) +-{ +- if (IS_ERR(info->debug_region)) +- return; +- +- debugfs_remove(info->d); +-} + #else /* CONFIG_DEBUG_FS */ + static inline int ti_sci_debugfs_create(struct platform_device *dev, + struct ti_sci_info *info) +@@ -3527,43 +3514,12 @@ static int ti_sci_probe(struct platform_device *pdev) + return ret; + } + +-static int ti_sci_remove(struct platform_device *pdev) +-{ +- struct ti_sci_info *info; +- struct device *dev = &pdev->dev; +- int ret = 0; +- +- of_platform_depopulate(dev); +- +- info = platform_get_drvdata(pdev); +- +- if (info->nb.notifier_call) +- unregister_restart_handler(&info->nb); +- +- mutex_lock(&ti_sci_list_mutex); +- if (info->users) +- ret = -EBUSY; +- else +- list_del(&info->node); +- mutex_unlock(&ti_sci_list_mutex); +- +- if (!ret) { +- ti_sci_debugfs_destroy(pdev, info); +- +- /* Safe to free channels since no more users */ +- mbox_free_channel(info->chan_tx); +- mbox_free_channel(info->chan_rx); +- } +- +- return ret; +-} +- + static struct platform_driver ti_sci_driver = { + .probe = ti_sci_probe, +- .remove = ti_sci_remove, + .driver = { + .name = "ti-sci", + .of_match_table = of_match_ptr(ti_sci_of_match), ++ .suppress_bind_attrs = true, + }, + }; + module_platform_driver(ti_sci_driver); +-- +2.42.0 + diff --git a/queue-5.4/firmware-ti_sci-replace-http-links-with-https-ones.patch b/queue-5.4/firmware-ti_sci-replace-http-links-with-https-ones.patch new file mode 100644 index 00000000000..11f15157ad5 --- /dev/null +++ b/queue-5.4/firmware-ti_sci-replace-http-links-with-https-ones.patch @@ -0,0 +1,147 @@ +From f73bc14db22e0b0188b77ea9442784e2983988f5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 24 Jul 2020 14:43:48 -0700 +Subject: firmware: ti_sci: Replace HTTP links with HTTPS ones + +From: Alexander A. Klimov + +[ Upstream commit a6df49f4224324dd8588f6a0d9cff53cd61a196b ] + +Rationale: +Reduces attack surface on kernel devs opening the links for MITM +as HTTPS traffic is much harder to manipulate. + +Deterministic algorithm: +For each file: + If not .svg: + For each line: + If doesn't contain `\bxmlns\b`: + For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: + If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: + If both the HTTP and HTTPS versions + return 200 OK and serve the same content: + Replace HTTP with HTTPS. + +Signed-off-by: Alexander A. Klimov +Acked-by: Rob Herring +Signed-off-by: Santosh Shilimkar +Stable-dep-of: 7b7a224b1ba1 ("firmware: ti_sci: Mark driver as non removable") +Signed-off-by: Sasha Levin +--- + .../devicetree/bindings/interrupt-controller/ti,sci-intr.txt | 2 +- + drivers/firmware/ti_sci.c | 2 +- + drivers/firmware/ti_sci.h | 2 +- + drivers/irqchip/irq-ti-sci-inta.c | 2 +- + drivers/irqchip/irq-ti-sci-intr.c | 2 +- + drivers/reset/reset-ti-sci.c | 2 +- + include/linux/soc/ti/ti_sci_inta_msi.h | 2 +- + include/linux/soc/ti/ti_sci_protocol.h | 2 +- + 8 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt +index 1a8718f8855d6..178fca08278fe 100644 +--- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt ++++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt +@@ -55,7 +55,7 @@ Required Properties: + corresponds to a range of host irqs. + + For more details on TISCI IRQ resource management refer: +-http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html ++https://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html + + Example: + -------- +diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c +index 4126be9e32160..53cee17d01158 100644 +--- a/drivers/firmware/ti_sci.c ++++ b/drivers/firmware/ti_sci.c +@@ -2,7 +2,7 @@ + /* + * Texas Instruments System Control Interface Protocol Driver + * +- * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ ++ * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ + * Nishanth Menon + */ + +diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h +index f0d068c039444..57cd040629940 100644 +--- a/drivers/firmware/ti_sci.h ++++ b/drivers/firmware/ti_sci.h +@@ -6,7 +6,7 @@ + * The system works in a message response protocol + * See: http://processors.wiki.ti.com/index.php/TISCI for details + * +- * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ ++ * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ + */ + + #ifndef __TI_SCI_H +diff --git a/drivers/irqchip/irq-ti-sci-inta.c b/drivers/irqchip/irq-ti-sci-inta.c +index 0a35499c46728..94cba59147883 100644 +--- a/drivers/irqchip/irq-ti-sci-inta.c ++++ b/drivers/irqchip/irq-ti-sci-inta.c +@@ -2,7 +2,7 @@ + /* + * Texas Instruments' K3 Interrupt Aggregator irqchip driver + * +- * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ ++ * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ + * Lokesh Vutla + */ + +diff --git a/drivers/irqchip/irq-ti-sci-intr.c b/drivers/irqchip/irq-ti-sci-intr.c +index 7d0163d85fb9b..6b366d98fe3c2 100644 +--- a/drivers/irqchip/irq-ti-sci-intr.c ++++ b/drivers/irqchip/irq-ti-sci-intr.c +@@ -2,7 +2,7 @@ + /* + * Texas Instruments' K3 Interrupt Router irqchip driver + * +- * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ ++ * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ + * Lokesh Vutla + */ + +diff --git a/drivers/reset/reset-ti-sci.c b/drivers/reset/reset-ti-sci.c +index bf68729ab7292..b799aefad547d 100644 +--- a/drivers/reset/reset-ti-sci.c ++++ b/drivers/reset/reset-ti-sci.c +@@ -1,7 +1,7 @@ + /* + * Texas Instrument's System Control Interface (TI-SCI) reset driver + * +- * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ ++ * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ + * Andrew F. Davis + * + * This program is free software; you can redistribute it and/or modify +diff --git a/include/linux/soc/ti/ti_sci_inta_msi.h b/include/linux/soc/ti/ti_sci_inta_msi.h +index 11fb5048f5f6e..e3aa8b14612ee 100644 +--- a/include/linux/soc/ti/ti_sci_inta_msi.h ++++ b/include/linux/soc/ti/ti_sci_inta_msi.h +@@ -2,7 +2,7 @@ + /* + * Texas Instruments' K3 TI SCI INTA MSI helper + * +- * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ ++ * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ + * Lokesh Vutla + */ + +diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h +index 9531ec8232988..0fc452dd96d49 100644 +--- a/include/linux/soc/ti/ti_sci_protocol.h ++++ b/include/linux/soc/ti/ti_sci_protocol.h +@@ -2,7 +2,7 @@ + /* + * Texas Instruments System Control Interface Protocol + * +- * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ ++ * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ + * Nishanth Menon + */ + +-- +2.42.0 + diff --git a/queue-5.4/genirq-matrix-exclude-managed-interrupts-in-irq_matr.patch b/queue-5.4/genirq-matrix-exclude-managed-interrupts-in-irq_matr.patch new file mode 100644 index 00000000000..b20f9f63f33 --- /dev/null +++ b/queue-5.4/genirq-matrix-exclude-managed-interrupts-in-irq_matr.patch @@ -0,0 +1,73 @@ +From 9c7cdf7e5be290a1d465dcb44b6a330315f3b105 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 20 Oct 2023 15:25:22 +0800 +Subject: genirq/matrix: Exclude managed interrupts in irq_matrix_allocated() + +From: Chen Yu + +[ Upstream commit a0b0bad10587ae2948a7c36ca4ffc206007fbcf3 ] + +When a CPU is about to be offlined, x86 validates that all active +interrupts which are targeted to this CPU can be migrated to the remaining +online CPUs. If not, the offline operation is aborted. + +The validation uses irq_matrix_allocated() to retrieve the number of +vectors which are allocated on the outgoing CPU. The returned number of +allocated vectors includes also vectors which are associated to managed +interrupts. + +That's overaccounting because managed interrupts are: + + - not migrated when the affinity mask of the interrupt targets only + the outgoing CPU + + - migrated to another CPU, but in that case the vector is already + pre-allocated on the potential target CPUs and must not be taken into + account. + +As a consequence the check whether the remaining online CPUs have enough +capacity for migrating the allocated vectors from the outgoing CPU might +fail incorrectly. + +Let irq_matrix_allocated() return only the number of allocated non-managed +interrupts to make this validation check correct. + +[ tglx: Amend changelog and fixup kernel-doc comment ] + +Fixes: 2f75d9e1c905 ("genirq: Implement bitmap matrix allocator") +Reported-by: Wendy Wang +Signed-off-by: Chen Yu +Signed-off-by: Thomas Gleixner +Link: https://lore.kernel.org/r/20231020072522.557846-1-yu.c.chen@intel.com +Signed-off-by: Sasha Levin +--- + kernel/irq/matrix.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/kernel/irq/matrix.c b/kernel/irq/matrix.c +index 8e586858bcf41..d25edbb87119f 100644 +--- a/kernel/irq/matrix.c ++++ b/kernel/irq/matrix.c +@@ -466,16 +466,16 @@ unsigned int irq_matrix_reserved(struct irq_matrix *m) + } + + /** +- * irq_matrix_allocated - Get the number of allocated irqs on the local cpu ++ * irq_matrix_allocated - Get the number of allocated non-managed irqs on the local CPU + * @m: Pointer to the matrix to search + * +- * This returns number of allocated irqs ++ * This returns number of allocated non-managed interrupts. + */ + unsigned int irq_matrix_allocated(struct irq_matrix *m) + { + struct cpumap *cm = this_cpu_ptr(m->maps); + +- return cm->allocated; ++ return cm->allocated - cm->managed_allocated; + } + + #ifdef CONFIG_GENERIC_IRQ_DEBUGFS +-- +2.42.0 + diff --git a/queue-5.4/hid-cp2112-fix-duplicate-workqueue-initialization.patch b/queue-5.4/hid-cp2112-fix-duplicate-workqueue-initialization.patch new file mode 100644 index 00000000000..93145d75276 --- /dev/null +++ b/queue-5.4/hid-cp2112-fix-duplicate-workqueue-initialization.patch @@ -0,0 +1,50 @@ +From 2054ffc3e43485d2a89958d93d3d72dc5eb244bb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 Sep 2023 16:22:45 -0500 +Subject: hid: cp2112: Fix duplicate workqueue initialization + +From: Danny Kaehn + +[ Upstream commit e3c2d2d144c082dd71596953193adf9891491f42 ] + +Previously the cp2112 driver called INIT_DELAYED_WORK within +cp2112_gpio_irq_startup, resulting in duplicate initilizations of the +workqueue on subsequent IRQ startups following an initial request. This +resulted in a warning in set_work_data in workqueue.c, as well as a rare +NULL dereference within process_one_work in workqueue.c. + +Initialize the workqueue within _probe instead. + +Fixes: 13de9cca514e ("HID: cp2112: add IRQ chip handling") +Signed-off-by: Danny Kaehn +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-cp2112.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c +index f2ff244c6b106..648201b6c624d 100644 +--- a/drivers/hid/hid-cp2112.c ++++ b/drivers/hid/hid-cp2112.c +@@ -1156,8 +1156,6 @@ static unsigned int cp2112_gpio_irq_startup(struct irq_data *d) + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct cp2112_device *dev = gpiochip_get_data(gc); + +- INIT_DELAYED_WORK(&dev->gpio_poll_worker, cp2112_gpio_poll_callback); +- + if (!dev->gpio_poll) { + dev->gpio_poll = true; + schedule_delayed_work(&dev->gpio_poll_worker, 0); +@@ -1353,6 +1351,8 @@ static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id) + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_simple_irq; + ++ INIT_DELAYED_WORK(&dev->gpio_poll_worker, cp2112_gpio_poll_callback); ++ + ret = gpiochip_add_data(&dev->gc, dev); + if (ret < 0) { + hid_err(hdev, "error registering gpio chip\n"); +-- +2.42.0 + diff --git a/queue-5.4/hid-cp2112-use-irqchip-template.patch b/queue-5.4/hid-cp2112-use-irqchip-template.patch new file mode 100644 index 00000000000..c2f9798e9b0 --- /dev/null +++ b/queue-5.4/hid-cp2112-use-irqchip-template.patch @@ -0,0 +1,77 @@ +From 8e64ad1457662f656f9800acebc5dd27623ff0e9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 22 Jul 2020 09:56:32 +0200 +Subject: HID: cp2112: Use irqchip template +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Linus Walleij + +[ Upstream commit 6bfa31756ae905e23050ee10a3b4d3d435122c97 ] + +This makes the driver use the irqchip template to assign +properties to the gpio_irq_chip instead of using the +explicit calls to gpiochip_irqchip_add(). The irqchip is +instead added while adding the gpiochip. + +Cc: Eudean Sun +Cc: Benjamin Tissoires +Cc: Sébastien Szymanski +Signed-off-by: Linus Walleij +Signed-off-by: Jiri Kosina +Stable-dep-of: e3c2d2d144c0 ("hid: cp2112: Fix duplicate workqueue initialization") +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-cp2112.c | 19 ++++++++++--------- + 1 file changed, 10 insertions(+), 9 deletions(-) + +diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c +index 340408f8c8ab2..f2ff244c6b106 100644 +--- a/drivers/hid/hid-cp2112.c ++++ b/drivers/hid/hid-cp2112.c +@@ -1240,6 +1240,7 @@ static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id) + struct cp2112_device *dev; + u8 buf[3]; + struct cp2112_smbus_config_report config; ++ struct gpio_irq_chip *girq; + int ret; + + dev = devm_kzalloc(&hdev->dev, sizeof(*dev), GFP_KERNEL); +@@ -1343,6 +1344,15 @@ static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id) + dev->gc.can_sleep = 1; + dev->gc.parent = &hdev->dev; + ++ girq = &dev->gc.irq; ++ girq->chip = &cp2112_gpio_irqchip; ++ /* The event comes from the outside so no parent handler */ ++ girq->parent_handler = NULL; ++ girq->num_parents = 0; ++ girq->parents = NULL; ++ girq->default_type = IRQ_TYPE_NONE; ++ girq->handler = handle_simple_irq; ++ + ret = gpiochip_add_data(&dev->gc, dev); + if (ret < 0) { + hid_err(hdev, "error registering gpio chip\n"); +@@ -1358,17 +1368,8 @@ static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id) + chmod_sysfs_attrs(hdev); + hid_hw_power(hdev, PM_HINT_NORMAL); + +- ret = gpiochip_irqchip_add(&dev->gc, &cp2112_gpio_irqchip, 0, +- handle_simple_irq, IRQ_TYPE_NONE); +- if (ret) { +- dev_err(dev->gc.parent, "failed to add IRQ chip\n"); +- goto err_sysfs_remove; +- } +- + return ret; + +-err_sysfs_remove: +- sysfs_remove_group(&hdev->dev.kobj, &cp2112_attr_group); + err_gpiochip_remove: + gpiochip_remove(&dev->gc); + err_free_i2c: +-- +2.42.0 + diff --git a/queue-5.4/hwmon-coretemp-fix-potentially-truncated-sysfs-attri.patch b/queue-5.4/hwmon-coretemp-fix-potentially-truncated-sysfs-attri.patch new file mode 100644 index 00000000000..ba686982e63 --- /dev/null +++ b/queue-5.4/hwmon-coretemp-fix-potentially-truncated-sysfs-attri.patch @@ -0,0 +1,59 @@ +From cbd573e3596fa4f1b681919b7bdfdbf906073553 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 25 Oct 2023 20:23:16 +0800 +Subject: hwmon: (coretemp) Fix potentially truncated sysfs attribute name + +From: Zhang Rui + +[ Upstream commit bbfff736d30e5283ad09e748caff979d75ddef7f ] + +When build with W=1 and "-Werror=format-truncation", below error is +observed in coretemp driver, + + drivers/hwmon/coretemp.c: In function 'create_core_data': +>> drivers/hwmon/coretemp.c:393:34: error: '%s' directive output may be truncated writing likely 5 or more bytes into a region of size between 3 and 13 [-Werror=format-truncation=] + 393 | "temp%d_%s", attr_no, suffixes[i]); + | ^~ + drivers/hwmon/coretemp.c:393:26: note: assuming directive output of 5 bytes + 393 | "temp%d_%s", attr_no, suffixes[i]); + | ^~~~~~~~~~~ + drivers/hwmon/coretemp.c:392:17: note: 'snprintf' output 7 or more bytes (assuming 22) into a destination of size 19 + 392 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + 393 | "temp%d_%s", attr_no, suffixes[i]); + | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + cc1: all warnings being treated as errors + +Given that +1. '%d' could take 10 charactors, +2. '%s' could take 10 charactors ("crit_alarm"), +3. "temp", "_" and the NULL terminator take 6 charactors, +fix the problem by increasing CORETEMP_NAME_LENGTH to 28. + +Signed-off-by: Zhang Rui +Fixes: 7108b80a542b ("hwmon/coretemp: Handle large core ID value") +Reported-by: kernel test robot +Closes: https://lore.kernel.org/oe-kbuild-all/202310200443.iD3tUbbK-lkp@intel.com/ +Link: https://lore.kernel.org/r/20231025122316.836400-1-rui.zhang@intel.com +Signed-off-by: Guenter Roeck +Signed-off-by: Sasha Levin +--- + drivers/hwmon/coretemp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c +index e232f44f6c9ac..0eabad3449617 100644 +--- a/drivers/hwmon/coretemp.c ++++ b/drivers/hwmon/coretemp.c +@@ -41,7 +41,7 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); + #define PKG_SYSFS_ATTR_NO 1 /* Sysfs attribute for package temp */ + #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ + #define NUM_REAL_CORES 128 /* Number of Real cores per cpu */ +-#define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */ ++#define CORETEMP_NAME_LENGTH 28 /* String Length of attrs */ + #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ + #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) + #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) +-- +2.42.0 + diff --git a/queue-5.4/hwrng-geode-fix-accessing-registers.patch b/queue-5.4/hwrng-geode-fix-accessing-registers.patch new file mode 100644 index 00000000000..caddc42d871 --- /dev/null +++ b/queue-5.4/hwrng-geode-fix-accessing-registers.patch @@ -0,0 +1,58 @@ +From 8785dc6e8e2dbcc1ce175f606a288475673f1094 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 10 Sep 2023 10:34:17 +0200 +Subject: hwrng: geode - fix accessing registers + +From: Jonas Gorski + +[ Upstream commit 464bd8ec2f06707f3773676a1bd2c64832a3c805 ] + +When the membase and pci_dev pointer were moved to a new struct in priv, +the actual membase users were left untouched, and they started reading +out arbitrary memory behind the struct instead of registers. This +unfortunately turned the RNG into a constant number generator, depending +on the content of what was at that offset. + +To fix this, update geode_rng_data_{read,present}() to also get the +membase via amd_geode_priv, and properly read from the right addresses +again. + +Fixes: 9f6ec8dc574e ("hwrng: geode - Fix PCI device refcount leak") +Reported-by: Timur I. Davletshin +Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217882 +Tested-by: Timur I. Davletshin +Suggested-by: Jo-Philipp Wich +Signed-off-by: Jonas Gorski +Signed-off-by: Herbert Xu +Signed-off-by: Sasha Levin +--- + drivers/char/hw_random/geode-rng.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/char/hw_random/geode-rng.c b/drivers/char/hw_random/geode-rng.c +index 207272979f233..2f8289865ec81 100644 +--- a/drivers/char/hw_random/geode-rng.c ++++ b/drivers/char/hw_random/geode-rng.c +@@ -58,7 +58,8 @@ struct amd_geode_priv { + + static int geode_rng_data_read(struct hwrng *rng, u32 *data) + { +- void __iomem *mem = (void __iomem *)rng->priv; ++ struct amd_geode_priv *priv = (struct amd_geode_priv *)rng->priv; ++ void __iomem *mem = priv->membase; + + *data = readl(mem + GEODE_RNG_DATA_REG); + +@@ -67,7 +68,8 @@ static int geode_rng_data_read(struct hwrng *rng, u32 *data) + + static int geode_rng_data_present(struct hwrng *rng, int wait) + { +- void __iomem *mem = (void __iomem *)rng->priv; ++ struct amd_geode_priv *priv = (struct amd_geode_priv *)rng->priv; ++ void __iomem *mem = priv->membase; + int data, i; + + for (i = 0; i < 20; i++) { +-- +2.42.0 + diff --git a/queue-5.4/i3c-fix-potential-refcount-leak-in-i3c_master_regist.patch b/queue-5.4/i3c-fix-potential-refcount-leak-in-i3c_master_regist.patch new file mode 100644 index 00000000000..8f90677d64b --- /dev/null +++ b/queue-5.4/i3c-fix-potential-refcount-leak-in-i3c_master_regist.patch @@ -0,0 +1,41 @@ +From 95e62e47877f9c1c697ff5cff08ead0feeb88fb1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Sep 2023 16:24:10 +0800 +Subject: i3c: Fix potential refcount leak in i3c_master_register_new_i3c_devs + +From: Dinghao Liu + +[ Upstream commit cab63f64887616e3c4e31cfd8103320be6ebc8d3 ] + +put_device() needs to be called on failure of device_register() +to give up the reference initialized in it to avoid refcount leak. + +Fixes: 3a379bbcea0a ("i3c: Add core I3C infrastructure") +Signed-off-by: Dinghao Liu +Link: https://lore.kernel.org/r/20230921082410.25548-1-dinghao.liu@zju.edu.cn +Signed-off-by: Alexandre Belloni +Signed-off-by: Sasha Levin +--- + drivers/i3c/master.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c +index 6cc71c90f85ea..02dc8e29c8280 100644 +--- a/drivers/i3c/master.c ++++ b/drivers/i3c/master.c +@@ -1469,9 +1469,11 @@ i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) + desc->dev->dev.of_node = desc->boardinfo->of_node; + + ret = device_register(&desc->dev->dev); +- if (ret) ++ if (ret) { + dev_err(&master->dev, + "Failed to add I3C device (err = %d)\n", ret); ++ put_device(&desc->dev->dev); ++ } + } + } + +-- +2.42.0 + diff --git a/queue-5.4/i40e-fix-potential-memory-leaks-in-i40e_remove.patch b/queue-5.4/i40e-fix-potential-memory-leaks-in-i40e_remove.patch new file mode 100644 index 00000000000..f0f431261e8 --- /dev/null +++ b/queue-5.4/i40e-fix-potential-memory-leaks-in-i40e_remove.patch @@ -0,0 +1,50 @@ +From 61d964642867539c19796f5d46595c7216ac5105 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 8 Sep 2023 14:42:01 +0200 +Subject: i40e: fix potential memory leaks in i40e_remove() + +From: Andrii Staikov + +[ Upstream commit 5ca636d927a106780451d957734f02589b972e2b ] + +Instead of freeing memory of a single VSI, make sure +the memory for all VSIs is cleared before releasing VSIs. +Add releasing of their resources in a loop with the iteration +number equal to the number of allocated VSIs. + +Fixes: 41c445ff0f48 ("i40e: main driver core") +Signed-off-by: Andrii Staikov +Signed-off-by: Aleksandr Loktionov +Reviewed-by: Simon Horman +Signed-off-by: Tony Nguyen +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/intel/i40e/i40e_main.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c +index 351d4c53297f5..3ccc248b1a8a7 100644 +--- a/drivers/net/ethernet/intel/i40e/i40e_main.c ++++ b/drivers/net/ethernet/intel/i40e/i40e_main.c +@@ -15553,11 +15553,15 @@ static void i40e_remove(struct pci_dev *pdev) + i40e_switch_branch_release(pf->veb[i]); + } + +- /* Now we can shutdown the PF's VSI, just before we kill ++ /* Now we can shutdown the PF's VSIs, just before we kill + * adminq and hmc. + */ +- if (pf->vsi[pf->lan_vsi]) +- i40e_vsi_release(pf->vsi[pf->lan_vsi]); ++ for (i = pf->num_alloc_vsi; i--;) ++ if (pf->vsi[i]) { ++ i40e_vsi_close(pf->vsi[i]); ++ i40e_vsi_release(pf->vsi[i]); ++ pf->vsi[i] = NULL; ++ } + + i40e_cloud_filter_exit(pf); + +-- +2.42.0 + diff --git a/queue-5.4/ipv6-avoid-atomic-fragment-on-gso-packets.patch b/queue-5.4/ipv6-avoid-atomic-fragment-on-gso-packets.patch new file mode 100644 index 00000000000..6b825514634 --- /dev/null +++ b/queue-5.4/ipv6-avoid-atomic-fragment-on-gso-packets.patch @@ -0,0 +1,54 @@ +From 8a8da87f8aeb0e19702bb0760ee60f9f323ec5d2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 24 Oct 2023 07:26:40 -0700 +Subject: ipv6: avoid atomic fragment on GSO packets + +From: Yan Zhai + +[ Upstream commit 03d6c848bfb406e9ef6d9846d759e97beaeea113 ] + +When the ipv6 stack output a GSO packet, if its gso_size is larger than +dst MTU, then all segments would be fragmented. However, it is possible +for a GSO packet to have a trailing segment with smaller actual size +than both gso_size as well as the MTU, which leads to an "atomic +fragment". Atomic fragments are considered harmful in RFC-8021. An +Existing report from APNIC also shows that atomic fragments are more +likely to be dropped even it is equivalent to a no-op [1]. + +Add an extra check in the GSO slow output path. For each segment from +the original over-sized packet, if it fits with the path MTU, then avoid +generating an atomic fragment. + +Link: https://www.potaroo.net/presentations/2022-03-01-ipv6-frag.pdf [1] +Fixes: b210de4f8c97 ("net: ipv6: Validate GSO SKB before finish IPv6 processing") +Reported-by: David Wragg +Signed-off-by: Yan Zhai +Link: https://lore.kernel.org/r/90912e3503a242dca0bc36958b11ed03a2696e5e.1698156966.git.yan@cloudflare.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + net/ipv6/ip6_output.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c +index 816275b2135fe..d3455585e6a8c 100644 +--- a/net/ipv6/ip6_output.c ++++ b/net/ipv6/ip6_output.c +@@ -177,7 +177,13 @@ ip6_finish_output_gso_slowpath_drop(struct net *net, struct sock *sk, + int err; + + skb_mark_not_on_list(segs); +- err = ip6_fragment(net, sk, segs, ip6_finish_output2); ++ /* Last GSO segment can be smaller than gso_size (and MTU). ++ * Adding a fragment header would produce an "atomic fragment", ++ * which is considered harmful (RFC-8021). Avoid that. ++ */ ++ err = segs->len > mtu ? ++ ip6_fragment(net, sk, segs, ip6_finish_output2) : ++ ip6_finish_output2(net, sk, segs); + if (err && ret == 0) + ret = err; + } +-- +2.42.0 + diff --git a/queue-5.4/ipvlan-properly-track-tx_errors.patch b/queue-5.4/ipvlan-properly-track-tx_errors.patch new file mode 100644 index 00000000000..d67cf15a743 --- /dev/null +++ b/queue-5.4/ipvlan-properly-track-tx_errors.patch @@ -0,0 +1,81 @@ +From a5389c1c94d2bd5eb2b56043f10f8b3454eecb20 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 26 Oct 2023 13:14:46 +0000 +Subject: ipvlan: properly track tx_errors + +From: Eric Dumazet + +[ Upstream commit ff672b9ffeb3f82135488ac16c5c5eb4b992999b ] + +Both ipvlan_process_v4_outbound() and ipvlan_process_v6_outbound() +increment dev->stats.tx_errors in case of errors. + +Unfortunately there are two issues : + +1) ipvlan_get_stats64() does not propagate dev->stats.tx_errors to user. + +2) Increments are not atomic. KCSAN would complain eventually. + +Use DEV_STATS_INC() to not miss an update, and change ipvlan_get_stats64() +to copy the value back to user. + +Fixes: 2ad7bf363841 ("ipvlan: Initial check-in of the IPVLAN driver.") +Signed-off-by: Eric Dumazet +Cc: Mahesh Bandewar +Link: https://lore.kernel.org/r/20231026131446.3933175-1-edumazet@google.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + drivers/net/ipvlan/ipvlan_core.c | 8 ++++---- + drivers/net/ipvlan/ipvlan_main.c | 1 + + 2 files changed, 5 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ipvlan/ipvlan_core.c b/drivers/net/ipvlan/ipvlan_core.c +index ab09d110760ec..b5a61b16a7eab 100644 +--- a/drivers/net/ipvlan/ipvlan_core.c ++++ b/drivers/net/ipvlan/ipvlan_core.c +@@ -442,12 +442,12 @@ static int ipvlan_process_v4_outbound(struct sk_buff *skb) + + err = ip_local_out(net, skb->sk, skb); + if (unlikely(net_xmit_eval(err))) +- dev->stats.tx_errors++; ++ DEV_STATS_INC(dev, tx_errors); + else + ret = NET_XMIT_SUCCESS; + goto out; + err: +- dev->stats.tx_errors++; ++ DEV_STATS_INC(dev, tx_errors); + kfree_skb(skb); + out: + return ret; +@@ -483,12 +483,12 @@ static int ipvlan_process_v6_outbound(struct sk_buff *skb) + + err = ip6_local_out(net, skb->sk, skb); + if (unlikely(net_xmit_eval(err))) +- dev->stats.tx_errors++; ++ DEV_STATS_INC(dev, tx_errors); + else + ret = NET_XMIT_SUCCESS; + goto out; + err: +- dev->stats.tx_errors++; ++ DEV_STATS_INC(dev, tx_errors); + kfree_skb(skb); + out: + return ret; +diff --git a/drivers/net/ipvlan/ipvlan_main.c b/drivers/net/ipvlan/ipvlan_main.c +index 5fea2e4a93101..4edec38437d00 100644 +--- a/drivers/net/ipvlan/ipvlan_main.c ++++ b/drivers/net/ipvlan/ipvlan_main.c +@@ -320,6 +320,7 @@ static void ipvlan_get_stats64(struct net_device *dev, + s->rx_dropped = rx_errs; + s->tx_dropped = tx_drps; + } ++ s->tx_errors = DEV_STATS_READ(dev, tx_errors); + } + + static int ipvlan_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) +-- +2.42.0 + diff --git a/queue-5.4/leds-pwm-convert-to-atomic-pwm-api.patch b/queue-5.4/leds-pwm-convert-to-atomic-pwm-api.patch new file mode 100644 index 00000000000..61ece4cde2b --- /dev/null +++ b/queue-5.4/leds-pwm-convert-to-atomic-pwm-api.patch @@ -0,0 +1,120 @@ +From 2f212634b019edd9b03a1574d885ca891db9b7a3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 24 Jan 2020 17:54:08 +0100 +Subject: leds: pwm: convert to atomic PWM API +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +[ Upstream commit dd47a83453e4a5b0d6a91fe702b7fbc1984fb610 ] + +pwm_config(), pwm_enable() and pwm_disable() should get removed in the +long run. So update the driver to use the atomic API that is here to +stay. + +A few side effects: + + - led_pwm_set() now returns an error when setting the PWM fails. + - During .probe() the PWM isn't disabled implicitly by pwm_apply_args() + any more. + +Signed-off-by: Uwe Kleine-König +Tested-by: Jeff LaBundy +Signed-off-by: Pavel Machek +Stable-dep-of: 76fe464c8e64 ("leds: pwm: Don't disable the PWM when the LED should be off") +Signed-off-by: Sasha Levin +--- + drivers/leds/leds-pwm.c | 41 +++++++++-------------------------------- + 1 file changed, 9 insertions(+), 32 deletions(-) + +diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c +index b72fd89ff3903..9111cdede0eee 100644 +--- a/drivers/leds/leds-pwm.c ++++ b/drivers/leds/leds-pwm.c +@@ -22,9 +22,8 @@ + struct led_pwm_data { + struct led_classdev cdev; + struct pwm_device *pwm; ++ struct pwm_state pwmstate; + unsigned int active_low; +- unsigned int period; +- int duty; + }; + + struct led_pwm_priv { +@@ -32,44 +31,29 @@ struct led_pwm_priv { + struct led_pwm_data leds[0]; + }; + +-static void __led_pwm_set(struct led_pwm_data *led_dat) +-{ +- int new_duty = led_dat->duty; +- +- pwm_config(led_dat->pwm, new_duty, led_dat->period); +- +- if (new_duty == 0) +- pwm_disable(led_dat->pwm); +- else +- pwm_enable(led_dat->pwm); +-} +- + static int led_pwm_set(struct led_classdev *led_cdev, + enum led_brightness brightness) + { + struct led_pwm_data *led_dat = + container_of(led_cdev, struct led_pwm_data, cdev); + unsigned int max = led_dat->cdev.max_brightness; +- unsigned long long duty = led_dat->period; ++ unsigned long long duty = led_dat->pwmstate.period; + + duty *= brightness; + do_div(duty, max); + + if (led_dat->active_low) +- duty = led_dat->period - duty; +- +- led_dat->duty = duty; +- +- __led_pwm_set(led_dat); ++ duty = led_dat->pwmstate.period - duty; + +- return 0; ++ led_dat->pwmstate.duty_cycle = duty; ++ led_dat->pwmstate.enabled = duty > 0; ++ return pwm_apply_state(led_dat->pwm, &led_dat->pwmstate); + } + + static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, + struct led_pwm *led, struct fwnode_handle *fwnode) + { + struct led_pwm_data *led_data = &priv->leds[priv->num_leds]; +- struct pwm_args pargs; + int ret; + + led_data->active_low = led->active_low; +@@ -93,17 +77,10 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, + + led_data->cdev.brightness_set_blocking = led_pwm_set; + +- /* +- * FIXME: pwm_apply_args() should be removed when switching to the +- * atomic PWM API. +- */ +- pwm_apply_args(led_data->pwm); +- +- pwm_get_args(led_data->pwm, &pargs); ++ pwm_init_state(led_data->pwm, &led_data->pwmstate); + +- led_data->period = pargs.period; +- if (!led_data->period) +- led_data->period = led->pwm_period_ns; ++ if (!led_data->pwmstate.period) ++ led_data->pwmstate.period = led->pwm_period_ns; + + ret = devm_led_classdev_register(dev, &led_data->cdev); + if (ret == 0) { +-- +2.42.0 + diff --git a/queue-5.4/leds-pwm-don-t-disable-the-pwm-when-the-led-should-b.patch b/queue-5.4/leds-pwm-don-t-disable-the-pwm-when-the-led-should-b.patch new file mode 100644 index 00000000000..e7fa45bd82d --- /dev/null +++ b/queue-5.4/leds-pwm-don-t-disable-the-pwm-when-the-led-should-b.patch @@ -0,0 +1,53 @@ +From 3f371755ca5f90802bb9399150d9817f8b7509b6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 22 Sep 2023 21:28:34 +0200 +Subject: leds: pwm: Don't disable the PWM when the LED should be off +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +[ Upstream commit 76fe464c8e64e71b2e4af11edeef0e5d85eeb6aa ] + +Disabling a PWM (i.e. calling pwm_apply_state with .enabled = false) +gives no guarantees what the PWM output does. It might freeze where it +currently is, or go in a High-Z state or drive the active or inactive +state, it might even continue to toggle. + +To ensure that the LED gets really disabled, don't disable the PWM even +when .duty_cycle is zero. + +This fixes disabling a leds-pwm LED on i.MX28. The PWM on this SoC is +one of those that freezes its output on disable, so if you disable an +LED that is full on, it stays on. If you disable a LED with half +brightness it goes off in 50% of the cases and full on in the other 50%. + +Fixes: 41c42ff5dbe2 ("leds: simple driver for pwm driven LEDs") +Reported-by: Rogan Dawes +Reported-by: Fabio Estevam +Signed-off-by: Uwe Kleine-König +Reviewed-by: Fabio Estevam +Link: https://lore.kernel.org/r/20230922192834.1695727-1-u.kleine-koenig@pengutronix.de +Signed-off-by: Lee Jones +Signed-off-by: Sasha Levin +--- + drivers/leds/leds-pwm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c +index 9111cdede0eee..acc99e01eb4ad 100644 +--- a/drivers/leds/leds-pwm.c ++++ b/drivers/leds/leds-pwm.c +@@ -46,7 +46,7 @@ static int led_pwm_set(struct led_classdev *led_cdev, + duty = led_dat->pwmstate.period - duty; + + led_dat->pwmstate.duty_cycle = duty; +- led_dat->pwmstate.enabled = duty > 0; ++ led_dat->pwmstate.enabled = true; + return pwm_apply_state(led_dat->pwm, &led_dat->pwmstate); + } + +-- +2.42.0 + diff --git a/queue-5.4/leds-pwm-simplify-if-condition.patch b/queue-5.4/leds-pwm-simplify-if-condition.patch new file mode 100644 index 00000000000..e1a9f77f3ba --- /dev/null +++ b/queue-5.4/leds-pwm-simplify-if-condition.patch @@ -0,0 +1,41 @@ +From 8ee079b0456d67648fff858c8f8ded46cfb9452c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 24 Jan 2020 17:54:07 +0100 +Subject: leds: pwm: simplify if condition +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +[ Upstream commit b43a8f01fccbfdddbc7f9b2bbad11b7db3fda4e1 ] + +.pwm_period_ns is an unsigned integer. So when led->pwm_period_ns > 0 +is false, we now assign 0 to a value that is already 0, so it doesn't +hurt and we can skip checking the actual value. + +Signed-off-by: Uwe Kleine-König +Tested-by: Jeff LaBundy +Signed-off-by: Pavel Machek +Stable-dep-of: 76fe464c8e64 ("leds: pwm: Don't disable the PWM when the LED should be off") +Signed-off-by: Sasha Levin +--- + drivers/leds/leds-pwm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c +index 8b6965a563e9b..b72fd89ff3903 100644 +--- a/drivers/leds/leds-pwm.c ++++ b/drivers/leds/leds-pwm.c +@@ -102,7 +102,7 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, + pwm_get_args(led_data->pwm, &pargs); + + led_data->period = pargs.period; +- if (!led_data->period && (led->pwm_period_ns > 0)) ++ if (!led_data->period) + led_data->period = led->pwm_period_ns; + + ret = devm_led_classdev_register(dev, &led_data->cdev); +-- +2.42.0 + diff --git a/queue-5.4/leds-trigger-ledtrig-cpu-fix-output-may-be-truncated.patch b/queue-5.4/leds-trigger-ledtrig-cpu-fix-output-may-be-truncated.patch new file mode 100644 index 00000000000..248a73cf245 --- /dev/null +++ b/queue-5.4/leds-trigger-ledtrig-cpu-fix-output-may-be-truncated.patch @@ -0,0 +1,63 @@ +From 668a54f60cd9a2fb5f253c79c59774f670c6626e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 23 Sep 2023 09:15:38 +0200 +Subject: leds: trigger: ledtrig-cpu:: Fix 'output may be truncated' issue for + 'cpu' +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Christophe JAILLET + +[ Upstream commit ff50f53276131a3059e8307d11293af388ed2bcd ] + +In order to teach the compiler that 'trig->name' will never be truncated, +we need to tell it that 'cpu' is not negative. + +When building with W=1, this fixes the following warnings: + + drivers/leds/trigger/ledtrig-cpu.c: In function ‘ledtrig_cpu_init’: + drivers/leds/trigger/ledtrig-cpu.c:155:56: error: ‘%d’ directive output may be truncated writing between 1 and 11 bytes into a region of size 5 [-Werror=format-truncation=] + 155 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); + | ^~ + drivers/leds/trigger/ledtrig-cpu.c:155:52: note: directive argument in the range [-2147483648, 7] + 155 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); + | ^~~~~~~ + drivers/leds/trigger/ledtrig-cpu.c:155:17: note: ‘snprintf’ output between 5 and 15 bytes into a destination of size 8 + 155 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Fixes: 8f88731d052d ("led-triggers: create a trigger for CPU activity") +Signed-off-by: Christophe JAILLET +Link: https://lore.kernel.org/r/3f4be7a99933cf8566e630da54f6ab913caac432.1695453322.git.christophe.jaillet@wanadoo.fr +Signed-off-by: Lee Jones +Signed-off-by: Sasha Levin +--- + drivers/leds/trigger/ledtrig-cpu.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/leds/trigger/ledtrig-cpu.c b/drivers/leds/trigger/ledtrig-cpu.c +index fca62d5035909..f19baed615023 100644 +--- a/drivers/leds/trigger/ledtrig-cpu.c ++++ b/drivers/leds/trigger/ledtrig-cpu.c +@@ -130,7 +130,7 @@ static int ledtrig_prepare_down_cpu(unsigned int cpu) + + static int __init ledtrig_cpu_init(void) + { +- int cpu; ++ unsigned int cpu; + int ret; + + /* Supports up to 9999 cpu cores */ +@@ -152,7 +152,7 @@ static int __init ledtrig_cpu_init(void) + if (cpu >= 8) + continue; + +- snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); ++ snprintf(trig->name, MAX_NAME_LEN, "cpu%u", cpu); + + led_trigger_register_simple(trig->name, &trig->_trig); + } +-- +2.42.0 + diff --git a/queue-5.4/ledtrig-cpu-limit-to-8-cpus.patch b/queue-5.4/ledtrig-cpu-limit-to-8-cpus.patch new file mode 100644 index 00000000000..d1f9f81977e --- /dev/null +++ b/queue-5.4/ledtrig-cpu-limit-to-8-cpus.patch @@ -0,0 +1,60 @@ +From 308e2dd197686bef838a7fdab8d52fea144ffc85 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 19 Sep 2020 11:34:58 +0200 +Subject: ledtrig-cpu: Limit to 8 CPUs + +From: Pavel Machek + +[ Upstream commit abcc131292aa8c7de2c5f0ed76a717436c21de63 ] + +Some machines have thousands of CPUs... and trigger mechanisms was not +really meant for thousands of triggers. I doubt anyone uses this +trigger on many-CPU machine; but if they do, they'll need to do it +properly. + +Signed-off-by: Pavel Machek +Stable-dep-of: ff50f5327613 ("leds: trigger: ledtrig-cpu:: Fix 'output may be truncated' issue for 'cpu'") +Signed-off-by: Sasha Levin +--- + drivers/leds/trigger/ledtrig-cpu.c | 13 ++++++++++--- + 1 file changed, 10 insertions(+), 3 deletions(-) + +diff --git a/drivers/leds/trigger/ledtrig-cpu.c b/drivers/leds/trigger/ledtrig-cpu.c +index 869976d1b734e..fca62d5035909 100644 +--- a/drivers/leds/trigger/ledtrig-cpu.c ++++ b/drivers/leds/trigger/ledtrig-cpu.c +@@ -2,14 +2,18 @@ + /* + * ledtrig-cpu.c - LED trigger based on CPU activity + * +- * This LED trigger will be registered for each possible CPU and named as +- * cpu0, cpu1, cpu2, cpu3, etc. ++ * This LED trigger will be registered for first 8 CPUs and named ++ * as cpu0..cpu7. There's additional trigger called cpu that ++ * is on when any CPU is active. ++ * ++ * If you want support for arbitrary number of CPUs, make it one trigger, ++ * with additional sysfs file selecting which CPU to watch. + * + * It can be bound to any LED just like other triggers using either a + * board file or via sysfs interface. + * + * An API named ledtrig_cpu is exported for any user, who want to add CPU +- * activity indication in their code ++ * activity indication in their code. + * + * Copyright 2011 Linus Walleij + * Copyright 2011 - 2012 Bryan Wu +@@ -145,6 +149,9 @@ static int __init ledtrig_cpu_init(void) + for_each_possible_cpu(cpu) { + struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); + ++ if (cpu >= 8) ++ continue; ++ + snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); + + led_trigger_register_simple(trig->name, &trig->_trig); +-- +2.42.0 + diff --git a/queue-5.4/libnvdimm-move-nd_device_attribute_group-to-device_t.patch b/queue-5.4/libnvdimm-move-nd_device_attribute_group-to-device_t.patch new file mode 100644 index 00000000000..410ea28118d --- /dev/null +++ b/queue-5.4/libnvdimm-move-nd_device_attribute_group-to-device_t.patch @@ -0,0 +1,213 @@ +From dde0a36a4f8a76b774d391771c111449b154be45 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Nov 2019 17:00:24 -0800 +Subject: libnvdimm: Move nd_device_attribute_group to device_type + +From: Dan Williams + +[ Upstream commit adbb68293fc5950a46e3e22f9dc9c619661194ae ] + +A 'struct device_type' instance can carry default attributes for the +device. Use this facility to remove the export of +nd_device_attribute_group and put the responsibility on the core rather +than leaf implementations to define this attribute. + +For regions this creates a new nd_region_attribute_groups[] added to the +per-region device-type instances. + +Cc: Ira Weiny +Cc: Michael Ellerman +Cc: "Oliver O'Halloran" +Cc: Vishal Verma +Cc: Aneesh Kumar K.V +Reviewed-by: Aneesh Kumar K.V +Link: https://lore.kernel.org/r/157309901138.1582359.12909354140826530394.stgit@dwillia2-desk3.amr.corp.intel.com +Signed-off-by: Dan Williams +Stable-dep-of: 6fd4ebfc4d61 ("libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its return value") +Signed-off-by: Sasha Levin +--- + arch/powerpc/platforms/pseries/papr_scm.c | 2 -- + drivers/acpi/nfit/core.c | 2 -- + drivers/nvdimm/bus.c | 3 +-- + drivers/nvdimm/dimm_devs.c | 8 +++++++- + drivers/nvdimm/e820.c | 1 - + drivers/nvdimm/nd.h | 1 + + drivers/nvdimm/of_pmem.c | 1 - + drivers/nvdimm/region_devs.c | 18 +++++++++++++----- + include/linux/libnvdimm.h | 1 - + 9 files changed, 22 insertions(+), 15 deletions(-) + +diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c +index 66fd517c48164..59304bade0a5d 100644 +--- a/arch/powerpc/platforms/pseries/papr_scm.c ++++ b/arch/powerpc/platforms/pseries/papr_scm.c +@@ -286,7 +286,6 @@ int papr_scm_ndctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, + + static const struct attribute_group *region_attr_groups[] = { + &nd_region_attribute_group, +- &nd_device_attribute_group, + &nd_mapping_attribute_group, + &nd_numa_attribute_group, + NULL, +@@ -299,7 +298,6 @@ static const struct attribute_group *bus_attr_groups[] = { + + static const struct attribute_group *papr_scm_dimm_groups[] = { + &nvdimm_attribute_group, +- &nd_device_attribute_group, + NULL, + }; + +diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c +index 793b8d9d749a0..41db477896e8e 100644 +--- a/drivers/acpi/nfit/core.c ++++ b/drivers/acpi/nfit/core.c +@@ -1700,7 +1700,6 @@ static const struct attribute_group acpi_nfit_dimm_attribute_group = { + + static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { + &nvdimm_attribute_group, +- &nd_device_attribute_group, + &acpi_nfit_dimm_attribute_group, + NULL, + }; +@@ -2200,7 +2199,6 @@ static const struct attribute_group acpi_nfit_region_attribute_group = { + static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { + &nd_region_attribute_group, + &nd_mapping_attribute_group, +- &nd_device_attribute_group, + &nd_numa_attribute_group, + &acpi_nfit_region_attribute_group, + NULL, +diff --git a/drivers/nvdimm/bus.c b/drivers/nvdimm/bus.c +index 56f189c3129af..00f938c0eb497 100644 +--- a/drivers/nvdimm/bus.c ++++ b/drivers/nvdimm/bus.c +@@ -669,10 +669,9 @@ static struct attribute *nd_device_attributes[] = { + /* + * nd_device_attribute_group - generic attributes for all devices on an nd bus + */ +-struct attribute_group nd_device_attribute_group = { ++const struct attribute_group nd_device_attribute_group = { + .attrs = nd_device_attributes, + }; +-EXPORT_SYMBOL_GPL(nd_device_attribute_group); + + static ssize_t numa_node_show(struct device *dev, + struct device_attribute *attr, char *buf) +diff --git a/drivers/nvdimm/dimm_devs.c b/drivers/nvdimm/dimm_devs.c +index e0f411021c59d..a35be18c5b55f 100644 +--- a/drivers/nvdimm/dimm_devs.c ++++ b/drivers/nvdimm/dimm_devs.c +@@ -202,9 +202,15 @@ static void nvdimm_release(struct device *dev) + kfree(nvdimm); + } + +-static struct device_type nvdimm_device_type = { ++static const struct attribute_group *nvdimm_attribute_groups[] = { ++ &nd_device_attribute_group, ++ NULL, ++}; ++ ++static const struct device_type nvdimm_device_type = { + .name = "nvdimm", + .release = nvdimm_release, ++ .groups = nvdimm_attribute_groups, + }; + + bool is_nvdimm(struct device *dev) +diff --git a/drivers/nvdimm/e820.c b/drivers/nvdimm/e820.c +index 87f72f725e4fe..adde2864c6a46 100644 +--- a/drivers/nvdimm/e820.c ++++ b/drivers/nvdimm/e820.c +@@ -15,7 +15,6 @@ static const struct attribute_group *e820_pmem_attribute_groups[] = { + + static const struct attribute_group *e820_pmem_region_attribute_groups[] = { + &nd_region_attribute_group, +- &nd_device_attribute_group, + NULL, + }; + +diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h +index ee5c04070ef91..2dcd8797e241d 100644 +--- a/drivers/nvdimm/nd.h ++++ b/drivers/nvdimm/nd.h +@@ -234,6 +234,7 @@ int __init nd_label_init(void); + void nvdimm_exit(void); + void nd_region_exit(void); + struct nvdimm; ++extern const struct attribute_group nd_device_attribute_group; + struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); + int nvdimm_check_config_data(struct device *dev); + int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); +diff --git a/drivers/nvdimm/of_pmem.c b/drivers/nvdimm/of_pmem.c +index 97187d6c0bdb0..41348fa6b74c0 100644 +--- a/drivers/nvdimm/of_pmem.c ++++ b/drivers/nvdimm/of_pmem.c +@@ -11,7 +11,6 @@ + + static const struct attribute_group *region_attr_groups[] = { + &nd_region_attribute_group, +- &nd_device_attribute_group, + NULL, + }; + +diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c +index ca0080b749f37..4c87e77f230b9 100644 +--- a/drivers/nvdimm/region_devs.c ++++ b/drivers/nvdimm/region_devs.c +@@ -763,19 +763,27 @@ struct attribute_group nd_region_attribute_group = { + }; + EXPORT_SYMBOL_GPL(nd_region_attribute_group); + +-static struct device_type nd_blk_device_type = { ++static const struct attribute_group *nd_region_attribute_groups[] = { ++ &nd_device_attribute_group, ++ NULL, ++}; ++ ++static const struct device_type nd_blk_device_type = { + .name = "nd_blk", + .release = nd_region_release, ++ .groups = nd_region_attribute_groups, + }; + +-static struct device_type nd_pmem_device_type = { ++static const struct device_type nd_pmem_device_type = { + .name = "nd_pmem", + .release = nd_region_release, ++ .groups = nd_region_attribute_groups, + }; + +-static struct device_type nd_volatile_device_type = { ++static const struct device_type nd_volatile_device_type = { + .name = "nd_volatile", + .release = nd_region_release, ++ .groups = nd_region_attribute_groups, + }; + + bool is_nd_pmem(struct device *dev) +@@ -931,8 +939,8 @@ void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane) + EXPORT_SYMBOL(nd_region_release_lane); + + static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus, +- struct nd_region_desc *ndr_desc, struct device_type *dev_type, +- const char *caller) ++ struct nd_region_desc *ndr_desc, ++ const struct device_type *dev_type, const char *caller) + { + struct nd_region *nd_region; + struct device *dev; +diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h +index b6eddf9125685..d7dbf42498af2 100644 +--- a/include/linux/libnvdimm.h ++++ b/include/linux/libnvdimm.h +@@ -67,7 +67,6 @@ enum { + + extern struct attribute_group nvdimm_bus_attribute_group; + extern struct attribute_group nvdimm_attribute_group; +-extern struct attribute_group nd_device_attribute_group; + extern struct attribute_group nd_numa_attribute_group; + extern struct attribute_group nd_region_attribute_group; + extern struct attribute_group nd_mapping_attribute_group; +-- +2.42.0 + diff --git a/queue-5.4/libnvdimm-move-nd_mapping_attribute_group-to-device_.patch b/queue-5.4/libnvdimm-move-nd_mapping_attribute_group-to-device_.patch new file mode 100644 index 00000000000..7e9b6ebbd36 --- /dev/null +++ b/queue-5.4/libnvdimm-move-nd_mapping_attribute_group-to-device_.patch @@ -0,0 +1,107 @@ +From 4b4b991246c461e71822eaf1320f84bf4a057a2c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Nov 2019 17:07:39 -0800 +Subject: libnvdimm: Move nd_mapping_attribute_group to device_type + +From: Dan Williams + +[ Upstream commit 4ce79fa97e6a54ee028063381346dc2fea91a76b ] + +A 'struct device_type' instance can carry default attributes for the +device. Use this facility to remove the export of +nd_mapping_attribute_group and put the responsibility on the core rather +than leaf implementations to define this attribute. + +Cc: Ira Weiny +Cc: Michael Ellerman +Cc: "Oliver O'Halloran" +Cc: Vishal Verma +Cc: Aneesh Kumar K.V +Signed-off-by: Dan Williams +Reviewed-by: Aneesh Kumar K.V +Link: https://lore.kernel.org/r/157309902686.1582359.6749533709859492704.stgit@dwillia2-desk3.amr.corp.intel.com +Stable-dep-of: 6fd4ebfc4d61 ("libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its return value") +Signed-off-by: Sasha Levin +--- + arch/powerpc/platforms/pseries/papr_scm.c | 6 ------ + drivers/acpi/nfit/core.c | 1 - + drivers/nvdimm/region_devs.c | 4 ++-- + include/linux/libnvdimm.h | 1 - + 4 files changed, 2 insertions(+), 10 deletions(-) + +diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c +index 4fb8e7466c404..c1ebc21d7e290 100644 +--- a/arch/powerpc/platforms/pseries/papr_scm.c ++++ b/arch/powerpc/platforms/pseries/papr_scm.c +@@ -284,11 +284,6 @@ int papr_scm_ndctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, + return 0; + } + +-static const struct attribute_group *region_attr_groups[] = { +- &nd_mapping_attribute_group, +- NULL, +-}; +- + static const struct attribute_group *bus_attr_groups[] = { + &nvdimm_bus_attribute_group, + NULL, +@@ -363,7 +358,6 @@ static int papr_scm_nvdimm_init(struct papr_scm_priv *p) + mapping.size = p->blocks * p->block_size; // XXX: potential overflow? + + memset(&ndr_desc, 0, sizeof(ndr_desc)); +- ndr_desc.attr_groups = region_attr_groups; + target_nid = dev_to_node(&p->pdev->dev); + online_nid = papr_scm_node(target_nid); + ndr_desc.numa_node = online_nid; +diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c +index 2e944ecdb163e..5f2a19c516cdb 100644 +--- a/drivers/acpi/nfit/core.c ++++ b/drivers/acpi/nfit/core.c +@@ -2197,7 +2197,6 @@ static const struct attribute_group acpi_nfit_region_attribute_group = { + }; + + static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { +- &nd_mapping_attribute_group, + &acpi_nfit_region_attribute_group, + NULL, + }; +diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c +index ece2a074defea..aac6708d33caa 100644 +--- a/drivers/nvdimm/region_devs.c ++++ b/drivers/nvdimm/region_devs.c +@@ -751,11 +751,10 @@ static struct attribute *mapping_attributes[] = { + NULL, + }; + +-struct attribute_group nd_mapping_attribute_group = { ++static const struct attribute_group nd_mapping_attribute_group = { + .is_visible = mapping_visible, + .attrs = mapping_attributes, + }; +-EXPORT_SYMBOL_GPL(nd_mapping_attribute_group); + + static const struct attribute_group nd_region_attribute_group = { + .attrs = nd_region_attributes, +@@ -766,6 +765,7 @@ static const struct attribute_group *nd_region_attribute_groups[] = { + &nd_device_attribute_group, + &nd_region_attribute_group, + &nd_numa_attribute_group, ++ &nd_mapping_attribute_group, + NULL, + }; + +diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h +index 312248d334c7e..eb597d1cb8919 100644 +--- a/include/linux/libnvdimm.h ++++ b/include/linux/libnvdimm.h +@@ -67,7 +67,6 @@ enum { + + extern struct attribute_group nvdimm_bus_attribute_group; + extern struct attribute_group nvdimm_attribute_group; +-extern struct attribute_group nd_mapping_attribute_group; + + struct nvdimm; + struct nvdimm_bus_descriptor; +-- +2.42.0 + diff --git a/queue-5.4/libnvdimm-move-nd_numa_attribute_group-to-device_typ.patch b/queue-5.4/libnvdimm-move-nd_numa_attribute_group-to-device_typ.patch new file mode 100644 index 00000000000..6b59520d968 --- /dev/null +++ b/queue-5.4/libnvdimm-move-nd_numa_attribute_group-to-device_typ.patch @@ -0,0 +1,113 @@ +From 663928cac3e9b524379fd4a290ca4c6334e18632 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 Nov 2019 09:51:54 -0800 +Subject: libnvdimm: Move nd_numa_attribute_group to device_type + +From: Dan Williams + +[ Upstream commit e2f6a0e34870ff1bdb1411e250dd2f03908cfa9f ] + +A 'struct device_type' instance can carry default attributes for the +device. Use this facility to remove the export of +nd_numa_attribute_group and put the responsibility on the core rather +than leaf implementations to define this attribute. + +Cc: Ira Weiny +Cc: Michael Ellerman +Cc: "Oliver O'Halloran" +Cc: Vishal Verma +Cc: Aneesh Kumar K.V +Reviewed-by: Aneesh Kumar K.V +Link: https://lore.kernel.org/r/157401269537.43284.14411189404186877352.stgit@dwillia2-desk3.amr.corp.intel.com +Signed-off-by: Dan Williams +Stable-dep-of: 6fd4ebfc4d61 ("libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its return value") +Signed-off-by: Sasha Levin +--- + arch/powerpc/platforms/pseries/papr_scm.c | 1 - + drivers/acpi/nfit/core.c | 1 - + drivers/nvdimm/bus.c | 3 +-- + drivers/nvdimm/nd.h | 1 + + drivers/nvdimm/region_devs.c | 1 + + include/linux/libnvdimm.h | 1 - + 6 files changed, 3 insertions(+), 5 deletions(-) + +diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c +index 59304bade0a5d..48fd93c5d6874 100644 +--- a/arch/powerpc/platforms/pseries/papr_scm.c ++++ b/arch/powerpc/platforms/pseries/papr_scm.c +@@ -287,7 +287,6 @@ int papr_scm_ndctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, + static const struct attribute_group *region_attr_groups[] = { + &nd_region_attribute_group, + &nd_mapping_attribute_group, +- &nd_numa_attribute_group, + NULL, + }; + +diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c +index 41db477896e8e..09b0156b0f531 100644 +--- a/drivers/acpi/nfit/core.c ++++ b/drivers/acpi/nfit/core.c +@@ -2199,7 +2199,6 @@ static const struct attribute_group acpi_nfit_region_attribute_group = { + static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { + &nd_region_attribute_group, + &nd_mapping_attribute_group, +- &nd_numa_attribute_group, + &acpi_nfit_region_attribute_group, + NULL, + }; +diff --git a/drivers/nvdimm/bus.c b/drivers/nvdimm/bus.c +index 00f938c0eb497..389e3c60d10a9 100644 +--- a/drivers/nvdimm/bus.c ++++ b/drivers/nvdimm/bus.c +@@ -697,11 +697,10 @@ static umode_t nd_numa_attr_visible(struct kobject *kobj, struct attribute *a, + /* + * nd_numa_attribute_group - NUMA attributes for all devices on an nd bus + */ +-struct attribute_group nd_numa_attribute_group = { ++const struct attribute_group nd_numa_attribute_group = { + .attrs = nd_numa_attributes, + .is_visible = nd_numa_attr_visible, + }; +-EXPORT_SYMBOL_GPL(nd_numa_attribute_group); + + int nvdimm_bus_create_ndctl(struct nvdimm_bus *nvdimm_bus) + { +diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h +index 2dcd8797e241d..8a3ce0b4b2b12 100644 +--- a/drivers/nvdimm/nd.h ++++ b/drivers/nvdimm/nd.h +@@ -235,6 +235,7 @@ void nvdimm_exit(void); + void nd_region_exit(void); + struct nvdimm; + extern const struct attribute_group nd_device_attribute_group; ++extern const struct attribute_group nd_numa_attribute_group; + struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); + int nvdimm_check_config_data(struct device *dev); + int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); +diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c +index 4c87e77f230b9..8abe9c514b36b 100644 +--- a/drivers/nvdimm/region_devs.c ++++ b/drivers/nvdimm/region_devs.c +@@ -765,6 +765,7 @@ EXPORT_SYMBOL_GPL(nd_region_attribute_group); + + static const struct attribute_group *nd_region_attribute_groups[] = { + &nd_device_attribute_group, ++ &nd_numa_attribute_group, + NULL, + }; + +diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h +index d7dbf42498af2..e9a4e25fc7084 100644 +--- a/include/linux/libnvdimm.h ++++ b/include/linux/libnvdimm.h +@@ -67,7 +67,6 @@ enum { + + extern struct attribute_group nvdimm_bus_attribute_group; + extern struct attribute_group nvdimm_attribute_group; +-extern struct attribute_group nd_numa_attribute_group; + extern struct attribute_group nd_region_attribute_group; + extern struct attribute_group nd_mapping_attribute_group; + +-- +2.42.0 + diff --git a/queue-5.4/libnvdimm-move-nd_region_attribute_group-to-device_t.patch b/queue-5.4/libnvdimm-move-nd_region_attribute_group-to-device_t.patch new file mode 100644 index 00000000000..c876ec5928a --- /dev/null +++ b/queue-5.4/libnvdimm-move-nd_region_attribute_group-to-device_t.patch @@ -0,0 +1,141 @@ +From 828aecf2bfea04fa8c51ee4da52f03efc5b94d5a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Nov 2019 17:07:16 -0800 +Subject: libnvdimm: Move nd_region_attribute_group to device_type + +From: Dan Williams + +[ Upstream commit 7c4fc8cde1641e3213eb1dafc6854331e9e0828c ] + +A 'struct device_type' instance can carry default attributes for the +device. Use this facility to remove the export of +nd_region_attribute_group and put the responsibility on the core rather +than leaf implementations to define this attribute. + +Cc: Ira Weiny +Cc: Michael Ellerman +Cc: "Oliver O'Halloran" +Cc: Vishal Verma +Cc: Aneesh Kumar K.V +Signed-off-by: Dan Williams +Reviewed-by: Aneesh Kumar K.V +Link: https://lore.kernel.org/r/157309902169.1582359.16828508538444551337.stgit@dwillia2-desk3.amr.corp.intel.com +Stable-dep-of: 6fd4ebfc4d61 ("libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its return value") +Signed-off-by: Sasha Levin +--- + arch/powerpc/platforms/pseries/papr_scm.c | 1 - + drivers/acpi/nfit/core.c | 1 - + drivers/nvdimm/e820.c | 6 ------ + drivers/nvdimm/of_pmem.c | 6 ------ + drivers/nvdimm/region_devs.c | 4 ++-- + include/linux/libnvdimm.h | 1 - + 6 files changed, 2 insertions(+), 17 deletions(-) + +diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c +index 48fd93c5d6874..4fb8e7466c404 100644 +--- a/arch/powerpc/platforms/pseries/papr_scm.c ++++ b/arch/powerpc/platforms/pseries/papr_scm.c +@@ -285,7 +285,6 @@ int papr_scm_ndctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, + } + + static const struct attribute_group *region_attr_groups[] = { +- &nd_region_attribute_group, + &nd_mapping_attribute_group, + NULL, + }; +diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c +index 09b0156b0f531..2e944ecdb163e 100644 +--- a/drivers/acpi/nfit/core.c ++++ b/drivers/acpi/nfit/core.c +@@ -2197,7 +2197,6 @@ static const struct attribute_group acpi_nfit_region_attribute_group = { + }; + + static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { +- &nd_region_attribute_group, + &nd_mapping_attribute_group, + &acpi_nfit_region_attribute_group, + NULL, +diff --git a/drivers/nvdimm/e820.c b/drivers/nvdimm/e820.c +index adde2864c6a46..9a971a59dec7e 100644 +--- a/drivers/nvdimm/e820.c ++++ b/drivers/nvdimm/e820.c +@@ -13,11 +13,6 @@ static const struct attribute_group *e820_pmem_attribute_groups[] = { + NULL, + }; + +-static const struct attribute_group *e820_pmem_region_attribute_groups[] = { +- &nd_region_attribute_group, +- NULL, +-}; +- + static int e820_pmem_remove(struct platform_device *pdev) + { + struct nvdimm_bus *nvdimm_bus = platform_get_drvdata(pdev); +@@ -45,7 +40,6 @@ static int e820_register_one(struct resource *res, void *data) + + memset(&ndr_desc, 0, sizeof(ndr_desc)); + ndr_desc.res = res; +- ndr_desc.attr_groups = e820_pmem_region_attribute_groups; + ndr_desc.numa_node = e820_range_to_nid(res->start); + ndr_desc.target_node = ndr_desc.numa_node; + set_bit(ND_REGION_PAGEMAP, &ndr_desc.flags); +diff --git a/drivers/nvdimm/of_pmem.c b/drivers/nvdimm/of_pmem.c +index 41348fa6b74c0..c0b5ac36df9d0 100644 +--- a/drivers/nvdimm/of_pmem.c ++++ b/drivers/nvdimm/of_pmem.c +@@ -9,11 +9,6 @@ + #include + #include + +-static const struct attribute_group *region_attr_groups[] = { +- &nd_region_attribute_group, +- NULL, +-}; +- + static const struct attribute_group *bus_attr_groups[] = { + &nvdimm_bus_attribute_group, + NULL, +@@ -65,7 +60,6 @@ static int of_pmem_region_probe(struct platform_device *pdev) + * structures so passing a stack pointer is fine. + */ + memset(&ndr_desc, 0, sizeof(ndr_desc)); +- ndr_desc.attr_groups = region_attr_groups; + ndr_desc.numa_node = dev_to_node(&pdev->dev); + ndr_desc.target_node = ndr_desc.numa_node; + ndr_desc.res = &pdev->resource[i]; +diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c +index 8abe9c514b36b..ece2a074defea 100644 +--- a/drivers/nvdimm/region_devs.c ++++ b/drivers/nvdimm/region_devs.c +@@ -757,14 +757,14 @@ struct attribute_group nd_mapping_attribute_group = { + }; + EXPORT_SYMBOL_GPL(nd_mapping_attribute_group); + +-struct attribute_group nd_region_attribute_group = { ++static const struct attribute_group nd_region_attribute_group = { + .attrs = nd_region_attributes, + .is_visible = region_visible, + }; +-EXPORT_SYMBOL_GPL(nd_region_attribute_group); + + static const struct attribute_group *nd_region_attribute_groups[] = { + &nd_device_attribute_group, ++ &nd_region_attribute_group, + &nd_numa_attribute_group, + NULL, + }; +diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h +index e9a4e25fc7084..312248d334c7e 100644 +--- a/include/linux/libnvdimm.h ++++ b/include/linux/libnvdimm.h +@@ -67,7 +67,6 @@ enum { + + extern struct attribute_group nvdimm_bus_attribute_group; + extern struct attribute_group nvdimm_attribute_group; +-extern struct attribute_group nd_region_attribute_group; + extern struct attribute_group nd_mapping_attribute_group; + + struct nvdimm; +-- +2.42.0 + diff --git a/queue-5.4/libnvdimm-move-nvdimm_attribute_group-to-device_type.patch b/queue-5.4/libnvdimm-move-nvdimm_attribute_group-to-device_type.patch new file mode 100644 index 00000000000..26ee95cfe50 --- /dev/null +++ b/queue-5.4/libnvdimm-move-nvdimm_attribute_group-to-device_type.patch @@ -0,0 +1,142 @@ +From cc20dc4cd763223d88883425022adf4d788988c5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Nov 2019 17:08:04 -0800 +Subject: libnvdimm: Move nvdimm_attribute_group to device_type + +From: Dan Williams + +[ Upstream commit 360eba7ebdf716194ed2ede1ebc3ce0f9790a91c ] + +A 'struct device_type' instance can carry default attributes for the +device. Use this facility to remove the export of +nvdimm_attribute_group and put the responsibility on the core rather +than leaf implementations to define this attribute. + +Cc: Ira Weiny +Cc: Michael Ellerman +Cc: "Oliver O'Halloran" +Cc: Vishal Verma +Cc: Aneesh Kumar K.V +Signed-off-by: Dan Williams +Reviewed-by: Aneesh Kumar K.V +Link: https://lore.kernel.org/r/157309903201.1582359.10966209746585062329.stgit@dwillia2-desk3.amr.corp.intel.com +Stable-dep-of: 6fd4ebfc4d61 ("libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its return value") +Signed-off-by: Sasha Levin +--- + arch/powerpc/platforms/pseries/papr_scm.c | 9 ++---- + drivers/acpi/nfit/core.c | 1 - + drivers/nvdimm/dimm_devs.c | 36 +++++++++++------------ + include/linux/libnvdimm.h | 1 - + 4 files changed, 20 insertions(+), 27 deletions(-) + +diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c +index c1ebc21d7e290..42aac16208a5e 100644 +--- a/arch/powerpc/platforms/pseries/papr_scm.c ++++ b/arch/powerpc/platforms/pseries/papr_scm.c +@@ -289,11 +289,6 @@ static const struct attribute_group *bus_attr_groups[] = { + NULL, + }; + +-static const struct attribute_group *papr_scm_dimm_groups[] = { +- &nvdimm_attribute_group, +- NULL, +-}; +- + static inline int papr_scm_node(int node) + { + int min_dist = INT_MAX, dist; +@@ -340,8 +335,8 @@ static int papr_scm_nvdimm_init(struct papr_scm_priv *p) + dimm_flags = 0; + set_bit(NDD_ALIASING, &dimm_flags); + +- p->nvdimm = nvdimm_create(p->bus, p, papr_scm_dimm_groups, +- dimm_flags, PAPR_SCM_DIMM_CMD_MASK, 0, NULL); ++ p->nvdimm = nvdimm_create(p->bus, p, NULL, dimm_flags, ++ PAPR_SCM_DIMM_CMD_MASK, 0, NULL); + if (!p->nvdimm) { + dev_err(dev, "Error creating DIMM object for %pOF\n", p->dn); + goto err; +diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c +index 5f2a19c516cdb..ae472a40e5443 100644 +--- a/drivers/acpi/nfit/core.c ++++ b/drivers/acpi/nfit/core.c +@@ -1699,7 +1699,6 @@ static const struct attribute_group acpi_nfit_dimm_attribute_group = { + }; + + static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { +- &nvdimm_attribute_group, + &acpi_nfit_dimm_attribute_group, + NULL, + }; +diff --git a/drivers/nvdimm/dimm_devs.c b/drivers/nvdimm/dimm_devs.c +index a35be18c5b55f..365b9ad06b7a9 100644 +--- a/drivers/nvdimm/dimm_devs.c ++++ b/drivers/nvdimm/dimm_devs.c +@@ -202,22 +202,6 @@ static void nvdimm_release(struct device *dev) + kfree(nvdimm); + } + +-static const struct attribute_group *nvdimm_attribute_groups[] = { +- &nd_device_attribute_group, +- NULL, +-}; +- +-static const struct device_type nvdimm_device_type = { +- .name = "nvdimm", +- .release = nvdimm_release, +- .groups = nvdimm_attribute_groups, +-}; +- +-bool is_nvdimm(struct device *dev) +-{ +- return dev->type == &nvdimm_device_type; +-} +- + struct nvdimm *to_nvdimm(struct device *dev) + { + struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev); +@@ -468,11 +452,27 @@ static umode_t nvdimm_visible(struct kobject *kobj, struct attribute *a, int n) + return 0; + } + +-struct attribute_group nvdimm_attribute_group = { ++static const struct attribute_group nvdimm_attribute_group = { + .attrs = nvdimm_attributes, + .is_visible = nvdimm_visible, + }; +-EXPORT_SYMBOL_GPL(nvdimm_attribute_group); ++ ++static const struct attribute_group *nvdimm_attribute_groups[] = { ++ &nd_device_attribute_group, ++ &nvdimm_attribute_group, ++ NULL, ++}; ++ ++static const struct device_type nvdimm_device_type = { ++ .name = "nvdimm", ++ .release = nvdimm_release, ++ .groups = nvdimm_attribute_groups, ++}; ++ ++bool is_nvdimm(struct device *dev) ++{ ++ return dev->type == &nvdimm_device_type; ++} + + struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, + void *provider_data, const struct attribute_group **groups, +diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h +index eb597d1cb8919..3644af97bcb47 100644 +--- a/include/linux/libnvdimm.h ++++ b/include/linux/libnvdimm.h +@@ -66,7 +66,6 @@ enum { + }; + + extern struct attribute_group nvdimm_bus_attribute_group; +-extern struct attribute_group nvdimm_attribute_group; + + struct nvdimm; + struct nvdimm_bus_descriptor; +-- +2.42.0 + diff --git a/queue-5.4/libnvdimm-move-nvdimm_bus_attribute_group-to-device_.patch b/queue-5.4/libnvdimm-move-nvdimm_bus_attribute_group-to-device_.patch new file mode 100644 index 00000000000..dc81e3f3c85 --- /dev/null +++ b/queue-5.4/libnvdimm-move-nvdimm_bus_attribute_group-to-device_.patch @@ -0,0 +1,197 @@ +From d981c17cbbdcd19914270518e7ef3e7135f3b9d1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Nov 2019 17:08:56 -0800 +Subject: libnvdimm: Move nvdimm_bus_attribute_group to device_type + +From: Dan Williams + +[ Upstream commit e755799aefa9385469bec49b2c2ccf1aaa33829a ] + +A 'struct device_type' instance can carry default attributes for the +device. Use this facility to remove the export of +nvdimm_bus_attribute_group and put the responsibility on the core rather +than leaf implementations to define this attribute. + +Cc: Ira Weiny +Cc: Michael Ellerman +Cc: "Oliver O'Halloran" +Cc: Vishal Verma +Cc: Aneesh Kumar K.V +Signed-off-by: Dan Williams +Reviewed-by: Aneesh Kumar K.V +Link: https://lore.kernel.org/r/157309903815.1582359.6418211876315050283.stgit@dwillia2-desk3.amr.corp.intel.com +Stable-dep-of: 6fd4ebfc4d61 ("libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its return value") +Signed-off-by: Sasha Levin +--- + arch/powerpc/platforms/pseries/papr_scm.c | 6 ------ + drivers/acpi/nfit/core.c | 1 - + drivers/nvdimm/bus.c | 9 +++++++-- + drivers/nvdimm/core.c | 8 ++++++-- + drivers/nvdimm/e820.c | 6 ------ + drivers/nvdimm/nd.h | 1 + + drivers/nvdimm/of_pmem.c | 6 ------ + include/linux/libnvdimm.h | 2 -- + 8 files changed, 14 insertions(+), 25 deletions(-) + +diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c +index 42aac16208a5e..16d4ed7357bcf 100644 +--- a/arch/powerpc/platforms/pseries/papr_scm.c ++++ b/arch/powerpc/platforms/pseries/papr_scm.c +@@ -284,11 +284,6 @@ int papr_scm_ndctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, + return 0; + } + +-static const struct attribute_group *bus_attr_groups[] = { +- &nvdimm_bus_attribute_group, +- NULL, +-}; +- + static inline int papr_scm_node(int node) + { + int min_dist = INT_MAX, dist; +@@ -319,7 +314,6 @@ static int papr_scm_nvdimm_init(struct papr_scm_priv *p) + p->bus_desc.ndctl = papr_scm_ndctl; + p->bus_desc.module = THIS_MODULE; + p->bus_desc.of_node = p->pdev->dev.of_node; +- p->bus_desc.attr_groups = bus_attr_groups; + p->bus_desc.provider_name = kstrdup(p->pdev->name, GFP_KERNEL); + + if (!p->bus_desc.provider_name) +diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c +index ae472a40e5443..b9335409e7ecc 100644 +--- a/drivers/acpi/nfit/core.c ++++ b/drivers/acpi/nfit/core.c +@@ -1405,7 +1405,6 @@ static const struct attribute_group acpi_nfit_attribute_group = { + }; + + static const struct attribute_group *acpi_nfit_attribute_groups[] = { +- &nvdimm_bus_attribute_group, + &acpi_nfit_attribute_group, + NULL, + }; +diff --git a/drivers/nvdimm/bus.c b/drivers/nvdimm/bus.c +index 389e3c60d10a9..5ee9bc068e9c9 100644 +--- a/drivers/nvdimm/bus.c ++++ b/drivers/nvdimm/bus.c +@@ -300,9 +300,14 @@ static void nvdimm_bus_release(struct device *dev) + kfree(nvdimm_bus); + } + ++static const struct device_type nvdimm_bus_dev_type = { ++ .release = nvdimm_bus_release, ++ .groups = nvdimm_bus_attribute_groups, ++}; ++ + bool is_nvdimm_bus(struct device *dev) + { +- return dev->release == nvdimm_bus_release; ++ return dev->type == &nvdimm_bus_dev_type; + } + + struct nvdimm_bus *walk_to_nvdimm_bus(struct device *nd_dev) +@@ -355,7 +360,7 @@ struct nvdimm_bus *nvdimm_bus_register(struct device *parent, + badrange_init(&nvdimm_bus->badrange); + nvdimm_bus->nd_desc = nd_desc; + nvdimm_bus->dev.parent = parent; +- nvdimm_bus->dev.release = nvdimm_bus_release; ++ nvdimm_bus->dev.type = &nvdimm_bus_dev_type; + nvdimm_bus->dev.groups = nd_desc->attr_groups; + nvdimm_bus->dev.bus = &nvdimm_bus_type; + nvdimm_bus->dev.of_node = nd_desc->of_node; +diff --git a/drivers/nvdimm/core.c b/drivers/nvdimm/core.c +index 9204f1e9fd141..81231ca23db00 100644 +--- a/drivers/nvdimm/core.c ++++ b/drivers/nvdimm/core.c +@@ -385,10 +385,14 @@ static struct attribute *nvdimm_bus_attributes[] = { + NULL, + }; + +-struct attribute_group nvdimm_bus_attribute_group = { ++static const struct attribute_group nvdimm_bus_attribute_group = { + .attrs = nvdimm_bus_attributes, + }; +-EXPORT_SYMBOL_GPL(nvdimm_bus_attribute_group); ++ ++const struct attribute_group *nvdimm_bus_attribute_groups[] = { ++ &nvdimm_bus_attribute_group, ++ NULL, ++}; + + int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr, u64 length) + { +diff --git a/drivers/nvdimm/e820.c b/drivers/nvdimm/e820.c +index 9a971a59dec7e..e02f60ad6c99f 100644 +--- a/drivers/nvdimm/e820.c ++++ b/drivers/nvdimm/e820.c +@@ -8,11 +8,6 @@ + #include + #include + +-static const struct attribute_group *e820_pmem_attribute_groups[] = { +- &nvdimm_bus_attribute_group, +- NULL, +-}; +- + static int e820_pmem_remove(struct platform_device *pdev) + { + struct nvdimm_bus *nvdimm_bus = platform_get_drvdata(pdev); +@@ -55,7 +50,6 @@ static int e820_pmem_probe(struct platform_device *pdev) + struct nvdimm_bus *nvdimm_bus; + int rc = -ENXIO; + +- nd_desc.attr_groups = e820_pmem_attribute_groups; + nd_desc.provider_name = "e820"; + nd_desc.module = THIS_MODULE; + nvdimm_bus = nvdimm_bus_register(dev, &nd_desc); +diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h +index 8a3ce0b4b2b12..bd720eebcf4e7 100644 +--- a/drivers/nvdimm/nd.h ++++ b/drivers/nvdimm/nd.h +@@ -236,6 +236,7 @@ void nd_region_exit(void); + struct nvdimm; + extern const struct attribute_group nd_device_attribute_group; + extern const struct attribute_group nd_numa_attribute_group; ++extern const struct attribute_group *nvdimm_bus_attribute_groups[]; + struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); + int nvdimm_check_config_data(struct device *dev); + int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); +diff --git a/drivers/nvdimm/of_pmem.c b/drivers/nvdimm/of_pmem.c +index c0b5ac36df9d0..8224d1431ea94 100644 +--- a/drivers/nvdimm/of_pmem.c ++++ b/drivers/nvdimm/of_pmem.c +@@ -9,11 +9,6 @@ + #include + #include + +-static const struct attribute_group *bus_attr_groups[] = { +- &nvdimm_bus_attribute_group, +- NULL, +-}; +- + struct of_pmem_private { + struct nvdimm_bus_descriptor bus_desc; + struct nvdimm_bus *bus; +@@ -35,7 +30,6 @@ static int of_pmem_region_probe(struct platform_device *pdev) + if (!priv) + return -ENOMEM; + +- priv->bus_desc.attr_groups = bus_attr_groups; + priv->bus_desc.provider_name = kstrdup(pdev->name, GFP_KERNEL); + priv->bus_desc.module = THIS_MODULE; + priv->bus_desc.of_node = np; +diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h +index 3644af97bcb47..9df091bd30ba6 100644 +--- a/include/linux/libnvdimm.h ++++ b/include/linux/libnvdimm.h +@@ -65,8 +65,6 @@ enum { + DPA_RESOURCE_ADJUSTED = 1 << 0, + }; + +-extern struct attribute_group nvdimm_bus_attribute_group; +- + struct nvdimm; + struct nvdimm_bus_descriptor; + typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc, +-- +2.42.0 + diff --git a/queue-5.4/libnvdimm-move-region-attribute-group-definition.patch b/queue-5.4/libnvdimm-move-region-attribute-group-definition.patch new file mode 100644 index 00000000000..07be8abc543 --- /dev/null +++ b/queue-5.4/libnvdimm-move-region-attribute-group-definition.patch @@ -0,0 +1,261 @@ +From d3658d14f18c314b59993d12a94b62f4ff2c38e1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 6 Nov 2019 19:56:46 -0800 +Subject: libnvdimm: Move region attribute group definition + +From: Dan Williams + +[ Upstream commit cb719d5fefc508bc80c25ac6c875a4fe6240ba73 ] + +In preparation for moving region attributes from device attribute groups +to the region device-type, reorder the declaration so that it can be +referenced by the device-type definition without forward declarations. +No functional changes are intended to result from this change. + +Cc: Ira Weiny +Cc: Vishal Verma +Signed-off-by: Dan Williams +Reviewed-by: Aneesh Kumar K.V +Link: https://lore.kernel.org/r/157309900624.1582359.6929998072035982264.stgit@dwillia2-desk3.amr.corp.intel.com +Stable-dep-of: 6fd4ebfc4d61 ("libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its return value") +Signed-off-by: Sasha Levin +--- + drivers/nvdimm/region_devs.c | 208 +++++++++++++++++------------------ + 1 file changed, 104 insertions(+), 104 deletions(-) + +diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c +index b8236a9e8750d..ca0080b749f37 100644 +--- a/drivers/nvdimm/region_devs.c ++++ b/drivers/nvdimm/region_devs.c +@@ -140,36 +140,6 @@ static void nd_region_release(struct device *dev) + kfree(nd_region); + } + +-static struct device_type nd_blk_device_type = { +- .name = "nd_blk", +- .release = nd_region_release, +-}; +- +-static struct device_type nd_pmem_device_type = { +- .name = "nd_pmem", +- .release = nd_region_release, +-}; +- +-static struct device_type nd_volatile_device_type = { +- .name = "nd_volatile", +- .release = nd_region_release, +-}; +- +-bool is_nd_pmem(struct device *dev) +-{ +- return dev ? dev->type == &nd_pmem_device_type : false; +-} +- +-bool is_nd_blk(struct device *dev) +-{ +- return dev ? dev->type == &nd_blk_device_type : false; +-} +- +-bool is_nd_volatile(struct device *dev) +-{ +- return dev ? dev->type == &nd_volatile_device_type : false; +-} +- + struct nd_region *to_nd_region(struct device *dev) + { + struct nd_region *nd_region = container_of(dev, struct nd_region, dev); +@@ -674,80 +644,6 @@ static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n) + return 0; + } + +-struct attribute_group nd_region_attribute_group = { +- .attrs = nd_region_attributes, +- .is_visible = region_visible, +-}; +-EXPORT_SYMBOL_GPL(nd_region_attribute_group); +- +-u64 nd_region_interleave_set_cookie(struct nd_region *nd_region, +- struct nd_namespace_index *nsindex) +-{ +- struct nd_interleave_set *nd_set = nd_region->nd_set; +- +- if (!nd_set) +- return 0; +- +- if (nsindex && __le16_to_cpu(nsindex->major) == 1 +- && __le16_to_cpu(nsindex->minor) == 1) +- return nd_set->cookie1; +- return nd_set->cookie2; +-} +- +-u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region) +-{ +- struct nd_interleave_set *nd_set = nd_region->nd_set; +- +- if (nd_set) +- return nd_set->altcookie; +- return 0; +-} +- +-void nd_mapping_free_labels(struct nd_mapping *nd_mapping) +-{ +- struct nd_label_ent *label_ent, *e; +- +- lockdep_assert_held(&nd_mapping->lock); +- list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) { +- list_del(&label_ent->list); +- kfree(label_ent); +- } +-} +- +-/* +- * When a namespace is activated create new seeds for the next +- * namespace, or namespace-personality to be configured. +- */ +-void nd_region_advance_seeds(struct nd_region *nd_region, struct device *dev) +-{ +- nvdimm_bus_lock(dev); +- if (nd_region->ns_seed == dev) { +- nd_region_create_ns_seed(nd_region); +- } else if (is_nd_btt(dev)) { +- struct nd_btt *nd_btt = to_nd_btt(dev); +- +- if (nd_region->btt_seed == dev) +- nd_region_create_btt_seed(nd_region); +- if (nd_region->ns_seed == &nd_btt->ndns->dev) +- nd_region_create_ns_seed(nd_region); +- } else if (is_nd_pfn(dev)) { +- struct nd_pfn *nd_pfn = to_nd_pfn(dev); +- +- if (nd_region->pfn_seed == dev) +- nd_region_create_pfn_seed(nd_region); +- if (nd_region->ns_seed == &nd_pfn->ndns->dev) +- nd_region_create_ns_seed(nd_region); +- } else if (is_nd_dax(dev)) { +- struct nd_dax *nd_dax = to_nd_dax(dev); +- +- if (nd_region->dax_seed == dev) +- nd_region_create_dax_seed(nd_region); +- if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev) +- nd_region_create_ns_seed(nd_region); +- } +- nvdimm_bus_unlock(dev); +-} +- + static ssize_t mappingN(struct device *dev, char *buf, int n) + { + struct nd_region *nd_region = to_nd_region(dev); +@@ -861,6 +757,110 @@ struct attribute_group nd_mapping_attribute_group = { + }; + EXPORT_SYMBOL_GPL(nd_mapping_attribute_group); + ++struct attribute_group nd_region_attribute_group = { ++ .attrs = nd_region_attributes, ++ .is_visible = region_visible, ++}; ++EXPORT_SYMBOL_GPL(nd_region_attribute_group); ++ ++static struct device_type nd_blk_device_type = { ++ .name = "nd_blk", ++ .release = nd_region_release, ++}; ++ ++static struct device_type nd_pmem_device_type = { ++ .name = "nd_pmem", ++ .release = nd_region_release, ++}; ++ ++static struct device_type nd_volatile_device_type = { ++ .name = "nd_volatile", ++ .release = nd_region_release, ++}; ++ ++bool is_nd_pmem(struct device *dev) ++{ ++ return dev ? dev->type == &nd_pmem_device_type : false; ++} ++ ++bool is_nd_blk(struct device *dev) ++{ ++ return dev ? dev->type == &nd_blk_device_type : false; ++} ++ ++bool is_nd_volatile(struct device *dev) ++{ ++ return dev ? dev->type == &nd_volatile_device_type : false; ++} ++ ++u64 nd_region_interleave_set_cookie(struct nd_region *nd_region, ++ struct nd_namespace_index *nsindex) ++{ ++ struct nd_interleave_set *nd_set = nd_region->nd_set; ++ ++ if (!nd_set) ++ return 0; ++ ++ if (nsindex && __le16_to_cpu(nsindex->major) == 1 ++ && __le16_to_cpu(nsindex->minor) == 1) ++ return nd_set->cookie1; ++ return nd_set->cookie2; ++} ++ ++u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region) ++{ ++ struct nd_interleave_set *nd_set = nd_region->nd_set; ++ ++ if (nd_set) ++ return nd_set->altcookie; ++ return 0; ++} ++ ++void nd_mapping_free_labels(struct nd_mapping *nd_mapping) ++{ ++ struct nd_label_ent *label_ent, *e; ++ ++ lockdep_assert_held(&nd_mapping->lock); ++ list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) { ++ list_del(&label_ent->list); ++ kfree(label_ent); ++ } ++} ++ ++/* ++ * When a namespace is activated create new seeds for the next ++ * namespace, or namespace-personality to be configured. ++ */ ++void nd_region_advance_seeds(struct nd_region *nd_region, struct device *dev) ++{ ++ nvdimm_bus_lock(dev); ++ if (nd_region->ns_seed == dev) { ++ nd_region_create_ns_seed(nd_region); ++ } else if (is_nd_btt(dev)) { ++ struct nd_btt *nd_btt = to_nd_btt(dev); ++ ++ if (nd_region->btt_seed == dev) ++ nd_region_create_btt_seed(nd_region); ++ if (nd_region->ns_seed == &nd_btt->ndns->dev) ++ nd_region_create_ns_seed(nd_region); ++ } else if (is_nd_pfn(dev)) { ++ struct nd_pfn *nd_pfn = to_nd_pfn(dev); ++ ++ if (nd_region->pfn_seed == dev) ++ nd_region_create_pfn_seed(nd_region); ++ if (nd_region->ns_seed == &nd_pfn->ndns->dev) ++ nd_region_create_ns_seed(nd_region); ++ } else if (is_nd_dax(dev)) { ++ struct nd_dax *nd_dax = to_nd_dax(dev); ++ ++ if (nd_region->dax_seed == dev) ++ nd_region_create_dax_seed(nd_region); ++ if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev) ++ nd_region_create_ns_seed(nd_region); ++ } ++ nvdimm_bus_unlock(dev); ++} ++ + int nd_blk_region_init(struct nd_region *nd_region) + { + struct device *dev = &nd_region->dev; +-- +2.42.0 + diff --git a/queue-5.4/libnvdimm-of_pmem-use-devm_kstrdup-instead-of-kstrdu.patch b/queue-5.4/libnvdimm-of_pmem-use-devm_kstrdup-instead-of-kstrdu.patch new file mode 100644 index 00000000000..8636f801394 --- /dev/null +++ b/queue-5.4/libnvdimm-of_pmem-use-devm_kstrdup-instead-of-kstrdu.patch @@ -0,0 +1,45 @@ +From af7c50e750cce6bcd6a5b6e5a9ffda7a554a3eeb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 14 Sep 2023 07:03:27 +0000 +Subject: libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its + return value + +From: Chen Ni + +[ Upstream commit 6fd4ebfc4d61e3097b595ab2725d513e3bbd6739 ] + +Use devm_kstrdup() instead of kstrdup() and check its return value to +avoid memory leak. + +Fixes: 49bddc73d15c ("libnvdimm/of_pmem: Provide a unique name for bus provider") +Signed-off-by: Chen Ni +Reviewed-by: Ira Weiny +Reviewed-by: Dave Jiang +Signed-off-by: Ira Weiny +Signed-off-by: Sasha Levin +--- + drivers/nvdimm/of_pmem.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/drivers/nvdimm/of_pmem.c b/drivers/nvdimm/of_pmem.c +index 8224d1431ea94..9d6664fcceb87 100644 +--- a/drivers/nvdimm/of_pmem.c ++++ b/drivers/nvdimm/of_pmem.c +@@ -30,7 +30,13 @@ static int of_pmem_region_probe(struct platform_device *pdev) + if (!priv) + return -ENOMEM; + +- priv->bus_desc.provider_name = kstrdup(pdev->name, GFP_KERNEL); ++ priv->bus_desc.provider_name = devm_kstrdup(&pdev->dev, pdev->name, ++ GFP_KERNEL); ++ if (!priv->bus_desc.provider_name) { ++ kfree(priv); ++ return -ENOMEM; ++ } ++ + priv->bus_desc.module = THIS_MODULE; + priv->bus_desc.of_node = np; + +-- +2.42.0 + diff --git a/queue-5.4/media-bttv-fix-use-after-free-error-due-to-btv-timeo.patch b/queue-5.4/media-bttv-fix-use-after-free-error-due-to-btv-timeo.patch new file mode 100644 index 00000000000..06a67f20c67 --- /dev/null +++ b/queue-5.4/media-bttv-fix-use-after-free-error-due-to-btv-timeo.patch @@ -0,0 +1,52 @@ +From 1bc407eba9ab95fe8929ceaedaf6f5e60a074719 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Apr 2023 11:49:42 +0800 +Subject: media: bttv: fix use after free error due to btv->timeout timer + +From: Zheng Wang + +[ Upstream commit bd5b50b329e850d467e7bcc07b2b6bde3752fbda ] + +There may be some a race condition between timer function +bttv_irq_timeout and bttv_remove. The timer is setup in +probe and there is no timer_delete operation in remove +function. When it hit kfree btv, the function might still be +invoked, which will cause use after free bug. + +This bug is found by static analysis, it may be false positive. + +Fix it by adding del_timer_sync invoking to the remove function. + +cpu0 cpu1 + bttv_probe + ->timer_setup + ->bttv_set_dma + ->mod_timer; +bttv_remove + ->kfree(btv); + ->bttv_irq_timeout + ->USE btv + +Fixes: 162e6376ac58 ("media: pci: Convert timers to use timer_setup()") +Signed-off-by: Zheng Wang +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/pci/bt8xx/bttv-driver.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/media/pci/bt8xx/bttv-driver.c b/drivers/media/pci/bt8xx/bttv-driver.c +index 6441e7d63d971..a0be1ca89b29a 100644 +--- a/drivers/media/pci/bt8xx/bttv-driver.c ++++ b/drivers/media/pci/bt8xx/bttv-driver.c +@@ -4258,6 +4258,7 @@ static void bttv_remove(struct pci_dev *pci_dev) + + /* free resources */ + free_irq(btv->c.pci->irq,btv); ++ del_timer_sync(&btv->timeout); + iounmap(btv->bt848_mmio); + release_mem_region(pci_resource_start(btv->c.pci,0), + pci_resource_len(btv->c.pci,0)); +-- +2.42.0 + diff --git a/queue-5.4/media-dvb-usb-v2-af9035-fix-missing-unlock.patch b/queue-5.4/media-dvb-usb-v2-af9035-fix-missing-unlock.patch new file mode 100644 index 00000000000..f95516df531 --- /dev/null +++ b/queue-5.4/media-dvb-usb-v2-af9035-fix-missing-unlock.patch @@ -0,0 +1,67 @@ +From 87227de22aac79345f2cdb7bb89ee4fd2a4c5daa Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 6 Oct 2023 12:08:45 +0200 +Subject: media: dvb-usb-v2: af9035: fix missing unlock + +From: Hans Verkuil + +[ Upstream commit f31b2cb85f0ee165d78e1c43f6d69f82cc3b2145 ] + +Instead of returning an error, goto the mutex unlock at +the end of the function. + +Fixes smatch warning: + +drivers/media/usb/dvb-usb-v2/af9035.c:467 af9035_i2c_master_xfer() warn: inconsistent returns '&d->i2c_mutex'. + Locked on : 326,387 + Unlocked on: 465,467 + +Signed-off-by: Hans Verkuil +Fixes: 7bf744f2de0a ("media: dvb-usb-v2: af9035: Fix null-ptr-deref in af9035_i2c_master_xfer") +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/usb/dvb-usb-v2/af9035.c | 13 +++++++++---- + 1 file changed, 9 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/usb/dvb-usb-v2/af9035.c b/drivers/media/usb/dvb-usb-v2/af9035.c +index 66dd1bdf6440a..c5f6af5debaf4 100644 +--- a/drivers/media/usb/dvb-usb-v2/af9035.c ++++ b/drivers/media/usb/dvb-usb-v2/af9035.c +@@ -322,8 +322,10 @@ static int af9035_i2c_master_xfer(struct i2c_adapter *adap, + ret = -EOPNOTSUPP; + } else if ((msg[0].addr == state->af9033_i2c_addr[0]) || + (msg[0].addr == state->af9033_i2c_addr[1])) { +- if (msg[0].len < 3 || msg[1].len < 1) +- return -EOPNOTSUPP; ++ if (msg[0].len < 3 || msg[1].len < 1) { ++ ret = -EOPNOTSUPP; ++ goto unlock; ++ } + /* demod access via firmware interface */ + reg = msg[0].buf[0] << 16 | msg[0].buf[1] << 8 | + msg[0].buf[2]; +@@ -383,8 +385,10 @@ static int af9035_i2c_master_xfer(struct i2c_adapter *adap, + ret = -EOPNOTSUPP; + } else if ((msg[0].addr == state->af9033_i2c_addr[0]) || + (msg[0].addr == state->af9033_i2c_addr[1])) { +- if (msg[0].len < 3) +- return -EOPNOTSUPP; ++ if (msg[0].len < 3) { ++ ret = -EOPNOTSUPP; ++ goto unlock; ++ } + /* demod access via firmware interface */ + reg = msg[0].buf[0] << 16 | msg[0].buf[1] << 8 | + msg[0].buf[2]; +@@ -459,6 +463,7 @@ static int af9035_i2c_master_xfer(struct i2c_adapter *adap, + ret = -EOPNOTSUPP; + } + ++unlock: + mutex_unlock(&d->i2c_mutex); + + if (ret < 0) +-- +2.42.0 + diff --git a/queue-5.4/media-s3c-camif-avoid-inappropriate-kfree.patch b/queue-5.4/media-s3c-camif-avoid-inappropriate-kfree.patch new file mode 100644 index 00000000000..3d9212c9379 --- /dev/null +++ b/queue-5.4/media-s3c-camif-avoid-inappropriate-kfree.patch @@ -0,0 +1,54 @@ +From b20bab41eb0f54ed0e43761b7683cc006c222a41 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 22 Sep 2023 14:55:06 +0300 +Subject: media: s3c-camif: Avoid inappropriate kfree() + +From: Katya Orlova + +[ Upstream commit 61334819aca018c3416ee6c330a08a49c1524fc3 ] + +s3c_camif_register_video_node() works with video_device structure stored +as a field of camif_vp, so it should not be kfreed. +But there is video_device_release() on error path that do it. + +Found by Linux Verification Center (linuxtesting.org) with SVACE. + +Fixes: babde1c243b2 ("[media] V4L: Add driver for S3C24XX/S3C64XX SoC series camera interface") +Signed-off-by: Katya Orlova +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/platform/s3c-camif/camif-capture.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/platform/s3c-camif/camif-capture.c b/drivers/media/platform/s3c-camif/camif-capture.c +index 2fb45db8e4ba4..d24ef08633ab0 100644 +--- a/drivers/media/platform/s3c-camif/camif-capture.c ++++ b/drivers/media/platform/s3c-camif/camif-capture.c +@@ -1132,12 +1132,12 @@ int s3c_camif_register_video_node(struct camif_dev *camif, int idx) + + ret = vb2_queue_init(q); + if (ret) +- goto err_vd_rel; ++ return ret; + + vp->pad.flags = MEDIA_PAD_FL_SINK; + ret = media_entity_pads_init(&vfd->entity, 1, &vp->pad); + if (ret) +- goto err_vd_rel; ++ return ret; + + video_set_drvdata(vfd, vp); + +@@ -1170,8 +1170,6 @@ int s3c_camif_register_video_node(struct camif_dev *camif, int idx) + v4l2_ctrl_handler_free(&vp->ctrl_handler); + err_me_cleanup: + media_entity_cleanup(&vfd->entity); +-err_vd_rel: +- video_device_release(vfd); + return ret; + } + +-- +2.42.0 + diff --git a/queue-5.4/mfd-dln2-fix-double-put-in-dln2_probe.patch b/queue-5.4/mfd-dln2-fix-double-put-in-dln2_probe.patch new file mode 100644 index 00000000000..fb54bb44cc7 --- /dev/null +++ b/queue-5.4/mfd-dln2-fix-double-put-in-dln2_probe.patch @@ -0,0 +1,37 @@ +From f247482ffb84b897d38ef5d34a3060b838e6204c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 25 Sep 2023 10:41:33 +0800 +Subject: mfd: dln2: Fix double put in dln2_probe + +From: Dinghao Liu + +[ Upstream commit 759c409bc5fc496cbc22cd0b392d3cbb0c0e23eb ] + +The dln2_free() already contains usb_put_dev(). Therefore, +the redundant usb_put_dev() before dln2_free() may lead to +a double free. + +Fixes: 96da8f148396 ("mfd: dln2: Fix memory leak in dln2_probe()") +Signed-off-by: Dinghao Liu +Link: https://lore.kernel.org/r/20230925024134.9683-1-dinghao.liu@zju.edu.cn +Signed-off-by: Lee Jones +Signed-off-by: Sasha Levin +--- + drivers/mfd/dln2.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/mfd/dln2.c b/drivers/mfd/dln2.c +index 80952237e4b43..707f4287ab4a0 100644 +--- a/drivers/mfd/dln2.c ++++ b/drivers/mfd/dln2.c +@@ -797,7 +797,6 @@ static int dln2_probe(struct usb_interface *interface, + dln2_stop_rx_urbs(dln2); + + out_free: +- usb_put_dev(dln2->usb_dev); + dln2_free(dln2); + + return ret; +-- +2.42.0 + diff --git a/queue-5.4/misc-st_core-do-not-call-kfree_skb-under-spin_lock_i.patch b/queue-5.4/misc-st_core-do-not-call-kfree_skb-under-spin_lock_i.patch new file mode 100644 index 00000000000..a4d51031932 --- /dev/null +++ b/queue-5.4/misc-st_core-do-not-call-kfree_skb-under-spin_lock_i.patch @@ -0,0 +1,65 @@ +From d6afea79aae7e5ecbc047db7df78596e62e95f5a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 23 Aug 2023 11:50:20 +0800 +Subject: misc: st_core: Do not call kfree_skb() under spin_lock_irqsave() + +From: Jinjie Ruan + +[ Upstream commit 4d08c3d12b61022501989f9f071514d2d6f77c47 ] + +It is not allowed to call kfree_skb() from hardware interrupt +context or with hardware interrupts being disabled. +So replace kfree_skb() with dev_kfree_skb_irq() under +spin_lock_irqsave(). Compile tested only. + +Fixes: 53618cc1e51e ("Staging: sources for ST core") +Signed-off-by: Jinjie Ruan +Link: https://lore.kernel.org/r/20230823035020.1281892-1-ruanjinjie@huawei.com +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +--- + drivers/misc/ti-st/st_core.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/misc/ti-st/st_core.c b/drivers/misc/ti-st/st_core.c +index 7d9e23aa0b926..c19460e7f0f16 100644 +--- a/drivers/misc/ti-st/st_core.c ++++ b/drivers/misc/ti-st/st_core.c +@@ -15,6 +15,7 @@ + #include + + #include ++#include + + extern void st_kim_recv(void *, const unsigned char *, long); + void st_int_recv(void *, const unsigned char *, long); +@@ -423,7 +424,7 @@ static void st_int_enqueue(struct st_data_s *st_gdata, struct sk_buff *skb) + case ST_LL_AWAKE_TO_ASLEEP: + pr_err("ST LL is illegal state(%ld)," + "purging received skb.", st_ll_getstate(st_gdata)); +- kfree_skb(skb); ++ dev_kfree_skb_irq(skb); + break; + case ST_LL_ASLEEP: + skb_queue_tail(&st_gdata->tx_waitq, skb); +@@ -432,7 +433,7 @@ static void st_int_enqueue(struct st_data_s *st_gdata, struct sk_buff *skb) + default: + pr_err("ST LL is illegal state(%ld)," + "purging received skb.", st_ll_getstate(st_gdata)); +- kfree_skb(skb); ++ dev_kfree_skb_irq(skb); + break; + } + +@@ -486,7 +487,7 @@ void st_tx_wakeup(struct st_data_s *st_data) + spin_unlock_irqrestore(&st_data->lock, flags); + break; + } +- kfree_skb(skb); ++ dev_kfree_skb_irq(skb); + spin_unlock_irqrestore(&st_data->lock, flags); + } + /* if wake-up is set in another context- restart sending */ +-- +2.42.0 + diff --git a/queue-5.4/modpost-fix-tee-module_device_table-built-on-big-end.patch b/queue-5.4/modpost-fix-tee-module_device_table-built-on-big-end.patch new file mode 100644 index 00000000000..3af350d45e3 --- /dev/null +++ b/queue-5.4/modpost-fix-tee-module_device_table-built-on-big-end.patch @@ -0,0 +1,71 @@ +From 4ddff87c5291a16de0e49ad254c8b45586df53b1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 8 Oct 2023 02:04:44 +0900 +Subject: modpost: fix tee MODULE_DEVICE_TABLE built on big-endian host + +From: Masahiro Yamada + +[ Upstream commit 7f54e00e5842663c2cea501bbbdfa572c94348a3 ] + +When MODULE_DEVICE_TABLE(tee, ) is built on a host with a different +endianness from the target architecture, it results in an incorrect +MODULE_ALIAS(). + +For example, see a case where drivers/char/hw_random/optee-rng.c +is built as a module for ARM little-endian. + +If you build it on a little-endian host, you will get the correct +MODULE_ALIAS: + + $ grep MODULE_ALIAS drivers/char/hw_random/optee-rng.mod.c + MODULE_ALIAS("tee:ab7a617c-b8e7-4d8f-8301-d09b61036b64*"); + +However, if you build it on a big-endian host, you will get a wrong +MODULE_ALIAS: + + $ grep MODULE_ALIAS drivers/char/hw_random/optee-rng.mod.c + MODULE_ALIAS("tee:646b0361-9bd0-0183-8f4d-e7b87c617aab*"); + +The same problem also occurs when you enable CONFIG_CPU_BIG_ENDIAN, +and build it on a little-endian host. + +This issue has been unnoticed because the ARM kernel is configured for +little-endian by default, and most likely built on a little-endian host +(cross-build on x86 or native-build on ARM). + +The uuid field must not be reversed because uuid_t is an array of __u8. + +Fixes: 0fc1db9d1059 ("tee: add bus driver framework for TEE based devices") +Signed-off-by: Masahiro Yamada +Reviewed-by: Sumit Garg +Signed-off-by: Sasha Levin +--- + scripts/mod/file2alias.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c +index 8c0d1c191d557..7b845483717b6 100644 +--- a/scripts/mod/file2alias.c ++++ b/scripts/mod/file2alias.c +@@ -1302,13 +1302,13 @@ static int do_typec_entry(const char *filename, void *symval, char *alias) + /* Looks like: tee:uuid */ + static int do_tee_entry(const char *filename, void *symval, char *alias) + { +- DEF_FIELD(symval, tee_client_device_id, uuid); ++ DEF_FIELD_ADDR(symval, tee_client_device_id, uuid); + + sprintf(alias, "tee:%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x", +- uuid.b[0], uuid.b[1], uuid.b[2], uuid.b[3], uuid.b[4], +- uuid.b[5], uuid.b[6], uuid.b[7], uuid.b[8], uuid.b[9], +- uuid.b[10], uuid.b[11], uuid.b[12], uuid.b[13], uuid.b[14], +- uuid.b[15]); ++ uuid->b[0], uuid->b[1], uuid->b[2], uuid->b[3], uuid->b[4], ++ uuid->b[5], uuid->b[6], uuid->b[7], uuid->b[8], uuid->b[9], ++ uuid->b[10], uuid->b[11], uuid->b[12], uuid->b[13], uuid->b[14], ++ uuid->b[15]); + + add_wildcard(alias); + return 1; +-- +2.42.0 + diff --git a/queue-5.4/nd_btt-make-btt-lanes-preemptible.patch b/queue-5.4/nd_btt-make-btt-lanes-preemptible.patch new file mode 100644 index 00000000000..0c8c4e50796 --- /dev/null +++ b/queue-5.4/nd_btt-make-btt-lanes-preemptible.patch @@ -0,0 +1,94 @@ +From 179b48fd4d3e191dc3430a57a7c5335ab88b0664 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 20 Sep 2023 07:37:12 +0200 +Subject: nd_btt: Make BTT lanes preemptible + +From: Tomas Glozar + +[ Upstream commit 36c75ce3bd299878fd9b238e9803d3817ddafbf3 ] + +nd_region_acquire_lane uses get_cpu, which disables preemption. This is +an issue on PREEMPT_RT kernels, since btt_write_pg and also +nd_region_acquire_lane itself take a spin lock, resulting in BUG: +sleeping function called from invalid context. + +Fix the issue by replacing get_cpu with smp_process_id and +migrate_disable when needed. This makes BTT operations preemptible, thus +permitting the use of spin_lock. + +BUG example occurring when running ndctl tests on PREEMPT_RT kernel: + +BUG: sleeping function called from invalid context at +kernel/locking/spinlock_rt.c:48 +in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 4903, name: +libndctl +preempt_count: 1, expected: 0 +RCU nest depth: 0, expected: 0 +Preemption disabled at: +[] nd_region_acquire_lane+0x15/0x90 [libnvdimm] +Call Trace: + + dump_stack_lvl+0x8e/0xb0 + __might_resched+0x19b/0x250 + rt_spin_lock+0x4c/0x100 + ? btt_write_pg+0x2d7/0x500 [nd_btt] + btt_write_pg+0x2d7/0x500 [nd_btt] + ? local_clock_noinstr+0x9/0xc0 + btt_submit_bio+0x16d/0x270 [nd_btt] + __submit_bio+0x48/0x80 + __submit_bio_noacct+0x7e/0x1e0 + submit_bio_wait+0x58/0xb0 + __blkdev_direct_IO_simple+0x107/0x240 + ? inode_set_ctime_current+0x51/0x110 + ? __pfx_submit_bio_wait_endio+0x10/0x10 + blkdev_write_iter+0x1d8/0x290 + vfs_write+0x237/0x330 + ... + + +Fixes: 5212e11fde4d ("nd_btt: atomic sector updates") +Signed-off-by: Tomas Glozar +Reviewed-by: Ira Weiny +Reviewed-by: Vishal Verma +Signed-off-by: Ira Weiny +Signed-off-by: Sasha Levin +--- + drivers/nvdimm/region_devs.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c +index aac6708d33caa..c79e4219f14dd 100644 +--- a/drivers/nvdimm/region_devs.c ++++ b/drivers/nvdimm/region_devs.c +@@ -907,7 +907,8 @@ unsigned int nd_region_acquire_lane(struct nd_region *nd_region) + { + unsigned int cpu, lane; + +- cpu = get_cpu(); ++ migrate_disable(); ++ cpu = smp_processor_id(); + if (nd_region->num_lanes < nr_cpu_ids) { + struct nd_percpu_lane *ndl_lock, *ndl_count; + +@@ -926,16 +927,15 @@ EXPORT_SYMBOL(nd_region_acquire_lane); + void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane) + { + if (nd_region->num_lanes < nr_cpu_ids) { +- unsigned int cpu = get_cpu(); ++ unsigned int cpu = smp_processor_id(); + struct nd_percpu_lane *ndl_lock, *ndl_count; + + ndl_count = per_cpu_ptr(nd_region->lane, cpu); + ndl_lock = per_cpu_ptr(nd_region->lane, lane); + if (--ndl_count->count == 0) + spin_unlock(&ndl_lock->lock); +- put_cpu(); + } +- put_cpu(); ++ migrate_enable(); + } + EXPORT_SYMBOL(nd_region_release_lane); + +-- +2.42.0 + diff --git a/queue-5.4/net-add-dev_stats_read-helper.patch b/queue-5.4/net-add-dev_stats_read-helper.patch new file mode 100644 index 00000000000..30cfafc5747 --- /dev/null +++ b/queue-5.4/net-add-dev_stats_read-helper.patch @@ -0,0 +1,55 @@ +From 22bd53f795f8dfc2e6655d39f3449d71c6fb846a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Sep 2023 08:52:16 +0000 +Subject: net: add DEV_STATS_READ() helper + +From: Eric Dumazet + +[ Upstream commit 0b068c714ca9479d2783cc333fff5bc2d4a6d45c ] + +Companion of DEV_STATS_INC() & DEV_STATS_ADD(). + +This is going to be used in the series. + +Use it in macsec_get_stats64(). + +Signed-off-by: Eric Dumazet +Signed-off-by: David S. Miller +Stable-dep-of: ff672b9ffeb3 ("ipvlan: properly track tx_errors") +Signed-off-by: Sasha Levin +--- + drivers/net/macsec.c | 6 +++--- + include/linux/netdevice.h | 1 + + 2 files changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/macsec.c b/drivers/net/macsec.c +index c16688327753b..d5f2d895dba21 100644 +--- a/drivers/net/macsec.c ++++ b/drivers/net/macsec.c +@@ -2995,9 +2995,9 @@ static void macsec_get_stats64(struct net_device *dev, + s->tx_bytes += tmp.tx_bytes; + } + +- s->rx_dropped = atomic_long_read(&dev->stats.__rx_dropped); +- s->tx_dropped = atomic_long_read(&dev->stats.__tx_dropped); +- s->rx_errors = atomic_long_read(&dev->stats.__rx_errors); ++ s->rx_dropped = DEV_STATS_READ(dev, rx_dropped); ++ s->tx_dropped = DEV_STATS_READ(dev, tx_dropped); ++ s->rx_errors = DEV_STATS_READ(dev, rx_errors); + } + + static int macsec_get_iflink(const struct net_device *dev) +diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h +index a3ade51bd9e25..a6bb64dccb888 100644 +--- a/include/linux/netdevice.h ++++ b/include/linux/netdevice.h +@@ -4966,5 +4966,6 @@ extern struct net_device *blackhole_netdev; + #define DEV_STATS_INC(DEV, FIELD) atomic_long_inc(&(DEV)->stats.__##FIELD) + #define DEV_STATS_ADD(DEV, FIELD, VAL) \ + atomic_long_add((VAL), &(DEV)->stats.__##FIELD) ++#define DEV_STATS_READ(DEV, FIELD) atomic_long_read(&(DEV)->stats.__##FIELD) + + #endif /* _LINUX_NETDEVICE_H */ +-- +2.42.0 + diff --git a/queue-5.4/pcmcia-cs-fix-possible-hung-task-and-memory-leak-pcc.patch b/queue-5.4/pcmcia-cs-fix-possible-hung-task-and-memory-leak-pcc.patch new file mode 100644 index 00000000000..9df1e57e0aa --- /dev/null +++ b/queue-5.4/pcmcia-cs-fix-possible-hung-task-and-memory-leak-pcc.patch @@ -0,0 +1,43 @@ +From ecb93740dde08164136a74722816b7ba71c75312 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 12 Nov 2022 17:25:41 +0800 +Subject: pcmcia: cs: fix possible hung task and memory leak pccardd() + +From: Yang Yingliang + +[ Upstream commit e3ea1b4847e49234e691c0d66bf030bd65bb7f2b ] + +If device_register() returns error in pccardd(), it leads two issues: + +1. The socket_released has never been completed, it will block + pcmcia_unregister_socket(), because of waiting for completion + of socket_released. +2. The device name allocated by dev_set_name() is leaked. + +Fix this two issues by calling put_device() when device_register() fails. +socket_released can be completed in pcmcia_release_socket(), the name can +be freed in kobject_cleanup(). + +Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") +Signed-off-by: Yang Yingliang +Signed-off-by: Dominik Brodowski +Signed-off-by: Sasha Levin +--- + drivers/pcmcia/cs.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/pcmcia/cs.c b/drivers/pcmcia/cs.c +index f70197154a362..820cce7c8b400 100644 +--- a/drivers/pcmcia/cs.c ++++ b/drivers/pcmcia/cs.c +@@ -605,6 +605,7 @@ static int pccardd(void *__skt) + dev_warn(&skt->dev, "PCMCIA: unable to register socket\n"); + skt->thread = NULL; + complete(&skt->thread_done); ++ put_device(&skt->dev); + return 0; + } + ret = pccard_sysfs_add_socket(&skt->dev); +-- +2.42.0 + diff --git a/queue-5.4/pcmcia-ds-fix-possible-name-leak-in-error-path-in-pc.patch b/queue-5.4/pcmcia-ds-fix-possible-name-leak-in-error-path-in-pc.patch new file mode 100644 index 00000000000..cd1a55ae783 --- /dev/null +++ b/queue-5.4/pcmcia-ds-fix-possible-name-leak-in-error-path-in-pc.patch @@ -0,0 +1,53 @@ +From 1197199e4b5d5cb7d017037686db73b168984639 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 12 Nov 2022 17:29:24 +0800 +Subject: pcmcia: ds: fix possible name leak in error path in + pcmcia_device_add() + +From: Yang Yingliang + +[ Upstream commit 99e1241049a92dd3e9a90a0f91e32ce390133278 ] + +Afer commit 1fa5ae857bb1 ("driver core: get rid of struct device's +bus_id string array"), the name of device is allocated dynamically. +Therefore, it needs to be freed, which is done by the driver core for +us once all references to the device are gone. Therefore, move the +dev_set_name() call immediately before the call device_register(), which +either succeeds (then the freeing will be done upon subsequent remvoal), +or puts the reference in the error call. Also, it is not unusual that the +return value of dev_set_name is not checked. + +Fixes: 1fa5ae857bb1 ("driver core: get rid of struct device's bus_id string array") +Signed-off-by: Yang Yingliang +[linux@dominikbrodowski.net: simplification, commit message modified] +Signed-off-by: Dominik Brodowski +Signed-off-by: Sasha Levin +--- + drivers/pcmcia/ds.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/pcmcia/ds.c b/drivers/pcmcia/ds.c +index 63724e0d0472a..103862f7bdf1d 100644 +--- a/drivers/pcmcia/ds.c ++++ b/drivers/pcmcia/ds.c +@@ -518,9 +518,6 @@ static struct pcmcia_device *pcmcia_device_add(struct pcmcia_socket *s, + /* by default don't allow DMA */ + p_dev->dma_mask = DMA_MASK_NONE; + p_dev->dev.dma_mask = &p_dev->dma_mask; +- dev_set_name(&p_dev->dev, "%d.%d", p_dev->socket->sock, p_dev->device_no); +- if (!dev_name(&p_dev->dev)) +- goto err_free; + p_dev->devname = kasprintf(GFP_KERNEL, "pcmcia%s", dev_name(&p_dev->dev)); + if (!p_dev->devname) + goto err_free; +@@ -578,6 +575,7 @@ static struct pcmcia_device *pcmcia_device_add(struct pcmcia_socket *s, + + pcmcia_device_query(p_dev); + ++ dev_set_name(&p_dev->dev, "%d.%d", p_dev->socket->sock, p_dev->device_no); + if (device_register(&p_dev->dev)) { + mutex_lock(&s->ops_mutex); + list_del(&p_dev->socket_device_list); +-- +2.42.0 + diff --git a/queue-5.4/pcmcia-ds-fix-refcount-leak-in-pcmcia_device_add.patch b/queue-5.4/pcmcia-ds-fix-refcount-leak-in-pcmcia_device_add.patch new file mode 100644 index 00000000000..747373db260 --- /dev/null +++ b/queue-5.4/pcmcia-ds-fix-refcount-leak-in-pcmcia_device_add.patch @@ -0,0 +1,49 @@ +From 3813fe6e955619c788f6ea814612dc24beeda6fe Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 12 Nov 2022 17:29:23 +0800 +Subject: pcmcia: ds: fix refcount leak in pcmcia_device_add() + +From: Yang Yingliang + +[ Upstream commit 402ab979b29126068e0b596b641422ff7490214c ] + +As the comment of device_register() says, it should use put_device() +to give up the reference in the error path. Then, insofar resources +will be freed in pcmcia_release_dev(), the error path is no longer +needed. In particular, this means that the (previously missing) dropping +of the reference to &p_dev->function_config->ref is now handled by +pcmcia_release_dev(). + +Fixes: 360b65b95bae ("[PATCH] pcmcia: make config_t independent, add reference counting") +Signed-off-by: Yang Yingliang +[linux@dominikbrodowski.net: simplification, commit message rewrite] +Signed-off-by: Dominik Brodowski +Signed-off-by: Sasha Levin +--- + drivers/pcmcia/ds.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/pcmcia/ds.c b/drivers/pcmcia/ds.c +index 09d06b082f8b8..63724e0d0472a 100644 +--- a/drivers/pcmcia/ds.c ++++ b/drivers/pcmcia/ds.c +@@ -578,8 +578,14 @@ static struct pcmcia_device *pcmcia_device_add(struct pcmcia_socket *s, + + pcmcia_device_query(p_dev); + +- if (device_register(&p_dev->dev)) +- goto err_unreg; ++ if (device_register(&p_dev->dev)) { ++ mutex_lock(&s->ops_mutex); ++ list_del(&p_dev->socket_device_list); ++ s->device_count--; ++ mutex_unlock(&s->ops_mutex); ++ put_device(&p_dev->dev); ++ return NULL; ++ } + + return p_dev; + +-- +2.42.0 + diff --git a/queue-5.4/platform-x86-wmi-fix-opening-of-char-device.patch b/queue-5.4/platform-x86-wmi-fix-opening-of-char-device.patch new file mode 100644 index 00000000000..3aac14e1413 --- /dev/null +++ b/queue-5.4/platform-x86-wmi-fix-opening-of-char-device.patch @@ -0,0 +1,69 @@ +From 03e58bc7ac5352f4b75053dc60a1821124042dfc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 20 Oct 2023 23:10:04 +0200 +Subject: platform/x86: wmi: Fix opening of char device +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Armin Wolf + +[ Upstream commit eba9ac7abab91c8f6d351460239108bef5e7a0b6 ] + +Since commit fa1f68db6ca7 ("drivers: misc: pass miscdevice pointer via +file private data"), the miscdevice stores a pointer to itself inside +filp->private_data, which means that private_data will not be NULL when +wmi_char_open() is called. This might cause memory corruption should +wmi_char_open() be unable to find its driver, something which can +happen when the associated WMI device is deleted in wmi_free_devices(). + +Fix the problem by using the miscdevice pointer to retrieve the WMI +device data associated with a char device using container_of(). This +also avoids wmi_char_open() picking a wrong WMI device bound to a +driver with the same name as the original driver. + +Fixes: 44b6b7661132 ("platform/x86: wmi: create userspace interface for drivers") +Signed-off-by: Armin Wolf +Link: https://lore.kernel.org/r/20231020211005.38216-5-W_Armin@gmx.de +Reviewed-by: Ilpo Järvinen +Signed-off-by: Ilpo Järvinen +Signed-off-by: Sasha Levin +--- + drivers/platform/x86/wmi.c | 20 ++++++-------------- + 1 file changed, 6 insertions(+), 14 deletions(-) + +diff --git a/drivers/platform/x86/wmi.c b/drivers/platform/x86/wmi.c +index a481707e0d398..66cfc35e4e3d0 100644 +--- a/drivers/platform/x86/wmi.c ++++ b/drivers/platform/x86/wmi.c +@@ -817,21 +817,13 @@ static int wmi_dev_match(struct device *dev, struct device_driver *driver) + } + static int wmi_char_open(struct inode *inode, struct file *filp) + { +- const char *driver_name = filp->f_path.dentry->d_iname; +- struct wmi_block *wblock; +- struct wmi_block *next; +- +- list_for_each_entry_safe(wblock, next, &wmi_block_list, list) { +- if (!wblock->dev.dev.driver) +- continue; +- if (strcmp(driver_name, wblock->dev.dev.driver->name) == 0) { +- filp->private_data = wblock; +- break; +- } +- } ++ /* ++ * The miscdevice already stores a pointer to itself ++ * inside filp->private_data ++ */ ++ struct wmi_block *wblock = container_of(filp->private_data, struct wmi_block, char_dev); + +- if (!filp->private_data) +- return -ENODEV; ++ filp->private_data = wblock; + + return nonseekable_open(inode, filp); + } +-- +2.42.0 + diff --git a/queue-5.4/platform-x86-wmi-fix-probe-failure-when-failing-to-r.patch b/queue-5.4/platform-x86-wmi-fix-probe-failure-when-failing-to-r.patch new file mode 100644 index 00000000000..c89dc1e9f46 --- /dev/null +++ b/queue-5.4/platform-x86-wmi-fix-probe-failure-when-failing-to-r.patch @@ -0,0 +1,84 @@ +From 8304a30843ce8ea055523acc582f0635634cff61 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 20 Oct 2023 23:10:03 +0200 +Subject: platform/x86: wmi: Fix probe failure when failing to register WMI + devices +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Armin Wolf + +[ Upstream commit ed85891a276edaf7a867de0e9acd0837bc3008f2 ] + +When a WMI device besides the first one somehow fails to register, +retval is returned while still containing a negative error code. This +causes the ACPI device fail to probe, leaving behind zombie WMI devices +leading to various errors later. + +Handle the single error path separately and return 0 unconditionally +after trying to register all WMI devices to solve the issue. Also +continue to register WMI devices even if some fail to allocate memory. + +Fixes: 6ee50aaa9a20 ("platform/x86: wmi: Instantiate all devices before adding them") +Signed-off-by: Armin Wolf +Link: https://lore.kernel.org/r/20231020211005.38216-4-W_Armin@gmx.de +Reviewed-by: Ilpo Järvinen +Signed-off-by: Ilpo Järvinen +Signed-off-by: Sasha Levin +--- + drivers/platform/x86/wmi.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/drivers/platform/x86/wmi.c b/drivers/platform/x86/wmi.c +index 67c4ec554ada8..f4327c2873fa3 100644 +--- a/drivers/platform/x86/wmi.c ++++ b/drivers/platform/x86/wmi.c +@@ -1154,8 +1154,8 @@ static int parse_wdg(struct device *wmi_bus_dev, struct acpi_device *device) + struct wmi_block *wblock, *next; + union acpi_object *obj; + acpi_status status; +- int retval = 0; + u32 i, total; ++ int retval; + + status = acpi_evaluate_object(device->handle, "_WDG", NULL, &out); + if (ACPI_FAILURE(status)) +@@ -1166,8 +1166,8 @@ static int parse_wdg(struct device *wmi_bus_dev, struct acpi_device *device) + return -ENXIO; + + if (obj->type != ACPI_TYPE_BUFFER) { +- retval = -ENXIO; +- goto out_free_pointer; ++ kfree(obj); ++ return -ENXIO; + } + + gblock = (const struct guid_block *)obj->buffer.pointer; +@@ -1188,8 +1188,8 @@ static int parse_wdg(struct device *wmi_bus_dev, struct acpi_device *device) + + wblock = kzalloc(sizeof(struct wmi_block), GFP_KERNEL); + if (!wblock) { +- retval = -ENOMEM; +- break; ++ dev_err(wmi_bus_dev, "Failed to allocate %pUL\n", &gblock[i].guid); ++ continue; + } + + wblock->acpi_device = device; +@@ -1228,9 +1228,9 @@ static int parse_wdg(struct device *wmi_bus_dev, struct acpi_device *device) + } + } + +-out_free_pointer: +- kfree(out.pointer); +- return retval; ++ kfree(obj); ++ ++ return 0; + } + + /* +-- +2.42.0 + diff --git a/queue-5.4/platform-x86-wmi-remove-unnecessary-initializations.patch b/queue-5.4/platform-x86-wmi-remove-unnecessary-initializations.patch new file mode 100644 index 00000000000..27acc7abf94 --- /dev/null +++ b/queue-5.4/platform-x86-wmi-remove-unnecessary-initializations.patch @@ -0,0 +1,94 @@ +From 151668f72f6843b1beb552d3369511c4a918683d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 4 Sep 2021 17:55:10 +0000 +Subject: platform/x86: wmi: remove unnecessary initializations +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Barnabás Pőcze + +[ Upstream commit 43aacf838ef7384d985ef5385ecb0124f8c70007 ] + +Some pointers are initialized when they are defined, +but they are almost immediately reassigned in the +following lines. Remove these superfluous assignments. + +Signed-off-by: Barnabás Pőcze +Link: https://lore.kernel.org/r/20210904175450.156801-6-pobrn@protonmail.com +Reviewed-by: Hans de Goede +Signed-off-by: Hans de Goede +Stable-dep-of: eba9ac7abab9 ("platform/x86: wmi: Fix opening of char device") +Signed-off-by: Sasha Levin +--- + drivers/platform/x86/wmi.c | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +diff --git a/drivers/platform/x86/wmi.c b/drivers/platform/x86/wmi.c +index f4327c2873fa3..a481707e0d398 100644 +--- a/drivers/platform/x86/wmi.c ++++ b/drivers/platform/x86/wmi.c +@@ -184,7 +184,7 @@ static int get_subobj_info(acpi_handle handle, const char *pathname, + + static acpi_status wmi_method_enable(struct wmi_block *wblock, int enable) + { +- struct guid_block *block = NULL; ++ struct guid_block *block; + char method[5]; + acpi_status status; + acpi_handle handle; +@@ -258,8 +258,8 @@ EXPORT_SYMBOL_GPL(wmi_evaluate_method); + acpi_status wmidev_evaluate_method(struct wmi_device *wdev, u8 instance, + u32 method_id, const struct acpi_buffer *in, struct acpi_buffer *out) + { +- struct guid_block *block = NULL; +- struct wmi_block *wblock = NULL; ++ struct guid_block *block; ++ struct wmi_block *wblock; + acpi_handle handle; + acpi_status status; + struct acpi_object_list input; +@@ -306,7 +306,7 @@ EXPORT_SYMBOL_GPL(wmidev_evaluate_method); + static acpi_status __query_block(struct wmi_block *wblock, u8 instance, + struct acpi_buffer *out) + { +- struct guid_block *block = NULL; ++ struct guid_block *block; + acpi_handle handle; + acpi_status status, wc_status = AE_ERROR; + struct acpi_object_list input; +@@ -419,8 +419,8 @@ EXPORT_SYMBOL_GPL(wmidev_block_query); + acpi_status wmi_set_block(const char *guid_string, u8 instance, + const struct acpi_buffer *in) + { +- struct guid_block *block = NULL; + struct wmi_block *wblock = NULL; ++ struct guid_block *block; + acpi_handle handle; + struct acpi_object_list input; + union acpi_object params[2]; +@@ -818,8 +818,8 @@ static int wmi_dev_match(struct device *dev, struct device_driver *driver) + static int wmi_char_open(struct inode *inode, struct file *filp) + { + const char *driver_name = filp->f_path.dentry->d_iname; +- struct wmi_block *wblock = NULL; +- struct wmi_block *next = NULL; ++ struct wmi_block *wblock; ++ struct wmi_block *next; + + list_for_each_entry_safe(wblock, next, &wmi_block_list, list) { + if (!wblock->dev.dev.driver) +@@ -851,8 +851,8 @@ static long wmi_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) + struct wmi_ioctl_buffer __user *input = + (struct wmi_ioctl_buffer __user *) arg; + struct wmi_block *wblock = filp->private_data; +- struct wmi_ioctl_buffer *buf = NULL; +- struct wmi_driver *wdriver = NULL; ++ struct wmi_ioctl_buffer *buf; ++ struct wmi_driver *wdriver; + int ret; + + if (_IOC_TYPE(cmd) != WMI_IOC) +-- +2.42.0 + diff --git a/queue-5.4/powerpc-imc-pmu-use-the-correct-spinlock-initializer.patch b/queue-5.4/powerpc-imc-pmu-use-the-correct-spinlock-initializer.patch new file mode 100644 index 00000000000..590a158f91d --- /dev/null +++ b/queue-5.4/powerpc-imc-pmu-use-the-correct-spinlock-initializer.patch @@ -0,0 +1,40 @@ +From e49e1f6ac1dbefc16de9fa0f9319080d601055de Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 Mar 2023 14:48:31 +0100 +Subject: powerpc/imc-pmu: Use the correct spinlock initializer. + +From: Sebastian Andrzej Siewior + +[ Upstream commit 007240d59c11f87ac4f6cfc6a1d116630b6b634c ] + +The macro __SPIN_LOCK_INITIALIZER() is implementation specific. Users +that desire to initialize a spinlock in a struct must use +__SPIN_LOCK_UNLOCKED(). + +Use __SPIN_LOCK_UNLOCKED() for the spinlock_t in imc_global_refc. + +Fixes: 76d588dddc459 ("powerpc/imc-pmu: Fix use of mutex in IRQs disabled section") +Signed-off-by: Sebastian Andrzej Siewior +Signed-off-by: Michael Ellerman +Link: https://msgid.link/20230309134831.Nz12nqsU@linutronix.de +Signed-off-by: Sasha Levin +--- + arch/powerpc/perf/imc-pmu.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/powerpc/perf/imc-pmu.c b/arch/powerpc/perf/imc-pmu.c +index d42f2e091201a..872313021eaa8 100644 +--- a/arch/powerpc/perf/imc-pmu.c ++++ b/arch/powerpc/perf/imc-pmu.c +@@ -50,7 +50,7 @@ static int trace_imc_mem_size; + * core and trace-imc + */ + static struct imc_pmu_ref imc_global_refc = { +- .lock = __SPIN_LOCK_INITIALIZER(imc_global_refc.lock), ++ .lock = __SPIN_LOCK_UNLOCKED(imc_global_refc.lock), + .id = 0, + .refc = 0, + }; +-- +2.42.0 + diff --git a/queue-5.4/powerpc-pseries-fix-potential-memory-leak-in-init_cp.patch b/queue-5.4/powerpc-pseries-fix-potential-memory-leak-in-init_cp.patch new file mode 100644 index 00000000000..8e709b09b29 --- /dev/null +++ b/queue-5.4/powerpc-pseries-fix-potential-memory-leak-in-init_cp.patch @@ -0,0 +1,43 @@ +From 96f8e8e103ecae803a6086177f8665b73dad99b4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 14 Dec 2022 15:46:23 +0800 +Subject: powerpc/pseries: fix potential memory leak in + init_cpu_associativity() + +From: Wang Yufen + +[ Upstream commit 95f1a128cd728a7257d78e868f1f5a145fc43736 ] + +If the vcpu_associativity alloc memory successfully but the +pcpu_associativity fails to alloc memory, the vcpu_associativity +memory leaks. + +Fixes: d62c8deeb6e6 ("powerpc/pseries: Provide vcpu dispatch statistics") +Signed-off-by: Wang Yufen +Reviewed-by: "Naveen N. Rao" +Signed-off-by: Michael Ellerman +Link: https://msgid.link/1671003983-10794-1-git-send-email-wangyufen@huawei.com +Signed-off-by: Sasha Levin +--- + arch/powerpc/platforms/pseries/lpar.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c +index 55af0e4cf355b..52e466d4a33ca 100644 +--- a/arch/powerpc/platforms/pseries/lpar.c ++++ b/arch/powerpc/platforms/pseries/lpar.c +@@ -522,8 +522,10 @@ static ssize_t vcpudispatch_stats_write(struct file *file, const char __user *p, + + if (cmd) { + rc = init_cpu_associativity(); +- if (rc) ++ if (rc) { ++ destroy_cpu_associativity(); + goto out; ++ } + + for_each_possible_cpu(cpu) { + disp = per_cpu_ptr(&vcpu_disp_data, cpu); +-- +2.42.0 + diff --git a/queue-5.4/powerpc-xive-fix-endian-conversion-size.patch b/queue-5.4/powerpc-xive-fix-endian-conversion-size.patch new file mode 100644 index 00000000000..1cae3b35a96 --- /dev/null +++ b/queue-5.4/powerpc-xive-fix-endian-conversion-size.patch @@ -0,0 +1,41 @@ +From 52c4ccc2eb97144d3a9f614dfce4a286b4adc88a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 11 Oct 2023 16:37:00 +1100 +Subject: powerpc/xive: Fix endian conversion size + +From: Benjamin Gray + +[ Upstream commit ff7a60ab1e065257a0e467c13b519f4debcd7fcf ] + +Sparse reports a size mismatch in the endian swap. The Opal +implementation[1] passes the value as a __be64, and the receiving +variable out_qsize is a u64, so the use of be32_to_cpu() appears to be +an error. + +[1]: https://github.com/open-power/skiboot/blob/80e2b1dc73/hw/xive.c#L3854 + +Fixes: 88ec6b93c8e7 ("powerpc/xive: add OPAL extensions for the XIVE native exploitation support") +Signed-off-by: Benjamin Gray +Signed-off-by: Michael Ellerman +Link: https://msgid.link/20231011053711.93427-2-bgray@linux.ibm.com +Signed-off-by: Sasha Levin +--- + arch/powerpc/sysdev/xive/native.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/powerpc/sysdev/xive/native.c b/arch/powerpc/sysdev/xive/native.c +index 3fd086533dcfc..05c38da4bbee0 100644 +--- a/arch/powerpc/sysdev/xive/native.c ++++ b/arch/powerpc/sysdev/xive/native.c +@@ -778,7 +778,7 @@ int xive_native_get_queue_info(u32 vp_id, u32 prio, + if (out_qpage) + *out_qpage = be64_to_cpu(qpage); + if (out_qsize) +- *out_qsize = be32_to_cpu(qsize); ++ *out_qsize = be64_to_cpu(qsize); + if (out_qeoi_page) + *out_qeoi_page = be64_to_cpu(qeoi_page); + if (out_escalate_irq) +-- +2.42.0 + diff --git a/queue-5.4/r8169-fix-rare-issue-with-broken-rx-after-link-down-.patch b/queue-5.4/r8169-fix-rare-issue-with-broken-rx-after-link-down-.patch new file mode 100644 index 00000000000..912e468b547 --- /dev/null +++ b/queue-5.4/r8169-fix-rare-issue-with-broken-rx-after-link-down-.patch @@ -0,0 +1,52 @@ +From 7f91d3f39f7de933b40ebb0a1f387ddbe62a1430 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 12 Oct 2023 08:51:13 +0200 +Subject: r8169: fix rare issue with broken rx after link-down on RTL8125 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Heiner Kallweit + +[ Upstream commit 621735f590643e3048ca2060c285b80551660601 ] + +In very rare cases (I've seen two reports so far about different +RTL8125 chip versions) it seems the MAC locks up when link goes down +and requires a software reset to get revived. +Realtek doesn't publish hw errata information, therefore the root cause +is unknown. Realtek vendor drivers do a full hw re-initialization on +each link-up event, the slimmed-down variant here was reported to fix +the issue for the reporting user. +It's not fully clear which parts of the NIC are reset as part of the +software reset, therefore I can't rule out side effects. + +Fixes: f1bce4ad2f1c ("r8169: add support for RTL8125") +Reported-by: Martin Kjær Jørgensen +Link: https://lore.kernel.org/netdev/97ec2232-3257-316c-c3e7-a08192ce16a6@gmail.com/T/ +Signed-off-by: Heiner Kallweit +Link: https://lore.kernel.org/r/9edde757-9c3b-4730-be3b-0ef3a374ff71@gmail.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/realtek/r8169_main.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c +index 9676d599b5ba0..a5100a552fd0a 100644 +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -6298,7 +6298,11 @@ static void r8169_phylink_handler(struct net_device *ndev) + if (netif_carrier_ok(ndev)) { + rtl_link_chg_patch(tp); + pm_request_resume(d); ++ netif_wake_queue(tp->dev); + } else { ++ /* In few cases rx is broken after link-down otherwise */ ++ if (rtl_is_8125(tp)) ++ rtl_reset_work(tp); + pm_runtime_idle(d); + } + +-- +2.42.0 + diff --git a/queue-5.4/r8169-use-tp_to_dev-instead-of-open-code.patch b/queue-5.4/r8169-use-tp_to_dev-instead-of-open-code.patch new file mode 100644 index 00000000000..63fe8c4b5e5 --- /dev/null +++ b/queue-5.4/r8169-use-tp_to_dev-instead-of-open-code.patch @@ -0,0 +1,49 @@ +From 2a3c383a086af997259698010467bfec2e9fad8b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 30 Nov 2022 01:12:44 +0900 +Subject: r8169: use tp_to_dev instead of open code + +From: Juhee Kang + +[ Upstream commit 4b6c6065fca123d419afef005a696f51e6590470 ] + +The open code is defined as a helper function(tp_to_dev) on r8169_main.c, +which the open code is &tp->pci_dev->dev. The helper function was added +in commit 1e1205b7d3e9 ("r8169: add helper tp_to_dev"). And then later, +commit f1e911d5d0df ("r8169: add basic phylib support") added +r8169_phylink_handler function but it didn't use the helper function. +Thus, tp_to_dev() replaces the open code. This patch doesn't change logic. + +Signed-off-by: Juhee Kang +Reviewed-by: Heiner Kallweit +Link: https://lore.kernel.org/r/20221129161244.5356-1-claudiajkang@gmail.com +Signed-off-by: Paolo Abeni +Stable-dep-of: 621735f59064 ("r8169: fix rare issue with broken rx after link-down on RTL8125") +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/realtek/r8169_main.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c +index fca2dbdd37aff..9676d599b5ba0 100644 +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -6293,12 +6293,13 @@ static void rtl8169_rx_missed(struct net_device *dev) + static void r8169_phylink_handler(struct net_device *ndev) + { + struct rtl8169_private *tp = netdev_priv(ndev); ++ struct device *d = tp_to_dev(tp); + + if (netif_carrier_ok(ndev)) { + rtl_link_chg_patch(tp); +- pm_request_resume(&tp->pci_dev->dev); ++ pm_request_resume(d); + } else { +- pm_runtime_idle(&tp->pci_dev->dev); ++ pm_runtime_idle(d); + } + + if (net_ratelimit()) +-- +2.42.0 + diff --git a/queue-5.4/rdma-hfi1-workaround-truncation-compilation-error.patch b/queue-5.4/rdma-hfi1-workaround-truncation-compilation-error.patch new file mode 100644 index 00000000000..8f891049be2 --- /dev/null +++ b/queue-5.4/rdma-hfi1-workaround-truncation-compilation-error.patch @@ -0,0 +1,57 @@ +From b409b784e089cf0929701a8cf9069d84d4ea422a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 24 Oct 2023 18:07:31 +0300 +Subject: RDMA/hfi1: Workaround truncation compilation error +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Leon Romanovsky + +[ Upstream commit d4b2d165714c0ce8777d5131f6e0aad617b7adc4 ] + +Increase name array to be large enough to overcome the following +compilation error. + +drivers/infiniband/hw/hfi1/efivar.c: In function ‘read_hfi1_efi_var’: +drivers/infiniband/hw/hfi1/efivar.c:124:44: error: ‘snprintf’ output may be truncated before the last format character [-Werror=format-truncation=] + 124 | snprintf(name, sizeof(name), "%s-%s", prefix_name, kind); + | ^ +drivers/infiniband/hw/hfi1/efivar.c:124:9: note: ‘snprintf’ output 2 or more bytes (assuming 65) into a destination of size 64 + 124 | snprintf(name, sizeof(name), "%s-%s", prefix_name, kind); + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +drivers/infiniband/hw/hfi1/efivar.c:133:52: error: ‘snprintf’ output may be truncated before the last format character [-Werror=format-truncation=] + 133 | snprintf(name, sizeof(name), "%s-%s", prefix_name, kind); + | ^ +drivers/infiniband/hw/hfi1/efivar.c:133:17: note: ‘snprintf’ output 2 or more bytes (assuming 65) into a destination of size 64 + 133 | snprintf(name, sizeof(name), "%s-%s", prefix_name, kind); + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +cc1: all warnings being treated as errors +make[6]: *** [scripts/Makefile.build:243: drivers/infiniband/hw/hfi1/efivar.o] Error 1 + +Fixes: c03c08d50b3d ("IB/hfi1: Check upper-case EFI variables") +Signed-off-by: Leon Romanovsky +Link: https://lore.kernel.org/r/238fa39a8fd60e87a5ad7e1ca6584fcdf32e9519.1698159993.git.leonro@nvidia.com +Acked-by: Dennis Dalessandro +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/hfi1/efivar.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/infiniband/hw/hfi1/efivar.c b/drivers/infiniband/hw/hfi1/efivar.c +index d106d23016ba0..75e39e403a581 100644 +--- a/drivers/infiniband/hw/hfi1/efivar.c ++++ b/drivers/infiniband/hw/hfi1/efivar.c +@@ -152,7 +152,7 @@ int read_hfi1_efi_var(struct hfi1_devdata *dd, const char *kind, + unsigned long *size, void **return_data) + { + char prefix_name[64]; +- char name[64]; ++ char name[128]; + int result; + int i; + +-- +2.42.0 + diff --git a/queue-5.4/regmap-debugfs-fix-a-erroneous-check-after-snprintf.patch b/queue-5.4/regmap-debugfs-fix-a-erroneous-check-after-snprintf.patch new file mode 100644 index 00000000000..da2cf8db81e --- /dev/null +++ b/queue-5.4/regmap-debugfs-fix-a-erroneous-check-after-snprintf.patch @@ -0,0 +1,37 @@ +From 7ed3066e2fdb826abdfce37f2f0ba02525f0d3c8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 4 Sep 2023 22:04:06 +0200 +Subject: regmap: debugfs: Fix a erroneous check after snprintf() + +From: Christophe JAILLET + +[ Upstream commit d3601857e14de6369f00ae19564f1d817d175d19 ] + +This error handling looks really strange. +Check if the string has been truncated instead. + +Fixes: f0c2319f9f19 ("regmap: Expose the driver name in debugfs") +Signed-off-by: Christophe JAILLET +Link: https://lore.kernel.org/r/8595de2462c490561f70020a6d11f4d6b652b468.1693857825.git.christophe.jaillet@wanadoo.fr +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/base/regmap/regmap-debugfs.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/base/regmap/regmap-debugfs.c b/drivers/base/regmap/regmap-debugfs.c +index 4f2ff1b2b4502..214d19d1337d3 100644 +--- a/drivers/base/regmap/regmap-debugfs.c ++++ b/drivers/base/regmap/regmap-debugfs.c +@@ -49,7 +49,7 @@ static ssize_t regmap_name_read_file(struct file *file, + name = map->dev->driver->name; + + ret = snprintf(buf, PAGE_SIZE, "%s\n", name); +- if (ret < 0) { ++ if (ret >= PAGE_SIZE) { + kfree(buf); + return ret; + } +-- +2.42.0 + diff --git a/queue-5.4/regmap-prevent-noinc-writes-from-clobbering-cache.patch b/queue-5.4/regmap-prevent-noinc-writes-from-clobbering-cache.patch new file mode 100644 index 00000000000..f78d2213dfe --- /dev/null +++ b/queue-5.4/regmap-prevent-noinc-writes-from-clobbering-cache.patch @@ -0,0 +1,57 @@ +From be84ba88850accb1f325cbe94e524d5cd25398f1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 Nov 2023 10:29:27 -0400 +Subject: regmap: prevent noinc writes from clobbering cache + +From: Ben Wolsieffer + +[ Upstream commit 984a4afdc87a1fc226fd657b1cd8255c13d3fc1a ] + +Currently, noinc writes are cached as if they were standard incrementing +writes, overwriting unrelated register values in the cache. Instead, we +want to cache the last value written to the register, as is done in the +accelerated noinc handler (regmap_noinc_readwrite). + +Fixes: cdf6b11daa77 ("regmap: Add regmap_noinc_write API") +Signed-off-by: Ben Wolsieffer +Link: https://lore.kernel.org/r/20231101142926.2722603-2-ben.wolsieffer@hefring.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/base/regmap/regmap.c | 16 +++++++++------- + 1 file changed, 9 insertions(+), 7 deletions(-) + +diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c +index b5974cbbe78f6..23574c328616f 100644 +--- a/drivers/base/regmap/regmap.c ++++ b/drivers/base/regmap/regmap.c +@@ -1495,17 +1495,19 @@ static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg, + } + + if (!map->cache_bypass && map->format.parse_val) { +- unsigned int ival; ++ unsigned int ival, offset; + int val_bytes = map->format.val_bytes; +- for (i = 0; i < val_len / val_bytes; i++) { +- ival = map->format.parse_val(val + (i * val_bytes)); +- ret = regcache_write(map, +- reg + regmap_get_offset(map, i), +- ival); ++ ++ /* Cache the last written value for noinc writes */ ++ i = noinc ? val_len - val_bytes : 0; ++ for (; i < val_len; i += val_bytes) { ++ ival = map->format.parse_val(val + i); ++ offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes); ++ ret = regcache_write(map, reg + offset, ival); + if (ret) { + dev_err(map->dev, + "Error in caching of register: %x ret: %d\n", +- reg + regmap_get_offset(map, i), ret); ++ reg + offset, ret); + return ret; + } + } +-- +2.42.0 + diff --git a/queue-5.4/rtc-pcf85363-fix-wrong-mask-val-parameters-in-regmap.patch b/queue-5.4/rtc-pcf85363-fix-wrong-mask-val-parameters-in-regmap.patch new file mode 100644 index 00000000000..fbb05a35a01 --- /dev/null +++ b/queue-5.4/rtc-pcf85363-fix-wrong-mask-val-parameters-in-regmap.patch @@ -0,0 +1,43 @@ +From 0d829db39ada9257a46425cc0a590c4ab6cacaa1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 13 Oct 2023 16:34:21 +0200 +Subject: rtc: pcf85363: fix wrong mask/val parameters in regmap_update_bits + call + +From: Javier Carrasco + +[ Upstream commit 2be36c09b6b07306be33519e1aa70d2e2a2161bb ] + +The current implementation passes PIN_IO_INTA_OUT (2) as a mask and +PIN_IO_INTAPM (GENMASK(1, 0)) as a value. +Swap the variables to assign mask and value the right way. + +This error was first introduced with the alarm support. For better or +worse it worked as expected because 0x02 was applied as a mask to 0x03, +resulting 0x02 anyway. This will of course not work for any other value. + +Fixes: e5aac267a10a ("rtc: pcf85363: add alarm support") +Signed-off-by: Javier Carrasco +Link: https://lore.kernel.org/r/20231013-topic-pcf85363_regmap_update_bits-v1-1-c454f016f71f@gmail.com +Signed-off-by: Alexandre Belloni +Signed-off-by: Sasha Levin +--- + drivers/rtc/rtc-pcf85363.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c +index 3450d615974d5..bb962dce3ab26 100644 +--- a/drivers/rtc/rtc-pcf85363.c ++++ b/drivers/rtc/rtc-pcf85363.c +@@ -407,7 +407,7 @@ static int pcf85363_probe(struct i2c_client *client, + if (client->irq > 0) { + regmap_write(pcf85363->regmap, CTRL_FLAGS, 0); + regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO, +- PIN_IO_INTA_OUT, PIN_IO_INTAPM); ++ PIN_IO_INTAPM, PIN_IO_INTA_OUT); + ret = devm_request_threaded_irq(&client->dev, client->irq, + NULL, pcf85363_rtc_handle_irq, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, +-- +2.42.0 + diff --git a/queue-5.4/sched-rt-provide-migrate_disable-enable-inlines.patch b/queue-5.4/sched-rt-provide-migrate_disable-enable-inlines.patch new file mode 100644 index 00000000000..419fbf89c30 --- /dev/null +++ b/queue-5.4/sched-rt-provide-migrate_disable-enable-inlines.patch @@ -0,0 +1,88 @@ +From 53a038481cd85125b2fe22e622742de944967b77 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 8 Feb 2020 20:48:29 +0100 +Subject: sched/rt: Provide migrate_disable/enable() inlines + +From: Thomas Gleixner + +[ Upstream commit 66630058e56b26b3a9cf2625e250a8c592dd0207 ] + +Code which solely needs to prevent migration of a task uses +preempt_disable()/enable() pairs. This is the only reliable way to do so +as setting the task affinity to a single CPU can be undone by a +setaffinity operation from a different task/process. + +RT provides a seperate migrate_disable/enable() mechanism which does not +disable preemption to achieve the semantic requirements of a (almost) fully +preemptible kernel. + +As it is unclear from looking at a given code path whether the intention is +to disable preemption or migration, introduce migrate_disable/enable() +inline functions which can be used to annotate code which merely needs to +disable migration. Map them to preempt_disable/enable() for now. The RT +substitution will be provided later. + +Code which is annotated that way documents that it has no requirement to +protect against reentrancy of a preempting task. Either this is not +required at all or the call sites are already serialized by other means. + +Signed-off-by: Thomas Gleixner +Signed-off-by: Ingo Molnar +Signed-off-by: Thomas Gleixner +Cc: Peter Zijlstra +Cc: Juri Lelli +Cc: Vincent Guittot +Cc: Dietmar Eggemann +Cc: Steven Rostedt +Cc: Ben Segall +Cc: Mel Gorman +Cc: Sebastian Andrzej Siewior +Link: https://lore.kernel.org/r/878slclv1u.fsf@nanos.tec.linutronix.de +Stable-dep-of: 36c75ce3bd29 ("nd_btt: Make BTT lanes preemptible") +Signed-off-by: Sasha Levin +--- + include/linux/preempt.h | 30 ++++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +diff --git a/include/linux/preempt.h b/include/linux/preempt.h +index bbb68dba37cc8..bc3f1aecaa194 100644 +--- a/include/linux/preempt.h ++++ b/include/linux/preempt.h +@@ -322,4 +322,34 @@ static inline void preempt_notifier_init(struct preempt_notifier *notifier, + + #endif + ++/** ++ * migrate_disable - Prevent migration of the current task ++ * ++ * Maps to preempt_disable() which also disables preemption. Use ++ * migrate_disable() to annotate that the intent is to prevent migration, ++ * but not necessarily preemption. ++ * ++ * Can be invoked nested like preempt_disable() and needs the corresponding ++ * number of migrate_enable() invocations. ++ */ ++static __always_inline void migrate_disable(void) ++{ ++ preempt_disable(); ++} ++ ++/** ++ * migrate_enable - Allow migration of the current task ++ * ++ * Counterpart to migrate_disable(). ++ * ++ * As migrate_disable() can be invoked nested, only the outermost invocation ++ * reenables migration. ++ * ++ * Currently mapped to preempt_enable(). ++ */ ++static __always_inline void migrate_enable(void) ++{ ++ preempt_enable(); ++} ++ + #endif /* __LINUX_PREEMPT_H */ +-- +2.42.0 + diff --git a/queue-5.4/scsi-ufs-core-leave-space-for-0-in-utf8-desc-string.patch b/queue-5.4/scsi-ufs-core-leave-space-for-0-in-utf8-desc-string.patch new file mode 100644 index 00000000000..8f06b4eaeb4 --- /dev/null +++ b/queue-5.4/scsi-ufs-core-leave-space-for-0-in-utf8-desc-string.patch @@ -0,0 +1,48 @@ +From 99b4733a7694849a9d5fa21982dcb72845cb9cae Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 17 Oct 2023 11:20:26 -0700 +Subject: scsi: ufs: core: Leave space for '\0' in utf8 desc string + +From: Daniel Mentz + +[ Upstream commit a75a16c62a2540f11eeae4f2b50e95deefb652ea ] + +utf16s_to_utf8s does not NULL terminate the output string. For us to be +able to add a NULL character when utf16s_to_utf8s returns, we need to make +sure that there is space for such NULL character at the end of the output +buffer. We can achieve this by passing an output buffer size to +utf16s_to_utf8s that is one character less than what we allocated. + +Other call sites of utf16s_to_utf8s appear to be using the same technique +where they artificially reduce the buffer size by one to leave space for a +NULL character or line feed character. + +Fixes: 4b828fe156a6 ("scsi: ufs: revamp string descriptor reading") +Reviewed-by: Mars Cheng +Reviewed-by: Bart Van Assche +Reviewed-by: Yen-lin Lai +Signed-off-by: Daniel Mentz +Link: https://lore.kernel.org/r/20231017182026.2141163-1-danielmentz@google.com +Reviewed-by: Avri Altman +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/ufs/ufshcd.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c +index 9d13226d2324a..363adf489079a 100644 +--- a/drivers/scsi/ufs/ufshcd.c ++++ b/drivers/scsi/ufs/ufshcd.c +@@ -3265,7 +3265,7 @@ int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index, + */ + ret = utf16s_to_utf8s(uc_str->uc, + uc_str->len - QUERY_DESC_HDR_SIZE, +- UTF16_BIG_ENDIAN, str, ascii_len); ++ UTF16_BIG_ENDIAN, str, ascii_len - 1); + + /* replace non-printable or non-ASCII characters with spaces */ + for (i = 0; i < ret; i++) +-- +2.42.0 + diff --git a/queue-5.4/series b/queue-5.4/series index e69de29bb2d..592f3c86d76 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -0,0 +1,107 @@ +vfs-fix-readahead-2-on-block-devices.patch +genirq-matrix-exclude-managed-interrupts-in-irq_matr.patch +i40e-fix-potential-memory-leaks-in-i40e_remove.patch +wifi-iwlwifi-use-fw-rate-for-non-data-frames.patch +tcp-call-tcp_try_undo_recovery-when-an-rtod-tfo-syna.patch +wifi-rtw88-debug-fix-the-null-vs-is_err-bug-for-debu.patch +wifi-mt76-mt7603-rework-fix-rx-pse-hang-check.patch +tcp_metrics-add-missing-barriers-on-delete.patch +tcp_metrics-properly-set-tp-snd_ssthresh-in-tcp_init.patch +tcp_metrics-do-not-create-an-entry-from-tcp_init_met.patch +wifi-rtlwifi-fix-edca-limit-set-by-bt-coexistence.patch +can-dev-can_restart-don-t-crash-kernel-if-carrier-is.patch +can-dev-can_restart-fix-race-condition-between-contr.patch +thermal-core-prevent-potential-string-overflow.patch +r8169-use-tp_to_dev-instead-of-open-code.patch +r8169-fix-rare-issue-with-broken-rx-after-link-down-.patch +chtls-fix-tp-rcv_tstamp-initialization.patch +tcp-remove-one-extra-ktime_get_ns-from-cookie_init_t.patch +tcp-fix-cookie_init_timestamp-overflows.patch +acpi-sysfs-fix-create_pnp_modalias-and-create_of_mod.patch +ipv6-avoid-atomic-fragment-on-gso-packets.patch +net-add-dev_stats_read-helper.patch +ipvlan-properly-track-tx_errors.patch +regmap-debugfs-fix-a-erroneous-check-after-snprintf.patch +clk-qcom-gcc-msm8996-use-array_size-instead-of-speci.patch +clk-qcom-gcc-msm8996-drop-unsupported-clock-sources.patch +clk-qcom-gcc-msm8996-move-clock-parent-tables-down.patch +clk-qcom-gcc-msm8996-use-parent_hws-_data-instead-of.patch +clk-qcom-gcc-msm8996-remove-rpm-bus-clocks.patch +clk-qcom-clk-rcg2-fix-clock-rate-overflow-for-high-p.patch +clk-qcom-gcc-sm8150-use-array_size-instead-of-specif.patch +clk-qcom-gcc-sm8150-fix-gcc_sdcc2_apps_clk_src.patch +clk-imx-select-mxc_clk-for-clk_imx8qxp.patch +clk-keystone-pll-fix-a-couple-null-vs-is_err-checks.patch +clk-npcm7xx-fix-incorrect-kfree.patch +clk-mediatek-clk-mt6779-add-check-for-mtk_alloc_clk_.patch +clk-mediatek-clk-mt6797-add-check-for-mtk_alloc_clk_.patch +clk-mediatek-clk-mt7629-eth-add-check-for-mtk_alloc_.patch +clk-mediatek-clk-mt7629-add-check-for-mtk_alloc_clk_.patch +clk-mediatek-clk-mt2701-add-check-for-mtk_alloc_clk_.patch +platform-x86-wmi-fix-probe-failure-when-failing-to-r.patch +platform-x86-wmi-remove-unnecessary-initializations.patch +platform-x86-wmi-fix-opening-of-char-device.patch +hwmon-coretemp-fix-potentially-truncated-sysfs-attri.patch +drm-rockchip-vop-fix-reset-of-state-in-duplicate-sta.patch +drm-rockchip-vop-fix-call-to-crtc-reset-helper.patch +drm-radeon-possible-buffer-overflow.patch +drm-rockchip-cdn-dp-fix-some-error-handling-paths-in.patch +arm64-dts-qcom-sdm845-mtp-fix-wifi-configuration.patch +arm-dts-qcom-mdm9615-populate-vsdcc-fixed-regulator.patch +soc-qcom-llcc-cleanup-to-get-rid-of-sdm845-specific-.patch +soc-qcom-rename-llcc-slice-to-llcc-qcom.patch +soc-qcom-llcc-handle-a-second-device-without-data-co.patch +firmware-ti_sci-replace-http-links-with-https-ones.patch +firmware-ti_sci-mark-driver-as-non-removable.patch +clk-scmi-free-scmi_clk-allocated-when-the-clocks-wit.patch +hwrng-geode-fix-accessing-registers.patch +libnvdimm-move-region-attribute-group-definition.patch +libnvdimm-move-nd_device_attribute_group-to-device_t.patch +libnvdimm-move-nd_numa_attribute_group-to-device_typ.patch +libnvdimm-move-nd_region_attribute_group-to-device_t.patch +libnvdimm-move-nd_mapping_attribute_group-to-device_.patch +libnvdimm-move-nvdimm_attribute_group-to-device_type.patch +libnvdimm-move-nvdimm_bus_attribute_group-to-device_.patch +libnvdimm-of_pmem-use-devm_kstrdup-instead-of-kstrdu.patch +sched-rt-provide-migrate_disable-enable-inlines.patch +nd_btt-make-btt-lanes-preemptible.patch +crypto-caam-qi2-fix-chacha20-poly1305-self-test-fail.patch +crypto-caam-jr-fix-chacha20-poly1305-self-test-failu.patch +hid-cp2112-use-irqchip-template.patch +hid-cp2112-fix-duplicate-workqueue-initialization.patch +arm-9321-1-memset-cast-the-constant-byte-to-unsigned.patch +ext4-move-ix-sanity-check-to-corrent-position.patch +scsi-ufs-core-leave-space-for-0-in-utf8-desc-string.patch +rdma-hfi1-workaround-truncation-compilation-error.patch +sh-bios-revive-earlyprintk-support.patch +asoc-intel-skylake-fix-mem-leak-when-parsing-uuids-f.patch +asoc-ams-delta.c-use-component-after-check.patch +mfd-dln2-fix-double-put-in-dln2_probe.patch +leds-pwm-simplify-if-condition.patch +leds-pwm-convert-to-atomic-pwm-api.patch +leds-pwm-don-t-disable-the-pwm-when-the-led-should-b.patch +ledtrig-cpu-limit-to-8-cpus.patch +leds-trigger-ledtrig-cpu-fix-output-may-be-truncated.patch +tty-tty_jobctrl-fix-pid-memleak-in-disassociate_ctty.patch +usb-dwc2-fix-possible-null-pointer-dereference-cause.patch +dmaengine-ti-edma-handle-irq_of_parse_and_map-errors.patch +misc-st_core-do-not-call-kfree_skb-under-spin_lock_i.patch +tools-iio-privatize-globals-and-functions-in-iio_gen.patch +tools-iio-iio_generic_buffer-fix-some-integer-type-a.patch +tools-iio-iio_generic_buffer-ensure-alignment.patch +usb-usbip-fix-stub_dev-hub-disconnect.patch +dmaengine-pxa_dma-remove-an-erroneous-bug_on-in-pxad.patch +f2fs-fix-to-initialize-map.m_pblk-in-f2fs_precache_e.patch +modpost-fix-tee-module_device_table-built-on-big-end.patch +powerpc-xive-fix-endian-conversion-size.patch +powerpc-imc-pmu-use-the-correct-spinlock-initializer.patch +powerpc-pseries-fix-potential-memory-leak-in-init_cp.patch +i3c-fix-potential-refcount-leak-in-i3c_master_regist.patch +rtc-pcf85363-fix-wrong-mask-val-parameters-in-regmap.patch +pcmcia-cs-fix-possible-hung-task-and-memory-leak-pcc.patch +pcmcia-ds-fix-refcount-leak-in-pcmcia_device_add.patch +pcmcia-ds-fix-possible-name-leak-in-error-path-in-pc.patch +media-bttv-fix-use-after-free-error-due-to-btv-timeo.patch +media-s3c-camif-avoid-inappropriate-kfree.patch +media-dvb-usb-v2-af9035-fix-missing-unlock.patch +regmap-prevent-noinc-writes-from-clobbering-cache.patch diff --git a/queue-5.4/sh-bios-revive-earlyprintk-support.patch b/queue-5.4/sh-bios-revive-earlyprintk-support.patch new file mode 100644 index 00000000000..b1fbe6ad6eb --- /dev/null +++ b/queue-5.4/sh-bios-revive-earlyprintk-support.patch @@ -0,0 +1,52 @@ +From 6c893fe043fedcc736e2fe58357a8875218d7e5b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 19 Oct 2023 11:46:43 +0200 +Subject: sh: bios: Revive earlyprintk support + +From: Geert Uytterhoeven + +[ Upstream commit 553f7ac78fbb41b2c93ab9b9d78e42274d27daa9 ] + +The SuperH BIOS earlyprintk code is protected by CONFIG_EARLY_PRINTK. +However, when this protection was added, it was missed that SuperH no +longer defines an EARLY_PRINTK config symbol since commit +e76fe57447e88916 ("sh: Remove old early serial console code V2"), so +BIOS earlyprintk can no longer be used. + +Fix this by reviving the EARLY_PRINTK config symbol. + +Fixes: d0380e6c3c0f6edb ("early_printk: consolidate random copies of identical code") +Signed-off-by: Geert Uytterhoeven +Reviewed-by: John Paul Adrian Glaubitz +Link: https://lore.kernel.org/r/c40972dfec3dcc6719808d5df388857360262878.1697708489.git.geert+renesas@glider.be +Signed-off-by: John Paul Adrian Glaubitz +Signed-off-by: Sasha Levin +--- + arch/sh/Kconfig.debug | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug +index 71acd3d9b9e83..dfc784f897972 100644 +--- a/arch/sh/Kconfig.debug ++++ b/arch/sh/Kconfig.debug +@@ -26,6 +26,17 @@ config STACK_DEBUG + every function call and will therefore incur a major + performance hit. Most users should say N. + ++config EARLY_PRINTK ++ bool "Early printk" ++ depends on SH_STANDARD_BIOS ++ help ++ Say Y here to redirect kernel printk messages to the serial port ++ used by the SH-IPL bootloader, starting very early in the boot ++ process and ending when the kernel's serial console is initialised. ++ This option is only useful while porting the kernel to a new machine, ++ when the kernel may crash or hang before the serial console is ++ initialised. If unsure, say N. ++ + config 4KSTACKS + bool "Use 4Kb for kernel stacks instead of 8Kb" + depends on DEBUG_KERNEL && (MMU || BROKEN) && !PAGE_SIZE_64KB +-- +2.42.0 + diff --git a/queue-5.4/soc-qcom-llcc-cleanup-to-get-rid-of-sdm845-specific-.patch b/queue-5.4/soc-qcom-llcc-cleanup-to-get-rid-of-sdm845-specific-.patch new file mode 100644 index 00000000000..ea49b61bbdb --- /dev/null +++ b/queue-5.4/soc-qcom-llcc-cleanup-to-get-rid-of-sdm845-specific-.patch @@ -0,0 +1,361 @@ +From 500dbcffd489dcf8c0071e63455efc966870d845 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 18 Jul 2019 18:32:36 +0530 +Subject: soc: qcom: llcc cleanup to get rid of sdm845 specific driver file + +From: Vivek Gautam + +[ Upstream commit a14b820316e84310b1bad3701a8d4c9159377633 ] + +A single file should suffice the need to program the llcc for +various platforms. Get rid of sdm845 specific driver file to +make way for a more generic driver. + +Signed-off-by: Vivek Gautam +Signed-off-by: Bjorn Andersson +Stable-dep-of: f1a1bc8775b2 ("soc: qcom: llcc: Handle a second device without data corruption") +Signed-off-by: Sasha Levin +--- + drivers/soc/qcom/Kconfig | 14 +--- + drivers/soc/qcom/Makefile | 1 - + drivers/soc/qcom/llcc-sdm845.c | 100 ----------------------------- + drivers/soc/qcom/llcc-slice.c | 60 +++++++++++++++-- + include/linux/soc/qcom/llcc-qcom.h | 57 ++++++---------- + 5 files changed, 77 insertions(+), 155 deletions(-) + delete mode 100644 drivers/soc/qcom/llcc-sdm845.c + +diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig +index 31c44ea139efe..ddcbeb8d05b65 100644 +--- a/drivers/soc/qcom/Kconfig ++++ b/drivers/soc/qcom/Kconfig +@@ -59,17 +59,9 @@ config QCOM_LLCC + select REGMAP_MMIO + help + Qualcomm Technologies, Inc. platform specific +- Last Level Cache Controller(LLCC) driver. This provides interfaces +- to clients that use the LLCC. Say yes here to enable LLCC slice +- driver. +- +-config QCOM_SDM845_LLCC +- tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver" +- depends on QCOM_LLCC +- help +- Say yes here to enable the LLCC driver for SDM845. This provides +- data required to configure LLCC so that clients can start using the +- LLCC slices. ++ Last Level Cache Controller(LLCC) driver for platforms such as, ++ SDM845. This provides interfaces to clients that use the LLCC. ++ Say yes here to enable LLCC slice driver. + + config QCOM_MDT_LOADER + tristate +diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile +index 162788701a771..28d45b2e87e88 100644 +--- a/drivers/soc/qcom/Makefile ++++ b/drivers/soc/qcom/Makefile +@@ -22,6 +22,5 @@ obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o + obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o + obj-$(CONFIG_QCOM_APR) += apr.o + obj-$(CONFIG_QCOM_LLCC) += llcc-slice.o +-obj-$(CONFIG_QCOM_SDM845_LLCC) += llcc-sdm845.o + obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o + obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o +diff --git a/drivers/soc/qcom/llcc-sdm845.c b/drivers/soc/qcom/llcc-sdm845.c +deleted file mode 100644 +index 86600d97c36d3..0000000000000 +--- a/drivers/soc/qcom/llcc-sdm845.c ++++ /dev/null +@@ -1,100 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. +- * +- */ +- +-#include +-#include +-#include +-#include +-#include +- +-/* +- * SCT(System Cache Table) entry contains of the following members: +- * usecase_id: Unique id for the client's use case +- * slice_id: llcc slice id for each client +- * max_cap: The maximum capacity of the cache slice provided in KB +- * priority: Priority of the client used to select victim line for replacement +- * fixed_size: Boolean indicating if the slice has a fixed capacity +- * bonus_ways: Bonus ways are additional ways to be used for any slice, +- * if client ends up using more than reserved cache ways. Bonus +- * ways are allocated only if they are not reserved for some +- * other client. +- * res_ways: Reserved ways for the cache slice, the reserved ways cannot +- * be used by any other client than the one its assigned to. +- * cache_mode: Each slice operates as a cache, this controls the mode of the +- * slice: normal or TCM(Tightly Coupled Memory) +- * probe_target_ways: Determines what ways to probe for access hit. When +- * configured to 1 only bonus and reserved ways are probed. +- * When configured to 0 all ways in llcc are probed. +- * dis_cap_alloc: Disable capacity based allocation for a client +- * retain_on_pc: If this bit is set and client has maintained active vote +- * then the ways assigned to this client are not flushed on power +- * collapse. +- * activate_on_init: Activate the slice immediately after the SCT is programmed +- */ +-#define SCT_ENTRY(uid, sid, mc, p, fs, bway, rway, cmod, ptw, dca, rp, a) \ +- { \ +- .usecase_id = uid, \ +- .slice_id = sid, \ +- .max_cap = mc, \ +- .priority = p, \ +- .fixed_size = fs, \ +- .bonus_ways = bway, \ +- .res_ways = rway, \ +- .cache_mode = cmod, \ +- .probe_target_ways = ptw, \ +- .dis_cap_alloc = dca, \ +- .retain_on_pc = rp, \ +- .activate_on_init = a, \ +- } +- +-static struct llcc_slice_config sdm845_data[] = { +- SCT_ENTRY(LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1), +- SCT_ENTRY(LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_VIDSC1, 3, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_ROTATOR, 4, 563, 2, 1, 0x0, 0x00e, 2, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_VOICE, 5, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_AUDIO, 6, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfc, 0xf00, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_MDM, 8, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_CMPT, 10, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_GPUHTW, 11, 512, 1, 1, 0xc, 0x0, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_GPU, 12, 2304, 1, 0, 0xff0, 0x2, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_MMUHWT, 13, 256, 2, 0, 0x0, 0x1, 0, 0, 1, 0, 1), +- SCT_ENTRY(LLCC_CMPTDMA, 15, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_DISP, 16, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_VIDFW, 17, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_MDMHPFX, 20, 1024, 2, 1, 0x0, 0xf00, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_MDMPNG, 21, 1024, 0, 1, 0x1e, 0x0, 0, 0, 1, 1, 0), +- SCT_ENTRY(LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0), +-}; +- +-static int sdm845_qcom_llcc_remove(struct platform_device *pdev) +-{ +- return qcom_llcc_remove(pdev); +-} +- +-static int sdm845_qcom_llcc_probe(struct platform_device *pdev) +-{ +- return qcom_llcc_probe(pdev, sdm845_data, ARRAY_SIZE(sdm845_data)); +-} +- +-static const struct of_device_id sdm845_qcom_llcc_of_match[] = { +- { .compatible = "qcom,sdm845-llcc", }, +- { } +-}; +- +-static struct platform_driver sdm845_qcom_llcc_driver = { +- .driver = { +- .name = "sdm845-llcc", +- .of_match_table = sdm845_qcom_llcc_of_match, +- }, +- .probe = sdm845_qcom_llcc_probe, +- .remove = sdm845_qcom_llcc_remove, +-}; +-module_platform_driver(sdm845_qcom_llcc_driver); +- +-MODULE_DESCRIPTION("QCOM sdm845 LLCC driver"); +-MODULE_LICENSE("GPL v2"); +diff --git a/drivers/soc/qcom/llcc-slice.c b/drivers/soc/qcom/llcc-slice.c +index 4a6111635f825..19039f19af971 100644 +--- a/drivers/soc/qcom/llcc-slice.c ++++ b/drivers/soc/qcom/llcc-slice.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. + * + */ + +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -46,6 +47,27 @@ + + #define BANK_OFFSET_STRIDE 0x80000 + ++static struct llcc_slice_config sdm845_data[] = { ++ { LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1 }, ++ { LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 }, ++ { LLCC_VIDSC1, 3, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 }, ++ { LLCC_ROTATOR, 4, 563, 2, 1, 0x0, 0x00e, 2, 0, 1, 1, 0 }, ++ { LLCC_VOICE, 5, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++ { LLCC_AUDIO, 6, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++ { LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfc, 0xf00, 0, 0, 1, 1, 0 }, ++ { LLCC_MDM, 8, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++ { LLCC_CMPT, 10, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++ { LLCC_GPUHTW, 11, 512, 1, 1, 0xc, 0x0, 0, 0, 1, 1, 0 }, ++ { LLCC_GPU, 12, 2304, 1, 0, 0xff0, 0x2, 0, 0, 1, 1, 0 }, ++ { LLCC_MMUHWT, 13, 256, 2, 0, 0x0, 0x1, 0, 0, 1, 0, 1 }, ++ { LLCC_CMPTDMA, 15, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++ { LLCC_DISP, 16, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++ { LLCC_VIDFW, 17, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++ { LLCC_MDMHPFX, 20, 1024, 2, 1, 0x0, 0xf00, 0, 0, 1, 1, 0 }, ++ { LLCC_MDMPNG, 21, 1024, 0, 1, 0x1e, 0x0, 0, 0, 1, 1, 0 }, ++ { LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++}; ++ + static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER; + + static struct regmap_config llcc_regmap_config = { +@@ -301,13 +323,12 @@ static int qcom_llcc_cfg_program(struct platform_device *pdev) + return ret; + } + +-int qcom_llcc_remove(struct platform_device *pdev) ++static int qcom_llcc_remove(struct platform_device *pdev) + { + /* Set the global pointer to a error code to avoid referencing it */ + drv_data = ERR_PTR(-ENODEV); + return 0; + } +-EXPORT_SYMBOL_GPL(qcom_llcc_remove); + + static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, + const char *name) +@@ -327,8 +348,8 @@ static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, + return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config); + } + +-int qcom_llcc_probe(struct platform_device *pdev, +- const struct llcc_slice_config *llcc_cfg, u32 sz) ++static int qcom_llcc_probe(struct platform_device *pdev, ++ const struct llcc_slice_config *llcc_cfg, u32 sz) + { + u32 num_banks; + struct device *dev = &pdev->dev; +@@ -408,6 +429,31 @@ int qcom_llcc_probe(struct platform_device *pdev, + drv_data = ERR_PTR(-ENODEV); + return ret; + } +-EXPORT_SYMBOL_GPL(qcom_llcc_probe); ++ ++static int sdm845_qcom_llcc_remove(struct platform_device *pdev) ++{ ++ return qcom_llcc_remove(pdev); ++} ++ ++static int sdm845_qcom_llcc_probe(struct platform_device *pdev) ++{ ++ return qcom_llcc_probe(pdev, sdm845_data, ARRAY_SIZE(sdm845_data)); ++} ++ ++static const struct of_device_id sdm845_qcom_llcc_of_match[] = { ++ { .compatible = "qcom,sdm845-llcc", }, ++ { } ++}; ++ ++static struct platform_driver sdm845_qcom_llcc_driver = { ++ .driver = { ++ .name = "sdm845-llcc", ++ .of_match_table = sdm845_qcom_llcc_of_match, ++ }, ++ .probe = sdm845_qcom_llcc_probe, ++ .remove = sdm845_qcom_llcc_remove, ++}; ++module_platform_driver(sdm845_qcom_llcc_driver); ++ ++MODULE_DESCRIPTION("QCOM sdm845 LLCC driver"); + MODULE_LICENSE("GPL v2"); +-MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller"); +diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h +index eb71a50b8afc8..d5cad6f7953c7 100644 +--- a/include/linux/soc/qcom/llcc-qcom.h ++++ b/include/linux/soc/qcom/llcc-qcom.h +@@ -39,18 +39,27 @@ struct llcc_slice_desc { + + /** + * llcc_slice_config - Data associated with the llcc slice +- * @usecase_id: usecase id for which the llcc slice is used +- * @slice_id: llcc slice id assigned to each slice +- * @max_cap: maximum capacity of the llcc slice +- * @priority: priority of the llcc slice +- * @fixed_size: whether the llcc slice can grow beyond its size +- * @bonus_ways: bonus ways associated with llcc slice +- * @res_ways: reserved ways associated with llcc slice +- * @cache_mode: mode of the llcc slice +- * @probe_target_ways: Probe only reserved and bonus ways on a cache miss +- * @dis_cap_alloc: Disable capacity based allocation +- * @retain_on_pc: Retain through power collapse +- * @activate_on_init: activate the slice on init ++ * @usecase_id: Unique id for the client's use case ++ * @slice_id: llcc slice id for each client ++ * @max_cap: The maximum capacity of the cache slice provided in KB ++ * @priority: Priority of the client used to select victim line for replacement ++ * @fixed_size: Boolean indicating if the slice has a fixed capacity ++ * @bonus_ways: Bonus ways are additional ways to be used for any slice, ++ * if client ends up using more than reserved cache ways. Bonus ++ * ways are allocated only if they are not reserved for some ++ * other client. ++ * @res_ways: Reserved ways for the cache slice, the reserved ways cannot ++ * be used by any other client than the one its assigned to. ++ * @cache_mode: Each slice operates as a cache, this controls the mode of the ++ * slice: normal or TCM(Tightly Coupled Memory) ++ * @probe_target_ways: Determines what ways to probe for access hit. When ++ * configured to 1 only bonus and reserved ways are probed. ++ * When configured to 0 all ways in llcc are probed. ++ * @dis_cap_alloc: Disable capacity based allocation for a client ++ * @retain_on_pc: If this bit is set and client has maintained active vote ++ * then the ways assigned to this client are not flushed on power ++ * collapse. ++ * @activate_on_init: Activate the slice immediately after it is programmed + */ + struct llcc_slice_config { + u32 usecase_id; +@@ -154,20 +163,6 @@ int llcc_slice_activate(struct llcc_slice_desc *desc); + */ + int llcc_slice_deactivate(struct llcc_slice_desc *desc); + +-/** +- * qcom_llcc_probe - program the sct table +- * @pdev: platform device pointer +- * @table: soc sct table +- * @sz: Size of the config table +- */ +-int qcom_llcc_probe(struct platform_device *pdev, +- const struct llcc_slice_config *table, u32 sz); +- +-/** +- * qcom_llcc_remove - remove the sct table +- * @pdev: Platform device pointer +- */ +-int qcom_llcc_remove(struct platform_device *pdev); + #else + static inline struct llcc_slice_desc *llcc_slice_getd(u32 uid) + { +@@ -197,16 +192,6 @@ static inline int llcc_slice_deactivate(struct llcc_slice_desc *desc) + { + return -EINVAL; + } +-static inline int qcom_llcc_probe(struct platform_device *pdev, +- const struct llcc_slice_config *table, u32 sz) +-{ +- return -ENODEV; +-} +- +-static inline int qcom_llcc_remove(struct platform_device *pdev) +-{ +- return -ENODEV; +-} + #endif + + #endif +-- +2.42.0 + diff --git a/queue-5.4/soc-qcom-llcc-handle-a-second-device-without-data-co.patch b/queue-5.4/soc-qcom-llcc-handle-a-second-device-without-data-co.patch new file mode 100644 index 00000000000..1f14481c0f0 --- /dev/null +++ b/queue-5.4/soc-qcom-llcc-handle-a-second-device-without-data-co.patch @@ -0,0 +1,42 @@ +From 0e7944f7c5e133026b3c272f5c30e15bbf36a308 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 26 Sep 2023 10:32:29 +0200 +Subject: soc: qcom: llcc: Handle a second device without data corruption +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +[ Upstream commit f1a1bc8775b26345aba2be278118999e7f661d3d ] + +Usually there is only one llcc device. But if there were a second, even +a failed probe call would modify the global drv_data pointer. So check +if drv_data is valid before overwriting it. + +Signed-off-by: Uwe Kleine-König +Fixes: a3134fb09e0b ("drivers: soc: Add LLCC driver") +Link: https://lore.kernel.org/r/20230926083229.2073890-1-u.kleine-koenig@pengutronix.de +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/soc/qcom/llcc-qcom.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c +index 19039f19af971..431b214975c85 100644 +--- a/drivers/soc/qcom/llcc-qcom.c ++++ b/drivers/soc/qcom/llcc-qcom.c +@@ -356,6 +356,9 @@ static int qcom_llcc_probe(struct platform_device *pdev, + int ret, i; + struct platform_device *llcc_edac; + ++ if (!IS_ERR(drv_data)) ++ return -EBUSY; ++ + drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); + if (!drv_data) { + ret = -ENOMEM; +-- +2.42.0 + diff --git a/queue-5.4/soc-qcom-rename-llcc-slice-to-llcc-qcom.patch b/queue-5.4/soc-qcom-rename-llcc-slice-to-llcc-qcom.patch new file mode 100644 index 00000000000..e34eab6c7a5 --- /dev/null +++ b/queue-5.4/soc-qcom-rename-llcc-slice-to-llcc-qcom.patch @@ -0,0 +1,42 @@ +From eb093634d510da3bc37a369f42cb9e41efe1033f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 18 Jul 2019 18:32:37 +0530 +Subject: soc: qcom: Rename llcc-slice to llcc-qcom + +From: Vivek Gautam + +[ Upstream commit a0e72a5ba48ae9c6449a32130d74506a854b79d2 ] + +The cleaning up was done without changing the driver file name +to ensure a cleaner bisect. Change the file name now to facilitate +making the driver generic in subsequent patch. + +Signed-off-by: Vivek Gautam +Signed-off-by: Bjorn Andersson +Stable-dep-of: f1a1bc8775b2 ("soc: qcom: llcc: Handle a second device without data corruption") +Signed-off-by: Sasha Levin +--- + drivers/soc/qcom/Makefile | 2 +- + drivers/soc/qcom/{llcc-slice.c => llcc-qcom.c} | 0 + 2 files changed, 1 insertion(+), 1 deletion(-) + rename drivers/soc/qcom/{llcc-slice.c => llcc-qcom.c} (100%) + +diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile +index 28d45b2e87e88..2559fe948ce00 100644 +--- a/drivers/soc/qcom/Makefile ++++ b/drivers/soc/qcom/Makefile +@@ -21,6 +21,6 @@ obj-$(CONFIG_QCOM_SMSM) += smsm.o + obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o + obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o + obj-$(CONFIG_QCOM_APR) += apr.o +-obj-$(CONFIG_QCOM_LLCC) += llcc-slice.o ++obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o + obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o + obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o +diff --git a/drivers/soc/qcom/llcc-slice.c b/drivers/soc/qcom/llcc-qcom.c +similarity index 100% +rename from drivers/soc/qcom/llcc-slice.c +rename to drivers/soc/qcom/llcc-qcom.c +-- +2.42.0 + diff --git a/queue-5.4/tcp-call-tcp_try_undo_recovery-when-an-rtod-tfo-syna.patch b/queue-5.4/tcp-call-tcp_try_undo_recovery-when-an-rtod-tfo-syna.patch new file mode 100644 index 00000000000..8bfbad62998 --- /dev/null +++ b/queue-5.4/tcp-call-tcp_try_undo_recovery-when-an-rtod-tfo-syna.patch @@ -0,0 +1,71 @@ +From 7531a34b6506aa09884db62a300becb6fa9b8cf9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 14 Sep 2023 14:36:20 +0000 +Subject: tcp: call tcp_try_undo_recovery when an RTOd TFO SYNACK is ACKed + +From: Aananth V + +[ Upstream commit e326578a21414738de45f77badd332fb00bd0f58 ] + +For passive TCP Fast Open sockets that had SYN/ACK timeout and did not +send more data in SYN_RECV, upon receiving the final ACK in 3WHS, the +congestion state may awkwardly stay in CA_Loss mode unless the CA state +was undone due to TCP timestamp checks. However, if +tcp_rcv_synrecv_state_fastopen() decides not to undo, then we should +enter CA_Open, because at that point we have received an ACK covering +the retransmitted SYNACKs. Currently, the icsk_ca_state is only set to +CA_Open after we receive an ACK for a data-packet. This is because +tcp_ack does not call tcp_fastretrans_alert (and tcp_process_loss) if +!prior_packets + +Note that tcp_process_loss() calls tcp_try_undo_recovery(), so having +tcp_rcv_synrecv_state_fastopen() decide that if we're in CA_Loss we +should call tcp_try_undo_recovery() is consistent with that, and +low risk. + +Fixes: dad8cea7add9 ("tcp: fix TFO SYNACK undo to avoid double-timestamp-undo") +Signed-off-by: Aananth V +Signed-off-by: Neal Cardwell +Signed-off-by: Yuchung Cheng +Reviewed-by: Eric Dumazet +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/ipv4/tcp_input.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c +index c3f227c4c3567..fe5ef114beba5 100644 +--- a/net/ipv4/tcp_input.c ++++ b/net/ipv4/tcp_input.c +@@ -6176,22 +6176,23 @@ static int tcp_rcv_synsent_state_process(struct sock *sk, struct sk_buff *skb, + + static void tcp_rcv_synrecv_state_fastopen(struct sock *sk) + { ++ struct tcp_sock *tp = tcp_sk(sk); + struct request_sock *req; + + /* If we are still handling the SYNACK RTO, see if timestamp ECR allows + * undo. If peer SACKs triggered fast recovery, we can't undo here. + */ +- if (inet_csk(sk)->icsk_ca_state == TCP_CA_Loss) +- tcp_try_undo_loss(sk, false); ++ if (inet_csk(sk)->icsk_ca_state == TCP_CA_Loss && !tp->packets_out) ++ tcp_try_undo_recovery(sk); + + /* Reset rtx states to prevent spurious retransmits_timed_out() */ +- tcp_sk(sk)->retrans_stamp = 0; ++ tp->retrans_stamp = 0; + inet_csk(sk)->icsk_retransmits = 0; + + /* Once we leave TCP_SYN_RECV or TCP_FIN_WAIT_1, + * we no longer need req so release it. + */ +- req = rcu_dereference_protected(tcp_sk(sk)->fastopen_rsk, ++ req = rcu_dereference_protected(tp->fastopen_rsk, + lockdep_sock_is_held(sk)); + reqsk_fastopen_remove(sk, req, false); + +-- +2.42.0 + diff --git a/queue-5.4/tcp-fix-cookie_init_timestamp-overflows.patch b/queue-5.4/tcp-fix-cookie_init_timestamp-overflows.patch new file mode 100644 index 00000000000..a1856a07163 --- /dev/null +++ b/queue-5.4/tcp-fix-cookie_init_timestamp-overflows.patch @@ -0,0 +1,102 @@ +From 0268b599c12d419a8a4bada2c620d12a8b550451 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 20 Oct 2023 12:57:37 +0000 +Subject: tcp: fix cookie_init_timestamp() overflows + +From: Eric Dumazet + +[ Upstream commit 73ed8e03388d16c12fc577e5c700b58a29045a15 ] + +cookie_init_timestamp() is supposed to return a 64bit timestamp +suitable for both TSval determination and setting of skb->tstamp. + +Unfortunately it uses 32bit fields and overflows after +2^32 * 10^6 nsec (~49 days) of uptime. + +Generated TSval are still correct, but skb->tstamp might be set +far away in the past, potentially confusing other layers. + +tcp_ns_to_ts() is changed to return a full 64bit value, +ts and ts_now variables are changed to u64 type, +and TSMASK is removed in favor of shifts operations. + +While we are at it, change this sequence: + ts >>= TSBITS; + ts--; + ts <<= TSBITS; + ts |= options; +to: + ts -= (1UL << TSBITS); + +Fixes: 9a568de4818d ("tcp: switch TCP TS option (RFC 7323) to 1ms clock") +Signed-off-by: Eric Dumazet +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + include/net/tcp.h | 2 +- + net/ipv4/syncookies.c | 20 +++++++------------- + 2 files changed, 8 insertions(+), 14 deletions(-) + +diff --git a/include/net/tcp.h b/include/net/tcp.h +index 2be7d26434180..af67e19eba392 100644 +--- a/include/net/tcp.h ++++ b/include/net/tcp.h +@@ -776,7 +776,7 @@ static inline u32 tcp_time_stamp(const struct tcp_sock *tp) + } + + /* Convert a nsec timestamp into TCP TSval timestamp (ms based currently) */ +-static inline u32 tcp_ns_to_ts(u64 ns) ++static inline u64 tcp_ns_to_ts(u64 ns) + { + return div_u64(ns, NSEC_PER_SEC / TCP_TS_HZ); + } +diff --git a/net/ipv4/syncookies.c b/net/ipv4/syncookies.c +index 88d53d37fbe96..3cc22f776a313 100644 +--- a/net/ipv4/syncookies.c ++++ b/net/ipv4/syncookies.c +@@ -43,7 +43,6 @@ static siphash_key_t syncookie_secret[2] __read_mostly; + * requested/supported by the syn/synack exchange. + */ + #define TSBITS 6 +-#define TSMASK (((__u32)1 << TSBITS) - 1) + + static u32 cookie_hash(__be32 saddr, __be32 daddr, __be16 sport, __be16 dport, + u32 count, int c) +@@ -64,27 +63,22 @@ static u32 cookie_hash(__be32 saddr, __be32 daddr, __be16 sport, __be16 dport, + */ + u64 cookie_init_timestamp(struct request_sock *req, u64 now) + { +- struct inet_request_sock *ireq; +- u32 ts, ts_now = tcp_ns_to_ts(now); ++ const struct inet_request_sock *ireq = inet_rsk(req); ++ u64 ts, ts_now = tcp_ns_to_ts(now); + u32 options = 0; + +- ireq = inet_rsk(req); +- + options = ireq->wscale_ok ? ireq->snd_wscale : TS_OPT_WSCALE_MASK; + if (ireq->sack_ok) + options |= TS_OPT_SACK; + if (ireq->ecn_ok) + options |= TS_OPT_ECN; + +- ts = ts_now & ~TSMASK; ++ ts = (ts_now >> TSBITS) << TSBITS; + ts |= options; +- if (ts > ts_now) { +- ts >>= TSBITS; +- ts--; +- ts <<= TSBITS; +- ts |= options; +- } +- return (u64)ts * (NSEC_PER_SEC / TCP_TS_HZ); ++ if (ts > ts_now) ++ ts -= (1UL << TSBITS); ++ ++ return ts * (NSEC_PER_SEC / TCP_TS_HZ); + } + + +-- +2.42.0 + diff --git a/queue-5.4/tcp-remove-one-extra-ktime_get_ns-from-cookie_init_t.patch b/queue-5.4/tcp-remove-one-extra-ktime_get_ns-from-cookie_init_t.patch new file mode 100644 index 00000000000..6d9b2184010 --- /dev/null +++ b/queue-5.4/tcp-remove-one-extra-ktime_get_ns-from-cookie_init_t.patch @@ -0,0 +1,96 @@ +From c09094d2f36b54b0740f1cee1a195e16fd85a469 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 7 Nov 2019 11:51:18 -0800 +Subject: tcp: Remove one extra ktime_get_ns() from cookie_init_timestamp + +From: Eric Dumazet + +[ Upstream commit 200ecef67b8d09d16ec55f91c92751dcc7a38d40 ] + +tcp_make_synack() already uses tcp_clock_ns(), and can pass +the value to cookie_init_timestamp() to avoid another call +to ktime_get_ns() helper. + +Signed-off-by: Eric Dumazet +Signed-off-by: David S. Miller +Stable-dep-of: 73ed8e03388d ("tcp: fix cookie_init_timestamp() overflows") +Signed-off-by: Sasha Levin +--- + include/net/tcp.h | 12 +++++++++--- + net/ipv4/syncookies.c | 4 ++-- + net/ipv4/tcp_output.c | 2 +- + 3 files changed, 12 insertions(+), 6 deletions(-) + +diff --git a/include/net/tcp.h b/include/net/tcp.h +index 4fcae463ba194..2be7d26434180 100644 +--- a/include/net/tcp.h ++++ b/include/net/tcp.h +@@ -553,7 +553,7 @@ static inline u32 tcp_cookie_time(void) + u32 __cookie_v4_init_sequence(const struct iphdr *iph, const struct tcphdr *th, + u16 *mssp); + __u32 cookie_v4_init_sequence(const struct sk_buff *skb, __u16 *mss); +-u64 cookie_init_timestamp(struct request_sock *req); ++u64 cookie_init_timestamp(struct request_sock *req, u64 now); + bool cookie_timestamp_decode(const struct net *net, + struct tcp_options_received *opt); + bool cookie_ecn_ok(const struct tcp_options_received *opt, +@@ -775,10 +775,16 @@ static inline u32 tcp_time_stamp(const struct tcp_sock *tp) + return div_u64(tp->tcp_mstamp, USEC_PER_SEC / TCP_TS_HZ); + } + ++/* Convert a nsec timestamp into TCP TSval timestamp (ms based currently) */ ++static inline u32 tcp_ns_to_ts(u64 ns) ++{ ++ return div_u64(ns, NSEC_PER_SEC / TCP_TS_HZ); ++} ++ + /* Could use tcp_clock_us() / 1000, but this version uses a single divide */ + static inline u32 tcp_time_stamp_raw(void) + { +- return div_u64(tcp_clock_ns(), NSEC_PER_SEC / TCP_TS_HZ); ++ return tcp_ns_to_ts(tcp_clock_ns()); + } + + void tcp_mstamp_refresh(struct tcp_sock *tp); +@@ -790,7 +796,7 @@ static inline u32 tcp_stamp_us_delta(u64 t1, u64 t0) + + static inline u32 tcp_skb_timestamp(const struct sk_buff *skb) + { +- return div_u64(skb->skb_mstamp_ns, NSEC_PER_SEC / TCP_TS_HZ); ++ return tcp_ns_to_ts(skb->skb_mstamp_ns); + } + + /* provide the departure time in us unit */ +diff --git a/net/ipv4/syncookies.c b/net/ipv4/syncookies.c +index 3f6c9514c7a93..88d53d37fbe96 100644 +--- a/net/ipv4/syncookies.c ++++ b/net/ipv4/syncookies.c +@@ -62,10 +62,10 @@ static u32 cookie_hash(__be32 saddr, __be32 daddr, __be16 sport, __be16 dport, + * Since subsequent timestamps use the normal tcp_time_stamp value, we + * must make sure that the resulting initial timestamp is <= tcp_time_stamp. + */ +-u64 cookie_init_timestamp(struct request_sock *req) ++u64 cookie_init_timestamp(struct request_sock *req, u64 now) + { + struct inet_request_sock *ireq; +- u32 ts, ts_now = tcp_time_stamp_raw(); ++ u32 ts, ts_now = tcp_ns_to_ts(now); + u32 options = 0; + + ireq = inet_rsk(req); +diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c +index 16e0249b11f6c..0107436860171 100644 +--- a/net/ipv4/tcp_output.c ++++ b/net/ipv4/tcp_output.c +@@ -3349,7 +3349,7 @@ struct sk_buff *tcp_make_synack(const struct sock *sk, struct dst_entry *dst, + now = tcp_clock_ns(); + #ifdef CONFIG_SYN_COOKIES + if (unlikely(req->cookie_ts)) +- skb->skb_mstamp_ns = cookie_init_timestamp(req); ++ skb->skb_mstamp_ns = cookie_init_timestamp(req, now); + else + #endif + { +-- +2.42.0 + diff --git a/queue-5.4/tcp_metrics-add-missing-barriers-on-delete.patch b/queue-5.4/tcp_metrics-add-missing-barriers-on-delete.patch new file mode 100644 index 00000000000..79738d44ce4 --- /dev/null +++ b/queue-5.4/tcp_metrics-add-missing-barriers-on-delete.patch @@ -0,0 +1,47 @@ +From 918b8f122e7440550ab3d35b0d171d654c78ff8d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 22 Sep 2023 22:03:53 +0000 +Subject: tcp_metrics: add missing barriers on delete + +From: Eric Dumazet + +[ Upstream commit cbc3a153222805d65f821e10f4f78b6afce06f86 ] + +When removing an item from RCU protected list, we must prevent +store-tearing, using rcu_assign_pointer() or WRITE_ONCE(). + +Fixes: 04f721c671656 ("tcp_metrics: Rewrite tcp_metrics_flush_all") +Signed-off-by: Eric Dumazet +Reviewed-by: David Ahern +Acked-by: Neal Cardwell +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + net/ipv4/tcp_metrics.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/net/ipv4/tcp_metrics.c b/net/ipv4/tcp_metrics.c +index e89e19a6852ce..8e76f932727a1 100644 +--- a/net/ipv4/tcp_metrics.c ++++ b/net/ipv4/tcp_metrics.c +@@ -903,7 +903,7 @@ static void tcp_metrics_flush_all(struct net *net) + match = net ? net_eq(tm_net(tm), net) : + !refcount_read(&tm_net(tm)->count); + if (match) { +- *pp = tm->tcpm_next; ++ rcu_assign_pointer(*pp, tm->tcpm_next); + kfree_rcu(tm, rcu_head); + } else { + pp = &tm->tcpm_next; +@@ -944,7 +944,7 @@ static int tcp_metrics_nl_cmd_del(struct sk_buff *skb, struct genl_info *info) + if (addr_same(&tm->tcpm_daddr, &daddr) && + (!src || addr_same(&tm->tcpm_saddr, &saddr)) && + net_eq(tm_net(tm), net)) { +- *pp = tm->tcpm_next; ++ rcu_assign_pointer(*pp, tm->tcpm_next); + kfree_rcu(tm, rcu_head); + found = true; + } else { +-- +2.42.0 + diff --git a/queue-5.4/tcp_metrics-do-not-create-an-entry-from-tcp_init_met.patch b/queue-5.4/tcp_metrics-do-not-create-an-entry-from-tcp_init_met.patch new file mode 100644 index 00000000000..b7512516177 --- /dev/null +++ b/queue-5.4/tcp_metrics-do-not-create-an-entry-from-tcp_init_met.patch @@ -0,0 +1,39 @@ +From b8920dac6e548a2275e25b2165f8caf29a236815 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 22 Sep 2023 22:03:55 +0000 +Subject: tcp_metrics: do not create an entry from tcp_init_metrics() + +From: Eric Dumazet + +[ Upstream commit a135798e6e200ecb2f864cecca6d257ba278370c ] + +tcp_init_metrics() only wants to get metrics if they were +previously stored in the cache. Creating an entry is adding +useless costs, especially when tcp_no_metrics_save is set. + +Fixes: 51c5d0c4b169 ("tcp: Maintain dynamic metrics in local cache.") +Signed-off-by: Eric Dumazet +Reviewed-by: David Ahern +Acked-by: Neal Cardwell +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + net/ipv4/tcp_metrics.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/ipv4/tcp_metrics.c b/net/ipv4/tcp_metrics.c +index 5077a94fffeaf..627e3be0f754b 100644 +--- a/net/ipv4/tcp_metrics.c ++++ b/net/ipv4/tcp_metrics.c +@@ -474,7 +474,7 @@ void tcp_init_metrics(struct sock *sk) + goto reset; + + rcu_read_lock(); +- tm = tcp_get_metrics(sk, dst, true); ++ tm = tcp_get_metrics(sk, dst, false); + if (!tm) { + rcu_read_unlock(); + goto reset; +-- +2.42.0 + diff --git a/queue-5.4/tcp_metrics-properly-set-tp-snd_ssthresh-in-tcp_init.patch b/queue-5.4/tcp_metrics-properly-set-tp-snd_ssthresh-in-tcp_init.patch new file mode 100644 index 00000000000..8db973df07b --- /dev/null +++ b/queue-5.4/tcp_metrics-properly-set-tp-snd_ssthresh-in-tcp_init.patch @@ -0,0 +1,52 @@ +From 9e11b6eef64a119905d3c05776194e7b19d5e0de Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 22 Sep 2023 22:03:54 +0000 +Subject: tcp_metrics: properly set tp->snd_ssthresh in tcp_init_metrics() + +From: Eric Dumazet + +[ Upstream commit 081480014a64a69d901f8ef1ffdd56d6085cf87e ] + +We need to set tp->snd_ssthresh to TCP_INFINITE_SSTHRESH +in the case tcp_get_metrics() fails for some reason. + +Fixes: 9ad7c049f0f7 ("tcp: RFC2988bis + taking RTT sample from 3WHS for the passive open side") +Signed-off-by: Eric Dumazet +Reviewed-by: David Ahern +Acked-by: Neal Cardwell +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + net/ipv4/tcp_metrics.c | 9 ++++----- + 1 file changed, 4 insertions(+), 5 deletions(-) + +diff --git a/net/ipv4/tcp_metrics.c b/net/ipv4/tcp_metrics.c +index 8e76f932727a1..5077a94fffeaf 100644 +--- a/net/ipv4/tcp_metrics.c ++++ b/net/ipv4/tcp_metrics.c +@@ -466,6 +466,10 @@ void tcp_init_metrics(struct sock *sk) + u32 val, crtt = 0; /* cached RTT scaled by 8 */ + + sk_dst_confirm(sk); ++ /* ssthresh may have been reduced unnecessarily during. ++ * 3WHS. Restore it back to its initial default. ++ */ ++ tp->snd_ssthresh = TCP_INFINITE_SSTHRESH; + if (!dst) + goto reset; + +@@ -484,11 +488,6 @@ void tcp_init_metrics(struct sock *sk) + tp->snd_ssthresh = val; + if (tp->snd_ssthresh > tp->snd_cwnd_clamp) + tp->snd_ssthresh = tp->snd_cwnd_clamp; +- } else { +- /* ssthresh may have been reduced unnecessarily during. +- * 3WHS. Restore it back to its initial default. +- */ +- tp->snd_ssthresh = TCP_INFINITE_SSTHRESH; + } + val = tcp_metric_get(tm, TCP_METRIC_REORDERING); + if (val && tp->reordering != val) +-- +2.42.0 + diff --git a/queue-5.4/thermal-core-prevent-potential-string-overflow.patch b/queue-5.4/thermal-core-prevent-potential-string-overflow.patch new file mode 100644 index 00000000000..9b431001396 --- /dev/null +++ b/queue-5.4/thermal-core-prevent-potential-string-overflow.patch @@ -0,0 +1,47 @@ +From fb13c6aab6220c245be4b531c4597d2e80d54b69 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 7 Oct 2023 11:59:39 +0300 +Subject: thermal: core: prevent potential string overflow + +From: Dan Carpenter + +[ Upstream commit c99626092efca3061b387043d4a7399bf75fbdd5 ] + +The dev->id value comes from ida_alloc() so it's a number between zero +and INT_MAX. If it's too high then these sprintf()s will overflow. + +Fixes: 203d3d4aa482 ("the generic thermal sysfs driver") +Signed-off-by: Dan Carpenter +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +--- + drivers/thermal/thermal_core.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c +index f4490b8120176..450a1eb90af52 100644 +--- a/drivers/thermal/thermal_core.c ++++ b/drivers/thermal/thermal_core.c +@@ -740,7 +740,8 @@ int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz, + if (result) + goto release_ida; + +- sprintf(dev->attr_name, "cdev%d_trip_point", dev->id); ++ snprintf(dev->attr_name, sizeof(dev->attr_name), "cdev%d_trip_point", ++ dev->id); + sysfs_attr_init(&dev->attr.attr); + dev->attr.attr.name = dev->attr_name; + dev->attr.attr.mode = 0444; +@@ -749,7 +750,8 @@ int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz, + if (result) + goto remove_symbol_link; + +- sprintf(dev->weight_attr_name, "cdev%d_weight", dev->id); ++ snprintf(dev->weight_attr_name, sizeof(dev->weight_attr_name), ++ "cdev%d_weight", dev->id); + sysfs_attr_init(&dev->weight_attr.attr); + dev->weight_attr.attr.name = dev->weight_attr_name; + dev->weight_attr.attr.mode = S_IWUSR | S_IRUGO; +-- +2.42.0 + diff --git a/queue-5.4/tools-iio-iio_generic_buffer-ensure-alignment.patch b/queue-5.4/tools-iio-iio_generic_buffer-ensure-alignment.patch new file mode 100644 index 00000000000..42b43840214 --- /dev/null +++ b/queue-5.4/tools-iio-iio_generic_buffer-ensure-alignment.patch @@ -0,0 +1,65 @@ +From 8c132efeaf1f289614ebd2a7558e2e7b15b09bb0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 3 Oct 2023 12:57:47 +0300 +Subject: tools: iio: iio_generic_buffer ensure alignment + +From: Matti Vaittinen + +[ Upstream commit 2d3dff577dd0ea8fe9637a13822f7603c4a881c8 ] + +The iio_generic_buffer can return garbage values when the total size of +scan data is not a multiple of the largest element in the scan. This can be +demonstrated by reading a scan, consisting, for example of one 4-byte and +one 2-byte element, where the 4-byte element is first in the buffer. + +The IIO generic buffer code does not take into account the last two +padding bytes that are needed to ensure that the 4-byte data for next +scan is correctly aligned. + +Add the padding bytes required to align the next sample with the scan size. + +Signed-off-by: Matti Vaittinen +Fixes: e58537ccce73 ("staging: iio: update example application.") +Link: https://lore.kernel.org/r/ZRvlm4ktNLu+qmlf@dc78bmyyyyyyyyyyyyydt-3.rev.dnainternet.fi +Signed-off-by: Jonathan Cameron +Signed-off-by: Sasha Levin +--- + tools/iio/iio_generic_buffer.c | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +diff --git a/tools/iio/iio_generic_buffer.c b/tools/iio/iio_generic_buffer.c +index e38c72fd58ccf..2fd10eab75b53 100644 +--- a/tools/iio/iio_generic_buffer.c ++++ b/tools/iio/iio_generic_buffer.c +@@ -52,9 +52,12 @@ enum autochan { + static unsigned int size_from_channelarray(struct iio_channel_info *channels, int num_channels) + { + unsigned int bytes = 0; +- int i = 0; ++ int i = 0, max = 0; ++ unsigned int misalignment; + + while (i < num_channels) { ++ if (channels[i].bytes > max) ++ max = channels[i].bytes; + if (bytes % channels[i].bytes == 0) + channels[i].location = bytes; + else +@@ -64,6 +67,14 @@ static unsigned int size_from_channelarray(struct iio_channel_info *channels, in + bytes = channels[i].location + channels[i].bytes; + i++; + } ++ /* ++ * We want the data in next sample to also be properly aligned so ++ * we'll add padding at the end if needed. Adding padding only ++ * works for channel data which size is 2^n bytes. ++ */ ++ misalignment = bytes % max; ++ if (misalignment) ++ bytes += max - misalignment; + + return bytes; + } +-- +2.42.0 + diff --git a/queue-5.4/tools-iio-iio_generic_buffer-fix-some-integer-type-a.patch b/queue-5.4/tools-iio-iio_generic_buffer-fix-some-integer-type-a.patch new file mode 100644 index 00000000000..5353a14a19e --- /dev/null +++ b/queue-5.4/tools-iio-iio_generic_buffer-fix-some-integer-type-a.patch @@ -0,0 +1,74 @@ +From 41b1b388e0befa2f622ed0c89da8214e11b0ceb2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jul 2023 09:24:07 +0000 +Subject: tools: iio: iio_generic_buffer: Fix some integer type and calculation + +From: Chenyuan Mi + +[ Upstream commit 49d736313d0975ddeb156f4f59801da833f78b30 ] + +In function size_from_channelarray(), the return value 'bytes' is defined +as int type. However, the calcution of 'bytes' in this function is designed +to use the unsigned int type. So it is necessary to change 'bytes' type to +unsigned int to avoid integer overflow. + +The size_from_channelarray() is called in main() function, its return value +is directly multipled by 'buf_len' and then used as the malloc() parameter. +The 'buf_len' is completely controllable by user, thus a multiplication +overflow may occur here. This could allocate an unexpected small area. + +Signed-off-by: Chenyuan Mi +Link: https://lore.kernel.org/r/20230725092407.62545-1-michenyuan@huawei.com +Signed-off-by: Jonathan Cameron +Stable-dep-of: 2d3dff577dd0 ("tools: iio: iio_generic_buffer ensure alignment") +Signed-off-by: Sasha Levin +--- + tools/iio/iio_generic_buffer.c | 17 +++++++++++++---- + 1 file changed, 13 insertions(+), 4 deletions(-) + +diff --git a/tools/iio/iio_generic_buffer.c b/tools/iio/iio_generic_buffer.c +index 7c72405537770..e38c72fd58ccf 100644 +--- a/tools/iio/iio_generic_buffer.c ++++ b/tools/iio/iio_generic_buffer.c +@@ -49,9 +49,9 @@ enum autochan { + * Has the side effect of filling the channels[i].location values used + * in processing the buffer output. + **/ +-static int size_from_channelarray(struct iio_channel_info *channels, int num_channels) ++static unsigned int size_from_channelarray(struct iio_channel_info *channels, int num_channels) + { +- int bytes = 0; ++ unsigned int bytes = 0; + int i = 0; + + while (i < num_channels) { +@@ -342,7 +342,7 @@ int main(int argc, char **argv) + ssize_t read_size; + int dev_num = -1, trig_num = -1; + char *buffer_access = NULL; +- int scan_size; ++ unsigned int scan_size; + int noevents = 0; + int notrigger = 0; + char *dummy; +@@ -612,7 +612,16 @@ int main(int argc, char **argv) + } + + scan_size = size_from_channelarray(channels, num_channels); +- data = malloc(scan_size * buf_len); ++ ++ size_t total_buf_len = scan_size * buf_len; ++ ++ if (scan_size > 0 && total_buf_len / scan_size != buf_len) { ++ ret = -EFAULT; ++ perror("Integer overflow happened when calculate scan_size * buf_len"); ++ goto error; ++ } ++ ++ data = malloc(total_buf_len); + if (!data) { + ret = -ENOMEM; + goto error; +-- +2.42.0 + diff --git a/queue-5.4/tools-iio-privatize-globals-and-functions-in-iio_gen.patch b/queue-5.4/tools-iio-privatize-globals-and-functions-in-iio_gen.patch new file mode 100644 index 00000000000..90aa9ead8cd --- /dev/null +++ b/queue-5.4/tools-iio-privatize-globals-and-functions-in-iio_gen.patch @@ -0,0 +1,131 @@ +From f27f963a11fc859f4aeaae333095a3bd9e55696a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Feb 2021 12:40:42 +0200 +Subject: tools: iio: privatize globals and functions in iio_generic_buffer.c + file + +From: Alexandru Ardelean + +[ Upstream commit ebe5112535b5cf389ca7d337cf6a0c1d885f9880 ] + +Mostly a tidy-up. +But also helps to understand the limits of scope of these functions and +globals. + +Signed-off-by: Alexandru Ardelean +Link: https://lore.kernel.org/r/20210215104043.91251-24-alexandru.ardelean@analog.com +Signed-off-by: Jonathan Cameron +Stable-dep-of: 2d3dff577dd0 ("tools: iio: iio_generic_buffer ensure alignment") +Signed-off-by: Sasha Levin +--- + tools/iio/iio_generic_buffer.c | 31 +++++++++++++++---------------- + 1 file changed, 15 insertions(+), 16 deletions(-) + +diff --git a/tools/iio/iio_generic_buffer.c b/tools/iio/iio_generic_buffer.c +index 34d63bcebcd28..7c72405537770 100644 +--- a/tools/iio/iio_generic_buffer.c ++++ b/tools/iio/iio_generic_buffer.c +@@ -49,7 +49,7 @@ enum autochan { + * Has the side effect of filling the channels[i].location values used + * in processing the buffer output. + **/ +-int size_from_channelarray(struct iio_channel_info *channels, int num_channels) ++static int size_from_channelarray(struct iio_channel_info *channels, int num_channels) + { + int bytes = 0; + int i = 0; +@@ -68,7 +68,7 @@ int size_from_channelarray(struct iio_channel_info *channels, int num_channels) + return bytes; + } + +-void print1byte(uint8_t input, struct iio_channel_info *info) ++static void print1byte(uint8_t input, struct iio_channel_info *info) + { + /* + * Shift before conversion to avoid sign extension +@@ -85,7 +85,7 @@ void print1byte(uint8_t input, struct iio_channel_info *info) + } + } + +-void print2byte(uint16_t input, struct iio_channel_info *info) ++static void print2byte(uint16_t input, struct iio_channel_info *info) + { + /* First swap if incorrect endian */ + if (info->be) +@@ -108,7 +108,7 @@ void print2byte(uint16_t input, struct iio_channel_info *info) + } + } + +-void print4byte(uint32_t input, struct iio_channel_info *info) ++static void print4byte(uint32_t input, struct iio_channel_info *info) + { + /* First swap if incorrect endian */ + if (info->be) +@@ -131,7 +131,7 @@ void print4byte(uint32_t input, struct iio_channel_info *info) + } + } + +-void print8byte(uint64_t input, struct iio_channel_info *info) ++static void print8byte(uint64_t input, struct iio_channel_info *info) + { + /* First swap if incorrect endian */ + if (info->be) +@@ -167,9 +167,8 @@ void print8byte(uint64_t input, struct iio_channel_info *info) + * to fill the location offsets. + * @num_channels: number of channels + **/ +-void process_scan(char *data, +- struct iio_channel_info *channels, +- int num_channels) ++static void process_scan(char *data, struct iio_channel_info *channels, ++ int num_channels) + { + int k; + +@@ -238,7 +237,7 @@ static int enable_disable_all_channels(char *dev_dir_name, int enable) + return 0; + } + +-void print_usage(void) ++static void print_usage(void) + { + fprintf(stderr, "Usage: generic_buffer [options]...\n" + "Capture, convert and output data from IIO device buffer\n" +@@ -257,12 +256,12 @@ void print_usage(void) + " -w Set delay between reads in us (event-less mode)\n"); + } + +-enum autochan autochannels = AUTOCHANNELS_DISABLED; +-char *dev_dir_name = NULL; +-char *buf_dir_name = NULL; +-bool current_trigger_set = false; ++static enum autochan autochannels = AUTOCHANNELS_DISABLED; ++static char *dev_dir_name = NULL; ++static char *buf_dir_name = NULL; ++static bool current_trigger_set = false; + +-void cleanup(void) ++static void cleanup(void) + { + int ret; + +@@ -294,14 +293,14 @@ void cleanup(void) + } + } + +-void sig_handler(int signum) ++static void sig_handler(int signum) + { + fprintf(stderr, "Caught signal %d\n", signum); + cleanup(); + exit(-signum); + } + +-void register_cleanup(void) ++static void register_cleanup(void) + { + struct sigaction sa = { .sa_handler = sig_handler }; + const int signums[] = { SIGINT, SIGTERM, SIGABRT }; +-- +2.42.0 + diff --git a/queue-5.4/tty-tty_jobctrl-fix-pid-memleak-in-disassociate_ctty.patch b/queue-5.4/tty-tty_jobctrl-fix-pid-memleak-in-disassociate_ctty.patch new file mode 100644 index 00000000000..2f365631a96 --- /dev/null +++ b/queue-5.4/tty-tty_jobctrl-fix-pid-memleak-in-disassociate_ctty.patch @@ -0,0 +1,117 @@ +From 20be3cc3cc58bc58d6152b975f24715cca91870f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 31 Aug 2023 10:33:29 +0800 +Subject: tty: tty_jobctrl: fix pid memleak in disassociate_ctty() + +From: Yi Yang + +[ Upstream commit 11e7f27b79757b6586645d87b95d5b78375ecdfc ] + +There is a pid leakage: +------------------------------ +unreferenced object 0xffff88810c181940 (size 224): + comm "sshd", pid 8191, jiffies 4294946950 (age 524.570s) + hex dump (first 32 bytes): + 01 00 00 00 00 00 00 00 00 00 00 00 ad 4e ad de .............N.. + ff ff ff ff 6b 6b 6b 6b ff ff ff ff ff ff ff ff ....kkkk........ + backtrace: + [] kmem_cache_alloc+0x5c6/0x9b0 + [] alloc_pid+0x72/0x570 + [] copy_process+0x1374/0x2470 + [] kernel_clone+0xb7/0x900 + [] __se_sys_clone+0x85/0xb0 + [] __x64_sys_clone+0x2b/0x30 + [] do_syscall_64+0x32/0x80 + [] entry_SYSCALL_64_after_hwframe+0x61/0xc6 + +It turns out that there is a race condition between disassociate_ctty() and +tty_signal_session_leader(), which caused this leakage. + +The pid memleak is triggered by the following race: +task[sshd] task[bash] +----------------------- ----------------------- + disassociate_ctty(); + spin_lock_irq(¤t->sighand->siglock); + put_pid(current->signal->tty_old_pgrp); + current->signal->tty_old_pgrp = NULL; + tty = tty_kref_get(current->signal->tty); + spin_unlock_irq(¤t->sighand->siglock); +tty_vhangup(); +tty_lock(tty); +... +tty_signal_session_leader(); +spin_lock_irq(&p->sighand->siglock); +... +if (tty->ctrl.pgrp) //tty->ctrl.pgrp is not NULL +p->signal->tty_old_pgrp = get_pid(tty->ctrl.pgrp); //An extra get +spin_unlock_irq(&p->sighand->siglock); +... +tty_unlock(tty); + if (tty) { + tty_lock(tty); + ... + put_pid(tty->ctrl.pgrp); + tty->ctrl.pgrp = NULL; //It's too late + ... + tty_unlock(tty); + } + +The issue is believed to be introduced by commit c8bcd9c5be24 ("tty: +Fix ->session locking") who moves the unlock of siglock in +disassociate_ctty() above "if (tty)", making a small window allowing +tty_signal_session_leader() to kick in. It can be easily reproduced by +adding a delay before "if (tty)" and at the entrance of +tty_signal_session_leader(). + +To fix this issue, we move "put_pid(current->signal->tty_old_pgrp)" after +"tty->ctrl.pgrp = NULL". + +Fixes: c8bcd9c5be24 ("tty: Fix ->session locking") +Signed-off-by: Yi Yang +Co-developed-by: GUO Zihua +Signed-off-by: GUO Zihua +Link: https://lore.kernel.org/r/20230831023329.165737-1-yiyang13@huawei.com +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +--- + drivers/tty/tty_jobctrl.c | 17 +++++++++++------ + 1 file changed, 11 insertions(+), 6 deletions(-) + +diff --git a/drivers/tty/tty_jobctrl.c b/drivers/tty/tty_jobctrl.c +index 813be2c052629..c4bf741533abf 100644 +--- a/drivers/tty/tty_jobctrl.c ++++ b/drivers/tty/tty_jobctrl.c +@@ -290,12 +290,7 @@ void disassociate_ctty(int on_exit) + return; + } + +- spin_lock_irq(¤t->sighand->siglock); +- put_pid(current->signal->tty_old_pgrp); +- current->signal->tty_old_pgrp = NULL; +- tty = tty_kref_get(current->signal->tty); +- spin_unlock_irq(¤t->sighand->siglock); +- ++ tty = get_current_tty(); + if (tty) { + unsigned long flags; + +@@ -310,6 +305,16 @@ void disassociate_ctty(int on_exit) + tty_kref_put(tty); + } + ++ /* If tty->ctrl.pgrp is not NULL, it may be assigned to ++ * current->signal->tty_old_pgrp in a race condition, and ++ * cause pid memleak. Release current->signal->tty_old_pgrp ++ * after tty->ctrl.pgrp set to NULL. ++ */ ++ spin_lock_irq(¤t->sighand->siglock); ++ put_pid(current->signal->tty_old_pgrp); ++ current->signal->tty_old_pgrp = NULL; ++ spin_unlock_irq(¤t->sighand->siglock); ++ + /* Now clear signal->tty under the lock */ + read_lock(&tasklist_lock); + session_clear_tty(task_session(current)); +-- +2.42.0 + diff --git a/queue-5.4/usb-dwc2-fix-possible-null-pointer-dereference-cause.patch b/queue-5.4/usb-dwc2-fix-possible-null-pointer-dereference-cause.patch new file mode 100644 index 00000000000..5aedaaec4ca --- /dev/null +++ b/queue-5.4/usb-dwc2-fix-possible-null-pointer-dereference-cause.patch @@ -0,0 +1,69 @@ +From 3c27f6cdb62a27859a77a7b93c1de7c20ecc7415 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 26 Sep 2023 10:44:04 +0800 +Subject: usb: dwc2: fix possible NULL pointer dereference caused by driver + concurrency + +From: Jia-Ju Bai + +[ Upstream commit ef307bc6ef04e8c1ea843231db58e3afaafa9fa6 ] + +In _dwc2_hcd_urb_enqueue(), "urb->hcpriv = NULL" is executed without +holding the lock "hsotg->lock". In _dwc2_hcd_urb_dequeue(): + + spin_lock_irqsave(&hsotg->lock, flags); + ... + if (!urb->hcpriv) { + dev_dbg(hsotg->dev, "## urb->hcpriv is NULL ##\n"); + goto out; + } + rc = dwc2_hcd_urb_dequeue(hsotg, urb->hcpriv); // Use urb->hcpriv + ... +out: + spin_unlock_irqrestore(&hsotg->lock, flags); + +When _dwc2_hcd_urb_enqueue() and _dwc2_hcd_urb_dequeue() are +concurrently executed, the NULL check of "urb->hcpriv" can be executed +before "urb->hcpriv = NULL". After urb->hcpriv is NULL, it can be used +in the function call to dwc2_hcd_urb_dequeue(), which can cause a NULL +pointer dereference. + +This possible bug is found by an experimental static analysis tool +developed by myself. This tool analyzes the locking APIs to extract +function pairs that can be concurrently executed, and then analyzes the +instructions in the paired functions to identify possible concurrency +bugs including data races and atomicity violations. The above possible +bug is reported, when my tool analyzes the source code of Linux 6.5. + +To fix this possible bug, "urb->hcpriv = NULL" should be executed with +holding the lock "hsotg->lock". After using this patch, my tool never +reports the possible bug, with the kernelconfiguration allyesconfig for +x86_64. Because I have no associated hardware, I cannot test the patch +in runtime testing, and just verify it according to the code logic. + +Fixes: 33ad261aa62b ("usb: dwc2: host: spinlock urb_enqueue") +Signed-off-by: Jia-Ju Bai +Link: https://lore.kernel.org/r/20230926024404.832096-1-baijiaju@buaa.edu.cn +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +--- + drivers/usb/dwc2/hcd.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c +index a412ef67af18d..7b8dee3087f35 100644 +--- a/drivers/usb/dwc2/hcd.c ++++ b/drivers/usb/dwc2/hcd.c +@@ -4684,8 +4684,8 @@ static int _dwc2_hcd_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, + if (qh_allocated && qh->channel && qh->channel->qh == qh) + qh->channel->qh = NULL; + fail2: +- spin_unlock_irqrestore(&hsotg->lock, flags); + urb->hcpriv = NULL; ++ spin_unlock_irqrestore(&hsotg->lock, flags); + kfree(qtd); + fail1: + if (qh_allocated) { +-- +2.42.0 + diff --git a/queue-5.4/usb-usbip-fix-stub_dev-hub-disconnect.patch b/queue-5.4/usb-usbip-fix-stub_dev-hub-disconnect.patch new file mode 100644 index 00000000000..3387e710407 --- /dev/null +++ b/queue-5.4/usb-usbip-fix-stub_dev-hub-disconnect.patch @@ -0,0 +1,46 @@ +From be7a9ffe8081f425f0532ee74111abdfb9997a8c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Jun 2023 11:28:10 +0200 +Subject: USB: usbip: fix stub_dev hub disconnect + +From: Jonas Blixt + +[ Upstream commit 97475763484245916735a1aa9a3310a01d46b008 ] + +If a hub is disconnected that has device(s) that's attached to the usbip layer +the disconnect function might fail because it tries to release the port +on an already disconnected hub. + +Fixes: 6080cd0e9239 ("staging: usbip: claim ports used by shared devices") +Signed-off-by: Jonas Blixt +Acked-by: Shuah Khan +Link: https://lore.kernel.org/r/20230615092810.1215490-1-jonas.blixt@actia.se +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +--- + drivers/usb/usbip/stub_dev.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/drivers/usb/usbip/stub_dev.c b/drivers/usb/usbip/stub_dev.c +index 3c6d452e3bf40..4104eea03e806 100644 +--- a/drivers/usb/usbip/stub_dev.c ++++ b/drivers/usb/usbip/stub_dev.c +@@ -462,8 +462,13 @@ static void stub_disconnect(struct usb_device *udev) + /* release port */ + rc = usb_hub_release_port(udev->parent, udev->portnum, + (struct usb_dev_state *) udev); +- if (rc) { +- dev_dbg(&udev->dev, "unable to release port\n"); ++ /* ++ * NOTE: If a HUB disconnect triggered disconnect of the down stream ++ * device usb_hub_release_port will return -ENODEV so we can safely ignore ++ * that error here. ++ */ ++ if (rc && (rc != -ENODEV)) { ++ dev_dbg(&udev->dev, "unable to release port (%i)\n", rc); + return; + } + +-- +2.42.0 + diff --git a/queue-5.4/vfs-fix-readahead-2-on-block-devices.patch b/queue-5.4/vfs-fix-readahead-2-on-block-devices.patch new file mode 100644 index 00000000000..afd7cf5865f --- /dev/null +++ b/queue-5.4/vfs-fix-readahead-2-on-block-devices.patch @@ -0,0 +1,43 @@ +From fd697111b1abf144c424a7c2469ea2c6739da946 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 2 Oct 2023 20:57:04 -0500 +Subject: vfs: fix readahead(2) on block devices + +From: Reuben Hawkins + +[ Upstream commit 7116c0af4b8414b2f19fdb366eea213cbd9d91c2 ] + +Readahead was factored to call generic_fadvise. That refactor added an +S_ISREG restriction which broke readahead on block devices. + +In addition to S_ISREG, this change checks S_ISBLK to fix block device +readahead. There is no change in behavior with any file type besides block +devices in this change. + +Fixes: 3d8f7615319b ("vfs: implement readahead(2) using POSIX_FADV_WILLNEED") +Signed-off-by: Reuben Hawkins +Link: https://lore.kernel.org/r/20231003015704.2415-1-reubenhwk@gmail.com +Reviewed-by: Amir Goldstein +Signed-off-by: Christian Brauner +Signed-off-by: Sasha Levin +--- + mm/readahead.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/mm/readahead.c b/mm/readahead.c +index 2fe72cd29b472..95fbc02cae6a7 100644 +--- a/mm/readahead.c ++++ b/mm/readahead.c +@@ -592,7 +592,8 @@ ssize_t ksys_readahead(int fd, loff_t offset, size_t count) + */ + ret = -EINVAL; + if (!f.file->f_mapping || !f.file->f_mapping->a_ops || +- !S_ISREG(file_inode(f.file)->i_mode)) ++ (!S_ISREG(file_inode(f.file)->i_mode) && ++ !S_ISBLK(file_inode(f.file)->i_mode))) + goto out; + + ret = vfs_fadvise(f.file, offset, count, POSIX_FADV_WILLNEED); +-- +2.42.0 + diff --git a/queue-5.4/wifi-iwlwifi-use-fw-rate-for-non-data-frames.patch b/queue-5.4/wifi-iwlwifi-use-fw-rate-for-non-data-frames.patch new file mode 100644 index 00000000000..69c8b65262b --- /dev/null +++ b/queue-5.4/wifi-iwlwifi-use-fw-rate-for-non-data-frames.patch @@ -0,0 +1,64 @@ +From 56502033b1691507df050e88d1297e04fb81ed15 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Sep 2023 14:56:45 +0300 +Subject: wifi: iwlwifi: Use FW rate for non-data frames + +From: Miri Korenblit + +[ Upstream commit 499d02790495958506a64f37ceda7e97345a50a8 ] + +Currently we are setting the rate in the tx cmd for +mgmt frames (e.g. during connection establishment). +This was problematic when sending mgmt frames in eSR mode, +as we don't know what link this frame will be sent on +(This is decided by the FW), so we don't know what is the +lowest rate. +Fix this by not setting the rate in tx cmd and rely +on FW to choose the right one. +Set rate only for injected frames with fixed rate, +or when no sta is given. +Also set for important frames (EAPOL etc.) the High Priority flag. + +Fixes: 055b22e770dd ("iwlwifi: mvm: Set Tx rate and flags when there is not station") +Signed-off-by: Miri Korenblit +Signed-off-by: Gregory Greenman +Link: https://lore.kernel.org/r/20230913145231.6c7e59620ee0.I6eaed3ccdd6dd62b9e664facc484081fc5275843@changeid +Signed-off-by: Johannes Berg +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/intel/iwlwifi/mvm/tx.c | 14 +++++++++----- + 1 file changed, 9 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/tx.c b/drivers/net/wireless/intel/iwlwifi/mvm/tx.c +index 9a81ce299d0d1..fbcd46aedade3 100644 +--- a/drivers/net/wireless/intel/iwlwifi/mvm/tx.c ++++ b/drivers/net/wireless/intel/iwlwifi/mvm/tx.c +@@ -529,16 +529,20 @@ iwl_mvm_set_tx_params(struct iwl_mvm *mvm, struct sk_buff *skb, + flags |= IWL_TX_FLAGS_ENCRYPT_DIS; + + /* +- * For data packets rate info comes from the fw. Only +- * set rate/antenna during connection establishment or in case +- * no station is given. ++ * For data and mgmt packets rate info comes from the fw. Only ++ * set rate/antenna for injected frames with fixed rate, or ++ * when no sta is given. + */ +- if (!sta || !ieee80211_is_data(hdr->frame_control) || +- mvmsta->sta_state < IEEE80211_STA_AUTHORIZED) { ++ if (unlikely(!sta || ++ info->control.flags & IEEE80211_TX_CTRL_RATE_INJECT)) { + flags |= IWL_TX_FLAGS_CMD_RATE; + rate_n_flags = + iwl_mvm_get_tx_rate_n_flags(mvm, info, sta, + hdr->frame_control); ++ } else if (!ieee80211_is_data(hdr->frame_control) || ++ mvmsta->sta_state < IEEE80211_STA_AUTHORIZED) { ++ /* These are important frames */ ++ flags |= IWL_TX_FLAGS_HIGH_PRI; + } + + if (mvm->trans->trans_cfg->device_family >= +-- +2.42.0 + diff --git a/queue-5.4/wifi-mt76-mt7603-rework-fix-rx-pse-hang-check.patch b/queue-5.4/wifi-mt76-mt7603-rework-fix-rx-pse-hang-check.patch new file mode 100644 index 00000000000..72c508fe122 --- /dev/null +++ b/queue-5.4/wifi-mt76-mt7603-rework-fix-rx-pse-hang-check.patch @@ -0,0 +1,87 @@ +From a5270843ced6e21840f2f25cb79c9a6a71b42127 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Jul 2023 09:51:01 +0200 +Subject: wifi: mt76: mt7603: rework/fix rx pse hang check + +From: Felix Fietkau + +[ Upstream commit baa19b2e4b7bbb509a7ca7939c8785477dcd40ee ] + +It turns out that the code in mt7603_rx_pse_busy() does not detect actual +hardware hangs, it only checks for busy conditions in PSE. +A reset should only be performed if these conditions are true and if there +is no rx activity as well. +Reset the counter whenever a rx interrupt occurs. In order to also deal with +a fully loaded CPU that leaves interrupts disabled with continuous NAPI +polling, also check for pending rx interrupts in the function itself. + +Fixes: c8846e101502 ("mt76: add driver for MT7603E and MT7628/7688") +Signed-off-by: Felix Fietkau +Signed-off-by: Sasha Levin +--- + .../net/wireless/mediatek/mt76/mt7603/core.c | 2 ++ + .../net/wireless/mediatek/mt76/mt7603/mac.c | 23 +++++++++++++------ + 2 files changed, 18 insertions(+), 7 deletions(-) + +diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/core.c b/drivers/net/wireless/mediatek/mt76/mt7603/core.c +index e5af4f3389ccf..47e36937a6ecb 100644 +--- a/drivers/net/wireless/mediatek/mt76/mt7603/core.c ++++ b/drivers/net/wireless/mediatek/mt76/mt7603/core.c +@@ -39,11 +39,13 @@ irqreturn_t mt7603_irq_handler(int irq, void *dev_instance) + } + + if (intr & MT_INT_RX_DONE(0)) { ++ dev->rx_pse_check = 0; + mt7603_irq_disable(dev, MT_INT_RX_DONE(0)); + napi_schedule(&dev->mt76.napi[0]); + } + + if (intr & MT_INT_RX_DONE(1)) { ++ dev->rx_pse_check = 0; + mt7603_irq_disable(dev, MT_INT_RX_DONE(1)); + napi_schedule(&dev->mt76.napi[1]); + } +diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/mac.c b/drivers/net/wireless/mediatek/mt76/mt7603/mac.c +index ff3f3d98b6252..5cfea0d8c7761 100644 +--- a/drivers/net/wireless/mediatek/mt76/mt7603/mac.c ++++ b/drivers/net/wireless/mediatek/mt76/mt7603/mac.c +@@ -1416,20 +1416,29 @@ static bool mt7603_rx_pse_busy(struct mt7603_dev *dev) + { + u32 addr, val; + +- if (mt76_rr(dev, MT_MCU_DEBUG_RESET) & MT_MCU_DEBUG_RESET_QUEUES) +- return true; +- + if (mt7603_rx_fifo_busy(dev)) +- return false; ++ goto out; + + addr = mt7603_reg_map(dev, MT_CLIENT_BASE_PHYS_ADDR + MT_CLIENT_STATUS); + mt76_wr(dev, addr, 3); + val = mt76_rr(dev, addr) >> 16; + +- if (is_mt7628(dev) && (val & 0x4001) == 0x4001) +- return true; ++ if (!(val & BIT(0))) ++ return false; ++ ++ if (is_mt7628(dev)) ++ val &= 0xa000; ++ else ++ val &= 0x8000; ++ if (!val) ++ return false; ++ ++out: ++ if (mt76_rr(dev, MT_INT_SOURCE_CSR) & ++ (MT_INT_RX_DONE(0) | MT_INT_RX_DONE(1))) ++ return false; + +- return (val & 0x8001) == 0x8001 || (val & 0xe001) == 0xe001; ++ return true; + } + + static bool +-- +2.42.0 + diff --git a/queue-5.4/wifi-rtlwifi-fix-edca-limit-set-by-bt-coexistence.patch b/queue-5.4/wifi-rtlwifi-fix-edca-limit-set-by-bt-coexistence.patch new file mode 100644 index 00000000000..61e8505b37c --- /dev/null +++ b/queue-5.4/wifi-rtlwifi-fix-edca-limit-set-by-bt-coexistence.patch @@ -0,0 +1,70 @@ +From 2e8365002ad578d1234e1938c5298d1c3ef4f1e1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 28 Sep 2023 08:23:19 +0300 +Subject: wifi: rtlwifi: fix EDCA limit set by BT coexistence + +From: Dmitry Antipov + +[ Upstream commit 3391ee7f9ea508c375d443cd712c2e699be235b4 ] + +In 'rtl92c_dm_check_edca_turbo()', 'rtl88e_dm_check_edca_turbo()', +and 'rtl8723e_dm_check_edca_turbo()', the DL limit should be set +from the corresponding field of 'rtlpriv->btcoexist' rather than +UL. Compile tested only. + +Fixes: 0529c6b81761 ("rtlwifi: rtl8723ae: Update driver to match 06/28/14 Realtek version") +Fixes: c151aed6aa14 ("rtlwifi: rtl8188ee: Update driver to match Realtek release of 06282014") +Fixes: beb5bc402043 ("rtlwifi: rtl8192c-common: Convert common dynamic management routines for addition of rtl8192se and rtl8192de") +Signed-off-by: Dmitry Antipov +Acked-by: Ping-Ke Shih +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230928052327.120178-1-dmantipov@yandex.ru +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c | 2 +- + drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.c | 2 +- + drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.c | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c b/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c +index 333e355c92817..1ade4bea1d3f2 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c ++++ b/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c +@@ -805,7 +805,7 @@ static void rtl88e_dm_check_edca_turbo(struct ieee80211_hw *hw) + } + + if (rtlpriv->btcoexist.bt_edca_dl != 0) { +- edca_be_ul = rtlpriv->btcoexist.bt_edca_dl; ++ edca_be_dl = rtlpriv->btcoexist.bt_edca_dl; + bt_change_edca = true; + } + +diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.c +index f2908ee5f8601..17680aa8c0bcf 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.c ++++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.c +@@ -640,7 +640,7 @@ static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw) + } + + if (rtlpriv->btcoexist.bt_edca_dl != 0) { +- edca_be_ul = rtlpriv->btcoexist.bt_edca_dl; ++ edca_be_dl = rtlpriv->btcoexist.bt_edca_dl; + bt_change_edca = true; + } + +diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.c b/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.c +index d8260c7afe09e..9afe6aace942e 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.c ++++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.c +@@ -578,7 +578,7 @@ static void rtl8723e_dm_check_edca_turbo(struct ieee80211_hw *hw) + } + + if (rtlpriv->btcoexist.bt_edca_dl != 0) { +- edca_be_ul = rtlpriv->btcoexist.bt_edca_dl; ++ edca_be_dl = rtlpriv->btcoexist.bt_edca_dl; + bt_change_edca = true; + } + +-- +2.42.0 + diff --git a/queue-5.4/wifi-rtw88-debug-fix-the-null-vs-is_err-bug-for-debu.patch b/queue-5.4/wifi-rtw88-debug-fix-the-null-vs-is_err-bug-for-debu.patch new file mode 100644 index 00000000000..b1db8240a1b --- /dev/null +++ b/queue-5.4/wifi-rtw88-debug-fix-the-null-vs-is_err-bug-for-debu.patch @@ -0,0 +1,42 @@ +From 308a58349dfbc799dc74ae7ad5ee8538c9528d25 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 Sep 2023 13:06:50 +0800 +Subject: wifi: rtw88: debug: Fix the NULL vs IS_ERR() bug for + debugfs_create_file() + +From: Jinjie Ruan + +[ Upstream commit 74f7957c9b1b95553faaf146a2553e023a9d1720 ] + +Since debugfs_create_file() return ERR_PTR and never return NULL, so use +IS_ERR() to check it instead of checking NULL. + +Fixes: e3037485c68e ("rtw88: new Realtek 802.11ac driver") +Signed-off-by: Jinjie Ruan +Acked-by: Ping-Ke Shih +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230919050651.962694-1-ruanjinjie@huawei.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/realtek/rtw88/debug.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/wireless/realtek/rtw88/debug.c b/drivers/net/wireless/realtek/rtw88/debug.c +index 5a906101498d9..12d81ad8b7023 100644 +--- a/drivers/net/wireless/realtek/rtw88/debug.c ++++ b/drivers/net/wireless/realtek/rtw88/debug.c +@@ -658,9 +658,9 @@ static struct rtw_debugfs_priv rtw_debug_priv_rsvd_page = { + #define rtw_debugfs_add_core(name, mode, fopname, parent) \ + do { \ + rtw_debug_priv_ ##name.rtwdev = rtwdev; \ +- if (!debugfs_create_file(#name, mode, \ ++ if (IS_ERR(debugfs_create_file(#name, mode, \ + parent, &rtw_debug_priv_ ##name,\ +- &file_ops_ ##fopname)) \ ++ &file_ops_ ##fopname))) \ + pr_debug("Unable to initialize debugfs:%s\n", \ + #name); \ + } while (0) +-- +2.42.0 +