From: Ankit Nautiyal Date: Wed, 27 May 2026 04:10:39 +0000 (+0530) Subject: drm/i915/psr: Add helper to get Async Video timing support in PR active X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=c33185a35f29816bebf41f1e761e511a5db5be7d;p=thirdparty%2Fkernel%2Flinux.git drm/i915/psr: Add helper to get Async Video timing support in PR active Introduce a helper to check if Panel Replay has Async Video Timing support during PR Active state. v2: Confirm that Panel Replay is supported before checking for Async Video Timing Support during PR active. (Ville) Signed-off-by: Ankit Nautiyal Reviewed-by: Ville Syrjälä Link: https://patch.msgid.link/20260527041050.601735-2-ankit.k.nautiyal@intel.com --- diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 5047e3fdc9ff0..138907537d03c 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -4695,3 +4695,14 @@ bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state) return HAS_PSR_TRANS_PUSH_FRAME_CHANGE(display) && crtc_state->has_psr; } + +bool intel_psr_pr_async_video_timing_supported(struct intel_dp *intel_dp) +{ + struct intel_connector *connector = intel_dp->attached_connector; + u8 *dpcd = connector->dp.panel_replay_caps.dpcd; + u8 pr_support = dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_SUPPORT)]; + u8 pr_cap = dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_CAPABILITY)]; + + return (pr_support & DP_PANEL_REPLAY_SUPPORT) && + !(pr_cap & DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR); +} diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 394b641840b39..29723e63888f8 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -86,5 +86,6 @@ void intel_psr_compute_config_late(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state); int intel_psr_min_guardband(struct intel_crtc_state *crtc_state); bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state); +bool intel_psr_pr_async_video_timing_supported(struct intel_dp *intel_dp); #endif /* __INTEL_PSR_H__ */