From: John Linn <john.linn@xilinx.com>
Date: Fri, 1 Jun 2012 21:42:47 +0000 (-0700)
Subject: Xilinx: ARM: fpga: Register the internal PL on DFE targets
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=c6a492fcbb05d901274051e78a8ef2a0bfe10e4c;p=thirdparty%2Fu-boot.git

Xilinx: ARM: fpga: Register the internal PL on DFE targets

If FPGA support is compiled into DFE targets, register the programmable
logic as an fpga target

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
---

diff --git a/board/xilinx/zynq_common/board.c b/board/xilinx/zynq_common/board.c
index 2acb0c2d4a7..5529daa9ef0 100644
--- a/board/xilinx/zynq_common/board.c
+++ b/board/xilinx/zynq_common/board.c
@@ -4,6 +4,8 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <xparameters.h>
+#include <zynqpl.h>
 #include "ps7_init_hw.h"
 #include "xparameters.h"
 
@@ -599,6 +601,10 @@ void from_burst_main(void)
 #endif
 }
 
+#ifdef CONFIG_FPGA
+Xilinx_desc fpga = XILINX_XC7Z020_DESC(0);
+#endif
+
 int board_init(void)
 {
 	/* taken from burst, some DDR/MIO/Clock setup hacked in */
@@ -624,6 +630,11 @@ int board_init(void)
 	init_nor_flash();
 #endif
 
+#ifdef CONFIG_FPGA
+	fpga_init();
+	fpga_add(fpga_xilinx, &fpga);
+#endif
+
 	return 0;
 }