From: Jakub Jelinek <jakub@redhat.com>
Date: Tue, 12 Aug 2014 21:24:40 +0000 (+0200)
Subject: re PR target/62025 (Miscompilation of openssl sha512.c)
X-Git-Tag: releases/gcc-5.1.0~5523
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=c7cf969cdbc688e0e6d486cf62e85be1e4ca4218;p=thirdparty%2Fgcc.git

re PR target/62025 (Miscompilation of openssl sha512.c)

	PR target/62025
	* sched-deps.c (find_inc): Check if inc_insn doesn't clobber
	any registers that are used in mem_insn.

From-SVN: r213887
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 946bc44fb842..e1a4b56e3949 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-08-12  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/62025
+	* sched-deps.c (find_inc): Check if inc_insn doesn't clobber
+	any registers that are used in mem_insn.
+
 2014-08-12  Steve Ellcey  <sellcey@mips.com>
 
 	* config/mips/mips.h (ASM_SPEC): Pass float options to assembler. 
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 51c1a0114968..049927fe6e09 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -4751,6 +4751,24 @@ find_inc (struct mem_inc_info *mii, bool backwards)
 			   "inc conflicts with store failure.\n");
 		goto next;
 	      }
+
+	  /* The inc instruction could have clobbers, make sure those
+	     registers are not used in mem insn.  */
+	  FOR_EACH_INSN_DEF (def, mii->inc_insn)
+	    if (!reg_overlap_mentioned_p (DF_REF_REG (def), mii->mem_reg0))
+	      {
+		df_ref use;
+		FOR_EACH_INSN_USE (use, mii->mem_insn)
+		  if (reg_overlap_mentioned_p (DF_REF_REG (def),
+					       DF_REF_REG (use)))
+		    {
+		      if (sched_verbose >= 5)
+			fprintf (sched_dump,
+				 "inc clobber used in store failure.\n");
+		      goto next;
+		    }
+	      }
+
 	  newaddr = mii->inc_input;
 	  if (mii->mem_index != NULL_RTX)
 	    newaddr = gen_rtx_PLUS (GET_MODE (newaddr), newaddr,