From: Philippe Mathieu-Daudé Date: Tue, 26 Aug 2025 04:42:05 +0000 (+0200) Subject: target/m68k: Remove pointless @cpu_halted TCGv X-Git-Tag: v10.2.0-rc1~61^2~58 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=cb4ca3b358660646db62c256f360598e92c65b97;p=thirdparty%2Fqemu.git target/m68k: Remove pointless @cpu_halted TCGv Avoid registering a TCGv to write the generic CPUState::halted field. Access it directly via @env in both STOP / HALT opcodes. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20250925012454.60602-1-philmd@linaro.org> --- diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 0cee54f490..eb1ba15074 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -44,8 +44,6 @@ #undef DEFO32 #undef DEFO64 -static TCGv_i32 cpu_halted; - static char cpu_reg_names[2 * 8 * 3 + 5 * 4]; static TCGv cpu_dregs[8]; static TCGv cpu_aregs[8]; @@ -77,9 +75,6 @@ void m68k_tcg_init(void) #undef DEFO32 #undef DEFO64 - cpu_halted = tcg_global_mem_new_i32(tcg_env, - -offsetof(M68kCPU, env) + - offsetof(CPUState, halted), "HALTED"); p = cpu_reg_names; for (i = 0; i < 8; i++) { sprintf(p, "D%d", i); @@ -4506,7 +4501,8 @@ DISAS_INSN(halt) gen_exception(s, s->pc, EXCP_SEMIHOSTING); return; } - tcg_gen_movi_i32(cpu_halted, 1); + tcg_gen_st_i32(tcg_constant_i32(1), tcg_env, + offsetof(CPUState, halted) - offsetof(M68kCPU, env)); gen_exception(s, s->pc, EXCP_HLT); } @@ -4522,7 +4518,8 @@ DISAS_INSN(stop) ext = read_im16(env, s); gen_set_sr_im(s, ext, 0); - tcg_gen_movi_i32(cpu_halted, 1); + tcg_gen_st_i32(tcg_constant_i32(1), tcg_env, + offsetof(CPUState, halted) - offsetof(M68kCPU, env)); gen_exception(s, s->pc, EXCP_HLT); }