From: Sasha Levin Date: Sun, 7 Mar 2021 23:08:22 +0000 (-0500) Subject: Fixes for 5.10 X-Git-Tag: v5.4.104~14 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=cd1ce932282dcd79b4f951c391796dab5006da57;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.10 Signed-off-by: Sasha Levin --- diff --git a/queue-5.10/alsa-ctxfi-cthw20k2-fix-mask-on-conf-to-allow-4-bits.patch b/queue-5.10/alsa-ctxfi-cthw20k2-fix-mask-on-conf-to-allow-4-bits.patch new file mode 100644 index 00000000000..5069e4a5018 --- /dev/null +++ b/queue-5.10/alsa-ctxfi-cthw20k2-fix-mask-on-conf-to-allow-4-bits.patch @@ -0,0 +1,46 @@ +From 780cc3cfe9b89197bfdc03be4b346f66ba392db1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 27 Feb 2021 00:15:27 +0000 +Subject: ALSA: ctxfi: cthw20k2: fix mask on conf to allow 4 bits + +From: Colin Ian King + +[ Upstream commit 26a9630c72ebac7c564db305a6aee54a8edde70e ] + +Currently the mask operation on variable conf is just 3 bits so +the switch statement case value of 8 is unreachable dead code. +The function daio_mgr_dao_init can be passed a 4 bit value, +function dao_rsc_init calls it with conf set to: + + conf = (desc->msr & 0x7) | (desc->passthru << 3); + +so clearly when desc->passthru is set to 1 then conf can be +at least 8. + +Fix this by changing the mask to 0xf. + +Fixes: 8cc72361481f ("ALSA: SB X-Fi driver merge") +Signed-off-by: Colin Ian King +Link: https://lore.kernel.org/r/20210227001527.1077484-1-colin.king@canonical.com +Signed-off-by: Takashi Iwai +Signed-off-by: Sasha Levin +--- + sound/pci/ctxfi/cthw20k2.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/pci/ctxfi/cthw20k2.c b/sound/pci/ctxfi/cthw20k2.c +index fc1bc18caee9..85d1fc76f59e 100644 +--- a/sound/pci/ctxfi/cthw20k2.c ++++ b/sound/pci/ctxfi/cthw20k2.c +@@ -991,7 +991,7 @@ static int daio_mgr_dao_init(void *blk, unsigned int idx, unsigned int conf) + + if (idx < 4) { + /* S/PDIF output */ +- switch ((conf & 0x7)) { ++ switch ((conf & 0xf)) { + case 1: + set_field(&ctl->txctl[idx], ATXCTL_NUC, 0); + break; +-- +2.30.1 + diff --git a/queue-5.10/alsa-hda-intel-nhlt-verify-config-type.patch b/queue-5.10/alsa-hda-intel-nhlt-verify-config-type.patch new file mode 100644 index 00000000000..7d70fd131ed --- /dev/null +++ b/queue-5.10/alsa-hda-intel-nhlt-verify-config-type.patch @@ -0,0 +1,143 @@ +From 938debd603c6041d89c8a18f9494ed085d3ada65 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 1 Mar 2021 18:01:46 -0600 +Subject: ALSA: hda: intel-nhlt: verify config type + +From: Pierre-Louis Bossart + +[ Upstream commit a864e8f159b13babf552aff14a5fbe11abc017e4 ] + +Multiple bug reports report issues with the SOF and SST drivers when +dealing with single microphone cases. + +We currently read the DMIC array information unconditionally but we +don't check that the configuration type is actually a mic array. + +When the DMIC link does not rely on a mic array configuration, the +recommendation is to check the format information to infer the maximum +number of channels, and map this to the number of microphones. + +This leaves a potential for a mismatch between actual microphones +available in hardware and what the ACPI table contains, but we have no +other source of information. + +Note that single microphone configurations can alternatively be +handled with a 'mic array' configuration along with a 'vendor-defined' +geometry. + +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=201251 +BugLink: https://github.com/thesofproject/linux/issues/2725 +Fixes: 7a33ea70e1868 ('ALSA: hda: intel-nhlt: handle NHLT VENDOR_DEFINED DMIC geometry') +Signed-off-by: Pierre-Louis Bossart +Reviewed-by: Guennadi Liakhovetski +Reviewed-by: Rander Wang +Reviewed-by: Kai Vehmanen +Link: https://lore.kernel.org/r/20210302000146.1177770-1-pierre-louis.bossart@linux.intel.com +Signed-off-by: Takashi Iwai +Signed-off-by: Sasha Levin +--- + include/sound/intel-nhlt.h | 5 ++++ + sound/hda/intel-nhlt.c | 54 +++++++++++++++++++++++++++++++------- + 2 files changed, 50 insertions(+), 9 deletions(-) + +diff --git a/include/sound/intel-nhlt.h b/include/sound/intel-nhlt.h +index 743c2f442280..d0574805865f 100644 +--- a/include/sound/intel-nhlt.h ++++ b/include/sound/intel-nhlt.h +@@ -112,6 +112,11 @@ struct nhlt_vendor_dmic_array_config { + /* TODO add vendor mic config */ + } __packed; + ++enum { ++ NHLT_CONFIG_TYPE_GENERIC = 0, ++ NHLT_CONFIG_TYPE_MIC_ARRAY = 1 ++}; ++ + enum { + NHLT_MIC_ARRAY_2CH_SMALL = 0xa, + NHLT_MIC_ARRAY_2CH_BIG = 0xb, +diff --git a/sound/hda/intel-nhlt.c b/sound/hda/intel-nhlt.c +index 059aaf04f536..d053beccfaec 100644 +--- a/sound/hda/intel-nhlt.c ++++ b/sound/hda/intel-nhlt.c +@@ -31,18 +31,44 @@ int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt) + struct nhlt_endpoint *epnt; + struct nhlt_dmic_array_config *cfg; + struct nhlt_vendor_dmic_array_config *cfg_vendor; ++ struct nhlt_fmt *fmt_configs; + unsigned int dmic_geo = 0; +- u8 j; ++ u16 max_ch = 0; ++ u8 i, j; + + if (!nhlt) + return 0; + +- epnt = (struct nhlt_endpoint *)nhlt->desc; ++ for (j = 0, epnt = nhlt->desc; j < nhlt->endpoint_count; j++, ++ epnt = (struct nhlt_endpoint *)((u8 *)epnt + epnt->length)) { + +- for (j = 0; j < nhlt->endpoint_count; j++) { +- if (epnt->linktype == NHLT_LINK_DMIC) { +- cfg = (struct nhlt_dmic_array_config *) +- (epnt->config.caps); ++ if (epnt->linktype != NHLT_LINK_DMIC) ++ continue; ++ ++ cfg = (struct nhlt_dmic_array_config *)(epnt->config.caps); ++ fmt_configs = (struct nhlt_fmt *)(epnt->config.caps + epnt->config.size); ++ ++ /* find max number of channels based on format_configuration */ ++ if (fmt_configs->fmt_count) { ++ dev_dbg(dev, "%s: found %d format definitions\n", ++ __func__, fmt_configs->fmt_count); ++ ++ for (i = 0; i < fmt_configs->fmt_count; i++) { ++ struct wav_fmt_ext *fmt_ext; ++ ++ fmt_ext = &fmt_configs->fmt_config[i].fmt_ext; ++ ++ if (fmt_ext->fmt.channels > max_ch) ++ max_ch = fmt_ext->fmt.channels; ++ } ++ dev_dbg(dev, "%s: max channels found %d\n", __func__, max_ch); ++ } else { ++ dev_dbg(dev, "%s: No format information found\n", __func__); ++ } ++ ++ if (cfg->device_config.config_type != NHLT_CONFIG_TYPE_MIC_ARRAY) { ++ dmic_geo = max_ch; ++ } else { + switch (cfg->array_type) { + case NHLT_MIC_ARRAY_2CH_SMALL: + case NHLT_MIC_ARRAY_2CH_BIG: +@@ -59,13 +85,23 @@ int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt) + dmic_geo = cfg_vendor->nb_mics; + break; + default: +- dev_warn(dev, "undefined DMIC array_type 0x%0x\n", +- cfg->array_type); ++ dev_warn(dev, "%s: undefined DMIC array_type 0x%0x\n", ++ __func__, cfg->array_type); ++ } ++ ++ if (dmic_geo > 0) { ++ dev_dbg(dev, "%s: Array with %d dmics\n", __func__, dmic_geo); ++ } ++ if (max_ch > dmic_geo) { ++ dev_dbg(dev, "%s: max channels %d exceed dmic number %d\n", ++ __func__, max_ch, dmic_geo); + } + } +- epnt = (struct nhlt_endpoint *)((u8 *)epnt + epnt->length); + } + ++ dev_dbg(dev, "%s: dmic number %d max_ch %d\n", ++ __func__, dmic_geo, max_ch); ++ + return dmic_geo; + } + EXPORT_SYMBOL_GPL(intel_nhlt_get_dmic_geo); +-- +2.30.1 + diff --git a/queue-5.10/ftrace-have-recordmcount-use-w8-to-read-relp-r_info-.patch b/queue-5.10/ftrace-have-recordmcount-use-w8-to-read-relp-r_info-.patch new file mode 100644 index 00000000000..8a7b88e048a --- /dev/null +++ b/queue-5.10/ftrace-have-recordmcount-use-w8-to-read-relp-r_info-.patch @@ -0,0 +1,56 @@ +From b100be258019bb5f15d1f6ae14b1537df6effdb6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 22 Feb 2021 13:58:40 +0000 +Subject: ftrace: Have recordmcount use w8 to read relp->r_info in + arm64_is_fake_mcount + +From: Chen Jun + +[ Upstream commit 999340d51174ce4141dd723105d4cef872b13ee9 ] + +On little endian system, Use aarch64_be(gcc v7.3) downloaded from +linaro.org to build image with CONFIG_CPU_BIG_ENDIAN = y, +CONFIG_FTRACE = y, CONFIG_DYNAMIC_FTRACE = y. + +gcc will create symbols of _mcount but recordmcount can not create +mcount_loc for *.o. +aarch64_be-linux-gnu-objdump -r fs/namei.o | grep mcount +00000000000000d0 R_AARCH64_CALL26 _mcount +... +0000000000007190 R_AARCH64_CALL26 _mcount + +The reason is than funciton arm64_is_fake_mcount can not work correctly. +A symbol of _mcount in *.o compiled with big endian compiler likes: +00 00 00 2d 00 00 01 1b +w(rp->r_info) will return 0x2d instead of 0x011b. Because w() takes +uint32_t as parameter, which truncates rp->r_info. + +Use w8() instead w() to read relp->r_info + +Link: https://lkml.kernel.org/r/20210222135840.56250-1-chenjun102@huawei.com + +Fixes: ea0eada45632 ("recordmcount: only record relocation of type R_AARCH64_CALL26 on arm64.") +Acked-by: Will Deacon +Signed-off-by: Chen Jun +Signed-off-by: Steven Rostedt (VMware) +Signed-off-by: Sasha Levin +--- + scripts/recordmcount.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c +index b9c2ee7ab43f..cce12e1971d8 100644 +--- a/scripts/recordmcount.c ++++ b/scripts/recordmcount.c +@@ -438,7 +438,7 @@ static int arm_is_fake_mcount(Elf32_Rel const *rp) + + static int arm64_is_fake_mcount(Elf64_Rel const *rp) + { +- return ELF64_R_TYPE(w(rp->r_info)) != R_AARCH64_CALL26; ++ return ELF64_R_TYPE(w8(rp->r_info)) != R_AARCH64_CALL26; + } + + /* 64-bit EM_MIPS has weird ELF64_Rela.r_info. +-- +2.30.1 + diff --git a/queue-5.10/ib-mlx5-add-missing-error-code.patch b/queue-5.10/ib-mlx5-add-missing-error-code.patch new file mode 100644 index 00000000000..3c10265acd0 --- /dev/null +++ b/queue-5.10/ib-mlx5-add-missing-error-code.patch @@ -0,0 +1,40 @@ +From 2a2e0cfee824d73611bc451518359fcd0f7ba9a0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 22 Feb 2021 20:23:43 +0800 +Subject: IB/mlx5: Add missing error code + +From: YueHaibing + +[ Upstream commit 3a9b3d4536e0c25bd3906a28c1f584177e49dd0f ] + +Set err to -ENOMEM if kzalloc fails instead of 0. + +Fixes: 759738537142 ("IB/mlx5: Enable subscription for device events over DEVX") +Link: https://lore.kernel.org/r/20210222122343.19720-1-yuehaibing@huawei.com +Signed-off-by: YueHaibing +Acked-by: Leon Romanovsky +Signed-off-by: Jason Gunthorpe +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/mlx5/devx.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/infiniband/hw/mlx5/devx.c b/drivers/infiniband/hw/mlx5/devx.c +index 26564e7d3457..efb9ec99b68b 100644 +--- a/drivers/infiniband/hw/mlx5/devx.c ++++ b/drivers/infiniband/hw/mlx5/devx.c +@@ -1973,8 +1973,10 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)( + + num_alloc_xa_entries++; + event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL); +- if (!event_sub) ++ if (!event_sub) { ++ err = -ENOMEM; + goto err; ++ } + + list_add_tail(&event_sub->event_list, &sub_list); + uverbs_uobject_get(&ev_file->uobj); +-- +2.30.1 + diff --git a/queue-5.10/iommu-vt-d-fix-status-code-for-allocate-free-pasid-c.patch b/queue-5.10/iommu-vt-d-fix-status-code-for-allocate-free-pasid-c.patch new file mode 100644 index 00000000000..31f18baad83 --- /dev/null +++ b/queue-5.10/iommu-vt-d-fix-status-code-for-allocate-free-pasid-c.patch @@ -0,0 +1,45 @@ +From 566ae64d8ccc82ffd825266270927bf545a7fc96 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 27 Feb 2021 15:39:09 +0800 +Subject: iommu/vt-d: Fix status code for Allocate/Free PASID command + +From: Zenghui Yu + +[ Upstream commit 444d66a23c1f1e4c4d12aed4812681d0ad835d60 ] + +As per Intel vt-d spec, Rev 3.0 (section 10.4.45 "Virtual Command Response +Register"), the status code of "No PASID available" error in response to +the Allocate PASID command is 2, not 1. The same for "Invalid PASID" error +in response to the Free PASID command. + +We will otherwise see confusing kernel log under the command failure from +guest side. Fix it. + +Fixes: 24f27d32ab6b ("iommu/vt-d: Enlightened PASID allocation") +Signed-off-by: Zenghui Yu +Acked-by: Lu Baolu +Link: https://lore.kernel.org/r/20210227073909.432-1-yuzenghui@huawei.com +Signed-off-by: Joerg Roedel +Signed-off-by: Sasha Levin +--- + drivers/iommu/intel/pasid.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/iommu/intel/pasid.h b/drivers/iommu/intel/pasid.h +index 97dfcffbf495..444c0bec221a 100644 +--- a/drivers/iommu/intel/pasid.h ++++ b/drivers/iommu/intel/pasid.h +@@ -30,8 +30,8 @@ + #define VCMD_VRSP_IP 0x1 + #define VCMD_VRSP_SC(e) (((e) >> 1) & 0x3) + #define VCMD_VRSP_SC_SUCCESS 0 +-#define VCMD_VRSP_SC_NO_PASID_AVAIL 1 +-#define VCMD_VRSP_SC_INVALID_PASID 1 ++#define VCMD_VRSP_SC_NO_PASID_AVAIL 2 ++#define VCMD_VRSP_SC_INVALID_PASID 2 + #define VCMD_VRSP_RESULT_PASID(e) (((e) >> 8) & 0xfffff) + #define VCMD_CMD_OPERAND(e) ((e) << 8) + /* +-- +2.30.1 + diff --git a/queue-5.10/rdma-cm-fix-irq-restore-in-ib_send_cm_sidr_rep.patch b/queue-5.10/rdma-cm-fix-irq-restore-in-ib_send_cm_sidr_rep.patch new file mode 100644 index 00000000000..8fdc19c0e5f --- /dev/null +++ b/queue-5.10/rdma-cm-fix-irq-restore-in-ib_send_cm_sidr_rep.patch @@ -0,0 +1,84 @@ +From a4f5e04577a8b5daacd29383dcb1b4eb8ff29e20 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 1 Mar 2021 10:18:44 +0200 +Subject: RDMA/cm: Fix IRQ restore in ib_send_cm_sidr_rep + +From: Saeed Mahameed + +[ Upstream commit 221384df6123747d2a75517dd06cc01752f81518 ] + +ib_send_cm_sidr_rep() { + spin_lock_irqsave() + cm_send_sidr_rep_locked() { + ... + spin_lock_irq() + .... + spin_unlock_irq() <--- this will enable interrupts + } + spin_unlock_irqrestore() +} + +spin_unlock_irqrestore() expects interrupts to be disabled but the +internal spin_unlock_irq() will always enable hard interrupts. + +Fix this by replacing the internal spin_{lock,unlock}_irq() with +irqsave/restore variants. + +It fixes the following kernel trace: + + raw_local_irq_restore() called with IRQs enabled + WARNING: CPU: 2 PID: 20001 at kernel/locking/irqflag-debug.c:10 warn_bogus_irq_restore+0x1d/0x20 + + Call Trace: + _raw_spin_unlock_irqrestore+0x4e/0x50 + ib_send_cm_sidr_rep+0x3a/0x50 [ib_cm] + cma_send_sidr_rep+0xa1/0x160 [rdma_cm] + rdma_accept+0x25e/0x350 [rdma_cm] + ucma_accept+0x132/0x1cc [rdma_ucm] + ucma_write+0xbf/0x140 [rdma_ucm] + vfs_write+0xc1/0x340 + ksys_write+0xb3/0xe0 + do_syscall_64+0x2d/0x40 + entry_SYSCALL_64_after_hwframe+0x44/0xae + +Fixes: 87c4c774cbef ("RDMA/cm: Protect access to remote_sidr_table") +Link: https://lore.kernel.org/r/20210301081844.445823-1-leon@kernel.org +Signed-off-by: Saeed Mahameed +Reviewed-by: Jason Gunthorpe +Signed-off-by: Leon Romanovsky +Signed-off-by: Jason Gunthorpe +Signed-off-by: Sasha Levin +--- + drivers/infiniband/core/cm.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c +index 8e578f73a074..bbba0cd42c89 100644 +--- a/drivers/infiniband/core/cm.c ++++ b/drivers/infiniband/core/cm.c +@@ -3650,6 +3650,7 @@ static int cm_send_sidr_rep_locked(struct cm_id_private *cm_id_priv, + struct ib_cm_sidr_rep_param *param) + { + struct ib_mad_send_buf *msg; ++ unsigned long flags; + int ret; + + lockdep_assert_held(&cm_id_priv->lock); +@@ -3675,12 +3676,12 @@ static int cm_send_sidr_rep_locked(struct cm_id_private *cm_id_priv, + return ret; + } + cm_id_priv->id.state = IB_CM_IDLE; +- spin_lock_irq(&cm.lock); ++ spin_lock_irqsave(&cm.lock, flags); + if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node)) { + rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table); + RB_CLEAR_NODE(&cm_id_priv->sidr_id_node); + } +- spin_unlock_irq(&cm.lock); ++ spin_unlock_irqrestore(&cm.lock, flags); + return 0; + } + +-- +2.30.1 + diff --git a/queue-5.10/rdma-rxe-fix-missing-kconfig-dependency-on-crypto.patch b/queue-5.10/rdma-rxe-fix-missing-kconfig-dependency-on-crypto.patch new file mode 100644 index 00000000000..3bf59f75aac --- /dev/null +++ b/queue-5.10/rdma-rxe-fix-missing-kconfig-dependency-on-crypto.patch @@ -0,0 +1,44 @@ +From b55bad3c3bb59be3d1db365a00b17b21f5523bb9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 19 Feb 2021 18:32:26 -0500 +Subject: RDMA/rxe: Fix missing kconfig dependency on CRYPTO + +From: Julian Braha + +[ Upstream commit 475f23b8c66d2892ad6acbf90ed757cafab13de7 ] + +When RDMA_RXE is enabled and CRYPTO is disabled, Kbuild gives the +following warning: + + WARNING: unmet direct dependencies detected for CRYPTO_CRC32 + Depends on [n]: CRYPTO [=n] + Selected by [y]: + - RDMA_RXE [=y] && (INFINIBAND_USER_ACCESS [=y] || !INFINIBAND_USER_ACCESS [=y]) && INET [=y] && PCI [=y] && INFINIBAND [=y] && INFINIBAND_VIRT_DMA [=y] + +This is because RDMA_RXE selects CRYPTO_CRC32, without depending on or +selecting CRYPTO, despite that config option being subordinate to CRYPTO. + +Fixes: cee2688e3cd6 ("IB/rxe: Offload CRC calculation when possible") +Signed-off-by: Julian Braha +Link: https://lore.kernel.org/r/21525878.NYvzQUHefP@ubuntu-mate-laptop +Signed-off-by: Jason Gunthorpe +Signed-off-by: Sasha Levin +--- + drivers/infiniband/sw/rxe/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/infiniband/sw/rxe/Kconfig b/drivers/infiniband/sw/rxe/Kconfig +index 452149066792..06b8dc5093f7 100644 +--- a/drivers/infiniband/sw/rxe/Kconfig ++++ b/drivers/infiniband/sw/rxe/Kconfig +@@ -4,6 +4,7 @@ config RDMA_RXE + depends on INET && PCI && INFINIBAND + depends on INFINIBAND_VIRT_DMA + select NET_UDP_TUNNEL ++ select CRYPTO + select CRYPTO_CRC32 + help + This driver implements the InfiniBand RDMA transport over +-- +2.30.1 + diff --git a/queue-5.10/rsxx-return-efault-if-copy_to_user-fails.patch b/queue-5.10/rsxx-return-efault-if-copy_to_user-fails.patch new file mode 100644 index 00000000000..6fb46ac0148 --- /dev/null +++ b/queue-5.10/rsxx-return-efault-if-copy_to_user-fails.patch @@ -0,0 +1,50 @@ +From 1191ce002390142b32b915bb67d385efe325da92 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 Mar 2021 13:59:12 +0300 +Subject: rsxx: Return -EFAULT if copy_to_user() fails + +From: Dan Carpenter + +[ Upstream commit 77516d25f54912a7baedeeac1b1b828b6f285152 ] + +The copy_to_user() function returns the number of bytes remaining but +we want to return -EFAULT to the user if it can't complete the copy. +The "st" variable only holds zero on success or negative error codes on +failure so the type should be int. + +Fixes: 36f988e978f8 ("rsxx: Adding in debugfs entries.") +Signed-off-by: Dan Carpenter +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + drivers/block/rsxx/core.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/block/rsxx/core.c b/drivers/block/rsxx/core.c +index 63f549889f87..5ac1881396af 100644 +--- a/drivers/block/rsxx/core.c ++++ b/drivers/block/rsxx/core.c +@@ -165,15 +165,17 @@ static ssize_t rsxx_cram_read(struct file *fp, char __user *ubuf, + { + struct rsxx_cardinfo *card = file_inode(fp)->i_private; + char *buf; +- ssize_t st; ++ int st; + + buf = kzalloc(cnt, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + st = rsxx_creg_read(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1); +- if (!st) +- st = copy_to_user(ubuf, buf, cnt); ++ if (!st) { ++ if (copy_to_user(ubuf, buf, cnt)) ++ st = -EFAULT; ++ } + kfree(buf); + if (st) + return st; +-- +2.30.1 + diff --git a/queue-5.10/series b/queue-5.10/series index cdd75284d52..f3ba0522da8 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -28,3 +28,11 @@ of-unittest-add-test-for-of_dma_get_max_cpu_address.patch arm64-mm-set-zone_dma-size-based-on-devicetree-s-dma-ranges.patch arm64-mm-set-zone_dma-size-based-on-early-iort-scan.patch mm-remove-examples-from-enum-zone_type-comment.patch +alsa-ctxfi-cthw20k2-fix-mask-on-conf-to-allow-4-bits.patch +rdma-cm-fix-irq-restore-in-ib_send_cm_sidr_rep.patch +rdma-rxe-fix-missing-kconfig-dependency-on-crypto.patch +ib-mlx5-add-missing-error-code.patch +alsa-hda-intel-nhlt-verify-config-type.patch +ftrace-have-recordmcount-use-w8-to-read-relp-r_info-.patch +rsxx-return-efault-if-copy_to_user-fails.patch +iommu-vt-d-fix-status-code-for-allocate-free-pasid-c.patch