From: Nicholas Nethercote Date: Fri, 13 May 2005 21:41:13 +0000 (+0000) Subject: Remove all the unused x86 and AMD64 *_FEAT_* macros, as NOTES.txt X-Git-Tag: svn/VALGRIND_3_0_0~625 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=cd5a8a6ae3c1a4facc0d41d3eefe420fd3b081bb;p=thirdparty%2Fvalgrind.git Remove all the unused x86 and AMD64 *_FEAT_* macros, as NOTES.txt suggests. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3693 --- diff --git a/NOTES.txt b/NOTES.txt index e7c6e7be1a..042410e796 100644 --- a/NOTES.txt +++ b/NOTES.txt @@ -29,10 +29,6 @@ ToDo: vex-x86: check/fix behaviour on SSE MOVQ / MOVSD insns. [tool_asm.h will need to remain in some form -- there are still assembly files that need to see VG_() and related macros. --njn] - Urk. Perhaps nuke all that X86_FEAT gunk in coregrind/core_asm.h - though. Vex isn't clever enough to distinguish dozens of CPU - subvariants. - 23 March 05 ~~~~~~~~~~~ diff --git a/coregrind/core_asm.h b/coregrind/core_asm.h index 8b6d3b08d8..07a06440e4 100644 --- a/coregrind/core_asm.h +++ b/coregrind/core_asm.h @@ -43,71 +43,6 @@ #define VG_TT_FAST_SIZE (1 << VG_TT_FAST_BITS) #define VG_TT_FAST_MASK ((VG_TT_FAST_SIZE) - 1) -// XXX: all this will go into x86/ eventually... -/* - 0 - standard feature flags - 1 - Intel extended flags - 2 - Valgrind internal flags - 3 - AMD-specific flags - */ -#define VG_N_FEATURE_WORDS 4 - -#define VG_X86_FEAT 0 -#define VG_EXT_FEAT 1 -#define VG_INT_FEAT 2 -#define VG_AMD_FEAT 3 - -/* CPU features (generic) */ -#define VG_X86_FEAT_FPU (VG_X86_FEAT*32 + 0) -#define VG_X86_FEAT_VME (VG_X86_FEAT*32 + 1) -#define VG_X86_FEAT_DE (VG_X86_FEAT*32 + 2) -#define VG_X86_FEAT_PSE (VG_X86_FEAT*32 + 3) -#define VG_X86_FEAT_TSC (VG_X86_FEAT*32 + 4) -#define VG_X86_FEAT_MSR (VG_X86_FEAT*32 + 5) -#define VG_X86_FEAT_PAE (VG_X86_FEAT*32 + 6) -#define VG_X86_FEAT_MCE (VG_X86_FEAT*32 + 7) -#define VG_X86_FEAT_CX8 (VG_X86_FEAT*32 + 8) -#define VG_X86_FEAT_APIC (VG_X86_FEAT*32 + 9) -#define VG_X86_FEAT_SEP (VG_X86_FEAT*32 + 11) -#define VG_X86_FEAT_MTRR (VG_X86_FEAT*32 + 12) -#define VG_X86_FEAT_PGE (VG_X86_FEAT*32 + 13) -#define VG_X86_FEAT_MCA (VG_X86_FEAT*32 + 14) -#define VG_X86_FEAT_CMOV (VG_X86_FEAT*32 + 15) -#define VG_X86_FEAT_PAT (VG_X86_FEAT*32 + 16) -#define VG_X86_FEAT_PSE36 (VG_X86_FEAT*32 + 17) -#define VG_X86_FEAT_CLFSH (VG_X86_FEAT*32 + 19) -#define VG_X86_FEAT_DS (VG_X86_FEAT*32 + 21) -#define VG_X86_FEAT_ACPI (VG_X86_FEAT*32 + 22) -#define VG_X86_FEAT_MMX (VG_X86_FEAT*32 + 23) -#define VG_X86_FEAT_FXSR (VG_X86_FEAT*32 + 24) -#define VG_X86_FEAT_SSE (VG_X86_FEAT*32 + 25) -#define VG_X86_FEAT_SSE2 (VG_X86_FEAT*32 + 26) -#define VG_X86_FEAT_SS (VG_X86_FEAT*32 + 27) -#define VG_X86_FEAT_HT (VG_X86_FEAT*32 + 28) -#define VG_X86_FEAT_TM (VG_X86_FEAT*32 + 29) -#define VG_X86_FEAT_IA64 (VG_X86_FEAT*32 + 30) -#define VG_X86_FEAT_PBE (VG_X86_FEAT*32 + 31) - -/* Intel extended feature word */ -#define VG_X86_FEAT_SSE3 (VG_EXT_FEAT*32 + 0) -#define VG_X86_FEAT_MON (VG_EXT_FEAT*32 + 3) -#define VG_X86_FEAT_DSCPL (VG_EXT_FEAT*32 + 4) -#define VG_X86_FEAT_EST (VG_EXT_FEAT*32 + 7) -#define VG_X86_FEAT_TM2 (VG_EXT_FEAT*32 + 8) -#define VG_X86_FEAT_CNXTID (VG_EXT_FEAT*32 + 10) - -/* Used internally to mark whether CPUID is even implemented */ -#define VG_X86_FEAT_CPUID (VG_INT_FEAT*32 + 0) - -/* AMD special features */ -#define VG_AMD_FEAT_SYSCALL (VG_AMD_FEAT*32 + 11) -#define VG_AMD_FEAT_NXP (VG_AMD_FEAT*32 + 20) -#define VG_AMD_FEAT_MMXEXT (VG_AMD_FEAT*32 + 22) -#define VG_AMD_FEAT_FFXSR (VG_AMD_FEAT*32 + 25) -#define VG_AMD_FEAT_LONGMODE (VG_AMD_FEAT*32 + 29) -#define VG_AMD_FEAT_3DNOWEXT (VG_AMD_FEAT*32 + 30) -#define VG_AMD_FEAT_3DNOW (VG_AMD_FEAT*32 + 31) - #endif /* __CORE_ASM_H */ /*--------------------------------------------------------------------*/