From: Guenter Roeck Date: Sat, 4 Oct 2025 20:00:49 +0000 (-0700) Subject: microchip icicle: Enable PCS on Cadence Ethernet X-Git-Tag: v10.2.0-rc1~45^2~8 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=cdbb7c3fa6f67d3370965cb0e4bbfdbca04c0913;p=thirdparty%2Fqemu.git microchip icicle: Enable PCS on Cadence Ethernet PCS needs to be enabled for SGMII to be supported by the Linux kernel. Signed-off-by: Guenter Roeck Acked-by: Alistair Francis Message-ID: <20251004200049.871646-5-linux@roeck-us.net> Signed-off-by: Alistair Francis --- diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index 9fbfba8ece..4c939d8e96 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -415,6 +415,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(&s->gem0), "revision", GEM_REVISION, errp); object_property_set_int(OBJECT(&s->gem0), "phy-addr", 8, errp); object_property_set_bool(OBJECT(&s->gem0), "phy-connected", false, errp); + object_property_set_bool(OBJECT(&s->gem0), "pcs-enabled", true, errp); sysbus_realize(SYS_BUS_DEVICE(&s->gem0), errp); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem0), 0, @@ -426,6 +427,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(&s->gem1), "phy-addr", 9, errp); object_property_set_link(OBJECT(&s->gem1), "phy-consumer", OBJECT(&s->gem0), errp); + object_property_set_bool(OBJECT(&s->gem1), "pcs-enabled", true, errp); sysbus_realize(SYS_BUS_DEVICE(&s->gem1), errp); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem1), 0, memmap[MICROCHIP_PFSOC_GEM1].base);