From: Ramana Radhakrishnan Date: Tue, 12 Aug 2014 14:32:07 +0000 (+0000) Subject: re PR target/62098 (incorrect code generated by arm gcc) X-Git-Tag: releases/gcc-5.1.0~5538 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=d31e00d4e9b0af04c696e4e485516aaab3153a2f;p=thirdparty%2Fgcc.git re PR target/62098 (incorrect code generated by arm gcc) Fix PR target/62098 2014-08-12 Ramana Radhakrishnan PR target/62098 * config/arm/vfp.md (*combine_vcvtf2i): Fix constraint. Remove unnecessary attributes. From-SVN: r213861 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 23f4327d6259..78cc7eaeadfb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-08-12 Ramana Radhakrishnan + + PR target/62098 + * config/arm/vfp.md (*combine_vcvtf2i): Fix constraint. + Remove unnecessary attributes. + 2014-08-12 Yury Gribov * internal-fn.c (init_internal_fns): Fix off-by-one. diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index ab502ad13c23..005968938f35 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -1264,17 +1264,15 @@ ) (define_insn "*combine_vcvtf2i" - [(set (match_operand:SI 0 "s_register_operand" "=r") - (fix:SI (fix:SF (mult:SF (match_operand:SF 1 "s_register_operand" "t") + [(set (match_operand:SI 0 "s_register_operand" "=t") + (fix:SI (fix:SF (mult:SF (match_operand:SF 1 "s_register_operand" "0") (match_operand 2 "const_double_vcvt_power_of_two" "Dp")))))] "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math" - "vcvt%?.s32.f32\\t%1, %1, %v2\;vmov%?\\t%0, %1" + "vcvt%?.s32.f32\\t%0, %1, %v2" [(set_attr "predicable" "yes") (set_attr "predicable_short_it" "no") - (set_attr "ce_count" "2") - (set_attr "type" "f_cvtf2i") - (set_attr "length" "8")] + (set_attr "type" "f_cvtf2i")] ) ;; Store multiple insn used in function prologue.