From: Tom Lane <tgl@sss.pgh.pa.us>
Date: Wed, 1 Jul 2026 14:10:21 +0000 (-0400)
Subject: Fix CPU-identification macros for RISC-V.
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=d3223485546e8579a1703731ef4e39a08a712860;p=thirdparty%2Fpostgresql.git

Fix CPU-identification macros for RISC-V.

Turns out that RISC-V intentionally doesn't follow the common
naming pattern for CPU-identification macros.  But the point of
2ef57e636 is to have a common pattern, so we're going to override
their opinion.

Discussion: https://postgr.es/m/CA+hUKGL8Hs-phHPugrWM=5dAkcT897rXyazYzLw-Szxnzgx-rA@mail.gmail.com
---

diff --git a/src/include/c.h b/src/include/c.h
index ef4dc5d1e63..0e4aea5d5a3 100644
--- a/src/include/c.h
+++ b/src/include/c.h
@@ -138,10 +138,13 @@ extern "C++"
 #ifndef __powerpc64__
 #define __powerpc64__ 1
 #endif
-#elif defined(__riscv__)
-/* no work */
-#elif defined(__riscv64__)
-/* no work */
+#elif defined(__riscv)
+/* RISC-V doesn't follow the common naming pattern, so force it */
+#if SIZEOF_VOID_P == 8
+#define __riscv64__ 1
+#else
+#define __riscv__ 1
+#endif
 #elif defined(__s390__)
 /* no work */
 #elif defined(__s390x__)