From: Philippe Mathieu-Daudé Date: Fri, 10 Oct 2025 15:50:44 +0000 (+0200) Subject: target/riscv: Introduce mo_endian_env() helper X-Git-Tag: v10.2.0-rc1~45^2~12 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=d652720ecc6e6b62d358db07fb1b1b4c2578243b;p=thirdparty%2Fqemu.git target/riscv: Introduce mo_endian_env() helper mo_endian_env() returns the target endianness from CPUArchState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Heinrich Schuchardt Reviewed-by: Alistair Francis Message-ID: <20251010155045.78220-14-philmd@linaro.org> [ Changes by AF: - Only define mo_endian_env() for softmmu ] Signed-off-by: Alistair Francis --- diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index c486f771d3..6ccc127c30 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -28,6 +28,20 @@ #include "exec/tlb-flags.h" #include "trace.h" +#ifndef CONFIG_USER_ONLY +static inline MemOp mo_endian_env(CPURISCVState *env) +{ + /* + * A couple of bits in MSTATUS set the endianness: + * - MSTATUS_UBE (User-mode), + * - MSTATUS_SBE (Supervisor-mode), + * - MSTATUS_MBE (Machine-mode) + * but we don't implement that yet. + */ + return MO_TE; +} +#endif + /* Exceptions processing helpers */ G_NORETURN void riscv_raise_exception(CPURISCVState *env, RISCVException exception, @@ -633,7 +647,7 @@ target_ulong helper_hyp_hlv_hu(CPURISCVState *env, target_ulong addr) { uintptr_t ra = GETPC(); int mmu_idx = check_access_hlsv(env, false, ra); - MemOpIdx oi = make_memop_idx(MO_TE | MO_UW, mmu_idx); + MemOpIdx oi = make_memop_idx(mo_endian_env(env) | MO_UW, mmu_idx); return cpu_ldw_mmu(env, adjust_addr_virt(env, addr), oi, ra); } @@ -642,7 +656,7 @@ target_ulong helper_hyp_hlv_wu(CPURISCVState *env, target_ulong addr) { uintptr_t ra = GETPC(); int mmu_idx = check_access_hlsv(env, false, ra); - MemOpIdx oi = make_memop_idx(MO_TE | MO_UL, mmu_idx); + MemOpIdx oi = make_memop_idx(mo_endian_env(env) | MO_UL, mmu_idx); return cpu_ldl_mmu(env, adjust_addr_virt(env, addr), oi, ra); } @@ -651,7 +665,7 @@ target_ulong helper_hyp_hlv_d(CPURISCVState *env, target_ulong addr) { uintptr_t ra = GETPC(); int mmu_idx = check_access_hlsv(env, false, ra); - MemOpIdx oi = make_memop_idx(MO_TE | MO_UQ, mmu_idx); + MemOpIdx oi = make_memop_idx(mo_endian_env(env) | MO_UQ, mmu_idx); return cpu_ldq_mmu(env, adjust_addr_virt(env, addr), oi, ra); } @@ -669,7 +683,7 @@ void helper_hyp_hsv_h(CPURISCVState *env, target_ulong addr, target_ulong val) { uintptr_t ra = GETPC(); int mmu_idx = check_access_hlsv(env, false, ra); - MemOpIdx oi = make_memop_idx(MO_TE | MO_UW, mmu_idx); + MemOpIdx oi = make_memop_idx(mo_endian_env(env) | MO_UW, mmu_idx); cpu_stw_mmu(env, adjust_addr_virt(env, addr), val, oi, ra); } @@ -678,7 +692,7 @@ void helper_hyp_hsv_w(CPURISCVState *env, target_ulong addr, target_ulong val) { uintptr_t ra = GETPC(); int mmu_idx = check_access_hlsv(env, false, ra); - MemOpIdx oi = make_memop_idx(MO_TE | MO_UL, mmu_idx); + MemOpIdx oi = make_memop_idx(mo_endian_env(env) | MO_UL, mmu_idx); cpu_stl_mmu(env, adjust_addr_virt(env, addr), val, oi, ra); } @@ -687,7 +701,7 @@ void helper_hyp_hsv_d(CPURISCVState *env, target_ulong addr, target_ulong val) { uintptr_t ra = GETPC(); int mmu_idx = check_access_hlsv(env, false, ra); - MemOpIdx oi = make_memop_idx(MO_TE | MO_UQ, mmu_idx); + MemOpIdx oi = make_memop_idx(mo_endian_env(env) | MO_UQ, mmu_idx); cpu_stq_mmu(env, adjust_addr_virt(env, addr), val, oi, ra); } @@ -703,7 +717,7 @@ target_ulong helper_hyp_hlvx_hu(CPURISCVState *env, target_ulong addr) { uintptr_t ra = GETPC(); int mmu_idx = check_access_hlsv(env, true, ra); - MemOpIdx oi = make_memop_idx(MO_TE | MO_UW, mmu_idx); + MemOpIdx oi = make_memop_idx(mo_endian_env(env) | MO_UW, mmu_idx); return cpu_ldw_code_mmu(env, addr, oi, GETPC()); } @@ -712,7 +726,7 @@ target_ulong helper_hyp_hlvx_wu(CPURISCVState *env, target_ulong addr) { uintptr_t ra = GETPC(); int mmu_idx = check_access_hlsv(env, true, ra); - MemOpIdx oi = make_memop_idx(MO_TE | MO_UL, mmu_idx); + MemOpIdx oi = make_memop_idx(mo_endian_env(env) | MO_UL, mmu_idx); return cpu_ldl_code_mmu(env, addr, oi, ra); }