From: Petar Jovanovic Date: Tue, 28 May 2013 16:51:27 +0000 (+0000) Subject: mips64: set of mips64 specific tests X-Git-Tag: svn/VALGRIND_3_9_0~274 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=d7adfcc772cbcc6c68b868eac6b07b5de75f76d2;p=thirdparty%2Fvalgrind.git mips64: set of mips64 specific tests This is a set of mips64 programs that test mips64 instruction set. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13410 --- diff --git a/none/tests/mips64/Makefile.am b/none/tests/mips64/Makefile.am index 1c7ef4491b..bad22d77a0 100644 --- a/none/tests/mips64/Makefile.am +++ b/none/tests/mips64/Makefile.am @@ -3,12 +3,65 @@ include $(top_srcdir)/Makefile.tool-tests.am dist_noinst_SCRIPTS = filter_stderr +EXTRA_DIST = \ + arithmetic_instruction.stdout.exp-mips64 \ + arithmetic_instruction.stdout.exp-mips64r2 arithmetic_instruction.stderr.exp \ + arithmetic_instruction.vgtest \ + branch_and_jump_instructions.stdout.exp \ + branch_and_jump_instructions.stderr.exp branch_and_jump_instructions.vgtest \ + branches.stdout.exp branches.stderr.exp branches.vgtest + extract_insert_bit_field.stdout.exp-mips64 \ + extract_insert_bit_field.stdout.exp-mips64r2 \ + extract_insert_bit_field.stderr.exp extract_insert_bit_field.vgtest \ + fpu_arithmetic.stdout.exp fpu_arithmetic.stderr.exp fpu_arithmetic.vgtest \ + fpu_branches.stdout.exp fpu_branches.stderr.exp fpu_branches.vgtest \ + fpu_control_word.stdout.exp fpu_control_word.stderr.exp \ + fpu_control_word.vgtest \ + fpu_load_store.stdout.exp-BE fpu_load_store.stdout.exp-LE \ + fpu_load_store.stderr.exp fpu_load_store.vgtest \ + load_store.stdout.exp-BE load_store.stdout.exp-LE load_store.stderr.exp \ + load_store.vgtest \ + load_store_multiple.stdout.exp-BE load_store_multiple.stdout.exp-LE \ + load_store_multiple.stderr.exp load_store_multiple.vgtest \ + load_store_unaligned.stdout.exp load_store_unaligned.stderr.exp \ + load_store_unaligned.vgtest \ + logical_instructions.stdout.exp logical_instructions.stderr.exp \ + logical_instructions.vgtest \ + move_instructions.stdout.exp-BE move_instructions.stdout.exp-LE \ + move_instructions.stderr.exp move_instructions.vgtest \ + rotate_swap.stdout.exp-mips64 rotate_swap.stdout.exp-mips64r2 \ + rotate_swap.stderr.exp rotate_swap.vgtest \ + round.stdout.exp round.stderr.exp round.vgtest \ + shift_instructions.stdout-exp-mips64 shift_instructions.stdout-exp-mips64r2 \ + shift_instructions.stderr.exp shift_instructions.vgtest \ + test_block_size.stdout.exp test_block_size.stderr.exp \ + test_block_size.vgtest \ + unaligned_load.stdout.exp-BE unaligned_load.stdout.exp-LE \ + unaligned_load.stderr.exp unaligned_load.vgtest + check_PROGRAMS = \ - allexec + allexec \ + arithmetic_instruction \ + branch_and_jump_instructions \ + branches \ + extract_insert_bit_field \ + fpu_arithmetic \ + fpu_branches \ + fpu_control_word \ + fpu_load_store \ + load_store \ + load_store_multiple \ + load_store_unaligned \ + logical_instructions \ + move_instructions \ + rotate_swap \ + round \ + shift_instructions \ + test_block_size \ + unaligned_load AM_CFLAGS += @FLAG_M64@ AM_CXXFLAGS += @FLAG_M64@ AM_CCASFLAGS += @FLAG_M64@ allexec_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@ - diff --git a/none/tests/mips64/arithmetic_instruction.c b/none/tests/mips64/arithmetic_instruction.c new file mode 100644 index 0000000000..b8a81e9853 --- /dev/null +++ b/none/tests/mips64/arithmetic_instruction.c @@ -0,0 +1,360 @@ +#include +#include "const.h" +#include "macro_int.h" + +typedef enum { + ADD=0, ADDI, ADDIU, ADDU, + CLO, CLZ, DADD, DADDI, + DADDIU, DADDU, DCLO, DCLZ, + DDIV, DDIVU, DIV, DIVU, + DMULT, DMULTU, DSUB, DSUBU, + MADD, MADDU, MSUB, MSUBU, + MUL, MULT, MULTU, MOVN, + MOVZ, SEB, SEH, SLT, + SLTI, SLTIU, SLTU, SUB, + SUBU +} arithmetic_op; + +int main() +{ + arithmetic_op op; + int i; + init_reg_val2(); + + for (op = ADD; op <= SUBU; op++) { + for (i = 0; i < N; i++) { + switch(op) { + case ADD: + /* If either GPR rt or GPR rs does not contain sign-extended + 32-bit values (bits 63..31 equal), then the result of the + operation is UNPREDICTABLE. */ + TEST1("add $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + case ADDI: + /* If GPR rs does not contain a sign-extended 32-bit + value (bits 63..31 equal), then the result of the operation + is UNPREDICTABLE. */ + TEST2("addi $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("addi $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("addi $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("addi $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + break; + + case ADDIU: + /* If GPR rs does not contain a sign-extended 32-bit + value (bits 63..31 equal), then the result of the operation + is UNPREDICTABLE. */ + TEST2("addiu $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("addiu $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("addiu $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("addiu $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + break; + + case ADDU: + /* If either GPR rt or GPR rs does not contain sign-extended + 32-bit values (bits 63..31 equal), then the result of the + operation is UNPREDICTABLE. */ + TEST1("addu $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + case CLO: + /* If GPR rs does not contain a sign-extended 32-bit + value (bits 63..31 equal), then the results of the operation + are UNPREDICTABLE. */ + TEST3("clo $t0, $t1", reg_val1[i], t0, t1); + break; + + case CLZ: + /* If GPR rs does not contain a sign-extended 32-bit + value (bits 63..31 equal), then the results of the operation + are UNPREDICTABLE. */ + TEST3("clz $t0, $t1", reg_val1[i], t0, t1); + break; + + case DADD: + /* If the addition results in 64-bit 2âs complement arithmetic + overflow, then the destination register is not modified and + an IntegerOverflow exception occurs. */ + TEST1("dadd $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + case DADDI: + /* If the addition results in 64-bit 2âs complement arithmetic + overflow, then the destination register is not modified and + an Integer Overflow exception occurs. */ + TEST2("daddi $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("daddi $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("daddi $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("daddi $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + TEST2("daddi $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); + TEST2("daddi $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); + TEST2("daddi $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); + TEST2("daddi $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1); + break; + + case DADDIU: + /* No Integer Overflow exception occurs under any + circumstances. */ + TEST2("daddiu $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("daddiu $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("daddiu $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("daddiu $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + TEST2("daddiu $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); + TEST2("daddiu $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); + TEST2("daddiu $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); + TEST2("daddiu $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1); + break; + + case DADDU: + /* No Integer Overflow exception occurs under any + circumstances. */ + TEST1("daddu $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("daddu $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case DCLO: + /* No arithmetic exception occurs under any circumstances. */ + TEST3("dclo $t0, $t1", reg_val1[i], t0, t1); + TEST3("dclo $v0, $v1", reg_val2[i], v0, v1); + break; + + case DCLZ: + /* No arithmetic exception occurs under any circumstances. */ + TEST3("dclz $t0, $t1", reg_val1[i], t0, t1); + TEST3("dclz $v0, $v1", reg_val2[i], v0, v1); + break; + + case DDIV: + /* If the divisor in GPR rt is zero, the arithmetic result value + is UNPREDICTABLE. */ + if (reg_val1[N-i-1] != 0) + TEST4("ddiv $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + + if (reg_val2[N-i-1] != 0) + TEST4("ddiv $v0, $v1", reg_val2[i], reg_val2[N-i-1], v0, v1); + + break; + + case DDIVU: + /* If the divisor in GPR rt is zero, the arithmetic result value + is UNPREDICTABLE. */ + if (reg_val1[N-i-1] != 0) + TEST4("ddivu $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + + if (reg_val2[N-i-1] != 0) + TEST4("ddivu $v0, $v1", reg_val2[i], reg_val2[N-i-1], v0, v1); + + break; + + case DIV: + /* If either GPR rt or GPR rs does not contain sign-extended + 32-bit values (bits 63..31 equal), then the result of the + operation is UNPREDICTABLE. + If the divisor in GPR rt is zero, the arithmetic result + value is UNPREDICTABLE. */ + if (reg_val1[N-i-1] != 0) + TEST4("div $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + + break; + + case DIVU: + /* If either GPR rt or GPR rs does not contain sign-extended + 32-bit values (bits 63..31 equal), then the result of the + operation is UNPREDICTABLE. + If the divisor in GPR rt is zero, the arithmetic result + value is UNPREDICTABLE. */ + if (reg_val1[N-i-1] != 0) + TEST4("divu $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + + break; + + case DMULT: + /* No arithmetic exception occurs under any circumstances. */ + TEST4("dmult $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + TEST4("dmult $v0, $v1", reg_val2[i], reg_val2[N-i-1], v0, v1); + break; + + case DMULTU: + /* No arithmetic exception occurs under any circumstances. */ + TEST4("dmultu $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + TEST4("dmultu $v0, $v1", reg_val2[i], reg_val2[N-i-1], v0, v1); + break; + + case DSUB: + /* If the subtraction results in 64-bit 2âs complement + arithmetic overflow, then the destination register is not + modified and an Integer Overflow exception occurs. */ + TEST1("dsub $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + case DSUBU: + /* No Integer Overflow exception occurs under any + circumstances. */ + TEST1("dsubu $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("dsubu $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case MADD: + /* If GPRs rs or rt do not contain sign-extended 32-bit + values (bits 63..31 equal), then the results of the operation + are UNPREDICTABLE. */ + TEST5("madd $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + break; + + case MADDU: + /* If GPRs rs or rt do not contain sign-extended 32-bit + values (bits 63..31 equal), then the results of the operation + are UNPREDICTABLE. */ + TEST5("maddu $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + break; + + case MSUB: + /* If GPR rs or rt do not contain a sign-extended 32-bit + value (bits 63..31 equal), then the results of the operation + are UNPREDICTABLE. */ + TEST5("msub $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + break; + + case MSUBU: + /* If GPRs rs or rt do not contain sign-extended 32-bit + values (bits 63..31 equal), then the results of the operation + are UNPREDICTABLE. + This instruction does not provide the capability of writing + directly to a target GPR. */ + TEST5("msubu $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + break; + + case MUL: + /* On 64-bit processors, if either GPR rt or GPR rs does not + contain sign-extended 32-bit values (bits 63..31 equal), then + the result of the operation is UNPREDICTABLE. */ + TEST1("mul $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + case MULT: + /* On 64-bit processors, if either GPR rt or GPR rs does not + contain sign-extended 32-bit values (bits 63..31 equal), then + the result of the operation is UNPREDICTABLE. */ + TEST4("mult $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + break; + + case MULTU: + /* On 64-bit processors, if either GPR rt or GPR rs does not + contain sign-extended 32-bit values (bits 63..31 equal), then + the result of the operation is UNPREDICTABLE. */ + TEST4("multu $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); + break; + + case MOVN: + /* The arithmetic comparison does not cause an Integer Overflow + exception. */ + TEST1("movn $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("movn $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case MOVZ: + /* The arithmetic comparison does not cause an Integer Overflow + exception. */ + TEST1("movz $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("movz $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case SEB: +#if (__mips==64) && (__mips_isa_rev>=2) + /* If GPR rt does not contain a sign-extended 32-bit + value (bits 63..31 equal), then the result of the operation + is UNPREDICTABLE. */ + TEST3("seb $t0, $t1", reg_val1[i], t0, t1); +#endif + break; + + case SEH: +#if (__mips==64) && (__mips_isa_rev>=2) + /* If GPR rt does not contain a sign-extended 32-bit + value (bits 63..31 equal), then the result of the operation + is UNPREDICTABLE. */ + TEST3("seh $t0, $t1", reg_val1[i], t0, t1); +#endif + break; + + case SLT: + /* The arithmetic comparison does not cause an Integer Overflow + exception. */ + TEST1("slt $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + case SLTI: + /* The arithmetic comparison does not cause an Integer Overflow + exception. */ + TEST2("slti $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("slti $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("slti $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("slti $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + TEST2("slti $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); + TEST2("slti $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); + TEST2("slti $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); + TEST2("slti $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1); + break; + + case SLTIU: + /* The arithmetic comparison does not cause an Integer Overflow + exception. */ + TEST2("sltiu $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("sltiu $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("sltiu $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("sltiu $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + TEST2("sltiu $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); + TEST2("sltiu $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); + TEST2("sltiu $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); + TEST2("sltiu $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1); + break; + + case SLTU: + /* The arithmetic comparison does not cause an Integer Overflow + exception. */ + TEST1("sltu $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("sltu $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case SUB: + /* On 64-bit processors, if either GPR rt or GPR rs does not + contain sign-extended 32-bit values (bits 63..31 equal), then + the result of the operation is UNPREDICTABLE. */ + if (i < 8 || (i > 15 && i < 22)) + TEST1("sub $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + case SUBU: + /* On 64-bit processors, if either GPR rt or GPR rs does not + contain sign-extended 32-bit values (bits 63..31 equal), then + the result of the operation is UNPREDICTABLE. */ + TEST1("subu $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + default: + printf("Error!\n"); + break; + } + } + } + return 0; +} diff --git a/none/tests/mips64/branch_and_jump_instructions.c b/none/tests/mips64/branch_and_jump_instructions.c new file mode 100644 index 0000000000..f0e979027f --- /dev/null +++ b/none/tests/mips64/branch_and_jump_instructions.c @@ -0,0 +1,352 @@ +#include +#include "const.h" + +#define TEST1(RSval, RD) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "b end"#RD "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 5" "\n\t" \ + "end"#RD":" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD \ + ); \ + printf("B :: 0x%llx, RSval: 0x%llx\n", \ + out, (long long) RSval); \ +} + +#define TEST2(RSval, RD) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "bal end1"#RD "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 5" "\n\t" \ + "b r_end"#RD "\n\t" \ + "nop" "\n\t" \ + "end1"#RD":" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "jr $ra" "\n\t" \ + "nop" "\n\t" \ + "r_end"#RD":" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD, "ra" \ + ); \ + printf("B BAL JR :: 0x%llx, RSval: 0x%llx\n", \ + out, (long long) RSval); \ +} + +#define TEST2a(RSval, RD) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "bal end12"#RD "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 5" "\n\t" \ + "move $t9, $ra" "\n\t" \ + "jr $t9" "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "end12"#RD":" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "move $t9, $ra" "\n\t" \ + "jal $t9" "\n\t" \ + "nop" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD, "t9", "ra" \ + ); \ + printf("BAL JR JAL :: 0x%llx, RSval: 0x%llx\n", \ + out, (long long) RSval); \ +} + +#define TEST2b(RSval, RD) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "bal end13"#RD "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 5" "\n\t" \ + "move $t9, $t0" "\n\t" \ + "j $t9" "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "end13"#RD":" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "move $t9, $ra" "\n\t" \ + "jalr $t0, $t9" "\n\t" \ + "nop" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD, "t0", "t9", "ra" \ + ); \ + printf("BAL JR JAL :: 0x%llx, RSval: 0x%llx\n", \ + out, (long long) RSval); \ +} + +#define TEST3(instruction, RDval, RSval, RTval, RD, RS, RT) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + "move $"#RT", %2" "\n\t" \ + "move $"#RD", %3" "\n\t" \ + instruction" $"#RS", $"#RT", end"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 5" "\n\t" \ + "end"instruction#RDval":" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RTval), "r" (RDval) \ + : #RD, #RS, #RT \ + ); \ + printf(instruction" :: out: 0x%llx, RSval: 0x%llx, RTval: 0x%llx\n", \ + out, (long long) RSval, (long long) RTval); \ +} + +#define TEST4(instruction, RDval, RSval, RD, RS) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + "move $"#RD", %2" "\n\t" \ + instruction" $"#RS", end"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 8" "\n\t" \ + "end"instruction#RDval":" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RDval) \ + : #RD, #RS \ + ); \ + printf(instruction" :: out: 0x%llx, RSval: 0x%llx\n", \ + out, (long long) RSval); \ +} + +#define TEST5(instruction, RDval, RSval, RD, RS) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %2" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + instruction" $"#RS", end21"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "daddi $"#RD", $"#RD", 5" "\n\t" \ + "b r_end"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "end21"instruction#RDval":" "\n\t" \ + "daddi $"#RD", $"#RD", 1" "\n\t" \ + "jr $ra" "\n\t" \ + "r_end"instruction#RDval":" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RDval) \ + : #RD, #RS, "ra" \ + ); \ + printf(instruction" :: out: 0x%llx, RSval: 0x%llx\n", \ + out, (long long) RSval); \ +} + +int main() +{ + int i; + init_reg_val2(); + + printf("B \n"); + for (i = 0; i < N; i++) + TEST1(reg_val1[i], t0); + + printf("BAL \n"); + for (i = 0; i < N; i++) + TEST2(reg_val1[i], t0); + + printf("--- BEQ --- if RSval == RTval then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TEST3("beq", 0, 0, 1, 2, 3, 4); + TEST3("beq", 1, 1, 1, 3, 4, 5); + TEST3("beq", 2, 0xffffffff, 0xffffffff, 4, 5, 6); + TEST3("beq", 3, 0xffffffff, 0xfffffffe, 5, 6, 7); + TEST3("beq", 4, 0xfffffffe, 0xffffffff, 6, 7, 8); + TEST3("beq", 5, 0xffffffff, 0xffffffff, 7, 8, 9); + TEST3("beq", 6, 0x5, 0x5, 8, 9, 10); + TEST3("beq", 7, -3, -4, 9, 10, 11); + TEST3("beq", 8, 125, 125, 10, 11, 12); + TEST3("beq", 9, 0x80000000, 0x80000000, 11, 12, 15); + TEST3("beq", 10, 0xffffffff, 0x80000000, 12, 13, 14); + TEST3("beq", 11, 0x256, 0x256, 13, 14, 15); + TEST3("beq", 12, 0x55, 0x55, 14, 15, 16); + TEST3("beq", 13, 0xfff, 0xdd, 15, 16, 17); + TEST3("beq", 14, -1, 0x5, 16, 17, 18); + TEST3("beq", 15, -1, -1, 17, 18, 19); + + printf("--- BGEZ --- if RSval >= 0 then " \ + "out = RDval + 1 else out = RDval + 9\n"); + TEST4("bgez", 0, 0, 2, 3); + TEST4("bgez", 1, 1, 3, 4); + TEST4("bgez", 2, 0xffffffff, 4, 5); + TEST4("bgez", 3, 0xffffffff, 5, 6); + TEST4("bgez", 4, 0xfffffffe, 6, 7); + TEST4("bgez", 5, 0xffffffff, 7, 8); + TEST4("bgez", 6, 0x5, 8, 9); + TEST4("bgez", 7, -3, 9, 10); + TEST4("bgez", 8, 125, 10, 11); + TEST4("bgez", 9, 0x80000000, 11, 12); + TEST4("bgez", 10, 0xffffffff, 12, 13); + TEST4("bgez", 11, 0x256, 13, 14); + TEST4("bgez", 12, 0x55, 14, 15); + TEST4("bgez", 13, 0xfff, 15, 16); + TEST4("bgez", 14, -1, 16, 17); + TEST4("bgez", 15, -1, 17, 18); + + printf("--- BGEZAL --- if RSval >= 0 then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TEST5("bgezal", 0, 0, 2, 3); + TEST5("bgezal", 1, 1, 3, 4); + TEST5("bgezal", 2, 0xffffffff, 4, 5); + TEST5("bgezal", 3, 0xffffffff, 5, 6); + TEST5("bgezal", 4, 0xfffffffe, 6, 7); + TEST5("bgezal", 5, 0xffffffff, 7, 8); + TEST5("bgezal", 6, 0x5, 8, 9); + TEST5("bgezal", 7, -3, 9, 10); + TEST5("bgezal", 8, 125, 10, 11); + TEST5("bgezal", 9, 0x80000000, 11, 12); + TEST5("bgezal", 10, 0xffffffff, 12, 13); + TEST5("bgezal", 11, 0x256, 13, 14); + TEST5("bgezal", 12, 0x55, 14, 15); + TEST5("bgezal", 13, 0xfff, 15, 16); + TEST5("bgezal", 14, -1, 16, 17); + TEST5("bgezal", 15, -1, 17, 18); + + printf("--- BGTZ --- if RSval > 0 then " \ + "out = RDval + 1 else out = RDval + 9\n"); + TEST4("bgtz", 0, 0, 2, 3); + TEST4("bgtz", 1, 1, 3, 4); + TEST4("bgtz", 2, 0xffffffff, 4, 5); + TEST4("bgtz", 3, 0xffffffff, 5, 6); + TEST4("bgtz", 4, 0xfffffffe, 6, 7); + TEST4("bgtz", 5, 0xffffffff, 7, 8); + TEST4("bgtz", 6, 0x5, 8, 9); + TEST4("bgtz", 7, -3, 9, 10); + TEST4("bgtz", 8, 125, 10, 11); + TEST4("bgtz", 9, 0x80000000, 11, 12); + TEST4("bgtz", 10, 0xffffffff, 12, 13); + TEST4("bgtz", 11, 0x256, 13, 14); + TEST4("bgtz", 12, 0x55, 14, 15); + TEST4("bgtz", 13, 0xfff, 15, 16); + TEST4("bgtz", 14, -1, 16, 17); + TEST4("bgtz", 15, -1, 17, 18); + + printf("--- BLEZ --- if RSval <= 0 then " \ + "out = RDval + 1 else out = RDval + 9\n"); + TEST4("blez", 0, 0, 2, 3); + TEST4("blez", 1, 1, 3, 4); + TEST4("blez", 2, 0xffffffff, 4, 5); + TEST4("blez", 3, 0xffffffff, 5, 6); + TEST4("blez", 4, 0xfffffffe, 6, 7); + TEST4("blez", 5, 0xffffffff, 7, 8); + TEST4("blez", 6, 0x5, 8, 9); + TEST4("blez", 7, -3, 9, 10); + TEST4("blez", 8, 125, 10, 11); + TEST4("blez", 9, 0x80000000, 11, 12); + TEST4("blez", 10, 0xffffffff, 12, 13); + TEST4("blez", 11, 0x256, 13, 14); + TEST4("blez", 12, 0x55, 14, 15); + TEST4("blez", 13, 0xfff, 15, 16); + TEST4("blez", 14, -1, 16, 17); + TEST4("blez", 15, -1, 17, 18); + + printf("--- BLTZ --- if RSval < 0 then " \ + "out = RDval + 1 else out = RDval + 9\n"); + TEST4("bltz", 0, 0, 2, 3); + TEST4("bltz", 1, 1, 3, 4); + TEST4("bltz", 2, 0xffffffff, 4, 5); + TEST4("bltz", 3, 0xffffffff, 5, 6); + TEST4("bltz", 4, 0xfffffffe, 6, 7); + TEST4("bltz", 5, 0xffffffff, 7, 8); + TEST4("bltz", 6, 0x5, 8, 9); + TEST4("bltz", 7, -3, 9, 10); + TEST4("bltz", 8, 125, 10, 11); + TEST4("bltz", 9, 0x80000000, 11, 12); + TEST4("bltz", 10, 0xffffffff, 12, 13); + TEST4("bltz", 11, 0x256, 13, 14); + TEST4("bltz", 12, 0x55, 14, 15); + TEST4("bltz", 13, 0xfff, 15, 16); + TEST4("bltz", 14, -1, 16, 17); + TEST4("bltz", 15, -1, 17, 18); + + printf("--- BLTZAL --- if RSval < 0 then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TEST5("bltzal", 0, 0, 2, 3); + TEST5("bltzal", 1, 1, 3, 4); + TEST5("bltzal", 2, 0xffffffff, 4, 5); + TEST5("bltzal", 3, 0xffffffff, 5, 6); + TEST5("bltzal", 4, 0xfffffffe, 6, 7); + TEST5("bltzal", 5, 0xffffffff, 7, 8); + TEST5("bltzal", 6, 0x5, 8, 9); + TEST5("bltzal", 7, -3, 9, 10); + TEST5("bltzal", 8, 125, 10, 11); + TEST5("bltzal", 9, 0x80000000, 11, 12); + TEST5("bltzal", 10, 0xffffffff, 12, 13); + TEST5("bltzal", 11, 0x256, 13, 14); + TEST5("bltzal", 12, 0x55, 14, 15); + TEST5("bltzal", 13, 0xfff, 15, 16); + TEST5("bltzal", 14, -1, 16, 17); + TEST5("bltzal", 15, -1, 17, 18); + + printf("--- BNE --- if RSval != RTval then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TEST3("bne", 0, 0, 1, 2, 3, 4); + TEST3("bne", 1, 1, 1, 3, 4, 5); + TEST3("bne", 2, 0xffffffff, 0xffffffff, 4, 5, 6); + TEST3("bne", 3, 0xffffffff, 0xfffffffe, 5, 6, 7); + TEST3("bne", 4, 0xfffffffe, 0xffffffff, 6, 7, 8); + TEST3("bne", 5, 0xffffffff, 0xffffffff, 7, 8, 9); + TEST3("bne", 6, 0x5, 0x5, 8, 9, 10); + TEST3("bne", 7, -3, -4, 9, 10, 11); + TEST3("bne", 8, 125, 125, 10, 11, 12); + TEST3("bne", 9, 0x80000000, 0x80000000, 11, 12, 15); + TEST3("bne", 10, 0xffffffff, 0x80000000, 12, 13, 14); + TEST3("bne", 11, 0x256, 0x256, 13, 14, 15); + TEST3("bne", 12, 0x55, 0x55, 14, 15, 16); + TEST3("bne", 13, 0xfff, 0xdd, 15, 16, 17); + TEST3("bne", 14, -1, 0x5, 16, 17, 18); + TEST3("bne", 15, -1, -1, 17, 18, 19); + + printf("JAL, JR \n"); + for (i = 0; i < N; i++) + TEST2a(reg_val1[i], t0); + + printf("J, JALR \n"); + for (i = 0; i < N; i++) + TEST2b(reg_val1[i], t1); + + return 0; +} diff --git a/none/tests/mips64/branches.c b/none/tests/mips64/branches.c new file mode 100644 index 0000000000..c121ee8dcf --- /dev/null +++ b/none/tests/mips64/branches.c @@ -0,0 +1,767 @@ +#include + +#define TESTINST1(RSval, RD) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "b end"#RSval "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "end"#RSval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD \ + ); \ + printf("B :: %d, RSval: %d\n", \ + out, RSval); \ +} + +#define TESTINST2(RSval, RD) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "b end12"#RSval "\n\t" \ + "addi $"#RD", $"#RD", 3" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "end12"#RSval":" "\n\t" \ + "addi $"#RD", $"#RD", 3" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD \ + ); \ + printf("B :: %d, RSval: %d\n", \ + out, RSval); \ +} + +#define TESTINST3(RSval, RD) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "bal end21"#RSval "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "b r_end"#RSval "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "end21"#RSval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "jr $ra" "\n\t" \ + "nop" "\n\t" \ + "r_end"#RSval":" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD, "ra" \ + ); \ + printf("B BAL JR :: %d, RSval: %d\n", \ + out, RSval); \ +} + +#define TESTINST3j(RSval, RD) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "dla $t9, end31"#RSval "\n\t" \ + "jal $t9" "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "dla $t9, r_end11"#RSval "\n\t" \ + "j $t9" "\n\t" \ + "nop" "\n\t" \ + "end31"#RSval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "jr $ra" "\n\t" \ + "nop" "\n\t" \ + "r_end11"#RSval":" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD, "t9" \ + ); \ + printf("J JAL JR :: %d, RSval: %d\n", \ + out, RSval); \ +} + +#define TESTINST3ja(RSval, RD) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "dla $t9, end41"#RSval "\n\t" \ + "jalr $t0, $t9" "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "dla $t9, r_end21"#RSval "\n\t" \ + "j $t9" "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "end41"#RSval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "move $t9, $t0" "\n\t" \ + "jr $t9" "\n\t" \ + "nop" "\n\t" \ + "r_end21"#RSval":" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD, "t0", "t9" \ + ); \ + printf("J JALR JR :: %d, RSval: %d\n", \ + out, RSval); \ +} + +#define TESTINST4(instruction, RDval, RSval, RTval, RD, RS, RT) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + "move $"#RT", %2" "\n\t" \ + "move $"#RD", %3" "\n\t" \ + instruction" $"#RS", $"#RT", end"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "end"instruction#RDval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "move %0, $" #RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RTval), "r" (RDval) \ + : #RD, #RS, #RT \ + ); \ + printf(instruction" :: out: %d, RDval: %d, RSval: %d, RTval: %d\n", \ + out, RDval, RSval, RTval); \ +} + +#define TESTINST5(instruction, RDval, RSval, RD, RS) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + "move $"#RD", %2" "\n\t" \ + instruction" $"#RS", end"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "end"instruction#RDval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RDval) \ + : #RD, #RS \ + ); \ + printf(instruction" :: out: %d, RDval: %d, RSval: %d\n", \ + out, RDval, RSval); \ +} + +#define TESTINST6(instruction, RDval, RSval, RD, RS) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %2" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + instruction" $"#RS", end21"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "b r_end"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "end21"instruction#RDval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "jr $ra" "\n\t" \ + "r_end"instruction#RDval":" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RDval) \ + : #RD, #RS, "ra" \ + ); \ + printf(instruction" :: out: %d, RDval: %d, RSval: %d\n", \ + out, RDval, RSval); \ +} + +#define TESTINST4l(instruction, RDval, RSval, RTval, RD, RS, RT) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + "move $"#RT", %2" "\n\t" \ + "move $"#RD", %3" "\n\t" \ + instruction" $"#RS", $"#RT", end"instruction#RDval "\n\t" \ + "addi $"#RD", $"#RD", 3" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "end"instruction#RDval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RTval), "r" (RDval) \ + : #RD, #RS, #RT \ + ); \ + printf(instruction" :: out: %d, RDval: %d, RSval: %d, RTval: %d\n", \ + out, RDval, RSval, RTval); \ +} + +#define TESTINST5l(instruction, RDval, RSval, RD, RS) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + "move $"#RD", %2" "\n\t" \ + instruction" $"#RS", end"instruction#RDval "\n\t" \ + "addi $"#RD", $"#RD", 3" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "end"instruction#RDval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RDval) \ + : #RD, #RS \ + ); \ + printf(instruction" :: out: %d, RDval: %d, RSval: %d\n", \ + out, RDval, RSval); \ +} + +#define TESTINST6l(instruction, RDval, RSval, RD, RS) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "move $"#RD", %2" "\n\t" \ + "move $"#RS", %1" "\n\t" \ + instruction" $"#RS", end21"instruction#RDval "\n\t" \ + "addi $"#RD", $"#RD", 3" "\n\t" \ + "addi $"#RD", $"#RD", 5" "\n\t" \ + "b r_end"instruction#RDval "\n\t" \ + "nop" "\n\t" \ + "end21"instruction#RDval":" "\n\t" \ + "addi $"#RD", $"#RD", 1" "\n\t" \ + "jr $ra" "\n\t" \ + "nop" "\n\t" \ + "r_end"instruction#RDval":" "\n\t" \ + "move %0, $"#RD "\n\t" \ + ".set reorder" "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RDval) \ + : #RD, #RS, "ra" \ + ); \ + printf(instruction" :: out: %d, RDval: %d, RSval: %d\n", \ + out, RDval, RSval); \ +} + + +int main() +{ + printf("b\n"); + TESTINST1(0, 2); + TESTINST1(1, 3); + TESTINST1(2, 4); + TESTINST1(3, 5); + TESTINST1(4, 6); + TESTINST1(5, 7); + TESTINST1(6, 8); + TESTINST1(7, 9); + TESTINST1(8, 10); + TESTINST1(9, 11); + TESTINST1(10, 12); + TESTINST1(11, 13); + TESTINST1(12, 14); + TESTINST1(13, 15); + TESTINST1(14, 16); + TESTINST1(15, 17); + TESTINST1(16, 18); + TESTINST1(17, 19); + TESTINST1(18, 20); + TESTINST1(19, 21); + TESTINST1(20, 22); + TESTINST1(21, 23); + TESTINST1(22, 24); + TESTINST1(23, 25); + + printf("b\n"); + TESTINST2(0, 2); + TESTINST2(1, 3); + TESTINST2(2, 4); + TESTINST2(3, 5); + TESTINST2(4, 6); + TESTINST2(5, 7); + TESTINST2(6, 8); + TESTINST2(7, 9); + TESTINST2(8, 10); + TESTINST2(9, 11); + TESTINST2(10, 12); + TESTINST2(11, 13); + TESTINST2(12, 14); + TESTINST2(13, 15); + TESTINST2(14, 16); + TESTINST2(15, 17); + TESTINST2(16, 18); + TESTINST2(17, 19); + TESTINST2(18, 20); + TESTINST2(19, 21); + TESTINST2(20, 22); + TESTINST2(21, 23); + TESTINST2(22, 24); + TESTINST2(23, 25); + + printf("b, bal, jr\n"); + TESTINST3(0, 2); + TESTINST3(1, 3); + TESTINST3(2, 4); + TESTINST3(3, 5); + TESTINST3(4, 6); + TESTINST3(5, 7); + TESTINST3(6, 8); + TESTINST3(7, 9); + TESTINST3(8, 10); + TESTINST3(9, 11); + TESTINST3(10, 12); + TESTINST3(11, 13); + TESTINST3(12, 14); + TESTINST3(13, 15); + TESTINST3(14, 16); + TESTINST3(15, 17); + TESTINST3(16, 18); + TESTINST3(17, 19); + TESTINST3(18, 20); + TESTINST3(19, 21); + TESTINST3(20, 22); + TESTINST3(21, 23); + TESTINST3(22, 24); + TESTINST3(23, 25); + + printf("--- BEQ --- if RSval == RTval then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TESTINST4("beq", 0, 0, 1, 2, 3 , 4); + TESTINST4("beq", 1, 1, 1, 3, 4, 5); + TESTINST4("beq", 2, 0xffffffff, 0xffffffff, 4, 5, 6); + TESTINST4("beq", 3, 0xffffffff, 0xfffffffe, 5, 6, 7); + TESTINST4("beq", 4, 0xfffffffe, 0xffffffff, 6, 8, 9); + TESTINST4("beq", 5, 0xffffffff, 0xffffffff, 7, 8, 9); + TESTINST4("beq", 6, 0x5, 0x5, 8, 9, 10); + TESTINST4("beq", 7, -3, -4, 9, 10, 11); + TESTINST4("beq", 8, 125, 125, 10, 11, 12); + TESTINST4("beq", 9, 0x80000000, 0x80000000, 11, 12, 13); + TESTINST4("beq", 10, 0xffffffff, 0x80000000, 12, 13, 14); + TESTINST4("beq", 11, 0x256, 0x256, 13, 14, 15); + TESTINST4("beq", 12, 0x55, 0x55, 14, 15, 16); + TESTINST4("beq", 13, 0xfff, 0xdd, 16, 17, 18); + TESTINST4("beq", 14, -1, 0x5, 2, 25, 24); + TESTINST4("beq", 15, -1, -1, 25, 24, 7); + + printf("--- BNE --- if RSval != RTval then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TESTINST4("bne", 0, 0, 1, 2, 3, 4); + TESTINST4("bne", 1, 1, 1, 3, 4, 5); + TESTINST4("bne", 2, 0xffffffff, 0xffffffff, 4, 5, 6); + TESTINST4("bne", 3, 0xffffffff, 0xfffffffe, 5, 6, 7); + TESTINST4("bne", 4, 0xfffffffe, 0xffffffff, 6, 8, 9); + TESTINST4("bne", 5, 0xffffffff, 0xffffffff, 7, 8, 9); + TESTINST4("bne", 6, 0x5, 0x5, 8, 9, 10); + TESTINST4("bne", 7, -3, -4, 9, 10, 11); + TESTINST4("bne", 8, 125, 125, 10, 11, 12); + TESTINST4("bne", 9, 0x80000000, 0x80000000, 11, 12, 13); + TESTINST4("bne", 10, 0xffffffff, 0x80000000, 12, 13, 14); + TESTINST4("bne", 11, 0x256, 0x256, 13, 14, 15); + TESTINST4("bne", 12, 0x55, 0x55, 14, 15, 16); + TESTINST4("bne", 13, 0xfff, 0xdd, 16, 17, 18); + TESTINST4("bne", 14, -1, 0x5, 2, 25, 24); + TESTINST4("bne", 15, -1, -1, 25, 24, 7); + + printf("--- BEQZ --- if RSval == 0 then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TESTINST5("beqz", 0, 0, 2, 3); + TESTINST5("beqz", 1, 1, 3, 4); + TESTINST5("beqz", 2, 0xffffffff, 4, 5); + TESTINST5("beqz", 3, 0xffffffff, 5, 6); + TESTINST5("beqz", 4, 0xfffffffe, 6, 8); + TESTINST5("beqz", 5, 0xffffffff, 7, 8); + TESTINST5("beqz", 6, 0x5, 8, 9); + TESTINST5("beqz", 7, -3, 9, 10); + TESTINST5("beqz", 8, 125, 10, 11); + TESTINST5("beqz", 9, 0x80000000, 11, 12); + TESTINST5("beqz", 10, 0xffffffff, 12, 13); + TESTINST5("beqz", 11, 0x256, 13, 14); + TESTINST5("beqz", 12, 0x55, 14, 15); + TESTINST5("beqz", 13, 0xfff, 16, 17); + TESTINST5("beqz", 14, -1, 2, 25); + TESTINST5("beqz", 15, -1, 25, 24); + + printf("--- BGEZ --- if RSval >= 0 then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TESTINST5("bgez", 0, 0, 2, 3); + TESTINST5("bgez", 1, 1, 3, 4); + TESTINST5("bgez", 2, 0xffffffff, 4, 5); + TESTINST5("bgez", 3, 0xffffffff, 5, 6); + TESTINST5("bgez", 4, 0xfffffffe, 6, 8); + TESTINST5("bgez", 5, 0xffffffff, 7, 8); + TESTINST5("bgez", 6, 0x5, 8, 9); + TESTINST5("bgez", 7, -3, 9, 10); + TESTINST5("bgez", 8, 125, 10, 11); + TESTINST5("bgez", 9, 0x80000000, 11, 12); + TESTINST5("bgez", 10, 0xffffffff, 12, 13); + TESTINST5("bgez", 11, 0x256, 13, 14); + TESTINST5("bgez", 12, 0x55, 14, 15); + TESTINST5("bgez", 13, 0xfff, 16, 17); + TESTINST5("bgez", 14, -1, 2, 25); + TESTINST5("bgez", 15, -1, 25, 24); + + printf("--- BGTZ --- if RSval > 0 then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TESTINST5("bgtz", 0, 0, 2, 3); + TESTINST5("bgtz", 1, 1, 3, 4); + TESTINST5("bgtz", 2, 0xffffffff, 4, 5); + TESTINST5("bgtz", 3, 0xffffffff, 5, 6); + TESTINST5("bgtz", 4, 0xfffffffe, 6, 8); + TESTINST5("bgtz", 5, 0xffffffff, 7, 8); + TESTINST5("bgtz", 6, 0x5, 8, 9); + TESTINST5("bgtz", 7, -3, 9, 10); + TESTINST5("bgtz", 8, 125, 10, 11); + TESTINST5("bgtz", 9, 0x80000000, 11, 12); + TESTINST5("bgtz", 10, 0xffffffff, 12, 13); + TESTINST5("bgtz", 11, 0x256, 13, 14); + TESTINST5("bgtz", 12, 0x55, 14, 15); + TESTINST5("bgtz", 13, 0xfff, 16, 17); + TESTINST5("bgtz", 14, -1, 2, 25); + TESTINST5("bgtz", 15, -1, 25, 24); + + printf("--- BLEZ --- if RSval <= 0 then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TESTINST5("blez", 0, 0, 2, 3); + TESTINST5("blez", 1, 1, 3, 4); + TESTINST5("blez", 2, 0xffffffff, 4, 5); + TESTINST5("blez", 3, 0xffffffff, 5, 6); + TESTINST5("blez", 4, 0xfffffffe, 6, 8); + TESTINST5("blez", 5, 0xffffffff, 7, 8); + TESTINST5("blez", 6, 0x5, 8, 9); + TESTINST5("blez", 7, -3, 9, 10); + TESTINST5("blez", 8, 125, 10, 11); + TESTINST5("blez", 9, 0x80000000, 11, 12); + TESTINST5("blez", 10, 0xffffffff, 12, 13); + TESTINST5("blez", 11, 0x256, 13, 14); + TESTINST5("blez", 12, 0x55, 14, 15); + TESTINST5("blez", 13, 0xfff, 16, 17); + TESTINST5("blez", 14, -1, 2, 25); + TESTINST5("blez", 15, -1, 25, 24); + + printf("--- BLTZ --- if RSval < 0 then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TESTINST5("bltz", 0, 0, 2, 3); + TESTINST5("bltz", 1, 1, 3, 4); + TESTINST5("bltz", 2, 0xffffffff, 4, 5); + TESTINST5("bltz", 3, 0xffffffff, 5, 6); + TESTINST5("bltz", 4, 0xfffffffe, 6, 8); + TESTINST5("bltz", 5, 0xffffffff, 7, 8); + TESTINST5("bltz", 6, 0x5, 8, 9); + TESTINST5("bltz", 7, -3, 9, 10); + TESTINST5("bltz", 8, 125, 10, 11); + TESTINST5("bltz", 9, 0x80000000, 11, 12); + TESTINST5("bltz", 10, 0xffffffff, 12, 13); + TESTINST5("bltz", 11, 0x256, 13, 14); + TESTINST5("bltz", 12, 0x55, 14, 15); + TESTINST5("bltz", 13, 0xfff, 16, 17); + TESTINST5("bltz", 14, -1, 2, 25); + TESTINST5("bltz", 15, -1, 25, 24); + + printf("--- BGEZAL --- if RSval >= 0 then " \ + "out = RDval + 6 else out = RDval + 5\n"); + TESTINST6("bgezal", 0, 0, 2, 3); + TESTINST6("bgezal", 1, 1, 3, 4); + TESTINST6("bgezal", 2, 0xffffffff, 4, 5); + TESTINST6("bgezal", 3, 0xffffffff, 5, 6); + TESTINST6("bgezal", 4, 0xfffffffe, 6, 8); + TESTINST6("bgezal", 5, 0xffffffff, 7, 8); + TESTINST6("bgezal", 6, 0x5, 8, 9); + TESTINST6("bgezal", 7, -3, 9, 10); + TESTINST6("bgezal", 8, 125, 10, 11); + TESTINST6("bgezal", 9, 0x80000000, 11, 12); + TESTINST6("bgezal", 10, 0xffffffff, 12, 13); + TESTINST6("bgezal", 11, 0x256, 13, 14); + TESTINST6("bgezal", 12, 0x55, 14, 15); + TESTINST6("bgezal", 13, 0xfff, 16, 17); + TESTINST6("bgezal", 14, -1, 2, 25); + TESTINST6("bgezal", 15, -1, 25, 24); + + printf("--- BLTZAL --- if RSval < 0 then " \ + "out = RDval + 6 else out = RDval + 5\n"); + TESTINST6("bltzal", 0, 0, 2, 3); + TESTINST6("bltzal", 1, 1, 3, 4); + TESTINST6("bltzal", 2, 0xffffffff, 4, 5); + TESTINST6("bltzal", 3, 0xffffffff, 5, 6); + TESTINST6("bltzal", 4, 0xfffffffe, 6, 8); + TESTINST6("bltzal", 5, 0xffffffff, 7, 8); + TESTINST6("bltzal", 6, 0x5, 8, 9); + TESTINST6("bltzal", 7, -3, 9, 10); + TESTINST6("bltzal", 8, 125, 10, 11); + TESTINST6("bltzal", 9, 0x80000000, 11, 12); + TESTINST6("bltzal", 10, 0xffffffff, 12, 13); + TESTINST6("bltzal", 11, 0x256, 13, 14); + TESTINST6("bltzal", 12, 0x55, 14, 15); + TESTINST6("bltzal", 13, 0xfff, 16, 17); + TESTINST6("bltzal", 14, -1, 2, 25); + TESTINST6("bltzal", 15, -1, 25, 24); + + printf("--- BNEZ --- if RSval != 0 then " \ + "out = RDval + 1 else out = RDval + 6\n"); + TESTINST5("bnez", 0, 0, 2, 3); + TESTINST5("bnez", 1, 1, 3, 4); + TESTINST5("bnez", 2, 0xffffffff, 4, 5); + TESTINST5("bnez", 3, 0xffffffff, 5, 6); + TESTINST5("bnez", 4, 0xfffffffe, 6, 8); + TESTINST5("bnez", 5, 0xffffffff, 7, 8); + TESTINST5("bnez", 6, 0x5, 8, 9); + TESTINST5("bnez", 7, -3, 9, 10); + TESTINST5("bnez", 8, 125, 10, 11); + TESTINST5("bnez", 9, 0x80000000, 11, 12); + TESTINST5("bnez", 10, 0xffffffff, 12, 13); + TESTINST5("bnez", 11, 0x256, 13, 14); + TESTINST5("bnez", 12, 0x55, 14, 15); + TESTINST5("bnez", 13, 0xfff, 16, 17); + TESTINST5("bnez", 14, -1, 2, 25); + TESTINST5("bnez", 15, -1, 25, 24); + + printf("--- BEQL --- if RSval == RTval then " \ + "out = RDval + 4 else out = RDval + 6\n"); + TESTINST4l("beql", 0, 0, 1, 2, 3, 4); + TESTINST4l("beql", 1, 1, 1, 3, 4, 5); + TESTINST4l("beql", 2, 0xffffffff, 0xffffffff, 4, 5, 6); + TESTINST4l("beql", 3, 0xffffffff, 0xfffffffe, 5, 6, 7); + TESTINST4l("beql", 4, 0xfffffffe, 0xffffffff, 6, 8, 9); + TESTINST4l("beql", 5, 0xffffffff, 0xffffffff, 7, 8, 9); + TESTINST4l("beql", 6, 0x5, 0x5, 8, 9, 10); + TESTINST4l("beql", 7, -3, -4, 9, 10, 11); + TESTINST4l("beql", 8, 125, 125, 10, 11, 12); + TESTINST4l("beql", 9, 0x80000000, 0x80000000, 11, 12, 13); + TESTINST4l("beql", 10, 0xffffffff, 0x80000000, 12, 13, 14); + TESTINST4l("beql", 11, 0x256, 0x256, 13, 14, 15); + TESTINST4l("beql", 12, 0x55, 0x55, 14, 15, 16); + TESTINST4l("beql", 13, 0xfff, 0xdd, 16, 17, 18); + TESTINST4l("beql", 14, -1, 0x5, 2, 25, 24); + TESTINST4l("beql", 15, -1, -1, 25, 24, 7); + + printf("--- BGEZALL --- if RSval >= 0 then " \ + "out = RDval + 4 else out = RDval + 6\n"); + TESTINST5l("bgezall", 0, 0, 2, 3); + TESTINST5l("bgezall", 1, 1, 3, 4); + TESTINST5l("bgezall", 2, 0xffffffff, 4, 5); + TESTINST5l("bgezall", 3, 0xffffffff, 5, 6); + TESTINST5l("bgezall", 4, 0xfffffffe, 6, 8); + TESTINST5l("bgezall", 5, 0xffffffff, 7, 8); + TESTINST5l("bgezall", 6, 0x5, 8, 9); + TESTINST5l("bgezall", 7, -3, 9, 10); + TESTINST5l("bgezall", 8, 125, 10, 11); + TESTINST5l("bgezall", 9, 0x80000000, 11, 12); + TESTINST5l("bgezall", 10, 0xffffffff, 12, 13); + TESTINST5l("bgezall", 11, 0x256, 13, 14); + TESTINST5l("bgezall", 12, 0x55, 14, 15); + TESTINST5l("bgezall", 13, 0xfff, 16, 17); + TESTINST5l("bgezall", 14, -1, 2, 25); + TESTINST5l("bgezall", 15, -1, 25, 24); + + printf("--- BLTZALL --- if RSval < 0 then " \ + "out = RDval + 4 else out = RDval + 6\n"); + TESTINST5l("bltzall", 0, 0, 2, 3); + TESTINST5l("bltzall", 1, 1, 3, 4); + TESTINST5l("bltzall", 2, 0xffffffff, 4, 5); + TESTINST5l("bltzall", 3, 0xffffffff, 5, 6); + TESTINST5l("bltzall", 4, 0xfffffffe, 6, 8); + TESTINST5l("bltzall", 5, 0xffffffff, 7, 8); + TESTINST5l("bltzall", 6, 0x5, 8, 9); + TESTINST5l("bltzall", 7, -3, 9, 10); + TESTINST5l("bltzall", 8, 125, 10, 11); + TESTINST5l("bltzall", 9, 0x80000000, 11, 12); + TESTINST5l("bltzall", 10, 0xffffffff, 12, 13); + TESTINST5l("bltzall", 11, 0x256, 13, 14); + TESTINST5l("bltzall", 12, 0x55, 14, 15); + TESTINST5l("bltzall", 13, 0xfff, 16, 17); + TESTINST5l("bltzall", 14, -1, 2, 25); + TESTINST5l("bltzall", 15, -1, 25, 24); + + printf("--- BGEZL --- if RSval >= 0 then " \ + "out = RDval + 4 else out = RDval + 6\n"); + TESTINST5l("bgezl", 0, 0, 2, 3); + TESTINST5l("bgezl", 1, 1, 3, 4); + TESTINST5l("bgezl", 2, 0xffffffff, 4, 5); + TESTINST5l("bgezl", 3, 0xffffffff, 5, 6); + TESTINST5l("bgezl", 4, 0xfffffffe, 6, 8); + TESTINST5l("bgezl", 5, 0xffffffff, 7, 8); + TESTINST5l("bgezl", 6, 0x5, 8, 9); + TESTINST5l("bgezl", 7, -3, 9, 10); + TESTINST5l("bgezl", 8, 125, 10, 11); + TESTINST5l("bgezl", 9, 0x80000000, 11, 12); + TESTINST5l("bgezl", 10, 0xffffffff, 12, 13); + TESTINST5l("bgezl", 11, 0x256, 13, 14); + TESTINST5l("bgezl", 12, 0x55, 14, 15); + TESTINST5l("bgezl", 13, 0xfff, 16, 17); + TESTINST5l("bgezl", 14, -1, 2, 25); + TESTINST5l("bgezl", 15, -1, 25, 24); + + printf("--- BGTZL --- if RSval > 0 then " \ + "out = RDval + 4 else out = RDval + 6\n"); + TESTINST5l("bgtzl", 0, 0, 2, 3); + TESTINST5l("bgtzl", 1, 1, 3, 4); + TESTINST5l("bgtzl", 2, 0xffffffff, 4, 5); + TESTINST5l("bgtzl", 3, 0xffffffff, 5, 6); + TESTINST5l("bgtzl", 4, 0xfffffffe, 6, 8); + TESTINST5l("bgtzl", 5, 0xffffffff, 7, 8); + TESTINST5l("bgtzl", 6, 0x5, 8, 9); + TESTINST5l("bgtzl", 7, -3, 9, 10); + TESTINST5l("bgtzl", 8, 125, 10, 11); + TESTINST5l("bgtzl", 9, 0x80000000, 11, 12); + TESTINST5l("bgtzl", 10, 0xffffffff, 12, 13); + TESTINST5l("bgtzl", 11, 0x256, 13, 14); + TESTINST5l("bgtzl", 12, 0x55, 14, 15); + TESTINST5l("bgtzl", 13, 0xfff, 16, 17); + TESTINST5l("bgtzl", 14, -1, 2, 25); + TESTINST5l("bgtzl", 15, -1, 25, 24); + + printf("--- BLEZL --- if RSval <= 0 then " \ + "out = RDval + 4 else out = RDval + 6\n"); + TESTINST5l("blezl", 0, 0, 2, 3); + TESTINST5l("blezl", 1, 1, 3, 4); + TESTINST5l("blezl", 2, 0xffffffff, 4, 5); + TESTINST5l("blezl", 3, 0xffffffff, 5, 6); + TESTINST5l("blezl", 4, 0xfffffffe, 6, 8); + TESTINST5l("blezl", 5, 0xffffffff, 7, 8); + TESTINST5l("blezl", 6, 0x5, 8, 9); + TESTINST5l("blezl", 7, -3, 9, 10); + TESTINST5l("blezl", 8, 125, 10, 11); + TESTINST5l("blezl", 9, 0x80000000, 11, 12); + TESTINST5l("blezl", 10, 0xffffffff, 12, 13); + TESTINST5l("blezl", 11, 0x256, 13, 14); + TESTINST5l("blezl", 12, 0x55, 14, 15); + TESTINST5l("blezl", 13, 0xfff, 16, 17); + TESTINST5l("blezl", 14, -1, 2, 25); + TESTINST5l("blezl", 15, -1, 25, 24); + + printf("--- BGEZALL --- if RSval >= 0 then " \ + "out = RDval + 9 else out = RDval + 5\n"); + TESTINST6l("bgezall", 0, 0, 2, 3); + TESTINST6l("bgezall", 1, 1, 3, 4); + TESTINST6l("bgezall", 2, 0xffffffff, 4, 5); + TESTINST6l("bgezall", 3, 0xffffffff, 5, 6); + TESTINST6l("bgezall", 4, 0xfffffffe, 6, 8); + TESTINST6l("bgezall", 5, 0xffffffff, 7, 8); + TESTINST6l("bgezall", 6, 0x5, 8, 9); + TESTINST6l("bgezall", 7, -3, 9, 10); + TESTINST6l("bgezall", 8, 125, 10, 11); + TESTINST6l("bgezall", 9, 0x80000000, 11, 12); + TESTINST6l("bgezall", 10, 0xffffffff, 12, 13); + TESTINST6l("bgezall", 11, 0x256, 13, 14); + TESTINST6l("bgezall", 12, 0x55, 14, 15); + TESTINST6l("bgezall", 13, 0xfff, 16, 17); + TESTINST6l("bgezall", 14, -1, 2, 25); + TESTINST6l("bgezall", 15, -1, 25, 24); + + printf("--- BLTZL --- if RSval < 0 then " \ + "out = RDval + 4 else out = RDval + 6\n"); + TESTINST5l("bltzl", 0, 0, 2, 3); + TESTINST5l("bltzl", 1, 1, 3, 4); + TESTINST5l("bltzl", 2, 0xffffffff, 4, 5); + TESTINST5l("bltzl", 3, 0xffffffff, 5, 6); + TESTINST5l("bltzl", 4, 0xfffffffe, 6, 8); + TESTINST5l("bltzl", 5, 0xffffffff, 7, 8); + TESTINST5l("bltzl", 6, 0x5, 8, 9); + TESTINST5l("bltzl", 7, -3, 9, 10); + TESTINST5l("bltzl", 8, 125, 10, 11); + TESTINST5l("bltzl", 9, 0x80000000, 11, 12); + TESTINST5l("bltzl", 10, 0xffffffff, 12, 13); + TESTINST5l("bltzl", 11, 0x256, 13, 14); + TESTINST5l("bltzl", 12, 0x55, 14, 15); + TESTINST5l("bltzl", 13, 0xfff, 16, 17); + TESTINST5l("bltzl", 14, -1, 2, 25); + TESTINST5l("bltzl", 15, -1, 25, 24); + + printf("--- BNEL --- if RSval != RTval then " \ + "out = RDval + 4 else out = RDval + 5\n"); + TESTINST4l("bnel", 0, 0, 1, 2, 3, 4); + TESTINST4l("bnel", 1, 1, 1, 3, 4, 5); + TESTINST4l("bnel", 2, 0xffffffff, 0xffffffff, 4, 5, 6); + TESTINST4l("bnel", 3, 0xffffffff, 0xfffffffe, 5, 6, 7); + TESTINST4l("bnel", 4, 0xfffffffe, 0xffffffff, 6, 8, 9); + TESTINST4l("bnel", 5, 0xffffffff, 0xffffffff, 7, 8, 9); + TESTINST4l("bnel", 6, 0x5, 0x5, 8, 9, 10); + TESTINST4l("bnel", 7, -3, -4, 9, 10, 11); + TESTINST4l("bnel", 8, 125, 125, 10, 11, 12); + TESTINST4l("bnel", 9, 0x80000000, 0x80000000, 11, 12, 13); + TESTINST4l("bnel", 10, 0xffffffff, 0x80000000, 12, 13, 14); + TESTINST4l("bnel", 11, 0x256, 0x256, 13, 14, 15); + TESTINST4l("bnel", 12, 0x55, 0x55, 14, 15, 16); + TESTINST4l("bnel", 13, 0xfff, 0xdd, 16, 17, 18); + TESTINST4l("bnel", 14, -1, 0x5, 2, 25, 24); + TESTINST4l("bnel", 15, -1, -1, 25, 24, 7); + + printf("j, jal, jr\n"); + TESTINST3j(0, 2); + TESTINST3j(1, 3); + TESTINST3j(2, 4); + TESTINST3j(3, 5); + TESTINST3j(4, 6); + TESTINST3j(5, 7); + TESTINST3j(6, 4); + TESTINST3j(7, 9); + TESTINST3j(8, 10); + TESTINST3j(9, 11); + TESTINST3j(10, 12); + TESTINST3j(11, 13); + TESTINST3j(12, 14); + TESTINST3j(13, 15); + TESTINST3j(14, 16); + TESTINST3j(15, 17); + TESTINST3j(16, 18); + TESTINST3j(17, 19); + TESTINST3j(18, 20); + TESTINST3j(19, 21); + TESTINST3j(20, 22); + TESTINST3j(21, 23); + TESTINST3j(22, 24); + TESTINST3j(23, 24); + + printf("j, jalr, jr\n"); + TESTINST3ja(0, 2); + TESTINST3ja(1, 3); + TESTINST3ja(2, 4); + TESTINST3ja(3, 5); + TESTINST3ja(4, 6); + TESTINST3ja(5, 7); + TESTINST3ja(6, 4); + TESTINST3ja(7, 7); + TESTINST3ja(8, 10); + TESTINST3ja(9, 11); + TESTINST3ja(11, 13); + TESTINST3ja(12, 14); + TESTINST3ja(13, 15); + TESTINST3ja(14, 16); + TESTINST3ja(15, 17); + TESTINST3ja(16, 18); + TESTINST3ja(17, 19); + TESTINST3ja(18, 20); + TESTINST3ja(19, 21); + TESTINST3ja(20, 22); + TESTINST3ja(21, 23); + TESTINST3ja(22, 24); + TESTINST3ja(23, 24); + + return 0; +} diff --git a/none/tests/mips64/const.h b/none/tests/mips64/const.h new file mode 100644 index 0000000000..d54893a88d --- /dev/null +++ b/none/tests/mips64/const.h @@ -0,0 +1,167 @@ +#define N 256 + +const int reg_val1[N] = { + 0x00000000L, 0x00000000L, 0x09823b6eL, 0x0d4326d9L, + 0x130476dcL, 0x17c56b6bL, 0x1a864db2L, 0x1e475005L, + 0x2608edb8L, 0x22c9f00fL, 0x2f8ad6d6L, 0x2b4bcb61L, + 0x350c9b64L, 0x31cd86d3L, 0x3c8ea00aL, 0x384fbdbdL, + 0x4c11db70L, 0x48d0c6c7L, 0x4593e01eL, 0x4152fda9L, + 0x5f15adacL, 0x5bd4b01bL, 0x569796c2L, 0x52568b75L, + 0x6a1936c8L, 0x6ed82b7fL, 0x639b0da6L, 0x675a1011L, + 0x791d4014L, 0x7ddc5da3L, 0x709f7b7aL, 0x745e66cdL, + 0x9823b6e0L, 0x9ce2ab57L, 0x91a18d8eL, 0x95609039L, + 0x8b27c03cL, 0x8fe6dd8bL, 0x82a5fb52L, 0x8664e6e5L, + 0xbe2b5b58L, 0xbaea46efL, 0xb7a96036L, 0xb3687d81L, + 0xad2f2d84L, 0xa9ee3033L, 0xa4ad16eaL, 0xa06c0b5dL, + 0xd4326d90L, 0xd0f37027L, 0xddb056feL, 0xd9714b49L, + 0xc7361b4cL, 0xc3f706fbL, 0xceb42022L, 0xca753d95L, + 0xf23a8028L, 0xf6fb9d9fL, 0xfbb8bb46L, 0xff79a6f1L, + 0xe13ef6f4L, 0xe5ffeb43L, 0xe8bccd9aL, 0xec7dd02dL, + 0x34867077L, 0x30476dc0L, 0x3d044b19L, 0x39c556aeL, + 0x278206abL, 0x23431b1cL, 0x2e003dc5L, 0x2ac12072L, + 0x128e9dcfL, 0x164f8078L, 0x1b0ca6a1L, 0x1fcdbb16L, + 0x018aeb13L, 0x054bf6a4L, 0x0808d07dL, 0x0cc9cdcaL, + 0x7897ab07L, 0x7c56b6b0L, 0x71159069L, 0x75d48ddeL, + 0x6b93dddbL, 0x6f52c06cL, 0x6211e6b5L, 0x66d0fb02L, + 0x5e9f46bfL, 0x5a5e5b08L, 0x571d7dd1L, 0x53dc6066L, + 0x4d9b3063L, 0x495a2dd4L, 0x44190b0dL, 0x40d816baL, + 0xaca5c697L, 0xa864db20L, 0xa527fdf9L, 0xa1e6e04eL, + 0xbfa1b04bL, 0xbb60adfcL, 0xb6238b25L, 0xb2e29692L, + 0x8aad2b2fL, 0x00000000L, 0x00000000L, 0x87ee0df6L, + 0x99a95df3L, 0x9d684044L, 0x902b669dL, 0x94ea7b2aL, + 0xe0b41de7L, 0xe4750050L, 0xe9362689L, 0xedf73b3eL, + 0xf3b06b3bL, 0xf771768cL, 0xfa325055L, 0xfef34de2L, + 0xc6bcf05fL, 0xc27dede8L, 0xcf3ecb31L, 0xcbffd686L, + 0xd5b88683L, 0xd1799b34L, 0xdc3abdedL, 0xd8fba05aL, + 0x690ce0eeL, 0x6dcdfd59L, 0x608edb80L, 0x644fc637L, + 0x7a089632L, 0x7ec98b85L, 0x738aad5cL, 0x774bb0ebL, + 0x4f040d56L, 0x4bc510e1L, 0x46863638L, 0x42472b8fL, + 0x5c007b8aL, 0x58c1663dL, 0x558240e4L, 0x51435d53L, + 0x251d3b9eL, 0x21dc2629L, 0x2c9f00f0L, 0x285e1d47L, + 0x36194d42L, 0x32d850f5L, 0x3f9b762cL, 0x3b5a6b9bL, + 0x0315d626L, 0x07d4cb91L, 0x0a97ed48L, 0x0e56f0ffL, + 0x1011a0faL, 0x14d0bd4dL, 0x19939b94L, 0x1d528623L, + 0xf12f560eL, 0xf5ee4bb9L, 0xf8ad6d60L, 0xfc6c70d7L, + 0xe22b20d2L, 0xe6ea3d65L, 0xeba91bbcL, 0xef68060bL, + 0xd727bbb6L, 0xd3e6a601L, 0xdea580d8L, 0xda649d6fL, + 0xc423cd6aL, 0x00000000L, 0xcda1f604L, 0x00000000L, + 0xbd3e8d7eL, 0xb9ff90c9L, 0xb4bcb610L, 0xb07daba7L, + 0xae3afba2L, 0xaafbe615L, 0xa7b8c0ccL, 0xa379dd7bL, + 0x9b3660c6L, 0x9ff77d71L, 0x92b45ba8L, 0x9675461fL, + 0x8832161aL, 0x8cf30badL, 0x81b02d74L, 0x857130c3L, + 0x5d8a9099L, 0x594b8d2eL, 0x5408abf7L, 0x50c9b640L, + 0x4e8ee645L, 0x4a4ffbf2L, 0x470cdd2bL, 0x43cdc09cL, + 0x7b827d21L, 0x7f436096L, 0x7200464fL, 0x76c15bf8L, + 0x68860bfdL, 0x6c47164aL, 0x61043093L, 0x65c52d24L, + 0x119b4be9L, 0x155a565eL, 0x18197087L, 0x1cd86d30L, + 0x029f3d35L, 0x065e2082L, 0x0b1d065bL, 0x0fdc1becL, + 0x3793a651L, 0x3352bbe6L, 0x3e119d3fL, 0x3ad08088L, + 0x2497d08dL, 0x2056cd3aL, 0x2d15ebe3L, 0x29d4f654L, + 0xc5a92679L, 0xc1683bceL, 0xcc2b1d17L, 0xc8ea00a0L, + 0xd6ad50a5L, 0xd26c4d12L, 0xdf2f6bcbL, 0xdbee767cL, + 0xe3a1cbc1L, 0xe760d676L, 0xea23f0afL, 0xeee2ed18L, + 0xf0a5bd1dL, 0xf464a0aaL, 0xf9278673L, 0xfde69bc4L, + 0x89b8fd09L, 0x8d79e0beL, 0x803ac667L, 0x84fbdbd0L, + 0x9abc8bd5L, 0x9e7d9662L, 0x933eb0bbL, 0x97ffad0cL, + 0xafb010b1L, 0xab710d06L, 0xa6322bdfL, 0xa2f33668L, + 0xbcb4666dL, 0xb8757bdaL, 0xb5365d03L, 0xb1f740b4L +}; + +unsigned long long reg_val2[N]; + +void init_reg_val2() +{ + unsigned long c = 19650218UL; + int i; + reg_val2[0]= c & 0xffffffffUL; + for (i = 1; i < N; i++) { + reg_val2[i] = (1812433253UL * (reg_val2[i - 1] ^ + (reg_val2[i - 1] >> 30)) + i); + } +} + +unsigned long long reg_val_zero[N]; + +void init_reg_val_zero() +{ + int i; + for (i = 0; i < N; i++) { + reg_val_zero[i] = 0; + } +} + +/* Floating point const. */ +#define MAX_ARR 24 +#define NaN 0.0/0.0 + +const double fr_d[] = { + -34785666666.475, 356047.56, -1.0, 23.04, + 1752, 0.0024575, 0.00000001, -248562.76, + 1384.6, -7.2945676, 1000000000, -5786.47, + -347856.475, 356047.56, -1.0, 23.04, + 0, 45655555555.2489562, 3, -1, + -45786.476, 4566666.2489562, 34.00046, 45786.476, +}; + +const double fs_d[] = { + 0, 456.2489562, 3, -1, + 1384.6, -7.2945676, 1000000000, -5786.47, + 1752, 0.0024575, 0.00000001, -248562.76, + -45786.476, 456.2489562, 34.00046, 45786.476, + 1752065, 107, -45667.24, -7.2945676, + -347856.475, 356047.56, -1.0, 23.04 +}; + +const double ft_d[] = { + -45786.476, 456.2489562, 34.00046, 45786.476, + 1752065, 107, -45667.24, -7.2945676, + -347856.475, 356047.56, -1.0, 23.04, + 0, 456.2489562, 3, -1, + 1384.6, -7.2945676, 1000000000, -5786.47, + 1752, 0.0024575, 0.00000001, -248562.76 +}; + +const float fr_f[] = { + -347856.475, 356047.56, -1.0, 23.04, + 1752, 0.0024575, 0.00000001, -248562.76, + 1384.6, -7.2945676, 1000000000, -5786.47, + -347856.475, 356047.56, -1.0, 23.04, + 0, 456.2489562, 3, -1, + -45786.476, 456.2489562, 34.00046, 45786.476 +}; + +const float fs_f[] = { + 0, 456.2489562, 3, -1, + 1384.6, -7.2945676, 1000000000, -5786.47, + 1752, 0.0024575, 0.1234, -248562.76, + -45786.476, 456.2489562, 34.00046, 45786.476, + 1752065, 107, -45667.24, -7.2945676, + -347856.475, 356047.56, -1.0, 23.04 +}; + +const float ft_f[] = { + -45786.476, 456.2489562, 34.00046, 45786.476, + 1752065, 107, -45667.24, -7.2945676, + -347856.475, 356047.56, -1.0, 23.04, + 0, 456.2489562, 3, -1, + 1384.6, -7.2945676, 1000000000, -5786.47, + 1752, 0.0024575, 0.00000001, -248562.76 +}; + +const int fs_w[] = { + 0, 456, 3, -1, + 0xffffffff, 356, 1000000000, -5786, + 1752, 24575, 10, -248562, + -45786, 456, 34, 45786, + 1752065, 107, -45667, -7, + -347856, 0x80000000, 0xfffffff, 23, +}; + +const long fs_l[] = { + 18, 25, 3, -1, + 0xffffffff, 356, 1000000, -5786, + -1, 24575, 10, -125458, + -486, 456, 34, 45786, + 0, 1700000, -45667, -7, + -347856, 0x80000000, 0xfffffff, 23, +}; \ No newline at end of file diff --git a/none/tests/mips64/extract_insert_bit_field.c b/none/tests/mips64/extract_insert_bit_field.c new file mode 100644 index 0000000000..08707f8a95 --- /dev/null +++ b/none/tests/mips64/extract_insert_bit_field.c @@ -0,0 +1,1888 @@ +#include + +#define TESTINST(instruction, in, in1, pos, size) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $t0, %2" "\n\t" \ + "move $t1, %1" "\n\t" \ + instruction" $t0, $t1, "#pos", "#size "\n\t" \ + "move %0, $t0" "\n\t" \ + : "=r" (out) \ + : "r" (in), "r" (in1) \ + : "t0", "t1" \ + ); \ + printf("%s :: in 0x%llx, in1 0x%llx, out 0x%llx, pos: %d, size: %d\n", \ + instruction, (long long) in, (long long) in1, out, pos, size); \ +} + +int main() +{ +#if (__mips == 64) && (__mips_isa_rev >= 2) + printf("--- INS ---\n"); + /* The values of pos and size must satisfy all of the following relations: + 0 <= pos < 32 + 0 < size <= 32 + 0 < pos+size <= 32 */ + TESTINST("ins", 0x0, 0x0, 0, 1); + TESTINST("ins", 0x0, 0xffffffffffffffff, 0, 1); + TESTINST("ins", 0x0, 0x98765432, 0, 1); + TESTINST("ins", 0x0, 0xffffffffff865421, 0, 1); + TESTINST("ins", 0xffffffffffffffff, 0x0, 0, 1); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 0, 1); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 0, 1); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 0, 1); + TESTINST("ins", 0x98765432, 0x0, 0, 1); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 0, 1); + TESTINST("ins", 0x98765432, 0x98765432, 0, 1); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 0, 1); + TESTINST("ins", 0xffffffffff865421, 0x0, 0, 1); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 0, 1); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 0, 1); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 0, 1); + TESTINST("ins", 0x0, 0x0, 0, 4); + TESTINST("ins", 0x0, 0xffffffffffffffff, 0, 4); + TESTINST("ins", 0x0, 0x98765432, 0, 4); + TESTINST("ins", 0x0, 0xffffffffff865421, 0, 4); + TESTINST("ins", 0xffffffffffffffff, 0x0, 0, 4); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 0, 4); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 0, 4); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 0, 4); + TESTINST("ins", 0x98765432, 0x0, 0, 4); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 0, 4); + TESTINST("ins", 0x98765432, 0x98765432, 0, 4); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 0, 4); + TESTINST("ins", 0xffffffffff865421, 0x0, 0, 4); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 0, 4); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 0, 4); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 0, 4); + TESTINST("ins", 0x0, 0x0, 0, 16); + TESTINST("ins", 0x0, 0xffffffffffffffff, 0, 16); + TESTINST("ins", 0x0, 0x98765432, 0, 16); + TESTINST("ins", 0x0, 0xffffffffff865421, 0, 16); + TESTINST("ins", 0xffffffffffffffff, 0x0, 0, 16); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 0, 16); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 0, 16); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 0, 16); + TESTINST("ins", 0x98765432, 0x0, 0, 16); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 0, 16); + TESTINST("ins", 0x98765432, 0x98765432, 0, 16); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 0, 16); + TESTINST("ins", 0xffffffffff865421, 0x0, 0, 16); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 0, 16); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 0, 16); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 0, 16); + TESTINST("ins", 0x0, 0x0, 0, 32); + TESTINST("ins", 0x0, 0xffffffffffffffff, 0, 32); + TESTINST("ins", 0x0, 0x98765432, 0, 32); + TESTINST("ins", 0x0, 0xffffffffff865421, 0, 32); + TESTINST("ins", 0xffffffffffffffff, 0x0, 0, 32); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 0, 32); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 0, 32); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 0, 32); + TESTINST("ins", 0x98765432, 0x0, 0, 32); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 0, 32); + TESTINST("ins", 0x98765432, 0x98765432, 0, 32); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 0, 32); + TESTINST("ins", 0xffffffffff865421, 0x0, 0, 32); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 0, 32); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 0, 32); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 0, 32); + + TESTINST("ins", 0x0, 0x0, 4, 1); + TESTINST("ins", 0x0, 0xffffffffffffffff, 4, 1); + TESTINST("ins", 0x0, 0x98765432, 4, 1); + TESTINST("ins", 0x0, 0xffffffffff865421, 4, 1); + TESTINST("ins", 0xffffffffffffffff, 0x0, 4, 1); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 4, 1); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 4, 1); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 4, 1); + TESTINST("ins", 0x98765432, 0x0, 4, 1); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 4, 1); + TESTINST("ins", 0x98765432, 0x98765432, 4, 1); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 4, 1); + TESTINST("ins", 0xffffffffff865421, 0x0, 4, 1); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 4, 1); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 4, 1); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 4, 1); + TESTINST("ins", 0x0, 0x0, 4, 4); + TESTINST("ins", 0x0, 0xffffffffffffffff, 4, 4); + TESTINST("ins", 0x0, 0x98765432, 4, 4); + TESTINST("ins", 0x0, 0xffffffffff865421, 4, 4); + TESTINST("ins", 0xffffffffffffffff, 0x0, 4, 4); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 4, 4); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 4, 4); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 4, 4); + TESTINST("ins", 0x98765432, 0x0, 4, 4); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 4, 4); + TESTINST("ins", 0x98765432, 0x98765432, 4, 4); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 4, 4); + TESTINST("ins", 0xffffffffff865421, 0x0, 4, 4); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 4, 4); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 4, 4); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 4, 4); + TESTINST("ins", 0x0, 0x0, 4, 16); + TESTINST("ins", 0x0, 0xffffffffffffffff, 4, 16); + TESTINST("ins", 0x0, 0x98765432, 4, 16); + TESTINST("ins", 0x0, 0xffffffffff865421, 4, 16); + TESTINST("ins", 0xffffffffffffffff, 0x0, 4, 16); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 4, 16); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 4, 16); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 4, 16); + TESTINST("ins", 0x98765432, 0x0, 4, 16); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 4, 16); + TESTINST("ins", 0x98765432, 0x98765432, 4, 16); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 4, 16); + TESTINST("ins", 0xffffffffff865421, 0x0, 4, 16); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 4, 16); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 4, 16); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 4, 16); + TESTINST("ins", 0x0, 0x0, 4, 28); + TESTINST("ins", 0x0, 0xffffffffffffffff, 4, 28); + TESTINST("ins", 0x0, 0x98765432, 4, 28); + TESTINST("ins", 0x0, 0xffffffffff865421, 4, 28); + TESTINST("ins", 0xffffffffffffffff, 0x0, 4, 28); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 4, 28); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 4, 28); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 4, 28); + TESTINST("ins", 0x98765432, 0x0, 4, 28); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 4, 28); + TESTINST("ins", 0x98765432, 0x98765432, 4, 28); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 4, 28); + TESTINST("ins", 0xffffffffff865421, 0x0, 4, 28); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 4, 28); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 4, 28); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 4, 28); + + TESTINST("ins", 0x0, 0x0, 16, 1); + TESTINST("ins", 0x0, 0xffffffffffffffff, 16, 1); + TESTINST("ins", 0x0, 0x98765432, 16, 1); + TESTINST("ins", 0x0, 0xffffffffff865421, 16, 1); + TESTINST("ins", 0xffffffffffffffff, 0x0, 16, 1); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 16, 1); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 16, 1); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 16, 1); + TESTINST("ins", 0x98765432, 0x0, 16, 1); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 16, 1); + TESTINST("ins", 0x98765432, 0x98765432, 16, 1); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 16, 1); + TESTINST("ins", 0xffffffffff865421, 0x0, 16, 1); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 16, 1); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 16, 1); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 16, 1); + TESTINST("ins", 0x0, 0x0, 16, 4); + TESTINST("ins", 0x0, 0xffffffffffffffff, 16, 4); + TESTINST("ins", 0x0, 0x98765432, 16, 4); + TESTINST("ins", 0x0, 0xffffffffff865421, 16, 4); + TESTINST("ins", 0xffffffffffffffff, 0x0, 16, 4); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 16, 4); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 16, 4); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 16, 4); + TESTINST("ins", 0x98765432, 0x0, 16, 4); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 16, 4); + TESTINST("ins", 0x98765432, 0x98765432, 16, 4); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 16, 4); + TESTINST("ins", 0xffffffffff865421, 0x0, 16, 4); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 16, 4); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 16, 4); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 16, 4); + TESTINST("ins", 0x0, 0x0, 16, 16); + TESTINST("ins", 0x0, 0xffffffffffffffff, 16, 16); + TESTINST("ins", 0x0, 0x98765432, 16, 16); + TESTINST("ins", 0x0, 0xffffffffff865421, 16, 16); + TESTINST("ins", 0xffffffffffffffff, 0x0, 16, 16); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 16, 16); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 16, 16); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 16, 16); + TESTINST("ins", 0x98765432, 0x0, 16, 16); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 16, 16); + TESTINST("ins", 0x98765432, 0x98765432, 16, 16); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 16, 16); + TESTINST("ins", 0xffffffffff865421, 0x0, 16, 16); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 16, 16); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 16, 16); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 16, 16); + + TESTINST("ins", 0x0, 0x0, 31, 1); + TESTINST("ins", 0x0, 0xffffffffffffffff, 31, 1); + TESTINST("ins", 0x0, 0x98765432, 31, 1); + TESTINST("ins", 0x0, 0xffffffffff865421, 31, 1); + TESTINST("ins", 0xffffffffffffffff, 0x0, 31, 1); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffffffffff, 31, 1); + TESTINST("ins", 0xffffffffffffffff, 0x98765432, 31, 1); + TESTINST("ins", 0xffffffffffffffff, 0xffffffffff865421, 31, 1); + TESTINST("ins", 0x98765432, 0x0, 31, 1); + TESTINST("ins", 0x98765432, 0xffffffffffffffff, 31, 1); + TESTINST("ins", 0x98765432, 0x98765432, 31, 1); + TESTINST("ins", 0x98765432, 0xffffffffff865421, 31, 1); + TESTINST("ins", 0xffffffffff865421, 0x0, 31, 1); + TESTINST("ins", 0xffffffffff865421, 0xffffffffffffffff, 31, 1); + TESTINST("ins", 0xffffffffff865421, 0x98765432, 31, 1); + TESTINST("ins", 0xffffffffff865421, 0xffffffffff865421, 31, 1); + + printf("--- EXT ---\n"); + /* The values of pos and size must satisfy all of the following relations: + 0 <= pos < 32 + 0 < size <= 32 + 0 < pos+size <= 32 */ + TESTINST("ext", 0x0, 0x0, 0, 1); + TESTINST("ext", 0x0, 0xffffffffffffffff, 0, 1); + TESTINST("ext", 0x0, 0x98765432, 0, 1); + TESTINST("ext", 0x0, 0xffffffffff865421, 0, 1); + TESTINST("ext", 0xffffffffffffffff, 0x0, 0, 1); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 0, 1); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 0, 1); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 0, 1); + TESTINST("ext", 0x98765432, 0x0, 0, 1); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 0, 1); + TESTINST("ext", 0x98765432, 0x98765432, 0, 1); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 0, 1); + TESTINST("ext", 0xffffffffff865421, 0x0, 0, 1); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 0, 1); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 0, 1); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 0, 1); + TESTINST("ext", 0x0, 0x0, 0, 4); + TESTINST("ext", 0x0, 0xffffffffffffffff, 0, 4); + TESTINST("ext", 0x0, 0x98765432, 0, 4); + TESTINST("ext", 0x0, 0xffffffffff865421, 0, 4); + TESTINST("ext", 0xffffffffffffffff, 0x0, 0, 4); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 0, 4); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 0, 4); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 0, 4); + TESTINST("ext", 0x98765432, 0x0, 0, 4); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 0, 4); + TESTINST("ext", 0x98765432, 0x98765432, 0, 4); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 0, 4); + TESTINST("ext", 0xffffffffff865421, 0x0, 0, 4); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 0, 4); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 0, 4); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 0, 4); + TESTINST("ext", 0x0, 0x0, 0, 16); + TESTINST("ext", 0x0, 0xffffffffffffffff, 0, 16); + TESTINST("ext", 0x0, 0x98765432, 0, 16); + TESTINST("ext", 0x0, 0xffffffffff865421, 0, 16); + TESTINST("ext", 0xffffffffffffffff, 0x0, 0, 16); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 0, 16); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 0, 16); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 0, 16); + TESTINST("ext", 0x98765432, 0x0, 0, 16); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 0, 16); + TESTINST("ext", 0x98765432, 0x98765432, 0, 16); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 0, 16); + TESTINST("ext", 0xffffffffff865421, 0x0, 0, 16); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 0, 16); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 0, 16); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 0, 16); + TESTINST("ext", 0x0, 0x0, 0, 32); + TESTINST("ext", 0x0, 0xffffffffffffffff, 0, 32); + TESTINST("ext", 0x0, 0x98765432, 0, 32); + TESTINST("ext", 0x0, 0xffffffffff865421, 0, 32); + TESTINST("ext", 0xffffffffffffffff, 0x0, 0, 32); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 0, 32); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 0, 32); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 0, 32); + TESTINST("ext", 0x98765432, 0x0, 0, 32); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 0, 32); + TESTINST("ext", 0x98765432, 0x98765432, 0, 32); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 0, 32); + TESTINST("ext", 0xffffffffff865421, 0x0, 0, 32); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 0, 32); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 0, 32); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 0, 32); + + TESTINST("ext", 0x0, 0x0, 4, 1); + TESTINST("ext", 0x0, 0xffffffffffffffff, 4, 1); + TESTINST("ext", 0x0, 0x98765432, 4, 1); + TESTINST("ext", 0x0, 0xffffffffff865421, 4, 1); + TESTINST("ext", 0xffffffffffffffff, 0x0, 4, 1); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 4, 1); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 4, 1); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 4, 1); + TESTINST("ext", 0x98765432, 0x0, 4, 1); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 4, 1); + TESTINST("ext", 0x98765432, 0x98765432, 4, 1); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 4, 1); + TESTINST("ext", 0xffffffffff865421, 0x0, 4, 1); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 4, 1); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 4, 1); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 4, 1); + TESTINST("ext", 0x0, 0x0, 4, 4); + TESTINST("ext", 0x0, 0xffffffffffffffff, 4, 4); + TESTINST("ext", 0x0, 0x98765432, 4, 4); + TESTINST("ext", 0x0, 0xffffffffff865421, 4, 4); + TESTINST("ext", 0xffffffffffffffff, 0x0, 4, 4); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 4, 4); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 4, 4); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 4, 4); + TESTINST("ext", 0x98765432, 0x0, 4, 4); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 4, 4); + TESTINST("ext", 0x98765432, 0x98765432, 4, 4); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 4, 4); + TESTINST("ext", 0xffffffffff865421, 0x0, 4, 4); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 4, 4); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 4, 4); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 4, 4); + TESTINST("ext", 0x0, 0x0, 4, 16); + TESTINST("ext", 0x0, 0xffffffffffffffff, 4, 16); + TESTINST("ext", 0x0, 0x98765432, 4, 16); + TESTINST("ext", 0x0, 0xffffffffff865421, 4, 16); + TESTINST("ext", 0xffffffffffffffff, 0x0, 4, 16); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 4, 16); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 4, 16); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 4, 16); + TESTINST("ext", 0x98765432, 0x0, 4, 16); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 4, 16); + TESTINST("ext", 0x98765432, 0x98765432, 4, 16); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 4, 16); + TESTINST("ext", 0xffffffffff865421, 0x0, 4, 16); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 4, 16); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 4, 16); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 4, 16); + TESTINST("ext", 0x0, 0x0, 4, 28); + TESTINST("ext", 0x0, 0xffffffffffffffff, 4, 28); + TESTINST("ext", 0x0, 0x98765432, 4, 28); + TESTINST("ext", 0x0, 0xffffffffff865421, 4, 28); + TESTINST("ext", 0xffffffffffffffff, 0x0, 4, 28); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 4, 28); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 4, 28); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 4, 28); + TESTINST("ext", 0x98765432, 0x0, 4, 28); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 4, 28); + TESTINST("ext", 0x98765432, 0x98765432, 4, 28); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 4, 28); + TESTINST("ext", 0xffffffffff865421, 0x0, 4, 28); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 4, 28); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 4, 28); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 4, 28); + + TESTINST("ext", 0x0, 0x0, 16, 1); + TESTINST("ext", 0x0, 0xffffffffffffffff, 16, 1); + TESTINST("ext", 0x0, 0x98765432, 16, 1); + TESTINST("ext", 0x0, 0xffffffffff865421, 16, 1); + TESTINST("ext", 0xffffffffffffffff, 0x0, 16, 1); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 16, 1); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 16, 1); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 16, 1); + TESTINST("ext", 0x98765432, 0x0, 16, 1); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 16, 1); + TESTINST("ext", 0x98765432, 0x98765432, 16, 1); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 16, 1); + TESTINST("ext", 0xffffffffff865421, 0x0, 16, 1); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 16, 1); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 16, 1); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 16, 1); + TESTINST("ext", 0x0, 0x0, 16, 4); + TESTINST("ext", 0x0, 0xffffffffffffffff, 16, 4); + TESTINST("ext", 0x0, 0x98765432, 16, 4); + TESTINST("ext", 0x0, 0xffffffffff865421, 16, 4); + TESTINST("ext", 0xffffffffffffffff, 0x0, 16, 4); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 16, 4); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 16, 4); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 16, 4); + TESTINST("ext", 0x98765432, 0x0, 16, 4); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 16, 4); + TESTINST("ext", 0x98765432, 0x98765432, 16, 4); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 16, 4); + TESTINST("ext", 0xffffffffff865421, 0x0, 16, 4); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 16, 4); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 16, 4); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 16, 4); + TESTINST("ext", 0x0, 0x0, 16, 16); + TESTINST("ext", 0x0, 0xffffffffffffffff, 16, 16); + TESTINST("ext", 0x0, 0x98765432, 16, 16); + TESTINST("ext", 0x0, 0xffffffffff865421, 16, 16); + TESTINST("ext", 0xffffffffffffffff, 0x0, 16, 16); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 16, 16); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 16, 16); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 16, 16); + TESTINST("ext", 0x98765432, 0x0, 16, 16); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 16, 16); + TESTINST("ext", 0x98765432, 0x98765432, 16, 16); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 16, 16); + TESTINST("ext", 0xffffffffff865421, 0x0, 16, 16); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 16, 16); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 16, 16); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 16, 16); + + TESTINST("ext", 0x0, 0x0, 31, 1); + TESTINST("ext", 0x0, 0xffffffffffffffff, 31, 1); + TESTINST("ext", 0x0, 0x98765432, 31, 1); + TESTINST("ext", 0x0, 0xffffffffff865421, 31, 1); + TESTINST("ext", 0xffffffffffffffff, 0x0, 31, 1); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffffffffff, 31, 1); + TESTINST("ext", 0xffffffffffffffff, 0x98765432, 31, 1); + TESTINST("ext", 0xffffffffffffffff, 0xffffffffff865421, 31, 1); + TESTINST("ext", 0x98765432, 0x0, 31, 1); + TESTINST("ext", 0x98765432, 0xffffffffffffffff, 31, 1); + TESTINST("ext", 0x98765432, 0x98765432, 31, 1); + TESTINST("ext", 0x98765432, 0xffffffffff865421, 31, 1); + TESTINST("ext", 0xffffffffff865421, 0x0, 31, 1); + TESTINST("ext", 0xffffffffff865421, 0xffffffffffffffff, 31, 1); + TESTINST("ext", 0xffffffffff865421, 0x98765432, 31, 1); + TESTINST("ext", 0xffffffffff865421, 0xffffffffff865421, 31, 1); + + printf("--- DEXT ---\n"); + /* The values of pos and size must satisfy all of the following relations: + 0 <= pos < 32 + 0 < size <= 32 + 0 < pos+size <= 63 */ + TESTINST("dext", 0x0, 0x0, 0, 1); + TESTINST("dext", 0x0, 0xffffffffffffffff, 0, 1); + TESTINST("dext", 0x0, 0x98765432, 0, 1); + TESTINST("dext", 0x0, 0xffffffffff865421, 0, 1); + TESTINST("dext", 0xffffffffffffffff, 0x0, 0, 1); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 0, 1); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 0, 1); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 0, 1); + TESTINST("dext", 0x98765432, 0x0, 0, 1); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 0, 1); + TESTINST("dext", 0x98765432, 0x98765432, 0, 1); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 0, 1); + TESTINST("dext", 0xffffffffff865421, 0x0, 0, 1); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 0, 1); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 0, 1); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 0, 1); + TESTINST("dext", 0x0, 0x0, 0, 4); + TESTINST("dext", 0x0, 0xffffffffffffffff, 0, 4); + TESTINST("dext", 0x0, 0x98765432, 0, 4); + TESTINST("dext", 0x0, 0xffffffffff865421, 0, 4); + TESTINST("dext", 0xffffffffffffffff, 0x0, 0, 4); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 0, 4); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 0, 4); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 0, 4); + TESTINST("dext", 0x98765432, 0x0, 0, 4); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 0, 4); + TESTINST("dext", 0x98765432, 0x98765432, 0, 4); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 0, 4); + TESTINST("dext", 0xffffffffff865421, 0x0, 0, 4); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 0, 4); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 0, 4); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 0, 4); + TESTINST("dext", 0x0, 0x0, 0, 16); + TESTINST("dext", 0x0, 0xffffffffffffffff, 0, 16); + TESTINST("dext", 0x0, 0x98765432, 0, 16); + TESTINST("dext", 0x0, 0xffffffffff865421, 0, 16); + TESTINST("dext", 0xffffffffffffffff, 0x0, 0, 16); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 0, 16); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 0, 16); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 0, 16); + TESTINST("dext", 0x98765432, 0x0, 0, 16); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 0, 16); + TESTINST("dext", 0x98765432, 0x98765432, 0, 16); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 0, 16); + TESTINST("dext", 0xffffffffff865421, 0x0, 0, 16); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 0, 16); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 0, 16); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 0, 16); + TESTINST("dext", 0x0, 0x0, 0, 32); + TESTINST("dext", 0x0, 0xffffffffffffffff, 0, 32); + TESTINST("dext", 0x0, 0x98765432, 0, 32); + TESTINST("dext", 0x0, 0xffffffffff865421, 0, 32); + TESTINST("dext", 0xffffffffffffffff, 0x0, 0, 32); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 0, 32); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 0, 32); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 0, 32); + TESTINST("dext", 0x98765432, 0x0, 0, 32); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 0, 32); + TESTINST("dext", 0x98765432, 0x98765432, 0, 32); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 0, 32); + TESTINST("dext", 0xffffffffff865421, 0x0, 0, 32); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 0, 32); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 0, 32); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 0, 32); + + TESTINST("dext", 0x0, 0x0, 4, 1); + TESTINST("dext", 0x0, 0xffffffffffffffff, 4, 1); + TESTINST("dext", 0x0, 0x98765432, 4, 1); + TESTINST("dext", 0x0, 0xffffffffff865421, 4, 1); + TESTINST("dext", 0xffffffffffffffff, 0x0, 4, 1); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 4, 1); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 4, 1); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 4, 1); + TESTINST("dext", 0x98765432, 0x0, 4, 1); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 4, 1); + TESTINST("dext", 0x98765432, 0x98765432, 4, 1); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 4, 1); + TESTINST("dext", 0xffffffffff865421, 0x0, 4, 1); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 4, 1); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 4, 1); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 4, 1); + TESTINST("dext", 0x0, 0x0, 4, 4); + TESTINST("dext", 0x0, 0xffffffffffffffff, 4, 4); + TESTINST("dext", 0x0, 0x98765432, 4, 4); + TESTINST("dext", 0x0, 0xffffffffff865421, 4, 4); + TESTINST("dext", 0xffffffffffffffff, 0x0, 4, 4); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 4, 4); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 4, 4); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 4, 4); + TESTINST("dext", 0x98765432, 0x0, 4, 4); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 4, 4); + TESTINST("dext", 0x98765432, 0x98765432, 4, 4); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 4, 4); + TESTINST("dext", 0xffffffffff865421, 0x0, 4, 4); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 4, 4); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 4, 4); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 4, 4); + TESTINST("dext", 0x0, 0x0, 4, 16); + TESTINST("dext", 0x0, 0xffffffffffffffff, 4, 16); + TESTINST("dext", 0x0, 0x98765432, 4, 16); + TESTINST("dext", 0x0, 0xffffffffff865421, 4, 16); + TESTINST("dext", 0xffffffffffffffff, 0x0, 4, 16); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 4, 16); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 4, 16); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 4, 16); + TESTINST("dext", 0x98765432, 0x0, 4, 16); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 4, 16); + TESTINST("dext", 0x98765432, 0x98765432, 4, 16); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 4, 16); + TESTINST("dext", 0xffffffffff865421, 0x0, 4, 16); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 4, 16); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 4, 16); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 4, 16); + TESTINST("dext", 0x0, 0x0, 4, 32); + TESTINST("dext", 0x0, 0xffffffffffffffff, 4, 32); + TESTINST("dext", 0x0, 0x98765432, 4, 32); + TESTINST("dext", 0x0, 0xffffffffff865421, 4, 32); + TESTINST("dext", 0xffffffffffffffff, 0x0, 4, 32); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 4, 32); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 4, 32); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 4, 32); + TESTINST("dext", 0x98765432, 0x0, 4, 32); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 4, 32); + TESTINST("dext", 0x98765432, 0x98765432, 4, 32); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 4, 32); + TESTINST("dext", 0xffffffffff865421, 0x0, 4, 32); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 4, 32); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 4, 32); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 4, 32); + + TESTINST("dext", 0x0, 0x0, 16, 1); + TESTINST("dext", 0x0, 0xffffffffffffffff, 16, 1); + TESTINST("dext", 0x0, 0x98765432, 16, 1); + TESTINST("dext", 0x0, 0xffffffffff865421, 16, 1); + TESTINST("dext", 0xffffffffffffffff, 0x0, 16, 1); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 16, 1); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 16, 1); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 16, 1); + TESTINST("dext", 0x98765432, 0x0, 16, 1); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 16, 1); + TESTINST("dext", 0x98765432, 0x98765432, 16, 1); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 16, 1); + TESTINST("dext", 0xffffffffff865421, 0x0, 16, 1); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 16, 1); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 16, 1); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 16, 1); + TESTINST("dext", 0x0, 0x0, 16, 4); + TESTINST("dext", 0x0, 0xffffffffffffffff, 16, 4); + TESTINST("dext", 0x0, 0x98765432, 16, 4); + TESTINST("dext", 0x0, 0xffffffffff865421, 16, 4); + TESTINST("dext", 0xffffffffffffffff, 0x0, 16, 4); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 16, 4); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 16, 4); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 16, 4); + TESTINST("dext", 0x98765432, 0x0, 16, 4); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 16, 4); + TESTINST("dext", 0x98765432, 0x98765432, 16, 4); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 16, 4); + TESTINST("dext", 0xffffffffff865421, 0x0, 16, 4); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 16, 4); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 16, 4); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 16, 4); + TESTINST("dext", 0x0, 0x0, 16, 16); + TESTINST("dext", 0x0, 0xffffffffffffffff, 16, 16); + TESTINST("dext", 0x0, 0x98765432, 16, 16); + TESTINST("dext", 0x0, 0xffffffffff865421, 16, 16); + TESTINST("dext", 0xffffffffffffffff, 0x0, 16, 16); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 16, 16); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 16, 16); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 16, 16); + TESTINST("dext", 0x98765432, 0x0, 16, 16); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 16, 16); + TESTINST("dext", 0x98765432, 0x98765432, 16, 16); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 16, 16); + TESTINST("dext", 0xffffffffff865421, 0x0, 16, 16); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 16, 16); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 16, 16); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 16, 16); + TESTINST("dext", 0x0, 0x0, 16, 32); + TESTINST("dext", 0x0, 0xffffffffffffffff, 16, 32); + TESTINST("dext", 0x0, 0x98765432, 16, 32); + TESTINST("dext", 0x0, 0xffffffffff865421, 16, 32); + TESTINST("dext", 0xffffffffffffffff, 0x0, 16, 32); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 16, 32); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 16, 32); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 16, 32); + TESTINST("dext", 0x98765432, 0x0, 16, 32); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 16, 32); + TESTINST("dext", 0x98765432, 0x98765432, 16, 32); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 16, 32); + TESTINST("dext", 0xffffffffff865421, 0x0, 16, 32); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 16, 32); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 16, 32); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 16, 32); + + TESTINST("dext", 0x0, 0x0, 31, 1); + TESTINST("dext", 0x0, 0xffffffffffffffff, 31, 1); + TESTINST("dext", 0x0, 0x98765432, 31, 1); + TESTINST("dext", 0x0, 0xffffffffff865421, 31, 1); + TESTINST("dext", 0xffffffffffffffff, 0x0, 31, 1); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 31, 1); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 31, 1); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 31, 1); + TESTINST("dext", 0x98765432, 0x0, 31, 1); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 31, 1); + TESTINST("dext", 0x98765432, 0x98765432, 31, 1); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 31, 1); + TESTINST("dext", 0xffffffffff865421, 0x0, 31, 1); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 31, 1); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 31, 1); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 31, 1); + TESTINST("dext", 0x0, 0x0, 31, 4); + TESTINST("dext", 0x0, 0xffffffffffffffff, 31, 4); + TESTINST("dext", 0x0, 0x98765432, 31, 4); + TESTINST("dext", 0x0, 0xffffffffff865421, 31, 4); + TESTINST("dext", 0xffffffffffffffff, 0x0, 31, 4); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 31, 4); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 31, 4); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 31, 4); + TESTINST("dext", 0x98765432, 0x0, 31, 4); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 31, 4); + TESTINST("dext", 0x98765432, 0x98765432, 31, 4); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 31, 4); + TESTINST("dext", 0xffffffffff865421, 0x0, 31, 4); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 31, 4); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 31, 4); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 31, 4); + TESTINST("dext", 0x0, 0x0, 31, 16); + TESTINST("dext", 0x0, 0xffffffffffffffff, 31, 16); + TESTINST("dext", 0x0, 0x98765432, 31, 16); + TESTINST("dext", 0x0, 0xffffffffff865421, 31, 16); + TESTINST("dext", 0xffffffffffffffff, 0x0, 31, 16); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 31, 16); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 31, 16); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 31, 16); + TESTINST("dext", 0x98765432, 0x0, 31, 16); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 31, 16); + TESTINST("dext", 0x98765432, 0x98765432, 31, 16); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 31, 16); + TESTINST("dext", 0xffffffffff865421, 0x0, 31, 16); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 31, 16); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 31, 16); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 31, 16); + TESTINST("dext", 0x0, 0x0, 31, 32); + TESTINST("dext", 0x0, 0xffffffffffffffff, 31, 32); + TESTINST("dext", 0x0, 0x98765432, 31, 32); + TESTINST("dext", 0x0, 0xffffffffff865421, 31, 32); + TESTINST("dext", 0xffffffffffffffff, 0x0, 31, 32); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffffffffff, 31, 32); + TESTINST("dext", 0xffffffffffffffff, 0x98765432, 31, 32); + TESTINST("dext", 0xffffffffffffffff, 0xffffffffff865421, 31, 32); + TESTINST("dext", 0x98765432, 0x0, 31, 32); + TESTINST("dext", 0x98765432, 0xffffffffffffffff, 31, 32); + TESTINST("dext", 0x98765432, 0x98765432, 31, 32); + TESTINST("dext", 0x98765432, 0xffffffffff865421, 31, 32); + TESTINST("dext", 0xffffffffff865421, 0x0, 31, 32); + TESTINST("dext", 0xffffffffff865421, 0xffffffffffffffff, 31, 32); + TESTINST("dext", 0xffffffffff865421, 0x98765432, 31, 32); + TESTINST("dext", 0xffffffffff865421, 0xffffffffff865421, 31, 32); + + TESTINST("dext", 0x2002ffffffffffff, 0xfffffffff0000fff, 4, 4); + TESTINST("dext", 0xffff0000ffffffff, 0xff0000ffffffffff, 8, 4); + TESTINST("dext", 0x2000ffffffffffff, 0xffff0000ffffffff, 16, 4); + TESTINST("dext", 0x2000ffffffddddff, 0xffffffffffff0008, 24, 2); + TESTINST("dext", 0x2000ffffffffeeee, 0xfffffff31415927f, 24, 4); + TESTINST("dext", 0x31415927ffffffff, 0x2000ffffffffffff, 9, 2); + TESTINST("dext", 0x2000ffffffffaaaa, 0x2000ffffffff2222, 16, 4); + TESTINST("dext", 0x2000ffffffbbbbff, 0x7fffffffddddffff, 16, 4); + TESTINST("dext", 0xeeeeff33ff22ffff, 0x2000ffffffffffff, 7, 4); + TESTINST("dext", 0x2000ffffffffffff, 0x2000ffffffffbbbb, 5, 4); + TESTINST("dext", 0x2000ffffffffbbbb, 0xfffffffff0000fff, 3, 4); + TESTINST("dext", 0x2000ffffffffffff, 0xffff0000ffffffff, 16, 16); + TESTINST("dext", 0x7fffffffddddffff, 0xffffffffffff0008, 16, 32); + TESTINST("dext", 0x2000ffffffff2222, 0xfffffff31415927f, 2, 60); + TESTINST("dext", 0x2000ffffffffffff, 0x2000ffffffffffff, 16, 6); + TESTINST("dext", 0xfffffff31415927f, 0x2000ffffffff2222, 31, 32); + TESTINST("dext", 0xffffffffffff0008, 0x7fffffffddddffff, 8, 2); + TESTINST("dext", 0xffff0000ffffffff, 0x2000ffffffffffff, 16, 4); + TESTINST("dext", 0xff0000ffffffffff, 0, 8, 4); + TESTINST("dext", 0xfffffffff0000fff, 0, 16, 4); + + printf("--- DEXTM ---\n"); + /* The values of pos and size must satisfy all of the following relations: + 0 <= pos < 32 + 32 < size <= 64 + 32 < pos+size <= 64 */ + TESTINST("dextm", 0x0, 0x0, 0, 33); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 0, 33); + TESTINST("dextm", 0x0, 0x98765432, 0, 33); + TESTINST("dextm", 0x0, 0xffffffffff865421, 0, 33); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 0, 33); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 0, 33); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 0, 33); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 0, 33); + TESTINST("dextm", 0x98765432, 0x0, 0, 33); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 0, 33); + TESTINST("dextm", 0x98765432, 0x98765432, 0, 33); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 0, 33); + TESTINST("dextm", 0xffffffffff865421, 0x0, 0, 33); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 0, 33); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 0, 33); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 0, 33); + TESTINST("dextm", 0x0, 0x0, 0, 37); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 0, 37); + TESTINST("dextm", 0x0, 0x98765432, 0, 37); + TESTINST("dextm", 0x0, 0xffffffffff865421, 0, 37); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 0, 37); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 0, 37); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 0, 37); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 0, 37); + TESTINST("dextm", 0x98765432, 0x0, 0, 37); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 0, 37); + TESTINST("dextm", 0x98765432, 0x98765432, 0, 37); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 0, 37); + TESTINST("dextm", 0xffffffffff865421, 0x0, 0, 37); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 0, 37); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 0, 37); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 0, 37); + TESTINST("dextm", 0x0, 0x0, 0, 48); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 0, 48); + TESTINST("dextm", 0x0, 0x98765432, 0, 48); + TESTINST("dextm", 0x0, 0xffffffffff865421, 0, 48); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 0, 48); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 0, 48); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 0, 48); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 0, 48); + TESTINST("dextm", 0x98765432, 0x0, 0, 48); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 0, 48); + TESTINST("dextm", 0x98765432, 0x98765432, 0, 48); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 0, 48); + TESTINST("dextm", 0xffffffffff865421, 0x0, 0, 48); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 0, 48); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 0, 48); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 0, 48); + TESTINST("dextm", 0x0, 0x0, 0, 64); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 0, 64); + TESTINST("dextm", 0x0, 0x98765432, 0, 64); + TESTINST("dextm", 0x0, 0xffffffffff865421, 0, 64); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 0, 64); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 0, 64); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 0, 64); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 0, 64); + TESTINST("dextm", 0x98765432, 0x0, 0, 64); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 0, 64); + TESTINST("dextm", 0x98765432, 0x98765432, 0, 64); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 0, 64); + TESTINST("dextm", 0xffffffffff865421, 0x0, 0, 64); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 0, 64); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 0, 64); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 0, 64); + + TESTINST("dextm", 0x0, 0x0, 4, 33); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 4, 33); + TESTINST("dextm", 0x0, 0x98765432, 4, 33); + TESTINST("dextm", 0x0, 0xffffffffff865421, 4, 33); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 4, 33); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 33); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 4, 33); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 4, 33); + TESTINST("dextm", 0x98765432, 0x0, 4, 33); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 4, 33); + TESTINST("dextm", 0x98765432, 0x98765432, 4, 33); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 4, 33); + TESTINST("dextm", 0xffffffffff865421, 0x0, 4, 33); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 4, 33); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 4, 33); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 4, 33); + TESTINST("dextm", 0x0, 0x0, 4, 37); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 4, 37); + TESTINST("dextm", 0x0, 0x98765432, 4, 37); + TESTINST("dextm", 0x0, 0xffffffffff865421, 4, 37); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 4, 37); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 37); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 4, 37); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 4, 37); + TESTINST("dextm", 0x98765432, 0x0, 4, 37); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 4, 37); + TESTINST("dextm", 0x98765432, 0x98765432, 4, 37); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 4, 37); + TESTINST("dextm", 0xffffffffff865421, 0x0, 4, 37); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 4, 37); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 4, 37); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 4, 37); + TESTINST("dextm", 0x0, 0x0, 4, 48); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 4, 48); + TESTINST("dextm", 0x0, 0x98765432, 4, 48); + TESTINST("dextm", 0x0, 0xffffffffff865421, 4, 48); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 4, 48); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 48); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 4, 48); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 4, 48); + TESTINST("dextm", 0x98765432, 0x0, 4, 48); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 4, 48); + TESTINST("dextm", 0x98765432, 0x98765432, 4, 48); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 4, 48); + TESTINST("dextm", 0xffffffffff865421, 0x0, 4, 48); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 4, 48); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 4, 48); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 4, 48); + TESTINST("dextm", 0x0, 0x0, 4, 60); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 4, 60); + TESTINST("dextm", 0x0, 0x98765432, 4, 60); + TESTINST("dextm", 0x0, 0xffffffffff865421, 4, 60); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 4, 60); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 60); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 4, 60); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 4, 60); + TESTINST("dextm", 0x98765432, 0x0, 4, 60); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 4, 60); + TESTINST("dextm", 0x98765432, 0x98765432, 4, 60); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 4, 60); + TESTINST("dextm", 0xffffffffff865421, 0x0, 4, 60); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 4, 60); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 4, 60); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 4, 60); + + TESTINST("dextm", 0x0, 0x0, 16, 33); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 16, 33); + TESTINST("dextm", 0x0, 0x98765432, 16, 33); + TESTINST("dextm", 0x0, 0xffffffffff865421, 16, 33); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 16, 33); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 16, 33); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 16, 33); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 16, 33); + TESTINST("dextm", 0x98765432, 0x0, 16, 33); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 16, 33); + TESTINST("dextm", 0x98765432, 0x98765432, 16, 33); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 16, 33); + TESTINST("dextm", 0xffffffffff865421, 0x0, 16, 33); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 16, 33); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 16, 33); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 16, 33); + TESTINST("dextm", 0x0, 0x0, 16, 37); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 16, 37); + TESTINST("dextm", 0x0, 0x98765432, 16, 37); + TESTINST("dextm", 0x0, 0xffffffffff865421, 16, 37); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 16, 37); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 16, 37); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 16, 37); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 16, 37); + TESTINST("dextm", 0x98765432, 0x0, 16, 37); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 16, 37); + TESTINST("dextm", 0x98765432, 0x98765432, 16, 37); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 16, 37); + TESTINST("dextm", 0xffffffffff865421, 0x0, 16, 37); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 16, 37); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 16, 37); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 16, 37); + TESTINST("dextm", 0x0, 0x0, 16, 48); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 16, 48); + TESTINST("dextm", 0x0, 0x98765432, 16, 48); + TESTINST("dextm", 0x0, 0xffffffffff865421, 16, 48); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 16, 48); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 16, 48); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 16, 48); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 16, 48); + TESTINST("dextm", 0x98765432, 0x0, 16, 48); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 16, 48); + TESTINST("dextm", 0x98765432, 0x98765432, 16, 48); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 16, 48); + TESTINST("dextm", 0xffffffffff865421, 0x0, 16, 48); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 16, 48); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 16, 48); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 16, 48); + + TESTINST("dextm", 0x0, 0x0, 31, 33); + TESTINST("dextm", 0x0, 0xffffffffffffffff, 31, 33); + TESTINST("dextm", 0x0, 0x98765432, 31, 33); + TESTINST("dextm", 0x0, 0xffffffffff865421, 31, 33); + TESTINST("dextm", 0xffffffffffffffff, 0x0, 31, 33); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffffffffff, 31, 33); + TESTINST("dextm", 0xffffffffffffffff, 0x98765432, 31, 33); + TESTINST("dextm", 0xffffffffffffffff, 0xffffffffff865421, 31, 33); + TESTINST("dextm", 0x98765432, 0x0, 31, 33); + TESTINST("dextm", 0x98765432, 0xffffffffffffffff, 31, 33); + TESTINST("dextm", 0x98765432, 0x98765432, 31, 33); + TESTINST("dextm", 0x98765432, 0xffffffffff865421, 31, 33); + TESTINST("dextm", 0xffffffffff865421, 0x0, 31, 33); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffffffffff, 31, 33); + TESTINST("dextm", 0xffffffffff865421, 0x98765432, 31, 33); + TESTINST("dextm", 0xffffffffff865421, 0xffffffffff865421, 31, 33); + + TESTINST("dextm", 0x2002ffffffffffff, 0xfffffffff0000fff, 4, 35); + TESTINST("dextm", 0xffff0000ffffffff, 0xff0000ffffffffff, 8, 33); + TESTINST("dextm", 0x2000ffffffffffff, 0xffff0000ffffffff, 16, 34); + TESTINST("dextm", 0x2000ffffffddddff, 0xffffffffffff0008, 4, 46); + TESTINST("dextm", 0x2000ffffffffeeee, 0xfffffff31415927f, 3, 56); + TESTINST("dextm", 0x31415927ffffffff, 0x2000ffffffffffff, 0, 64); + TESTINST("dextm", 0x2000ffffffffaaaa, 0x2000ffffffff2222, 16, 40); + TESTINST("dextm", 0x2000ffffffbbbbff, 0x7fffffffddddffff, 16, 42); + TESTINST("dextm", 0xeeeeff33ff22ffff, 0x2000ffffffffffff, 7, 43); + TESTINST("dextm", 0x2000ffffffffffff, 0x2000ffffffffbbbb, 5, 48); + TESTINST("dextm", 0x2000ffffffffbbbb, 0x2000ffffffffffff, 3, 52); + TESTINST("dextm", 0x2000ffffffffffff, 0xeeeeff33ff22ffff, 1, 54); + TESTINST("dextm", 0x7fffffffddddffff, 0x2000ffffffbbbbff, 2, 54); + TESTINST("dextm", 0x2000ffffffff2222, 0x2000ffffffffaaaa, 2, 48); + TESTINST("dextm", 0x2000ffffffffffff, 0x31415927ffffffff, 5, 53); + TESTINST("dextm", 0xfffffff31415927f, 0x2000ffffffffeeee, 2, 60); + TESTINST("dextm", 0xffffffffffff0008, 0x2000ffffffddddff, 3, 61); + TESTINST("dextm", 0xffff0000ffffffff, 0x2000ffffffffffff, 1, 62); + TESTINST("dextm", 0xff0000ffffffffff, 0, 8, 38); + TESTINST("dextm", 0xfffffffff0000fff, 0, 16, 39); + + printf("--- DEXTU ---\n"); + /* The values of pos and size must satisfy all of the following relations: + 32 <= pos < 64 + 0 < size <= 32 + 32 < pos+size <= 64 */ + TESTINST("dextu", 0x0, 0x0, 32, 1); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 32, 1); + TESTINST("dextu", 0x0, 0x98765432, 32, 1); + TESTINST("dextu", 0x0, 0xffffffffff865421, 32, 1); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 32, 1); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 32, 1); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 32, 1); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 32, 1); + TESTINST("dextu", 0x98765432, 0x0, 32, 1); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 32, 1); + TESTINST("dextu", 0x98765432, 0x98765432, 32, 1); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 32, 1); + TESTINST("dextu", 0xffffffffff865421, 0x0, 32, 1); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 32, 1); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 32, 1); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 32, 1); + TESTINST("dextu", 0x0, 0x0, 32, 4); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 32, 4); + TESTINST("dextu", 0x0, 0x98765432, 32, 4); + TESTINST("dextu", 0x0, 0xffffffffff865421, 32, 4); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 32, 4); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 32, 4); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 32, 4); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 32, 4); + TESTINST("dextu", 0x98765432, 0x0, 32, 4); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 32, 4); + TESTINST("dextu", 0x98765432, 0x98765432, 32, 4); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 32, 4); + TESTINST("dextu", 0xffffffffff865421, 0x0, 32, 4); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 32, 4); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 32, 4); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 32, 4); + TESTINST("dextu", 0x0, 0x0, 32, 16); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 32, 16); + TESTINST("dextu", 0x0, 0x98765432, 32, 16); + TESTINST("dextu", 0x0, 0xffffffffff865421, 32, 16); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 32, 16); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 32, 16); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 32, 16); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 32, 16); + TESTINST("dextu", 0x98765432, 0x0, 32, 16); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 32, 16); + TESTINST("dextu", 0x98765432, 0x98765432, 32, 16); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 32, 16); + TESTINST("dextu", 0xffffffffff865421, 0x0, 32, 16); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 32, 16); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 32, 16); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 32, 16); + TESTINST("dextu", 0x0, 0x0, 32, 32); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 32, 32); + TESTINST("dextu", 0x0, 0x98765432, 32, 32); + TESTINST("dextu", 0x0, 0xffffffffff865421, 32, 32); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 32, 32); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 32, 32); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 32, 32); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 32, 32); + TESTINST("dextu", 0x98765432, 0x0, 32, 32); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 32, 32); + TESTINST("dextu", 0x98765432, 0x98765432, 32, 32); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 32, 32); + TESTINST("dextu", 0xffffffffff865421, 0x0, 32, 32); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 32, 32); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 32, 32); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 32, 32); + + TESTINST("dextu", 0x0, 0x0, 36, 1); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 36, 1); + TESTINST("dextu", 0x0, 0x98765432, 36, 1); + TESTINST("dextu", 0x0, 0xffffffffff865421, 36, 1); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 36, 1); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 36, 1); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 36, 1); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 36, 1); + TESTINST("dextu", 0x98765432, 0x0, 36, 1); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 36, 1); + TESTINST("dextu", 0x98765432, 0x98765432, 36, 1); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 36, 1); + TESTINST("dextu", 0xffffffffff865421, 0x0, 36, 1); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 36, 1); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 36, 1); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 36, 1); + TESTINST("dextu", 0x0, 0x0, 36, 4); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 36, 4); + TESTINST("dextu", 0x0, 0x98765432, 36, 4); + TESTINST("dextu", 0x0, 0xffffffffff865421, 36, 4); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 36, 4); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 36, 4); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 36, 4); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 36, 4); + TESTINST("dextu", 0x98765432, 0x0, 36, 4); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 36, 4); + TESTINST("dextu", 0x98765432, 0x98765432, 36, 4); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 36, 4); + TESTINST("dextu", 0xffffffffff865421, 0x0, 36, 4); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 36, 4); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 36, 4); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 36, 4); + TESTINST("dextu", 0x0, 0x0, 36, 16); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 36, 16); + TESTINST("dextu", 0x0, 0x98765432, 36, 16); + TESTINST("dextu", 0x0, 0xffffffffff865421, 36, 16); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 36, 16); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 36, 16); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 36, 16); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 36, 16); + TESTINST("dextu", 0x98765432, 0x0, 36, 16); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 36, 16); + TESTINST("dextu", 0x98765432, 0x98765432, 36, 16); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 36, 16); + TESTINST("dextu", 0xffffffffff865421, 0x0, 36, 16); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 36, 16); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 36, 16); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 36, 16); + TESTINST("dextu", 0x0, 0x0, 36, 28); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 36, 28); + TESTINST("dextu", 0x0, 0x98765432, 36, 28); + TESTINST("dextu", 0x0, 0xffffffffff865421, 36, 28); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 36, 28); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 36, 28); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 36, 28); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 36, 28); + TESTINST("dextu", 0x98765432, 0x0, 36, 28); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 36, 28); + TESTINST("dextu", 0x98765432, 0x98765432, 36, 28); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 36, 28); + TESTINST("dextu", 0xffffffffff865421, 0x0, 36, 28); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 36, 28); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 36, 28); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 36, 28); + + TESTINST("dextu", 0x0, 0x0, 48, 1); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 48, 1); + TESTINST("dextu", 0x0, 0x98765432, 48, 1); + TESTINST("dextu", 0x0, 0xffffffffff865421, 48, 1); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 48, 1); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 48, 1); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 48, 1); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 48, 1); + TESTINST("dextu", 0x98765432, 0x0, 48, 1); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 48, 1); + TESTINST("dextu", 0x98765432, 0x98765432, 48, 1); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 48, 1); + TESTINST("dextu", 0xffffffffff865421, 0x0, 48, 1); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 48, 1); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 48, 1); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 48, 1); + TESTINST("dextu", 0x0, 0x0, 48, 4); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 48, 4); + TESTINST("dextu", 0x0, 0x98765432, 48, 4); + TESTINST("dextu", 0x0, 0xffffffffff865421, 48, 4); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 48, 4); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 48, 4); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 48, 4); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 48, 4); + TESTINST("dextu", 0x98765432, 0x0, 48, 4); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 48, 4); + TESTINST("dextu", 0x98765432, 0x98765432, 48, 4); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 48, 4); + TESTINST("dextu", 0xffffffffff865421, 0x0, 48, 4); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 48, 4); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 48, 4); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 48, 4); + TESTINST("dextu", 0x0, 0x0, 48, 16); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 48, 16); + TESTINST("dextu", 0x0, 0x98765432, 48, 16); + TESTINST("dextu", 0x0, 0xffffffffff865421, 48, 16); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 48, 16); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 48, 16); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 48, 16); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 48, 16); + TESTINST("dextu", 0x98765432, 0x0, 48, 16); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 48, 16); + TESTINST("dextu", 0x98765432, 0x98765432, 48, 16); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 48, 16); + TESTINST("dextu", 0xffffffffff865421, 0x0, 48, 16); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 48, 16); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 48, 16); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 48, 16); + + TESTINST("dextu", 0x0, 0x0, 63, 1); + TESTINST("dextu", 0x0, 0xffffffffffffffff, 63, 1); + TESTINST("dextu", 0x0, 0x98765432, 63, 1); + TESTINST("dextu", 0x0, 0xffffffffff865421, 63, 1); + TESTINST("dextu", 0xffffffffffffffff, 0x0, 63, 1); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffffffffff, 63, 1); + TESTINST("dextu", 0xffffffffffffffff, 0x98765432, 63, 1); + TESTINST("dextu", 0xffffffffffffffff, 0xffffffffff865421, 63, 1); + TESTINST("dextu", 0x98765432, 0x0, 63, 1); + TESTINST("dextu", 0x98765432, 0xffffffffffffffff, 63, 1); + TESTINST("dextu", 0x98765432, 0x98765432, 63, 1); + TESTINST("dextu", 0x98765432, 0xffffffffff865421, 63, 1); + TESTINST("dextu", 0xffffffffff865421, 0x0, 63, 1); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffffffffff, 63, 1); + TESTINST("dextu", 0xffffffffff865421, 0x98765432, 63, 1); + TESTINST("dextu", 0xffffffffff865421, 0xffffffffff865421, 63, 1); + + TESTINST("dextu", 0x2002ffffffffffff, 0xfffffffff0000fff, 33, 4); + TESTINST("dextu", 0xffff0000ffffffff, 0xff0000ffffffffff, 60, 4); + TESTINST("dextu", 0x2000ffffffffffff, 0xffff0000ffffffff, 54, 4); + TESTINST("dextu", 0x2000ffffffddddff, 0xffffffffffff0008, 56, 2); + TESTINST("dextu", 0x2000ffffffffeeee, 0xfffffff31415927f, 40, 4); + TESTINST("dextu", 0x31415927ffffffff, 0x2000ffffffffffff, 51, 2); + TESTINST("dextu", 0x2000ffffffffaaaa, 0x2000ffffffff2222, 48, 4); + TESTINST("dextu", 0x2000ffffffbbbbff, 0x7fffffffddddffff, 38, 4); + TESTINST("dextu", 0xeeeeff33ff22ffff, 0x2000ffffffffffff, 35, 4); + TESTINST("dextu", 0x2000ffffffffffff, 0x2000ffffffffbbbb, 36, 4); + TESTINST("dextu", 0x2000ffffffffbbbb, 0x2000ffffffffffff, 45, 1); + TESTINST("dextu", 0x2000ffffffffffff, 0xeeeeff33ff22ffff, 46, 4); + TESTINST("dextu", 0x7fffffffddddffff, 0x2000ffffffbbbbff, 52, 4); + TESTINST("dextu", 0x2000ffffffff2222, 0x2000ffffffffaaaa, 40, 8); + TESTINST("dextu", 0x2000ffffffffffff, 0x31415927ffffffff, 39, 4); + TESTINST("dextu", 0xfffffff31415927f, 0x2000ffffffffeeee, 60, 4); + TESTINST("dextu", 0xffffffffffff0008, 0x2000ffffffddddff, 63, 1); + TESTINST("dextu", 0xffff0000ffffffff, 0x2000ffffffffffff, 50, 4); + TESTINST("dextu", 0xff0000ffffffffff, 0, 36, 4); + TESTINST("dextu", 0xfffffffff0000fff, 0, 46, 4); + + printf("--- DINS ---\n"); + /* The values of pos and size must satisfy all of the following relations: + 0 <= pos < 32 + 0 < size <= 32 + 0 < pos+size <= 32 */ + TESTINST("dins", 0x0, 0x0, 0, 1); + TESTINST("dins", 0x0, 0xffffffffffffffff, 0, 1); + TESTINST("dins", 0x0, 0x98765432, 0, 1); + TESTINST("dins", 0x0, 0xffffffffff865421, 0, 1); + TESTINST("dins", 0xffffffffffffffff, 0x0, 0, 1); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 0, 1); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 0, 1); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 0, 1); + TESTINST("dins", 0x98765432, 0x0, 0, 1); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 0, 1); + TESTINST("dins", 0x98765432, 0x98765432, 0, 1); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 0, 1); + TESTINST("dins", 0xffffffffff865421, 0x0, 0, 1); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 0, 1); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 0, 1); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 0, 1); + TESTINST("dins", 0x0, 0x0, 0, 4); + TESTINST("dins", 0x0, 0xffffffffffffffff, 0, 4); + TESTINST("dins", 0x0, 0x98765432, 0, 4); + TESTINST("dins", 0x0, 0xffffffffff865421, 0, 4); + TESTINST("dins", 0xffffffffffffffff, 0x0, 0, 4); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 0, 4); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 0, 4); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 0, 4); + TESTINST("dins", 0x98765432, 0x0, 0, 4); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 0, 4); + TESTINST("dins", 0x98765432, 0x98765432, 0, 4); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 0, 4); + TESTINST("dins", 0xffffffffff865421, 0x0, 0, 4); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 0, 4); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 0, 4); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 0, 4); + TESTINST("dins", 0x0, 0x0, 0, 16); + TESTINST("dins", 0x0, 0xffffffffffffffff, 0, 16); + TESTINST("dins", 0x0, 0x98765432, 0, 16); + TESTINST("dins", 0x0, 0xffffffffff865421, 0, 16); + TESTINST("dins", 0xffffffffffffffff, 0x0, 0, 16); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 0, 16); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 0, 16); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 0, 16); + TESTINST("dins", 0x98765432, 0x0, 0, 16); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 0, 16); + TESTINST("dins", 0x98765432, 0x98765432, 0, 16); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 0, 16); + TESTINST("dins", 0xffffffffff865421, 0x0, 0, 16); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 0, 16); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 0, 16); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 0, 16); + TESTINST("dins", 0x0, 0x0, 0, 32); + TESTINST("dins", 0x0, 0xffffffffffffffff, 0, 32); + TESTINST("dins", 0x0, 0x98765432, 0, 32); + TESTINST("dins", 0x0, 0xffffffffff865421, 0, 32); + TESTINST("dins", 0xffffffffffffffff, 0x0, 0, 32); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 0, 32); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 0, 32); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 0, 32); + TESTINST("dins", 0x98765432, 0x0, 0, 32); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 0, 32); + TESTINST("dins", 0x98765432, 0x98765432, 0, 32); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 0, 32); + TESTINST("dins", 0xffffffffff865421, 0x0, 0, 32); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 0, 32); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 0, 32); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 0, 32); + + TESTINST("dins", 0x0, 0x0, 4, 1); + TESTINST("dins", 0x0, 0xffffffffffffffff, 4, 1); + TESTINST("dins", 0x0, 0x98765432, 4, 1); + TESTINST("dins", 0x0, 0xffffffffff865421, 4, 1); + TESTINST("dins", 0xffffffffffffffff, 0x0, 4, 1); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 4, 1); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 4, 1); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 4, 1); + TESTINST("dins", 0x98765432, 0x0, 4, 1); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 4, 1); + TESTINST("dins", 0x98765432, 0x98765432, 4, 1); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 4, 1); + TESTINST("dins", 0xffffffffff865421, 0x0, 4, 1); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 4, 1); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 4, 1); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 4, 1); + TESTINST("dins", 0x0, 0x0, 4, 4); + TESTINST("dins", 0x0, 0xffffffffffffffff, 4, 4); + TESTINST("dins", 0x0, 0x98765432, 4, 4); + TESTINST("dins", 0x0, 0xffffffffff865421, 4, 4); + TESTINST("dins", 0xffffffffffffffff, 0x0, 4, 4); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 4, 4); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 4, 4); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 4, 4); + TESTINST("dins", 0x98765432, 0x0, 4, 4); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 4, 4); + TESTINST("dins", 0x98765432, 0x98765432, 4, 4); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 4, 4); + TESTINST("dins", 0xffffffffff865421, 0x0, 4, 4); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 4, 4); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 4, 4); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 4, 4); + TESTINST("dins", 0x0, 0x0, 4, 16); + TESTINST("dins", 0x0, 0xffffffffffffffff, 4, 16); + TESTINST("dins", 0x0, 0x98765432, 4, 16); + TESTINST("dins", 0x0, 0xffffffffff865421, 4, 16); + TESTINST("dins", 0xffffffffffffffff, 0x0, 4, 16); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 4, 16); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 4, 16); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 4, 16); + TESTINST("dins", 0x98765432, 0x0, 4, 16); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 4, 16); + TESTINST("dins", 0x98765432, 0x98765432, 4, 16); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 4, 16); + TESTINST("dins", 0xffffffffff865421, 0x0, 4, 16); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 4, 16); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 4, 16); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 4, 16); + TESTINST("dins", 0x0, 0x0, 4, 28); + TESTINST("dins", 0x0, 0xffffffffffffffff, 4, 28); + TESTINST("dins", 0x0, 0x98765432, 4, 28); + TESTINST("dins", 0x0, 0xffffffffff865421, 4, 28); + TESTINST("dins", 0xffffffffffffffff, 0x0, 4, 28); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 4, 28); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 4, 28); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 4, 28); + TESTINST("dins", 0x98765432, 0x0, 4, 28); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 4, 28); + TESTINST("dins", 0x98765432, 0x98765432, 4, 28); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 4, 28); + TESTINST("dins", 0xffffffffff865421, 0x0, 4, 28); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 4, 28); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 4, 28); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 4, 28); + + TESTINST("dins", 0x0, 0x0, 16, 1); + TESTINST("dins", 0x0, 0xffffffffffffffff, 16, 1); + TESTINST("dins", 0x0, 0x98765432, 16, 1); + TESTINST("dins", 0x0, 0xffffffffff865421, 16, 1); + TESTINST("dins", 0xffffffffffffffff, 0x0, 16, 1); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 16, 1); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 16, 1); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 16, 1); + TESTINST("dins", 0x98765432, 0x0, 16, 1); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 16, 1); + TESTINST("dins", 0x98765432, 0x98765432, 16, 1); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 16, 1); + TESTINST("dins", 0xffffffffff865421, 0x0, 16, 1); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 16, 1); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 16, 1); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 16, 1); + TESTINST("dins", 0x0, 0x0, 16, 4); + TESTINST("dins", 0x0, 0xffffffffffffffff, 16, 4); + TESTINST("dins", 0x0, 0x98765432, 16, 4); + TESTINST("dins", 0x0, 0xffffffffff865421, 16, 4); + TESTINST("dins", 0xffffffffffffffff, 0x0, 16, 4); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 16, 4); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 16, 4); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 16, 4); + TESTINST("dins", 0x98765432, 0x0, 16, 4); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 16, 4); + TESTINST("dins", 0x98765432, 0x98765432, 16, 4); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 16, 4); + TESTINST("dins", 0xffffffffff865421, 0x0, 16, 4); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 16, 4); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 16, 4); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 16, 4); + TESTINST("dins", 0x0, 0x0, 16, 16); + TESTINST("dins", 0x0, 0xffffffffffffffff, 16, 16); + TESTINST("dins", 0x0, 0x98765432, 16, 16); + TESTINST("dins", 0x0, 0xffffffffff865421, 16, 16); + TESTINST("dins", 0xffffffffffffffff, 0x0, 16, 16); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 16, 16); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 16, 16); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 16, 16); + TESTINST("dins", 0x98765432, 0x0, 16, 16); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 16, 16); + TESTINST("dins", 0x98765432, 0x98765432, 16, 16); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 16, 16); + TESTINST("dins", 0xffffffffff865421, 0x0, 16, 16); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 16, 16); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 16, 16); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 16, 16); + + TESTINST("dins", 0x0, 0x0, 31, 1); + TESTINST("dins", 0x0, 0xffffffffffffffff, 31, 1); + TESTINST("dins", 0x0, 0x98765432, 31, 1); + TESTINST("dins", 0x0, 0xffffffffff865421, 31, 1); + TESTINST("dins", 0xffffffffffffffff, 0x0, 31, 1); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffffffffff, 31, 1); + TESTINST("dins", 0xffffffffffffffff, 0x98765432, 31, 1); + TESTINST("dins", 0xffffffffffffffff, 0xffffffffff865421, 31, 1); + TESTINST("dins", 0x98765432, 0x0, 31, 1); + TESTINST("dins", 0x98765432, 0xffffffffffffffff, 31, 1); + TESTINST("dins", 0x98765432, 0x98765432, 31, 1); + TESTINST("dins", 0x98765432, 0xffffffffff865421, 31, 1); + TESTINST("dins", 0xffffffffff865421, 0x0, 31, 1); + TESTINST("dins", 0xffffffffff865421, 0xffffffffffffffff, 31, 1); + TESTINST("dins", 0xffffffffff865421, 0x98765432, 31, 1); + TESTINST("dins", 0xffffffffff865421, 0xffffffffff865421, 31, 1); + + TESTINST("dins", 0x2002ffffffffffff, 0xfffffffff0000fff, 4, 4); + TESTINST("dins", 0xffff0000ffffffff, 0xff0000ffffffffff, 8, 4); + TESTINST("dins", 0x2000ffffffffffff, 0xffff0000ffffffff, 16, 4); + TESTINST("dins", 0x2000ffffffddddff, 0xffffffffffff0008, 24, 2); + TESTINST("dins", 0x2000ffffffffeeee, 0xfffffff31415927f, 24, 4); + TESTINST("dins", 0x31415927ffffffff, 0x2000ffffffffffff, 9, 2); + TESTINST("dins", 0x2000ffffffffaaaa, 0x2000ffffffff2222, 16, 4); + TESTINST("dins", 0x2000ffffffbbbbff, 0x7fffffffddddffff, 16, 4); + TESTINST("dins", 0xeeeeff33ff22ffff, 0x2000ffffffffffff, 7, 4); + TESTINST("dins", 0x2000ffffffffffff, 0x2000ffffffffbbbb, 5, 4); + TESTINST("dins", 0x2000ffffffffbbbb, 0x2000ffffffffffff, 3, 4); + TESTINST("dins", 0x2000ffffffffffff, 0xeeeeff33ff22ffff, 16, 4); + TESTINST("dins", 0x7fffffffddddffff, 0x2000ffffffbbbbff, 16, 2); + TESTINST("dins", 0x2000ffffffff2222, 0x2000ffffffffaaaa, 2, 8); + TESTINST("dins", 0x2000ffffffffffff, 0x2000ffffffffeeee, 0, 32); + TESTINST("dins", 0xfffffff31415927f, 0x2000ffffffddddff, 16, 16); + TESTINST("dins", 0xffffffffffff0008, 0x2000ffffffddddff, 8, 2); + TESTINST("dins", 0xffff0000ffffffff, 0x2000ffffffffffff, 16, 4); + TESTINST("dins", 0xff0000ffffffffff, 0xffff0000ffffffff, 8, 4); + TESTINST("dins", 0xfffffffff0000fff, 0, 0, 31); + + printf("--- DINSM ---\n"); + /* The values of pos and size must satisfy all of the following relations: + 0 <= pos < 32 + 2 <= size <= 64 + 32 < pos+size <= 64 */ + TESTINST("dinsm", 0x0, 0x0, 0, 33); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 0, 33); + TESTINST("dinsm", 0x0, 0x98765432, 0, 33); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 0, 33); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 0, 33); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 0, 33); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 0, 33); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 0, 33); + TESTINST("dinsm", 0x98765432, 0x0, 0, 33); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 0, 33); + TESTINST("dinsm", 0x98765432, 0x98765432, 0, 33); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 0, 33); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 0, 33); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 0, 33); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 0, 33); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 0, 33); + TESTINST("dinsm", 0x0, 0x0, 0, 37); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 0, 37); + TESTINST("dinsm", 0x0, 0x98765432, 0, 37); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 0, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 0, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 0, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 0, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 0, 37); + TESTINST("dinsm", 0x98765432, 0x0, 0, 37); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 0, 37); + TESTINST("dinsm", 0x98765432, 0x98765432, 0, 37); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 0, 37); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 0, 37); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 0, 37); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 0, 37); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 0, 37); + TESTINST("dinsm", 0x0, 0x0, 0, 48); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 0, 48); + TESTINST("dinsm", 0x0, 0x98765432, 0, 48); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 0, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 0, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 0, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 0, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 0, 48); + TESTINST("dinsm", 0x98765432, 0x0, 0, 48); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 0, 48); + TESTINST("dinsm", 0x98765432, 0x98765432, 0, 48); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 0, 48); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 0, 48); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 0, 48); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 0, 48); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 0, 48); + TESTINST("dinsm", 0x0, 0x0, 0, 64); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 0, 64); + TESTINST("dinsm", 0x0, 0x98765432, 0, 64); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 0, 64); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 0, 64); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 0, 64); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 0, 64); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 0, 64); + TESTINST("dinsm", 0x98765432, 0x0, 0, 64); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 0, 64); + TESTINST("dinsm", 0x98765432, 0x98765432, 0, 64); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 0, 64); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 0, 64); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 0, 64); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 0, 64); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 0, 64); + + TESTINST("dinsm", 0x0, 0x0, 4, 29); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 4, 29); + TESTINST("dinsm", 0x0, 0x98765432, 4, 29); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 4, 29); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 4, 29); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 29); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 4, 29); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 4, 29); + TESTINST("dinsm", 0x98765432, 0x0, 4, 29); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 4, 29); + TESTINST("dinsm", 0x98765432, 0x98765432, 4, 29); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 4, 29); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 4, 29); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 4, 29); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 4, 29); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 4, 29); + TESTINST("dinsm", 0x0, 0x0, 4, 32); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 4, 32); + TESTINST("dinsm", 0x0, 0x98765432, 4, 32); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 4, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 4, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 4, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 4, 32); + TESTINST("dinsm", 0x98765432, 0x0, 4, 32); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 4, 32); + TESTINST("dinsm", 0x98765432, 0x98765432, 4, 32); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 4, 32); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 4, 32); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 4, 32); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 4, 32); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 4, 32); + TESTINST("dinsm", 0x0, 0x0, 4, 37); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 4, 37); + TESTINST("dinsm", 0x0, 0x98765432, 4, 37); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 4, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 4, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 4, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 4, 37); + TESTINST("dinsm", 0x98765432, 0x0, 4, 37); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 4, 37); + TESTINST("dinsm", 0x98765432, 0x98765432, 4, 37); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 4, 37); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 4, 37); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 4, 37); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 4, 37); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 4, 37); + TESTINST("dinsm", 0x0, 0x0, 4, 48); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 4, 48); + TESTINST("dinsm", 0x0, 0x98765432, 4, 48); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 4, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 4, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 4, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 4, 48); + TESTINST("dinsm", 0x98765432, 0x0, 4, 48); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 4, 48); + TESTINST("dinsm", 0x98765432, 0x98765432, 4, 48); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 4, 48); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 4, 48); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 4, 48); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 4, 48); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 4, 48); + TESTINST("dinsm", 0x0, 0x0, 4, 60); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 4, 60); + TESTINST("dinsm", 0x0, 0x98765432, 4, 60); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 4, 60); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 4, 60); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 4, 60); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 4, 60); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 4, 60); + TESTINST("dinsm", 0x98765432, 0x0, 4, 60); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 4, 60); + TESTINST("dinsm", 0x98765432, 0x98765432, 4, 60); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 4, 60); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 4, 60); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 4, 60); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 4, 60); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 4, 60); + + TESTINST("dinsm", 0x0, 0x0, 16, 17); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 16, 17); + TESTINST("dinsm", 0x0, 0x98765432, 16, 17); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 16, 17); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 16, 17); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 16, 17); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 16, 17); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 16, 17); + TESTINST("dinsm", 0x98765432, 0x0, 16, 17); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 16, 17); + TESTINST("dinsm", 0x98765432, 0x98765432, 16, 17); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 16, 17); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 16, 17); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 16, 17); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 16, 17); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 16, 17); + TESTINST("dinsm", 0x0, 0x0, 16, 32); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 16, 32); + TESTINST("dinsm", 0x0, 0x98765432, 16, 32); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 16, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 16, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 16, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 16, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 16, 32); + TESTINST("dinsm", 0x98765432, 0x0, 16, 32); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 16, 32); + TESTINST("dinsm", 0x98765432, 0x98765432, 16, 32); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 16, 32); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 16, 32); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 16, 32); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 16, 32); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 16, 32); + TESTINST("dinsm", 0x0, 0x0, 16, 37); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 16, 37); + TESTINST("dinsm", 0x0, 0x98765432, 16, 37); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 16, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 16, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 16, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 16, 37); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 16, 37); + TESTINST("dinsm", 0x98765432, 0x0, 16, 37); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 16, 37); + TESTINST("dinsm", 0x98765432, 0x98765432, 16, 37); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 16, 37); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 16, 37); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 16, 37); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 16, 37); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 16, 37); + TESTINST("dinsm", 0x0, 0x0, 16, 48); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 16, 48); + TESTINST("dinsm", 0x0, 0x98765432, 16, 48); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 16, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 16, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 16, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 16, 48); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 16, 48); + TESTINST("dinsm", 0x98765432, 0x0, 16, 48); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 16, 48); + TESTINST("dinsm", 0x98765432, 0x98765432, 16, 48); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 16, 48); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 16, 48); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 16, 48); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 16, 48); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 16, 48); + + TESTINST("dinsm", 0x0, 0x0, 31, 2); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 31, 2); + TESTINST("dinsm", 0x0, 0x98765432, 31, 2); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 31, 2); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 31, 2); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 31, 2); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 31, 2); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 31, 2); + TESTINST("dinsm", 0x98765432, 0x0, 31, 2); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 31, 2); + TESTINST("dinsm", 0x98765432, 0x98765432, 31, 2); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 31, 2); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 31, 2); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 31, 2); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 31, 2); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 31, 2); + TESTINST("dinsm", 0x0, 0x0, 31, 16); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 31, 16); + TESTINST("dinsm", 0x0, 0x98765432, 31, 16); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 31, 16); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 31, 16); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 31, 16); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 31, 16); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 31, 16); + TESTINST("dinsm", 0x98765432, 0x0, 31, 16); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 31, 16); + TESTINST("dinsm", 0x98765432, 0x98765432, 31, 16); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 31, 16); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 31, 16); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 31, 16); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 31, 16); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 31, 16); + TESTINST("dinsm", 0x0, 0x0, 31, 32); + TESTINST("dinsm", 0x0, 0xffffffffffffffff, 31, 32); + TESTINST("dinsm", 0x0, 0x98765432, 31, 32); + TESTINST("dinsm", 0x0, 0xffffffffff865421, 31, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0x0, 31, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffffffffff, 31, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0x98765432, 31, 32); + TESTINST("dinsm", 0xffffffffffffffff, 0xffffffffff865421, 31, 32); + TESTINST("dinsm", 0x98765432, 0x0, 31, 32); + TESTINST("dinsm", 0x98765432, 0xffffffffffffffff, 31, 32); + TESTINST("dinsm", 0x98765432, 0x98765432, 31, 32); + TESTINST("dinsm", 0x98765432, 0xffffffffff865421, 31, 32); + TESTINST("dinsm", 0xffffffffff865421, 0x0, 31, 32); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffffffffff, 31, 32); + TESTINST("dinsm", 0xffffffffff865421, 0x98765432, 31, 32); + TESTINST("dinsm", 0xffffffffff865421, 0xffffffffff865421, 31, 32); + + TESTINST("dinsm", 0x2002ffffffffffff, 0xfffffffff0000fff, 4, 35); + TESTINST("dinsm", 0xffff0000ffffffff, 0xff0000ffffffffff, 8, 33); + TESTINST("dinsm", 0x2000ffffffffffff, 0xffff0000ffffffff, 16, 34); + TESTINST("dinsm", 0x2000ffffffddddff, 0xffffffffffff0008, 4, 46); + TESTINST("dinsm", 0x2000ffffffffeeee, 0xfffffff31415927f, 3, 56); + TESTINST("dinsm", 0x31415927ffffffff, 0x2000ffffffffffff, 0, 64); + TESTINST("dinsm", 0x2000ffffffffaaaa, 0x2000ffffffff2222, 16, 40); + TESTINST("dinsm", 0x2000ffffffbbbbff, 0x7fffffffddddffff, 16, 42); + TESTINST("dinsm", 0xeeeeff33ff22ffff, 0x2000ffffffffffff, 7, 43); + TESTINST("dinsm", 0x2000ffffffffffff, 0x2000ffffffffbbbb, 5, 48); + TESTINST("dinsm", 0x2000ffffffffbbbb, 0x2000ffffffffffff, 3, 52); + TESTINST("dinsm", 0x2000ffffffffffff, 0xeeeeff33ff22ffff, 1, 54); + TESTINST("dinsm", 0x7fffffffddddffff, 0x2000ffffffbbbbff, 2, 54); + TESTINST("dinsm", 0x2000ffffffff2222, 0x2000ffffffffaaaa, 2, 48); + TESTINST("dinsm", 0x2000ffffffffffff, 0x31415927ffffffff, 5, 53); + TESTINST("dinsm", 0xfffffff31415927f, 0x2000ffffffffeeee, 2, 60); + TESTINST("dinsm", 0xffffffffffff0008, 0x2000ffffffddddff, 3, 61); + TESTINST("dinsm", 0xffff0000ffffffff, 0x2000ffffffffffff, 1, 62); + TESTINST("dinsm", 0xff0000ffffffffff, 0, 8, 38); + TESTINST("dinsm", 0xfffffffff0000fff, 0, 16, 39); + + printf("--- DINSU ---\n"); + /* The values of pos and size must satisfy all of the following relations: + 32 <= pos < 64 + 1 <= size <= 32 + 32 < pos+size <= 64 */ + TESTINST("dinsu", 0x0, 0x0, 32, 1); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 32, 1); + TESTINST("dinsu", 0x0, 0x98765432, 32, 1); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 32, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 32, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 32, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 32, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 32, 1); + TESTINST("dinsu", 0x98765432, 0x0, 32, 1); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 32, 1); + TESTINST("dinsu", 0x98765432, 0x98765432, 32, 1); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 32, 1); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 32, 1); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 32, 1); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 32, 1); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 32, 1); + TESTINST("dinsu", 0x0, 0x0, 32, 4); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 32, 4); + TESTINST("dinsu", 0x0, 0x98765432, 32, 4); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 32, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 32, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 32, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 32, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 32, 4); + TESTINST("dinsu", 0x98765432, 0x0, 32, 4); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 32, 4); + TESTINST("dinsu", 0x98765432, 0x98765432, 32, 4); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 32, 4); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 32, 4); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 32, 4); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 32, 4); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 32, 4); + TESTINST("dinsu", 0x0, 0x0, 32, 16); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 32, 16); + TESTINST("dinsu", 0x0, 0x98765432, 32, 16); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 32, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 32, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 32, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 32, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 32, 16); + TESTINST("dinsu", 0x98765432, 0x0, 32, 16); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 32, 16); + TESTINST("dinsu", 0x98765432, 0x98765432, 32, 16); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 32, 16); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 32, 16); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 32, 16); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 32, 16); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 32, 16); + TESTINST("dinsu", 0x0, 0x0, 32, 32); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 32, 32); + TESTINST("dinsu", 0x0, 0x98765432, 32, 32); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 32, 32); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 32, 32); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 32, 32); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 32, 32); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 32, 32); + TESTINST("dinsu", 0x98765432, 0x0, 32, 32); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 32, 32); + TESTINST("dinsu", 0x98765432, 0x98765432, 32, 32); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 32, 32); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 32, 32); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 32, 32); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 32, 32); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 32, 32); + + TESTINST("dinsu", 0x0, 0x0, 36, 1); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 36, 1); + TESTINST("dinsu", 0x0, 0x98765432, 36, 1); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 36, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 36, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 36, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 36, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 36, 1); + TESTINST("dinsu", 0x98765432, 0x0, 36, 1); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 36, 1); + TESTINST("dinsu", 0x98765432, 0x98765432, 36, 1); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 36, 1); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 36, 1); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 36, 1); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 36, 1); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 36, 1); + TESTINST("dinsu", 0x0, 0x0, 36, 4); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 36, 4); + TESTINST("dinsu", 0x0, 0x98765432, 36, 4); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 36, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 36, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 36, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 36, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 36, 4); + TESTINST("dinsu", 0x98765432, 0x0, 36, 4); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 36, 4); + TESTINST("dinsu", 0x98765432, 0x98765432, 36, 4); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 36, 4); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 36, 4); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 36, 4); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 36, 4); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 36, 4); + TESTINST("dinsu", 0x0, 0x0, 36, 16); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 36, 16); + TESTINST("dinsu", 0x0, 0x98765432, 36, 16); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 36, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 36, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 36, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 36, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 36, 16); + TESTINST("dinsu", 0x98765432, 0x0, 36, 16); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 36, 16); + TESTINST("dinsu", 0x98765432, 0x98765432, 36, 16); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 36, 16); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 36, 16); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 36, 16); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 36, 16); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 36, 16); + TESTINST("dinsu", 0x0, 0x0, 36, 28); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 36, 28); + TESTINST("dinsu", 0x0, 0x98765432, 36, 28); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 36, 28); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 36, 28); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 36, 28); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 36, 28); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 36, 28); + TESTINST("dinsu", 0x98765432, 0x0, 36, 28); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 36, 28); + TESTINST("dinsu", 0x98765432, 0x98765432, 36, 28); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 36, 28); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 36, 28); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 36, 28); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 36, 28); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 36, 28); + + TESTINST("dinsu", 0x0, 0x0, 48, 1); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 48, 1); + TESTINST("dinsu", 0x0, 0x98765432, 48, 1); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 48, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 48, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 48, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 48, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 48, 1); + TESTINST("dinsu", 0x98765432, 0x0, 48, 1); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 48, 1); + TESTINST("dinsu", 0x98765432, 0x98765432, 48, 1); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 48, 1); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 48, 1); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 48, 1); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 48, 1); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 48, 1); + TESTINST("dinsu", 0x0, 0x0, 48, 4); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 48, 4); + TESTINST("dinsu", 0x0, 0x98765432, 48, 4); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 48, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 48, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 48, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 48, 4); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 48, 4); + TESTINST("dinsu", 0x98765432, 0x0, 48, 4); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 48, 4); + TESTINST("dinsu", 0x98765432, 0x98765432, 48, 4); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 48, 4); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 48, 4); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 48, 4); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 48, 4); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 48, 4); + TESTINST("dinsu", 0x0, 0x0, 48, 16); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 48, 16); + TESTINST("dinsu", 0x0, 0x98765432, 48, 16); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 48, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 48, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 48, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 48, 16); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 48, 16); + TESTINST("dinsu", 0x98765432, 0x0, 48, 16); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 48, 16); + TESTINST("dinsu", 0x98765432, 0x98765432, 48, 16); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 48, 16); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 48, 16); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 48, 16); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 48, 16); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 48, 16); + + TESTINST("dinsu", 0x0, 0x0, 63, 1); + TESTINST("dinsu", 0x0, 0xffffffffffffffff, 63, 1); + TESTINST("dinsu", 0x0, 0x98765432, 63, 1); + TESTINST("dinsu", 0x0, 0xffffffffff865421, 63, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0x0, 63, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffffffffff, 63, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0x98765432, 63, 1); + TESTINST("dinsu", 0xffffffffffffffff, 0xffffffffff865421, 63, 1); + TESTINST("dinsu", 0x98765432, 0x0, 63, 1); + TESTINST("dinsu", 0x98765432, 0xffffffffffffffff, 63, 1); + TESTINST("dinsu", 0x98765432, 0x98765432, 63, 1); + TESTINST("dinsu", 0x98765432, 0xffffffffff865421, 63, 1); + TESTINST("dinsu", 0xffffffffff865421, 0x0, 63, 1); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffffffffff, 63, 1); + TESTINST("dinsu", 0xffffffffff865421, 0x98765432, 63, 1); + TESTINST("dinsu", 0xffffffffff865421, 0xffffffffff865421, 63, 1); + + TESTINST("dinsu", 0x2002ffffffffffff, 0xfffffffff0000fff, 33, 4); + TESTINST("dinsu", 0xffff0000ffffffff, 0xff0000ffffffffff, 60, 4); + TESTINST("dinsu", 0x2000ffffffffffff, 0xffff0000ffffffff, 54, 4); + TESTINST("dinsu", 0x2000ffffffddddff, 0xffffffffffff0008, 56, 2); + TESTINST("dinsu", 0x2000ffffffffeeee, 0xfffffff31415927f, 40, 4); + TESTINST("dinsu", 0x31415927ffffffff, 0x2000ffffffffffff, 51, 2); + TESTINST("dinsu", 0x2000ffffffffaaaa, 0x2000ffffffff2222, 48, 4); + TESTINST("dinsu", 0x2000ffffffbbbbff, 0x7fffffffddddffff, 38, 4); + TESTINST("dinsu", 0xeeeeff33ff22ffff, 0x2000ffffffffffff, 35, 4); + TESTINST("dinsu", 0x2000ffffffffffff, 0x2000ffffffffbbbb, 36, 4); + TESTINST("dinsu", 0x2000ffffffffbbbb, 0x2000ffffffffffff, 45, 1); + TESTINST("dinsu", 0x2000ffffffffffff, 0xeeeeff33ff22ffff, 46, 4); + TESTINST("dinsu", 0x7fffffffddddffff, 0x2000ffffffbbbbff, 52, 4); + TESTINST("dinsu", 0x2000ffffffff2222, 0x2000ffffffffaaaa, 40, 8); + TESTINST("dinsu", 0x2000ffffffffffff, 0x31415927ffffffff, 39, 4); + TESTINST("dinsu", 0xfffffff31415927f, 0x31415927ffffffff, 60, 4); + TESTINST("dinsu", 0xffffffffffff0008, 0x2000ffffffddddff, 63, 1); + TESTINST("dinsu", 0xffff0000ffffffff, 0x2000ffffffffffff, 50, 4); + TESTINST("dinsu", 0xff0000ffffffffff, 0, 36, 4); + TESTINST("dinsu", 0xfffffffff0000fff, 0, 46, 4); +#else + printf("This test is testing mips64r2 instructions.\n"); +#endif + + return 0; +} diff --git a/none/tests/mips64/fpu_arithmetic.c b/none/tests/mips64/fpu_arithmetic.c new file mode 100644 index 0000000000..6b842102aa --- /dev/null +++ b/none/tests/mips64/fpu_arithmetic.c @@ -0,0 +1,160 @@ +#include +#include "rounding_mode.h" +#include "macro_fpu.h" + +int arithmeticOperations(flt_art_op_t op) +{ + double fd_d = 0; + float fd_f = 0; + int i = 0; + round_mode_t rm; + for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) { + set_rounding_mode(rm); + printf("roundig mode: %s\n", round_mode_name[rm]); + for (i = 0; i < MAX_ARR; i++) { + switch(op) { + case ABSS: + UNOPff("abs.s"); + printf("%s %.6g %f\n", flt_art_op_names[op], fd_f, fs_f[i]); + break; + case ABSD: + UNOPdd("abs.d"); + printf("%s %.13g %lf\n", flt_art_op_names[op], fd_d, fs_d[i]); + break; + case ADDS: + BINOPf("add.s"); + printf("%s %.6g %f %f\n", + flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]); + break; + case ADDD: + BINOPd("add.d"); + printf("%s %.13g %lf %lf\n", + flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]); + break; + case DIVS: + BINOPf("div.s"); + printf("%s %.6g %f %f\n", + flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]); + break; + case DIVD: + BINOPd("div.d"); + printf("%s %.13g %lf %lf\n", + flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]); + break; + case MULS: + BINOPf("mul.s"); + printf("%s %.6g %f %f\n", + flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]); + break; + case MULD: + BINOPd("mul.d"); + printf("%s %.13g %lf %lf\n", + flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]); + break; + case NEGS: + UNOPff("neg.s"); + printf("%s %.6g %f\n", flt_art_op_names[op], fd_f, fs_f[i]); + break; + case NEGD: + UNOPdd("neg.d"); + printf("%s %.13g %lf\n", flt_art_op_names[op], fd_d, fs_d[i]); + break; + case SQRTS: + UNOPff("sqrt.s"); + printf("%s %.6g %f\n", flt_art_op_names[op], fd_f, fs_f[i]); + break; + case SQRTD: + UNOPdd("sqrt.d"); + printf("%s %.13g %lf\n", flt_art_op_names[op], fd_d, fs_d[i]); + break; + case SUBS: + BINOPf("sub.s"); + printf("%s %.6g %f %f\n", + flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]); + break; + case SUBD: + BINOPd("sub.d"); + printf("%s %.13g %lf %lf\n", + flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]); + break; + case RECIPS: + UNOPff("recip.s"); + printf("%s %.6g %f\n", flt_art_op_names[op], fd_f, fs_f[i]); + break; + case RECIPD: + UNOPdd("recip.d"); + printf("%s %.13g %lf\n", flt_art_op_names[op], fd_d, fs_d[i]); + break; + case RSQRTS: + if (fs_f[i] >= 0) { + UNOPff("rsqrt.s"); + printf("%s %.6g %f\n", flt_art_op_names[op], fd_f, fs_f[i]); + } + break; + case RSQRTD: + if (fs_d[i] >= 0) { + UNOPdd("rsqrt.d"); + printf("%s %.13g %lf\n", flt_art_op_names[op], fd_d, fs_d[i]); + } + break; + case MSUBS: + TRIOPf("msub.s"); + printf("%s %.6g %f %f %f\n", + flt_art_op_names[op], fd_f, fr_f[i], fs_f[i], ft_f[i]); + break; + case MSUBD: + TRIOPd("msub.d"); + printf("%s %.13g %lf %lf %lf\n", + flt_art_op_names[op], fd_d, fr_d[i], fs_d[i], ft_d[i]); + break; + case MADDS: + TRIOPf("madd.s"); + printf("%s %.6g %f %f %f\n", + flt_art_op_names[op], fd_f, fr_f[i], fs_f[i], ft_f[i]); + break; + case MADDD: + TRIOPd("madd.d"); + printf("%s %.13g %lf %lf %lf\n", + flt_art_op_names[op], fd_d, fr_d[i], fs_d[i], ft_d[i]); + break; + case NMADDS: + TRIOPf("nmadd.s"); + printf("%s %.6g %f %f %f\n", + flt_art_op_names[op], fd_f, fr_f[i], fs_f[i], ft_f[i]); + break; + case NMADDD: + TRIOPd("nmadd.d"); + printf("%s %.13g %lf %lf %lf\n", + flt_art_op_names[op], fd_d, fr_d[i], fs_d[i], ft_d[i]); + break; + case NMSUBS: + TRIOPf("nmsub.s"); + printf("%s %.6g %f %f %f\n", + flt_art_op_names[op], fd_f, fr_f[i], fs_f[i], ft_f[i]); + break; + case NMSUBD: + TRIOPd("nmsub.d"); + printf("%s %.13g %lf %lf %lf\n", + flt_art_op_names[op], fd_d, fr_d[i], fs_d[i], ft_d[i]); + break; + default: + printf("error\n"); + break; + } + } + } + return 0; +} + +int main() +{ + flt_art_op_t op; + + printf("-------------------------- %s --------------------------\n", + "test FPU Arithmetic Operations"); + for (op = ABSS; op <= NMSUBD; op++) { + arithmeticOperations(op); + } + + return 0; +} diff --git a/none/tests/mips64/fpu_branches.c b/none/tests/mips64/fpu_branches.c new file mode 100644 index 0000000000..5642735a3c --- /dev/null +++ b/none/tests/mips64/fpu_branches.c @@ -0,0 +1,149 @@ +#include +#include "macro_fpu.h" + +int main() +{ + int i = 0; + + printf("--- BC1F --- if fs == ft then " \ + "out = ft else out = fs + ft\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST1s("bc1f", i); + TESTINST1d("bc1f", i); + } + + printf("--- BC1T --- if fs != ft then " \ + "out = fs + ft else out = ft\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST1s("bc1t", i); + TESTINST1d("bc1t", i); + } + + printf("--- BC1FL --- if fs == ft then " \ + "out = ft else out = fs + ft\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST2s("bc1fl", i); + TESTINST2d("bc1fl", i); + } + + printf("--- BC1TL --- if fs != ft then " \ + "out = ft else out = fs + ft\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST2s("bc1tl", i); + TESTINST2d("bc1tl", i); + } + + printf("--- C.F.S/D --- if false then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.f.s", i); + TESTINST_CONDd("c.f.d", i); + } + + printf("--- C.UN.S/D --- if unordered(fs, ft) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.un.s", i); + TESTINST_CONDd("c.un.d", i); + } + + printf("--- C.EQ.S/D --- if fs == ft then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.eq.s", i); + TESTINST_CONDd("c.eq.d", i); + } + + printf("--- C.UEQ.S/D --- if (unordered(fs, ft) or (fs == ft)) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.ueq.s", i); + TESTINST_CONDd("c.ueq.d", i); + } + + printf("--- C.OLT.S/D --- if (ordered(fs, ft) or (fs < ft)) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.olt.s", i); + TESTINST_CONDd("c.olt.d", i); + } + + printf("--- C.ULT.S/D --- if (unordered(fs, ft) or (fs < ft)) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.ult.s", i); + TESTINST_CONDd("c.ult.d", i); + } + + printf("--- C.OLE.S/D --- if (ordered(fs, ft) or (fs <= ft)) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.ole.s", i); + TESTINST_CONDd("c.ole.d", i); + } + + printf("--- C.ULE.S/D --- if (unordered(fs, ft) or (fs <= ft)) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.ule.s", i); + TESTINST_CONDd("c.ule.d", i); + } + + printf("--- C.SF.S/D --- if signaling false then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.sf.s", i); + TESTINST_CONDd("c.sf.d", i); + } + + printf("--- C.NGLE.S/D --- if not ((fs > ft) or (fs <= ft)) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.ngle.s", i); + TESTINST_CONDd("c.ngle.d", i); + } + + printf("--- C.SEQ.S/D --- if signaling equal then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.seq.s", i); + TESTINST_CONDd("c.seq.d", i); + } + + printf("--- C.NGL.S/D --- if not ((fs > ft) or (fs < ft)) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.ngl.s", i); + TESTINST_CONDd("c.ngl.d", i); + } + + printf("--- C.LT.S/D --- if fs < ft then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.lt.s", i); + TESTINST_CONDd("c.lt.d", i); + } + + printf("--- C.NGE.S/D --- if not (fs >= ft) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.nge.s", i); + TESTINST_CONDd("c.nge.d", i); + } + + printf("--- C.LE.S/D --- if fs <= ft then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.le.s", i); + TESTINST_CONDd("c.le.d", i); + } + + printf("--- C.NGT.S/D --- if not (fs > ft) then " \ + "out = fs + ft else out = fs\n"); + for (i = 0; i < MAX_ARR; i++) { + TESTINST_CONDs("c.ngt.s", i); + TESTINST_CONDd("c.ngt.d", i); + } + return 0; +} + diff --git a/none/tests/mips64/fpu_control_word.c b/none/tests/mips64/fpu_control_word.c new file mode 100644 index 0000000000..4a46621ca1 --- /dev/null +++ b/none/tests/mips64/fpu_control_word.c @@ -0,0 +1,27 @@ +#include + +#define TESTINST_CFC1_CTC1(N) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + "move $t0, %1" "\n\t" \ + "ctc1 $t0, $31" "\n\t" \ + "cfc1 $t1, $31" "\n\t" \ + "move %0, $t1" "\n\t" \ + : "=r" (out) \ + : "r" (N) \ + : "t0", "t1" \ + ); \ + printf("out=%d, in=%d\n", out, N); \ +} + +int main() +{ + int i; + printf("--- CTC1, CFC1 ---\n"); + for (i = 0; i < 1024; i++) { + TESTINST_CFC1_CTC1(i); + } + + return 0; +} diff --git a/none/tests/mips64/fpu_load_store.c b/none/tests/mips64/fpu_load_store.c new file mode 100644 index 0000000000..c056c4fc8e --- /dev/null +++ b/none/tests/mips64/fpu_load_store.c @@ -0,0 +1,69 @@ +#include +#include "macro_load_store.h" + +int main() +{ + int i; + int s1 = sizeof(int); + int s2 = sizeof(unsigned long long); + init_reg_val2(); + /**********************************************************************/ + /*-------------------------------LOAD---------------------------------*/ + /**********************************************************************/ + printf("--- LDC1 ---\n"); + for (i = 0; i < N*s1; i = i+8) + TEST3("ldc1", i, reg_val1); + + for (i = 0; i < N*s2; i = i+8) + TEST3("ldc1", i, reg_val2); + + printf("--- LDXC1 ---\n"); + for (i = 0; i < N*s1; i = i+8) + TEST5("ldxc1", i, reg_val1); + + for (i = 0; i < N*s2; i = i+8) + TEST5("ldxc1", i, reg_val2); + + printf("--- LWC1 ---\n"); + for (i = 0; i < N*s1; i = i+4) + TEST3w("lwc1", i, reg_val1); + + for (i = 0; i < N*s2; i = i+4) + TEST3w("lwc1", i, reg_val2); + + printf("--- LWXC1 ---\n"); + for (i = 0; i < N*s1; i = i+4) + TEST5w("lwxc1", i, reg_val1); + + for (i = 0; i < N*s2; i = i+4) + TEST5w("lwxc1", i, reg_val2); + + /**********************************************************************/ + /*-------------------------------STORE--------------------------------*/ + /**********************************************************************/ + init_reg_val_zero(); + printf("--- SDC1 ---\n"); + for (i = 0; i < N*s1; i = i+8) { + TEST4("sdc1", i); + } + + init_reg_val_zero(); + printf("--- SWC1 ---\n"); + for (i = 0; i < N*s1; i = i+4) { + TEST4("swc1", i); + } + + init_reg_val_zero(); + printf("--- SDXC1 ---\n"); + for (i = 0; i < N*s1; i = i+8) { + TEST6("sdxc1", i); + } + + init_reg_val_zero(); + printf("--- SWXC1 ---\n"); + for (i = 0; i < N*s1; i = i+4) { + TEST6("swxc1", i); + } + + return 0; +} diff --git a/none/tests/mips64/load_store.c b/none/tests/mips64/load_store.c new file mode 100644 index 0000000000..95651c9d1c --- /dev/null +++ b/none/tests/mips64/load_store.c @@ -0,0 +1,134 @@ +#include +#include "macro_load_store.h" + +int main() +{ + int i; + int s1 = sizeof(int); + int s2 = sizeof(unsigned long long); + init_reg_val2(); + /**********************************************************************/ + /*-------------------------------LOAD---------------------------------*/ + /**********************************************************************/ + /* lb */ + for (i = 0; i < N*s1; i++) + TEST1("lb", i, reg_val1); + + for (i = 0; i < N*s2; i++) + TEST1("lb", i, reg_val2); + + /* lbu */ + for (i = 0; i < N*s1; i++) + TEST1("lbu", i, reg_val1); + + for (i = 0; i < N*s2; i++) + TEST1("lbu", i, reg_val2); + + /* ld */ + for (i = 0; i < N*s1; i = i+8) + TEST1("ld", i, reg_val1); + + for (i = 0; i < N*s2; i = i+8) + TEST1("ld", i, reg_val2); + + /* ldl */ + for (i = 0; i < N*s1; i++) + TEST1("ldl", i, reg_val1); + + for (i = 0; i < N*s2; i++) + TEST1("ldl", i, reg_val2); + + /* ldr */ + for (i = 0; i < N*s1; i++) + TEST1("ldr", i, reg_val1); + + for (i = 0; i < N*s2; i++) + TEST1("ldr", i, reg_val2); + + /* lh */ + for (i = 0; i < N*s1; i = i+2) + TEST1("lh", i, reg_val1); + + for (i = 0; i < N*s2; i = i+2) + TEST1("lh", i, reg_val2); + + /* lhu */ + for (i = 0; i < N*s1; i = i+2) + TEST1("lhu", i, reg_val1); + + for (i = 0; i < N*s2; i = i+2) + TEST1("lhu", i, reg_val2); + + /* lw */ + for (i = 0; i < N*s1; i = i+4) + TEST1("lw", i, reg_val1); + + for (i = 0; i < N*s2; i = i+4) + TEST1("lw", i, reg_val2); + + /* lwl */ + for (i = 0; i < N*s1; i++) + TEST1("lwl", i, reg_val1); + + for (i = 0; i < N*s2; i++) + TEST1("lwl", i, reg_val2); + + /* lwr */ + for (i = 0; i < N*s1; i++) + TEST1("lwr", i, reg_val1); + + for (i = 0; i < N*s2; i++) + TEST1("lwr", i, reg_val2); + + /* lwu */ + for (i = 0; i < N*s1; i = i+4) + TEST1("lwu", i, reg_val1); + + for (i = 0; i < N*s2; i = i+4) + TEST1("lwu", i, reg_val2); + + /**********************************************************************/ + /*-------------------------------STORE--------------------------------*/ + /**********************************************************************/ + init_reg_val_zero(); + /* sb */ + for (i = 0; i < (N-1)*s2; i++) + TEST2("sb", i); + + init_reg_val_zero(); + /* sd */ + for (i = 0; i < (N-1)*s2; i = i+8) + TEST2("sd", i); + + init_reg_val_zero(); + /* sdl */ + for (i = 0; i < (N-1)*s2; i++) + TEST2("sdl", i); + + init_reg_val_zero(); + /* sdr */ + for (i = 8; i < (N-1)*s2; i++) + TEST2("sdr", i); + + init_reg_val_zero(); + /* sh */ + for (i = 0; i < (N-1)*s2; i = i+2) + TEST2("sh", i); + + init_reg_val_zero(); + /* sw */ + for (i = 0; i < (N-1)*s2; i = i+4) + TEST2("sw", i); + + init_reg_val_zero(); + /* swl */ + for (i = 4; i < (N-1)*s2; i++) + TEST2("swl", i); + + init_reg_val_zero(); + /* swr */ + for (i = 4; i < (N-1)*s2; i++) + TEST2("swr", i); + + return 0; +} diff --git a/none/tests/mips64/load_store_multiple.c b/none/tests/mips64/load_store_multiple.c new file mode 100644 index 0000000000..b2186dbfbc --- /dev/null +++ b/none/tests/mips64/load_store_multiple.c @@ -0,0 +1,350 @@ +#include + +unsigned int mem[] = { + 0x121f1e1f, 0, 3, -1, + 0x232f2e2f, 0x242c2b2b, 0x252a2e2b, 0x262d2d2a, + 0x3f343f3e, 0x3e353d3c, 0x363a3c3b, 0x3b373b3a, + 0x454f4e45, 0x4e464d46, 0x474d474c, 0x4a484a4c +}; + +unsigned int mem1[] = { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0xffffffff, 0, 0, 0, + 0, 0, 0, 0 +}; + +unsigned int mem2[] = { + 0x0000e680, 0x00010700, 0x0000e7dc, 0x0000b0d0, + 0x2ab05fd0, 0x0000b6a0, 0x0000be80, 0x0000de10, + 0x0000df20, 0x2ab05fe0, 0x0000dfd0, 0x00010300 +}; + +#define TESTINST1(instruction, RTval, offset, RT, RS) \ +{ \ + unsigned int out; \ + __asm__ __volatile__( \ + "move $"#RS", %1" "\n\t" \ + "li $"#RT", "#RTval "\n\t" \ + instruction "\n\t" \ + "lw %0, "#offset"($"#RS")" "\n\t" \ + : "=&r" (out) \ + : "r" (mem1), "r" (RTval) \ + : #RT, #RS \ + ); \ + printf("%s :: RTval: 0x%x, out: 0x%x\n", \ + instruction, RTval, out); \ + out = 0; \ + __asm__ __volatile__( \ + "move $"#RS", %1" "\n\t" \ + "li $"#RT", " #RTval "\n\t" \ + instruction "\n\t" \ + "lw %0, "#offset"($"#RS")" "\n\t" \ + : "=&r" (out) \ + : "r" (mem), "r" (RTval) \ + : #RT, #RS \ + ); \ + printf("%s :: RTval: 0x%x, out: 0x%x\n", \ + instruction, RTval, out); \ +} + +/* swl $t0, 3($t1) + swr $t0, 0($t1) */ +#define TESTINSTsw(RTval, offset, RT, RS) \ +{ \ + unsigned int out; \ + __asm__ __volatile__( \ + "move $"#RS", %1" "\n\t" \ + "daddiu $"#RS", $"#RS", "#offset "\n\t" \ + "li $"#RT", "#RTval "\n\t" \ + "swl $t0, 3($t1)" "\n\t" \ + "swr $t0, 0($t1)" "\n\t" \ + "lw %0, 0($"#RS")" "\n\t" \ + : "=&r" (out) \ + : "r" (mem2), "r" (RTval) \ + : #RT, #RS \ + ); \ + printf("swl $t0, 3($t1)\nswr $t0, 0($t1)\n :: RTval: 0x%x, out: 0x%x\n", \ + RTval, out); \ +} + +void ppMem(unsigned int* m, int len) +{ + int i; + printf("MEM1:\n"); + for (i = 0; i < len; i += 4) { + printf("0x%x, 0x%x, 0x%x, 0x%x\n", m[i], m[i+1], m[i+2], m[i+3]); + m[i] = 0; + m[i+1] = 0; + m[i+2] = 0; + m[i+3] = 0; + if (i == 2) { + m[i] = 0xffffffff; + m[i+1] = 0; + m[i+2] = 0; + m[i+3] = 0; + } + } +} + +void ppMem1(unsigned int* m, int len) +{ + int i; + printf("MEM:\n"); + for (i = 0; i < len; i += 4) { + printf("0x%x, 0x%x, 0x%x, 0x%x\n", m[i], m[i+1], m[i+2], m[i+3]); + } + m[0] = 0x121f1e1f; + m[1] = 0; + m[2] = 3; + m[3] = -1; + m[4] = 0x232f2e2f; + m[5] = 0x242c2b2b; + m[6] = 0x252a2e2b; + m[7] = 0x262d2d2a; + m[8] = 0x3f343f3e; + m[9] = 0x3e353d3c; + m[10] = 0x363a3c3b; + m[11] = 0x3b373b3a; + m[12] = 0x454f4e45; + m[13] = 0x4e464d46; + m[14] = 0x474d474c; + m[15] = 0x4a484a4c; +} + +void ppMem2(unsigned int* m, int len) +{ + int i; + printf("MEM:\n"); + for (i = 0; i < len; i=i+4) { + printf("0x%x, 0x%x, 0x%x, 0x%x\n", m[i], m[i+1], m[i+2], m[i+3]); + } + + m[0] = 0x0000e680; + m[1] = 0x00010700; + m[2] = 0x0000e7dc; + m[3] = 0x0000b0d0; + m[4] = 0x2ab05fd0; + m[5] = 0x0000b6a0; + m[6] = 0x0000be80; + m[7] = 0x0000de10; + m[8] = 0x0000df20; + m[9] = 0x2ab05fe0; + m[10] = 0x0000dfd0; + m[11] = 0x00010300; +} + +int main() +{ + printf("sb\n"); + TESTINST1("sb $t0, 3($t1)", 0, 3, t0, t1); + TESTINST1("sb $t0, 5($t1)", 0x31415927, 5, t0, t1); + TESTINST1("sb $t0, 7($t1)", 0x7fffffff, 7, t0, t1); + TESTINST1("sb $t0, 1($t1)", 0x80000000, 1, t0, t1); + TESTINST1("sb $t0, 2($t1)", 0x80000000, 2, t0, t1); + TESTINST1("sb $t0, 6($t1)", 0x7fffffff, 6, t0, t1); + TESTINST1("sb $t0, 11($t1)", 0x7fffffff, 11, t0, t1); + TESTINST1("sb $t0, 8($t1)", -1, 8, t0, t1); + TESTINST1("sb $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("sb $t0, 0($t1)", 0x0dd00000, 0, t0, t1); + TESTINST1("sb $t0, 0($t1)", 655, 0, t0, t1); + TESTINST1("sb $t0, 0($t1)", -655, 0, t0, t1); + TESTINST1("sb $t0, 0($t1)", 15, 0, t0, t1); + TESTINST1("sb $t0, 0($t1)", 1, 0, t0, t1); + TESTINST1("sb $t0, 0($t1)", 53, 0, t0, t1); + TESTINST1("sb $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("sb $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("sb $t0, 31($t1)", 0xffffffff, 31, t0, t1); + TESTINST1("sb $t0, 35($t1)", 0xffffffff, 35, t0, t1); + TESTINST1("sb $t0, 41($t1)", 0x31415927, 41, t0, t1); + TESTINST1("sb $t0, 42($t1)", 0x7fffffff, 42, t0, t1); + TESTINST1("sb $t0, 45($t1)", 0x80000000, 45, t0, t1); + TESTINST1("sb $t0, 51($t1)", 655, 51, t0, t1); + ppMem(mem1, 16); + ppMem1(mem, 16); + + printf("sh\n"); + TESTINST1("sh $t0, 1($t1)", 0, 1, t0, t1); + TESTINST1("sh $t0, 3($t1)", 0x31415927, 3, t0, t1); + TESTINST1("sh $t0, 5($t1)", 0x7fffffff, 5, t0, t1); + TESTINST1("sh $t0, 7($t1)", 0x80000000, 7, t0, t1); + TESTINST1("sh $t0, 9($t1)", 0x80000000, 9, t0, t1); + TESTINST1("sh $t0, 6($t1)", 0x7fffffff, 6, t0, t1); + TESTINST1("sh $t0, 11($t1)", 0x7fffffff, 11, t0, t1); + TESTINST1("sh $t0, 8($t1)", -1, 8, t0, t1); + TESTINST1("sh $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("sh $t0, 0($t1)", 0x0dd00000, 0, t0, t1); + TESTINST1("sh $t0, 0($t1)", 655, 0, t0, t1); + TESTINST1("sh $t0, 0($t1)", -655, 0, t0, t1); + TESTINST1("sh $t0, 0($t1)", 15, 0, t0, t1); + TESTINST1("sh $t0, 0($t1)", 1, 0, t0, t1); + TESTINST1("sh $t0, 0($t1)", 53, 0, t0, t1); + TESTINST1("sh $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("sh $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("sh $t0, 31($t1)", 0xffffffff, 31, t0, t1); + TESTINST1("sh $t0, 35($t1)", 0xffffffff, 35, t0, t1); + TESTINST1("sh $t0, 41($t1)", 0x31415927, 41, t0, t1); + TESTINST1("sh $t0, 47($t1)", 0x7fffffff, 47, t0, t1); + TESTINST1("sh $t0, 49($t1)", 0x80000000, 49, t0, t1); + TESTINST1("sh $t0, 51($t1)", 655, 51, t0, t1); + ppMem(mem1, 16); + ppMem1(mem, 16); + + printf("sw\n"); + TESTINST1("sw $t0, 1($t1)", 0, 1, t0, t1); + TESTINST1("sw $t0, 3($t1)", 0x31415927, 3, t0, t1); + TESTINST1("sw $t0, 5($t1)", 0x7fffffff, 5, t0, t1); + TESTINST1("sw $t0, 7($t1)", 0x80000000, 7, t0, t1); + TESTINST1("sw $t0, 9($t1)", 0x80000000, 9, t0, t1); + TESTINST1("sw $t0, 6($t1)", 0x7fffffff, 6, t0, t1); + TESTINST1("sw $t0, 15($t1)", 0x7fffffff, 11, t0, t1); + TESTINST1("sw $t0, 8($t1)", -1, 8, t0, t1); + TESTINST1("sw $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("sw $t0, 0($t1)", 0x0dd00000, 0, t0, t1); + TESTINST1("sw $t0, 0($t1)", 655, 0, t0, t1); + TESTINST1("sw $t0, 0($t1)", -655, 0, t0, t1); + TESTINST1("sw $t0, 0($t1)", 15, 0, t0, t1); + TESTINST1("sw $t0, 0($t1)", 1, 0, t0, t1); + TESTINST1("sw $t0, 0($t1)", 53, 0, t0, t1); + TESTINST1("sw $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("sw $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("sw $t0, 31($t1)", 0xffffffff, 31, t0, t1); + TESTINST1("sw $t0, 37($t1)", 0xffffffff, 37, t0, t1); + TESTINST1("sw $t0, 49($t1)", 0x31415927, 49, t0, t1); + TESTINST1("sw $t0, 41($t1)", 0x7fffffff, 41, t0, t1); + TESTINST1("sw $t0, 43($t1)", 0x80000000, 43, t0, t1); + TESTINST1("sw $t0, 51($t1)", 655, 51, t0, t1); + ppMem(mem1, 16); + ppMem1(mem, 16); + + printf("swl\n"); + TESTINST1("swl $t0, 1($t1)", 0, 1, t0, t1); + TESTINST1("swl $t0, 3($t1)", 0x31415927, 3, t0, t1); + TESTINST1("swl $t0, 5($t1)", 0x7fffffff, 5, t0, t1); + TESTINST1("swl $t0, 7($t1)", 0x80000000, 7, t0, t1); + TESTINST1("swl $t0, 9($t1)", 0x80000000, 9, t0, t1); + TESTINST1("swl $t0, 6($t1)", 0x7fffffff, 6, t0, t1); + TESTINST1("swl $t0, 11($t1)", 0x7fffffff, 11, t0, t1); + TESTINST1("swl $t0, 8($t1)", -1, 8, t0, t1); + TESTINST1("swl $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("swl $t0, 0($t1)", 0x0dd00000, 0, t0, t1); + TESTINST1("swl $t0, 0($t1)", 655, 0, t0, t1); + TESTINST1("swl $t0, 0($t1)", -655, 0, t0, t1); + TESTINST1("swl $t0, 0($t1)", 15, 0, t0, t1); + TESTINST1("swl $t0, 0($t1)", 1, 0, t0, t1); + TESTINST1("swl $t0, 0($t1)", 53, 0, t0, t1); + TESTINST1("swl $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("swl $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("swl $t0, 33($t1)", 0xffffffff, 33, t0, t1); + TESTINST1("swl $t0, 35($t1)", 0xffffffff, 35, t0, t1); + TESTINST1("swl $t0, 41($t1)", 0x31415927, 41, t0, t1); + TESTINST1("swl $t0, 45($t1)", 0x7fffffff, 45, t0, t1); + TESTINST1("swl $t0, 49($t1)", 0x80000000, 49, t0, t1); + TESTINST1("swl $t0, 51($t1)", 655, 51, t0, t1); + ppMem(mem1, 16); + ppMem1(mem, 16); + + printf("swr\n"); + TESTINST1("swr $t0, 1($t1)", 0, 1, t0, t1); + TESTINST1("swr $t0, 3($t1)", 0x31415927, 3, t0, t1); + TESTINST1("swr $t0, 5($t1)", 0x7fffffff, 5, t0, t1); + TESTINST1("swr $t0, 7($t1)", 0x80000000, 7, t0, t1); + TESTINST1("swr $t0, 9($t1)", 0x80000000, 9, t0, t1); + TESTINST1("swr $t0, 6($t1)", 0x7fffffff, 6, t0, t1); + TESTINST1("swr $t0, 11($t1)", 0x7fffffff, 11, t0, t1); + TESTINST1("swr $t0, 8($t1)", -1, 8, t0, t1); + TESTINST1("swr $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("swr $t0, 0($t1)", 0x0dd00000, 0, t0, t1); + TESTINST1("swr $t0, 0($t1)", 655, 0, t0, t1); + TESTINST1("swr $t0, 0($t1)", -655, 0, t0, t1); + TESTINST1("swr $t0, 0($t1)", 15, 0, t0, t1); + TESTINST1("swr $t0, 0($t1)", 1, 0, t0, t1); + TESTINST1("swr $t0, 0($t1)", 53, 0, t0, t1); + TESTINST1("swr $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("swr $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("swr $t0, 31($t1)", 0xffffffff, 31, t0, t1); + TESTINST1("swr $t0, 33($t1)", 0xffffffff, 33, t0, t1); + TESTINST1("swr $t0, 45($t1)", 0x31415927, 45, t0, t1); + TESTINST1("swr $t0, 47($t1)", 0x7fffffff, 47, t0, t1); + TESTINST1("swr $t0, 49($t1)", 0x80000000, 49, t0, t1); + TESTINST1("swr $t0, 51($t1)", 655, 51, t0, t1); + ppMem(mem1, 16); + ppMem1(mem, 16); + + printf("ulw\n"); + TESTINST1("ulw $t0, 0($t1)", 0, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 0x7fffffff, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 0x80000000, 0, t0, t1); + TESTINST1("ulw $t0, 2($t1)", 0x80000000, 2, t0, t1); + TESTINST1("ulw $t0, 6($t1)", 0x7fffffff, 6, t0, t1); + TESTINST1("ulw $t0, 10($t1)", 0x7fffffff, 10, t0, t1); + TESTINST1("ulw $t0, 8($t1)", -1, 8, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 0x0dd00000, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 655, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", -655, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 15, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 1, 0, t0, t1); + TESTINST1("ulw $t0, 0($t1)", 53, 0, t0, t1); + TESTINST1("ulw $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("ulw $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("ulw $t0, 32($t1)", 0xffffffff, 32, t0, t1); + TESTINST1("ulw $t0, 36($t1)", 0xffffffff, 36, t0, t1); + TESTINST1("ulw $t0, 40($t1)", 0x31415927, 40, t0, t1); + TESTINST1("ulw $t0, 44($t1)", 0x7fffffff, 44, t0, t1); + TESTINST1("ulw $t0, 48($t1)", 0x80000000, 48, t0, t1); + TESTINST1("ulw $t0, 52($t1)", 655, 52, t0, t1); + ppMem(mem1, 16); + ppMem1(mem, 16); + + printf("usw\n"); + TESTINST1("usw $t0, 0($t1)", 0, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", 0x7fffffff, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", 0x80000000, 0, t0, t1); + TESTINST1("usw $t0, 2($t1)", 0x80000000, 2, t0, t1); + TESTINST1("usw $t0, 6($t1)", 0x7fffffff, 6, t0, t1); + TESTINST1("usw $t0, 10($t1)", 0x7fffffff, 10, t0, t1); + TESTINST1("usw $t0, 8($t1)", -1, 8, t0, t1); + TESTINST1("usw $t0, 0($t1)", 0x31415927, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", 0x0dd00000, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", 655, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", -655, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", 15, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", 1, 0, t0, t1); + TESTINST1("usw $t0, 0($t1)", 53, 0, t0, t1); + TESTINST1("usw $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("usw $t0, 2($t1)", 0xffffffff, 2, t0, t1); + TESTINST1("usw $t0, 32($t1)", 0xffffffff, 32, t0, t1); + TESTINST1("usw $t0, 36($t1)", 0xffffffff, 36, t0, t1); + TESTINST1("usw $t0, 40($t1)", 0x31415927, 40, t0, t1); + TESTINST1("usw $t0, 44($t1)", 0x7fffffff, 44, t0, t1); + TESTINST1("usw $t0, 48($t1)", 0x80000000, 48, t0, t1); + TESTINST1("usw $t0, 52($t1)", 655, 52, t0, t1); + ppMem(mem1, 16); + ppMem1(mem, 16); + + printf("swl $t0, 3($t0)\nswr $t0, 0($t0)\n"); + TESTINSTsw(0x4853000, 0, t0, t1); + ppMem2(mem2, 12); + TESTINSTsw(0x4853000, 4, t0, t1); + ppMem2(mem2, 12); + TESTINSTsw(0x4863700, 8, t0, t1); + ppMem2(mem2, 12); + TESTINSTsw(0x48aedd0, 12, t0, t1); + ppMem2(mem2, 12); + TESTINSTsw(0x2aaee700, 16, t0, t1); + ppMem2(mem2, 12); + TESTINSTsw(0x2aaee7ff, 20, t0, t1); + ppMem2(mem2, 12); + TESTINSTsw(0x2aaeffff, 24, t0, t1); + ppMem2(mem2, 12); + TESTINSTsw(0x4863700, 28, t0, t1); + ppMem2(mem2, 12); + TESTINSTsw(0x2aaee700, 32, t0, t1); + ppMem2(mem2, 12); + + return 0; +} + diff --git a/none/tests/mips64/load_store_unaligned.c b/none/tests/mips64/load_store_unaligned.c new file mode 100644 index 0000000000..59e3d3d68d --- /dev/null +++ b/none/tests/mips64/load_store_unaligned.c @@ -0,0 +1,46 @@ +#include + +#define N 16 +#define SOLL 8 /* size of unsigned long long */ + +unsigned long long memSrc[] = { + 0x12345658121f1e1f, 0, + 3, -1, + 0x232f2e2f56568441, 0x242c2b2b1236548c, + 0xffffffff252a2e2b, 0x262d2d2a4521dddd, + 0x3f343f3e22222222, 0x3e353d3c41231548, + 0x363a3c3b45421212, 0x3b373b3a4545afcb, + 0x454f4e4556984525, 0xfffffffffffffffc, + 0x474d474c55aaaaaa, 0x4a484a4c65665659 +}; + +unsigned long long memDst[] = { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, +}; + +int main() +{ + int i, index; + unsigned long long outLoad; + for (i = 0; i < N * SOLL; i++) { + outLoad = 0; + __asm__ __volatile__( + "move $t0, %1" "\n\t" + "move $t1, %2" "\n\t" + "luxc1 $f0, $t1($t0)" "\n\t" + "dmfc1 %0, $f0" "\n\t" + "move $t0, %3" "\n\t" + "suxc1 $f0, $t1($t0)" "\n\t" + : "=r" (outLoad) + : "r" (memSrc), "r" (i), "r" (memDst) + : "t0", "t1", "$f0" + ); + index = (i / SOLL) % N; + printf("i: %d, memSrc[%d]: 0x%llx, memDst[%d]: 0x%llx, outLoad: 0x%llx\n", + i, index, memSrc[index], index, memDst[index], outLoad); + } + return 0; +} diff --git a/none/tests/mips64/logical_instructions.c b/none/tests/mips64/logical_instructions.c new file mode 100644 index 0000000000..4b798fee92 --- /dev/null +++ b/none/tests/mips64/logical_instructions.c @@ -0,0 +1,103 @@ +#include +#include "const.h" +#include "macro_int.h" + +typedef enum { + AND=0, ANDI, LUI, NOR, + OR, ORI, XOR, XORI +} logical_op; + +int main() +{ + logical_op op; + int i; + init_reg_val2(); + for (op = AND; op <= XORI; op++) { + for (i = 0; i < N; i++) { + switch (op) { + case AND: + /* No Integer Overflow exception occurs under any + circumstances. */ + TEST1("and $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("and $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case ANDI: + /* No Integer Overflow exception occurs under any + circumstances. */ + TEST2("andi $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("andi $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("andi $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("andi $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + TEST2("andi $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); + TEST2("andi $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); + TEST2("andi $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); + TEST2("andi $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1); + break; + + case LUI: + /* No Integer Overflow exception occurs under any + circumstances. */ + if (i == 0) { + TEST6("lui $t0, 0xffff", 0xffff, t0); + TEST6("lui $a0, 0x0", 0x0, a0); + TEST6("lui $t9, 0xff", 0xff, t9); + TEST6("lui $v0, 0xfff", 0xfff, v0); + TEST6("lui $s0, 0x2", 0x2, s0); + } + break; + + case NOR: + /* No arithmetic exception occurs under any circumstances. */ + TEST1("nor $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("nor $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case OR: + /* No arithmetic exception occurs under any circumstances. */ + TEST1("or $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("or $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case ORI: + /* No arithmetic exception occurs under any circumstances. */ + TEST2("ori $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("ori $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("ori $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("ori $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + TEST2("ori $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); + TEST2("ori $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); + TEST2("ori $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); + TEST2("ori $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1); + break; + + case XOR: + /* No arithmetic exception occurs under any circumstances. */ + TEST1("xor $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("xor $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case XORI: + /* No arithmetic exception occurs under any circumstances. */ + TEST2("xori $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); + TEST2("xori $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); + TEST2("xori $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); + TEST2("xori $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); + TEST2("xori $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); + TEST2("xori $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); + TEST2("xori $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); + TEST2("xori $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1); + break; + } + } + } + return 0; +} diff --git a/none/tests/mips64/macro_fpu.h b/none/tests/mips64/macro_fpu.h new file mode 100644 index 0000000000..2d1c48c1cc --- /dev/null +++ b/none/tests/mips64/macro_fpu.h @@ -0,0 +1,338 @@ +#include "const.h" + +typedef enum { + ABSS=0, ABSD, ADDS, ADDD, + DIVS, DIVD, MULS, MULD, + NEGS, NEGD, SQRTS, SQRTD, + SUBS, SUBD, RECIPS, RECIPD, + RSQRTS, RSQRTD, MSUBS, MSUBD, + MADDS, MADDD, NMADDS, NMADDD, + NMSUBS, NMSUBD +} flt_art_op_t; + +typedef enum { + CEILWS=0, CEILWD, FLOORWS, FLOORWD, + ROUNDWS, ROUNDWD, TRUNCWS, TRUNCWD, + CEILLS, CEILLD, FLOORLS, FLOORLD, + ROUNDLS, ROUNDLD, TRUNCLS, TRUNCLD +} flt_dir_op_t; + +typedef enum { + CVTDS, CVTDW, CVTSD, CVTSW, + CVTWS, CVTWD, CVTDL, CVTLS, + CVTLD, CVTSL, +} flt_round_op_t; + +const char *flt_art_op_names[] = { + "abs.s", "abs.d", "add.s", "add.d", + "div.s", "div.d", "mul.s", "mul.d", + "neg.s", "neg.d", "sqrt.s", "sqrt.d", + "sub.s", "sub.d", "recip.s", "recip.d", + "rsqrt.s", "rsqrt.d", "msub.s", "msub.d", + "madd.s", "madd.d", "nmadd.s", "nmadd.d", + "nmsub.s", "nmsub.d" +}; + +const char *flt_dir_op_names[] = { + "ceil.w.s", "ceil.w.d", + "floor.w.s", "floor.w.d", + "round.w.s", "round.w.d", + "trunc.w.s", "trunc.w.d", + "ceil.l.s", "ceil.l.d", + "floor.l.s", "floor.l.d", + "round.l.s", "round.l.d", + "trunc.l.s", "trunc.l.d" +}; + +const char *flt_round_op_names[] = { + "cvt.d.s", "cvt.d.w", + "cvt.s.d", "cvt.s.w", + "cvt.w.s", "cvt.w.d", + "cvt.d.l", "cvt.l.s", + "cvt.l.d", "cvt.s.l", +}; + +#define UNOPdd(op) \ + fd_d = 0; \ + __asm__ __volatile__( \ + op" %0, %1" "\n\t" \ + : "=f"(fd_d) \ + : "f"(fs_d[i]) \ + ); + +#define UNOPff(op) \ + fd_f = 0; \ + __asm__ __volatile__( \ + op" %0, %1" "\n\t" \ + : "=f"(fd_f) \ + : "f"(fs_f[i]) \ + ); + +#define UNOPfd(op) \ + fd_d = 0; \ + __asm__ __volatile__( \ + op" %0, %1" "\n\t" \ + : "=f"(fd_d) \ + : "f"(fs_f[i]) \ + ); + +#define UNOPdf(op) \ + fd_f = 0; \ + __asm__ __volatile__( \ + op" %0, %1" "\n\t" \ + : "=f"(fd_f) \ + : "f"(fs_d[i]) \ + ); + +#define UNOPfw(op) \ + fd_w = 0; \ + __asm__ __volatile__( \ + op" $f0, %1" "\n\t" \ + "mfc1 %0, $f0" "\n\t" \ + : "=r"(fd_w) \ + : "f"(fs_f[i]) \ + : "$f0" \ + ); + +#define UNOPdw(op) \ + fd_w = 0; \ + __asm__ __volatile__( \ + op" $f0, %1" "\n\t" \ + "mfc1 %0, $f0" "\n\t" \ + : "=r"(fd_w) \ + : "f"(fs_d[i]) \ + : "$f0" \ + ); + +#define UNOPwd(op) \ + fd_d = 0; \ + __asm__ __volatile__( \ + "mtc1 %1, $f0" "\n\t" \ + op" %0, $f0" "\n\t" \ + : "=f"(fd_d) \ + : "r"(fs_w[i]) \ + : "$f0" \ + ); + +#define UNOPwf(op) \ + fd_f = 0; \ + __asm__ __volatile__( \ + "mtc1 %1, $f0" "\n\t" \ + op" %0, $f0" "\n\t" \ + : "=f"(fd_f) \ + : "r"(fs_w[i]) \ + : "$f0" \ + ); + +#define UNOPld(op) \ + fd_d = 0; \ + __asm__ __volatile__( \ + "dmtc1 %1, $f0" "\n\t" \ + op" %0, $f0" "\n\t" \ + : "=f"(fd_d) \ + : "r"(fs_l[i]) \ + : "$f0" \ + ); + +#define UNOPdl(op) \ + fd_l = 0; \ + __asm__ __volatile__( \ + op" $f0, %1" "\n\t" \ + "dmfc1 %0, $f0" "\n\t" \ + : "=r"(fd_l) \ + : "f"(fs_d[i]) \ + : "$f0" \ + ); + +#define UNOPls(op) \ + fd_f = 0; \ + __asm__ __volatile__( \ + "dmtc1 %1, $f0" "\n\t" \ + op" %0, $f0" "\n\t" \ + : "=f"(fd_f) \ + : "r"(fs_l[i]) \ + : "$f0" \ + ); + +#define UNOPsl(op) \ + fd_l = 0; \ + __asm__ __volatile__( \ + op" $f0, %1" "\n\t" \ + "dmfc1 %0, $f0" "\n\t" \ + : "=r"(fd_l) \ + : "f"(fs_f[i]) \ + : "$f0" \ + ); + +#define BINOPf(op) \ + fd_f = 0; \ + __asm__ __volatile__( \ + op" %0, %1, %2" "\n\t" \ + : "=f" (fd_f) \ + : "f" (fs_f[i]), "f" (ft_f[i]) \ + ); + +#define BINOPd(op) \ + fd_d = 0; \ + __asm__ __volatile__( \ + op" %0, %1, %2" "\n\t" \ + : "=f"(fd_d) \ + : "f" (fs_d[i]), "f" (ft_d[i]) \ + ); + +#define TRIOPf(op) \ + fd_f = 0; \ + __asm__ __volatile__( \ + op" %0, %1, %2, %3" "\n\t" \ + : "=f" (fd_f) \ + : "f" (fr_f[i]), "f" (fs_f[i]) , "f" (ft_f[i]) \ + ); + +#define TRIOPd(op) \ + fd_d = 0; \ + __asm__ __volatile__( \ + op" %0, %1, %2, %3" "\n\t" \ + : "=f"(fd_d) \ + : "f" (fr_d[i]), "f" (fs_d[i]) , "f" (ft_d[i]) \ + ); + +/* Conditional macros.*/ +#define TESTINST1s(instruction, RDval) \ +{ \ + float outf = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "mov.s $f1, %1" "\n\t" \ + "mov.s $f2, %2" "\n\t" \ + "mtc1 $zero, $f0" "\n\t" \ + "c.eq.s $f1, $f2" "\n\t" \ + instruction" end"instruction"s"#RDval "\n\t" \ + "nop" "\n\t" \ + "add.s $f0, $f0, $f1" "\n\t" \ + "end"instruction"s"#RDval":" "\n\t" \ + "add.s $f0, $f0, $f2" "\n\t" \ + "mov.s %0, $f0" "\n\t" \ + ".set reorder" "\n\t" \ + : "=f" (outf) \ + : "f" (fs_f[i]) , "f" (ft_f[i]) \ + : "$f0", "$f1", "$f2" \ + ); \ + printf("%s, c.eq.s out=%f, fs=%f, ft=%f\n", \ + instruction, outf, fs_f[i], ft_f[i]); \ +} + +#define TESTINST1d(instruction, RDval) \ +{ \ + double outd = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "mov.d $f1, %1" "\n\t" \ + "mov.d $f2, %2" "\n\t" \ + "dmtc1 $zero, $f0" "\n\t" \ + "c.eq.d $f1, $f2" "\n\t" \ + instruction" end"instruction"d"#RDval "\n\t" \ + "nop" "\n\t" \ + "add.d $f0, $f0, $f1" "\n\t" \ + "end"instruction"d"#RDval":" "\n\t" \ + "add.d $f0, $f0, $f2" "\n\t" \ + "mov.d %0, $f0" "\n\t" \ + ".set reorder" "\n\t" \ + : "=f" (outd) \ + : "f" (fs_d[i]) , "f" (ft_d[i]) \ + : "$f0", "$f1", "$f2" \ + ); \ + printf("%s, c.eq.d out=%f, fs=%f, ft=%f\n", \ + instruction, outd, fs_d[i], ft_d[i]); \ +} + +#define TESTINST2s(instruction, RDval) \ +{ \ + float outf = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "mov.s $f1, %1" "\n\t" \ + "mov.s $f2, %2" "\n\t" \ + "mtc1 $zero, $f0" "\n\t" \ + "c.eq.s $f1, $f2" "\n\t" \ + instruction" end"instruction"s"#RDval "\n\t" \ + "add.s $f0, $f0, $f1" "\n\t" \ + "end"instruction"s"#RDval":" "\n\t" \ + "add.s $f0, $f0, $f2" "\n\t" \ + "mov.s %0, $f0" "\n\t" \ + ".set reorder" "\n\t" \ + : "=f" (outf) \ + : "f" (fs_f[i]) , "f" (ft_f[i]) \ + : "$f0", "$f1", "$f2" \ + ); \ + printf("%s, c.eq.s out=%f, fs=%f, ft=%f\n", \ + instruction, outf, fs_f[i], ft_f[i]); \ +} + +#define TESTINST2d(instruction, RDval) \ +{ \ + double outd = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "mov.d $f1, %1" "\n\t" \ + "mov.d $f2, %2" "\n\t" \ + "dmtc1 $zero, $f0" "\n\t" \ + "c.eq.d $f1, $f2" "\n\t" \ + instruction" end"instruction"d"#RDval "\n\t" \ + "add.d $f0, $f0, $f1" "\n\t" \ + "end"instruction"d"#RDval":" "\n\t" \ + "add.d $f0, $f0, $f2" "\n\t" \ + "mov.d %0, $f0" "\n\t" \ + ".set reorder" "\n\t" \ + : "=f" (outd) \ + : "f" (fs_d[i]) , "f" (ft_d[i]) \ + : "$f0", "$f1", "$f2" \ + ); \ + printf("%s, c.eq.d out=%f, fs=%f, ft=%f\n", \ + instruction, outd, fs_d[i], ft_d[i]); \ +} + +#define TESTINST_CONDs(instruction, RDval) \ +{ \ + float outf = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "mov.s $f1, %1" "\n\t" \ + "mov.s $f2, %2" "\n\t" \ + "mov.s $f0, %1" "\n\t" \ + instruction" $f1, $f2" "\n\t" \ + "bc1f end"instruction"s"#RDval "\n\t" \ + "nop" "\n\t" \ + "add.s $f0, $f0, $f2" "\n\t" \ + "end"instruction"s"#RDval":" "\n\t" \ + "mov.s %0, $f0" "\n\t" \ + ".set reorder" "\n\t" \ + : "=f" (outf) \ + : "f" (fs_f[i]) , "f" (ft_f[i]) \ + : "$f0", "$f1", "$f2" \ + ); \ + printf("%s, bc1f out=%f, fs=%f, ft=%f\n", \ + instruction, outf, fs_f[i], ft_f[i]); \ +} + +#define TESTINST_CONDd(instruction, RDval) \ +{ \ + double outd = 0; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + "mov.d $f1, %1" "\n\t" \ + "mov.d $f2, %2" "\n\t" \ + "mov.d $f0, %1" "\n\t" \ + instruction" $f1, $f2" "\n\t" \ + "bc1f end"instruction"d"#RDval "\n\t" \ + "nop" "\n\t" \ + "add.d $f0, $f0, $f2" "\n\t" \ + "end"instruction"d"#RDval":" "\n\t" \ + "mov.d %0, $f0" "\n\t" \ + ".set reorder" "\n\t" \ + : "=f" (outd) \ + : "f" (fs_d[i]) , "f" (ft_d[i]) \ + : "$f0", "$f1", "$f2" \ + ); \ + printf("%s, bc1f out=%f, fs=%f, ft=%f\n", \ + instruction, outd, fs_d[i], ft_d[i]); \ +} diff --git a/none/tests/mips64/macro_int.h b/none/tests/mips64/macro_int.h new file mode 100644 index 0000000000..e2fea7ba74 --- /dev/null +++ b/none/tests/mips64/macro_int.h @@ -0,0 +1,103 @@ +#define TEST1(instruction, RSval, RTval, RD, RS, RT) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $"#RS", %1" "\n\t" \ + "move $"#RT", %2" "\n\t" \ + "move $"#RD", $zero" "\n\t" \ + instruction "\n\t" \ + "move %0, $"#RD "\n\t" \ + : "=r" (out) \ + : "r" (RSval), "r" (RTval) \ + : #RD, #RS, #RT \ + ); \ + printf("%s :: rd 0x%llx, rs 0x%llx, rt 0x%llx\n", \ + instruction, out, (long long) RSval, \ + (long long) RTval); \ +} + +#define TEST2(instruction, RSval, imm, RT, RS) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $"#RS", %1" "\n\t" \ + "move $"#RT", $zero" "\n\t" \ + instruction "\n\t" \ + "move %0, $"#RT "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RT, #RS \ + ); \ + printf("%s :: rt 0x%llx, rs 0x%llx, imm 0x%04x\n", \ + instruction, out, (long long) RSval, imm); \ +} + +#define TEST3(instruction, RSval, RD, RS) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $"#RS", %1" "\n\t" \ + "move $"#RD", $zero" "\n\t" \ + instruction "\n\t" \ + "move %0, $"#RD "\n\t" \ + : "=r" (out) \ + : "r" (RSval) \ + : #RD, #RS \ + ); \ + printf("%s :: rd 0x%llx, rs 0x%llx\n", \ + instruction, out, (long long) RSval); \ +} + +#define TEST4(instruction, RSval, RTval, RS, RT) \ +{ \ + unsigned long long HI; \ + unsigned long long LO; \ + __asm__ __volatile__( \ + "move $"#RS", %2" "\n\t" \ + "move $"#RT", %3" "\n\t" \ + "mthi $zero" "\n\t" \ + "mtlo $zero" "\n\t" \ + instruction "\n\t" \ + "mfhi %0" "\n\t" \ + "mflo %1" "\n\t" \ + : "=r" (HI), "=r" (LO) \ + : "r" (RSval), "r"(RTval) \ + : #RS, #RT \ + ); \ + printf("%s :: rs 0x%llx, rt 0x%llx, HI 0x%llx, LO 0x%llx\n", \ + instruction, (long long) RSval, (long long) RTval, HI, LO); \ +} + +#define TEST5(instruction, RSval, RTval, RS, RT) \ +{ \ + unsigned long long HI; \ + unsigned long long LO; \ + __asm__ __volatile__( \ + "move $"#RS", %2" "\n\t" \ + "move $"#RT", %3" "\n\t" \ + "mthi $"#RS "\n\t" \ + "mtlo $"#RT "\n\t" \ + instruction "\n\t" \ + "mfhi %0" "\n\t" \ + "mflo %1" "\n\t" \ + : "=r" (HI), "=r" (LO) \ + : "r" (RSval), "r"(RTval) \ + : #RS, #RT \ + ); \ + printf("%s :: rs 0x%llx, rt 0x%llx, HI 0x%llx, LO 0x%llx\n", \ + instruction, (long long) RSval, (long long) RTval, HI, LO); \ +} + +#define TEST6(instruction, imm, RT) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $"#RT", $zero" "\n\t" \ + instruction "\n\t" \ + "move %0, $"#RT "\n\t" \ + : "=r" (out) : \ + : #RT \ + ); \ + printf("%s :: rt 0x%llx, imm 0x%04x\n", \ + instruction, out, imm); \ +} diff --git a/none/tests/mips64/macro_load_store.h b/none/tests/mips64/macro_load_store.h new file mode 100644 index 0000000000..7fb34c6cc8 --- /dev/null +++ b/none/tests/mips64/macro_load_store.h @@ -0,0 +1,159 @@ +#include "const.h" + +#define TEST1(instruction, offset, mem) \ +{ \ + unsigned long out = 0; \ + __asm__ __volatile__( \ + "move $t0, %1" "\n\t" \ + "move $t1, %2" "\n\t" \ + "daddu $t0, $t0, $t1" "\n\t" \ + "move $t1, $zero" "\n\t" \ + instruction" $t1, 0($t0)" "\n\t" \ + "move %0, $t1" "\n\t" \ + : "=r" (out) \ + : "r" (mem), "r" (offset) \ + : "t0", "t1" \ + ); \ + printf("%s :: offset: 0x%x, out: 0x%lx\n", \ + instruction, offset, out); \ +} + +#define TEST2(instruction, offset) \ +{ \ + unsigned long out = 0; \ + unsigned long outHI = 0; \ + __asm__ __volatile__( \ + "move $t0, %2" "\n\t" \ + "move $t1, %4" "\n\t" \ + "daddu $t0, $t0, $t1" "\n\t" \ + "ld $t3, 0($t0)" "\n\t" \ + "move $t1, %3" "\n\t" \ + "move $t2, %4" "\n\t" \ + "daddu $t1, $t1, $t2" "\n\t" \ + instruction" $t3, 0($t1)" "\n\t" \ + "li $t2, 7" "\n\t" \ + "nor $t2, $t2, $zero" "\n\t" \ + "and $t1, $t1, $t2" "\n\t" \ + "ld %0, 0($t1)" "\n\t" \ + "ld %1, 8($t1)" "\n\t" \ + : "=r" (out), "=r" (outHI) \ + : "r" (reg_val2) , "r" (reg_val_zero), "r" (offset) \ + : "t0", "t1", "t2", "t3" \ + ); \ + printf("%s :: offset: 0x%x, out: 0x%lx, outHI: 0x%lx\n", \ + instruction, offset, out, outHI); \ +} + +#define TEST3(instruction, offset, mem) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + "move $t0, %1" "\n\t" \ + "move $t1, %2" "\n\t" \ + "daddu $t0, $t0, $t1" "\n\t" \ + "dmtc1 $zero, $f0" "\n\t" \ + instruction" $f0, 0($t0)" "\n\t" \ + "dmfc1 %0, $f0" "\n\t" \ + : "=r" (out) \ + : "r" (mem) , "r" (offset) \ + : "t0", "t1", "$f0" \ + ); \ + printf("%s :: offset: 0x%x, out: 0x%llx\n", \ + instruction, offset, out); \ +} + +#define TEST3w(instruction, offset, mem) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + "move $t0, %1" "\n\t" \ + "move $t1, %2" "\n\t" \ + "daddu $t0, $t0, $t1" "\n\t" \ + "dmtc1 $zero, $f0" "\n\t" \ + instruction" $f0, 0($t0)" "\n\t" \ + "mfc1 %0, $f0" "\n\t" \ + : "=r" (out) \ + : "r" (mem) , "r" (offset) \ + : "t0", "t1", "$f0" \ + ); \ + printf("%s :: offset: 0x%x, out: 0x%x\n", \ + instruction, offset, out); \ +} + +#define TEST4(instruction, offset) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + "move $t0, %1" "\n\t" \ + "move $t1, %3" "\n\t" \ + "daddu $t0, $t0, $t1" "\n\t" \ + "ld $t2, 0($t0)" "\n\t" \ + "move $t0, %2" "\n\t" \ + "daddu $t0, $t0, $t1" "\n\t" \ + "dmtc1 $t2, $f0" "\n\t" \ + instruction" $f0, 0($t0)" "\n\t" \ + "ld %0, 0($t0)" "\n\t" \ + : "=r" (out) \ + : "r" (reg_val1) , "r" (reg_val_zero), "r" (offset) \ + : "t0", "t1", "t2", "$f0" \ + ); \ + printf("%s :: offset: 0x%x, out: 0x%llx\n", \ + instruction, offset, out); \ +} + +#define TEST5(instruction, offset, mem) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + "move $t0, %1" "\n\t" \ + "move $t1, %2" "\n\t" \ + "dmtc1 $zero, $f0" "\n\t" \ + instruction" $f0, $t1($t0)" "\n\t" \ + "dmfc1 %0, $f0" "\n\t" \ + : "=r" (out) \ + : "r" (mem) , "r" (offset) \ + : "t0", "t1", "$f0" \ + ); \ + printf("%s :: offset: 0x%x, out: 0x%llx\n", \ + instruction, offset, out); \ +} + +#define TEST5w(instruction, offset, mem) \ +{ \ + unsigned int out = 0; \ + __asm__ __volatile__( \ + "move $t0, %1" "\n\t" \ + "move $t1, %2" "\n\t" \ + "dmtc1 $zero, $f0" "\n\t" \ + instruction" $f0, $t1($t0)" "\n\t" \ + "mfc1 %0, $f0" "\n\t" \ + : "=r" (out) \ + : "r" (mem) , "r" (offset) \ + : "t0", "t1", "$f0" \ + ); \ + printf("%s :: offset: 0x%x, out: 0x%x\n", \ + instruction, offset, out); \ +} + +#define TEST6(instruction, offset) \ +{ \ + unsigned long long out = 0; \ + __asm__ __volatile__( \ + "move $t0, %1" "\n\t" \ + "move $t1, %3" "\n\t" \ + "daddu $t0, $t0, $t1" "\n\t" \ + "ld $t3, 0($t0)" "\n\t" \ + "move $t1, %2" "\n\t" \ + "move $t2, %3" "\n\t" \ + "daddu $t1, $t1, $t2" "\n\t" \ + "dmtc1 $t3, $f3" "\n\t" \ + "move $t0, %3" "\n\t" \ + instruction" $f3, $t0($t1)" "\n\t" \ + "ld %0, 0($t1)" "\n\t" \ + : "=r" (out) \ + : "r" (reg_val2) , "r" (reg_val_zero), "r" (offset) \ + : "t0", "t1", "t2", "t3" \ + ); \ + printf("%s :: offset: 0x%x, out: 0x%llx\n", \ + instruction, offset, out); \ +} diff --git a/none/tests/mips64/move_instructions.c b/none/tests/mips64/move_instructions.c new file mode 100644 index 0000000000..647e6fcc3d --- /dev/null +++ b/none/tests/mips64/move_instructions.c @@ -0,0 +1,371 @@ +#include +#include "const.h" + +const float reg_val_f[] = { + -347856.475, 356047.56, -1.0, 23.04, + 1752, 0.0024575, 0.00000001, -248562.76, + 1384.6, -7.2945676, 1000000000, -5786.47, + -347856.475, 356047.56, -1.0, 23.04, + 0, 456.2489562, 3, -1, + -45786.476, 456.2489562, 34.00046, 45786.476, + 0, 456.2489562, 3, -1, + 1384.6, -7.2945676, 1000000000, -5786.47, + 1752, 0.0024575, 0.00000001, -248562.76, + -45786.476, 456.2489562, 34.00046, 45786.476, + 1752065, 107, -45667.24, -7.2945676, + -347856.475, 356047.56, -1.0, 23.04, + -347856.475, 356047.56, -1.0, 23.04, + 1752, 0.0024575, 0.00000001, -248562.76, + 1384.6, -7.2945676, 1000000000, -5786.47, + -347856.475, 356047.56, -1.0, 23.04, + 0, 456.2489562, 3, -1, + -45786.476, 456.2489562, 34.00046, 45786.476, + 0, 456.2489562, 3, -1, + 1384.6, -7.2945676, 1000000000, -5786.47, + 1752, 0.0024575, 0.00000001, -248562.76, + -45786.476, 456.2489562, 34.00046, 45786.476, + 1752065, 107, -45667.24, -7.2945676, + -347856.475, 356047.56, -1.0, 23.04 +}; + +const float fs1_f[] = { + 0, 456.2489562, 3, -1, + 1384.6, -7.2945676, 1000000000, -5786.47, + 1752, 0.0024575, 0.00000001, -248562.76, + -45786.476, 456.2489562, 34.00046, 45786.476, + 1752065, 107, -45667.24, -7.2945676, + -347856.475, 356047.56, -1.0, 23.04 +}; + +const double fs2_f[] = { + 0, 456.2489562, 3, -1, + -7.2945676, 1384.6, 1000000000, -5786.47, + 1752, 0.0024575, -248562.76, 0.00000001, + -45786.476, 45786.476, 456.2489562, 34.00046, + 1752065, 107, -45667.24, -7.2945676, + -347856.475, 23.04 -1.0, 356047.56 +}; + +#define TEST1(mem) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + ".set nomacro" "\n\t" \ + "move $t0, %1" "\n\t" \ + "mtc1 $t0, $f0" "\n\t" \ + "mov.s $f1, $f0" "\n\t" \ + "mfc1 $t1, $f1" "\n\t" \ + "move %0, $t1" "\n\t" \ + ".set reorder" "\n\t" \ + ".set macro" "\n\t" \ + : "=r" (out) \ + : "r" (mem) \ + : "t0", "t1", "$f0", "$f1" \ + ); \ + printf("mtc1, mov.s, mfc1 :: mem: 0x%llx out: 0x%llx\n", \ + (long long)mem, out); \ +} + +#define TEST2(mem) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + ".set noreorder" "\n\t" \ + ".set nomacro" "\n\t" \ + "move $t0, %1" "\n\t" \ + "dmtc1 $t0, $f2" "\n\t" \ + "mov.d $f0, $f2" "\n\t" \ + "dmfc1 $t1, $f0" "\n\t" \ + "move %0, $t1" "\n\t" \ + ".set reorder" "\n\t" \ + ".set macro" "\n\t" \ + : "=r" (out) \ + : "r" (mem) \ + : "t0", "t1", "$f0", "$f2" \ + ); \ + printf("dmtc1, mov.d, dmfc1 :: mem: 0x%llx out: 0x%llx\n", \ + (long long)mem, out); \ +} + +/* movX.s fd, fs */ +#define TEST3(instruction, FD, FS, cc, offset) \ +{ \ + unsigned int out; \ + __asm__ __volatile__( \ + "li $t0, 1" "\n\t" \ + "move $t1, %1" "\n\t" \ + "mtc1 $t0, $f0" "\n\t" \ + "mtc1 $t1, $f2" "\n\t" \ + "dmtc1 $zero, $"#FD "\n\t" \ + "dmtc1 $zero, $"#FS "\n\t" \ + "c.eq.s $f0, $f2" "\n\t" \ + "move $t0, %2" "\n\t" \ + "lwc1 $"#FS", "#offset"($t0)" "\n\t" \ + instruction "\n\t" \ + "mfc1 %0, $"#FD "\n\t" \ + : "=r" (out) \ + : "r" (cc), "r" (reg_val_f) \ + : "t0", "t1", "$"#FD, "$"#FS, "$f0", "$f2" \ + ); \ + printf("%s :: out: 0x%x, cc: %d\n", \ + instruction, out, cc); \ +} + +/* movX.d fd, fs */ +#define TEST3d(instruction, FD, FS, cc, offset) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "li $t0, 1" "\n\t" \ + "move $t1, %1" "\n\t" \ + "mtc1 $t0, $f0" "\n\t" \ + "mtc1 $t1, $f2" "\n\t" \ + "dmtc1 $zero, $"#FD "\n\t" \ + "c.eq.s $f0, $f2" "\n\t" \ + "move $t0, %2" "\n\t" \ + "ldc1 $"#FS", "#offset"($t0)" "\n\t" \ + instruction "\n\t" \ + "dmfc1 %0, $"#FD "\n\t" \ + : "=r" (out) \ + : "r" (cc), "r" (reg_val_f) \ + : "t0", "t1", "$"#FD, "$"#FS, "$f0", "$f2" \ + ); \ + printf("%s :: out: 0x%llx, cc: %d\n", \ + instruction, out, cc); \ +} + +/* movX.s fd, fs, rt */ +#define TEST4(instruction, offset, RTval, FD, FS, RT) \ +{ \ + unsigned int out; \ + __asm__ __volatile__( \ + "move $"#RT", %2" "\n\t" \ + "dmtc1 $zero, $"#FD "\n\t" \ + "dmtc1 $zero, $"#FS "\n\t" \ + "move $t0, %1" "\n\t" \ + "lwc1 $"#FS", "#offset"($t0)" "\n\t" \ + instruction "\n\t" \ + "mfc1 %0, $"#FD"\n\t" \ + : "=r" (out) \ + : "r" (reg_val_f), "r" (RTval) \ + : "t0", #RT, "$"#FD, "$"#FS \ + ); \ + printf("%s :: out: 0x%x\n", instruction, out); \ +} + +/* movX.d fd, fs, rt */ +#define TEST4d(instruction, offset, RTval, FD, FS, RT) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $"#RT", %2" "\n\t" \ + "dmtc1 $zero, $"#FD "\n\t" \ + "dmtc1 $zero, $"#FS "\n\t" \ + "move $t0, %1" "\n\t" \ + "ldc1 $"#FS", "#offset"($t0)" "\n\t" \ + instruction "\n\t" \ + "dmfc1 %0, $"#FD "\n\t" \ + : "=r" (out) \ + : "r" (reg_val_f), "r" (RTval) \ + : #RT, "t0", "$"#FD, "$"#FS \ + ); \ + printf("%s :: out: 0x%llx\n", instruction, out); \ +} + +/* movf, movt */ +#define TEST5(instruction, RDval, RSval, RD, RS) \ +{ \ + unsigned long out; \ + __asm__ __volatile__( \ + "c.eq.s %3, %4" "\n\t" \ + "move $"#RD", %1" "\n\t" \ + "move $"#RS", %2" "\n\t" \ + instruction" $"#RD", $"#RS", $fcc0" "\n\t" \ + "move %0, $"#RD "\n\t" \ + : "=r" (out) \ + : "r" (RDval), "r" (RSval), "f" (fs1_f[i]), "f" (fs2_f[i]) \ + : #RD, #RS \ + ); \ + printf("%s :: RDval: 0x%x, RSval: 0x%x, out: 0x%lx\n", \ + instruction, RDval, RSval, out); \ +} + +int main() +{ + int i; + init_reg_val2(); + + for (i = 0; i < N; i++) { + TEST1(reg_val1[i]); + TEST2(reg_val1[i]); + TEST1(reg_val2[i]); + TEST2(reg_val2[i]); + } + + printf("--- MOVF.S ---\n"); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 0); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 8); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 16); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 24); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 32) + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 40) + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 48) + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 56) + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 0); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 8); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 16); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 24); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 32); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 40); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 48); + TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 56); + + printf("--- MOVF.D ---\n"); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 1, 0); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 1, 8); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 1, 16); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 1, 24); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 1, 32); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 1, 40) + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 1, 48) + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 1, 56) + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 0, 0); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 0, 8); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 0, 16); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 0, 24); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 0, 32); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 0, 40); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 0, 48); + TEST3d("movf.d $f4, $f6, $fcc0", f4, f6, 0, 56); + + printf("--- MOVN.S ---\n"); + TEST4("movn.s $f0, $f2, $11", 0, 0, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 0, 1, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 8, 0xffff, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 16, -1, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 16, 5, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 24, 0, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 24, 0, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 32, 5, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 32, 125487, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 40, 68, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 40, -122544, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 48, 0, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 48, 0, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 56, 0xffffffff, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 56, 0x80000000, f0, f2, 11); + TEST4("movn.s $f0, $f2, $11", 64, 0x7fffffff, f0, f2, 11); + + printf("--- MOVN.D ---\n"); + TEST4d("movn.d $f0, $f2, $11", 0, 0, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 0, 1, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 8, 0xffff, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 8, -1, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 16, 5, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 24, 0, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 24, 0, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 32, 5, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 32, 125487, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 40, 68, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 40, -122544, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 48, 0, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 48, 0, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 56, 0xffffffff, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 56, 0x80000000, f0, f2, 11); + TEST4d("movn.d $f0, $f2, $11", 64, 0x7fffffff, f0, f2, 11); + + printf("--- MOVT.S ---\n"); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 0); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 0); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 8); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 16); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 24); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 32); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 40) + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 48) + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 1, 56) + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 0, 0); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 0, 8); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 0, 16); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 0, 24); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 0, 32); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 0, 40); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 0, 48); + TEST3("movt.s $f4, $f6, $fcc0", f4, f6, 0, 56); + + printf("--- MOVT.D ---\n"); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 0); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 0); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 8); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 16); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 24); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 32); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 40) + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 48) + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 1, 56) + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 0, 0); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 0, 8); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 0, 16); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 0, 24); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 0, 32); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 0, 40); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 0, 48); + TEST3d("movt.d $f4, $f6, $fcc0", f4, f6, 0, 56); + + printf("--- MOVZ.S ---\n"); + TEST4("movz.s $f0, $f2, $11", 0, 0, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 8, 1, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 8, 0xffff, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 16, -1, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 16, 5, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 24, 0, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 24, 0, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 32, 5, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 32, 125487, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 40, 68, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 40, -122544, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 48, 0, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 48, 0, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 56, 0xffffffff, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 56, 0x80000000, f0, f2, 11); + TEST4("movz.s $f0, $f2, $11", 64, 0x7fffffff, f0, f2, 11); + + printf("--- MOVZ.D ---\n"); + TEST4d("movz.d $f0, $f2, $11", 0, 0, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 0, 1, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 8, 0xffff, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 16, -1, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 16, 5, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 24, 0, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 24, 0, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 32, 5, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 32, 125487, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 40, 68, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 40, -122544, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 48, 0, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 48, 0, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 56, 0xffffffff, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 56, 0x80000000, f0, f2, 11); + TEST4d("movz.d $f0, $f2, $11", 64, 0x7fffffff, f0, f2, 11); + + printf("--- MOVF --- if FPConditionalCode(cc) == 0 then " + "out = RSval else out = RDval\n"); + for (i = 0; i < 24; i++) { + TEST5("movf", 0xaaaaaaaa, 0x80000000, t0, t1); + TEST5("movf", 0xccccffff, 0xffffffff, t1, t2); + TEST5("movf", 0xffffaaaa, 0xaaaaffff, t3, t1); + TEST5("movf", 0x0, 0xffffffff, t3, t0); + } + + printf("--- MOVT --- if FPConditionalCode(cc) == 1 then " + "out = RSval else out = RDval\n"); + for (i = 0; i < 24; i++) { + TEST5("movt", 0x0, 0xffffffff, t0, t1); + TEST5("movt", 0x11111111, 0xeeeeffff, t1, t2); + TEST5("movt", 0x5555ffff, 0xffffffff, t3, t1); + TEST5("movt", 0xeeeeeeee, 0xffffeeee, t3, t0); + } + + return 0; +} diff --git a/none/tests/mips64/rotate_swap.c b/none/tests/mips64/rotate_swap.c new file mode 100644 index 0000000000..6d983b72bb --- /dev/null +++ b/none/tests/mips64/rotate_swap.c @@ -0,0 +1,192 @@ +#include + +#define TESTINST_DROTR(instruction, in, SA) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $t0, $zero" "\n\t" \ + "move $t1, %1" "\n\t" \ + instruction" $t0, $t1, "#SA "\n\t" \ + "move %0, $t0" "\n\t" \ + : "=r" (out) \ + : "r" (in) \ + : "t0", "t1" \ + ); \ + printf("%s :: in 0x%llx, out 0x%llx, SA %d\n", \ + instruction, (long long) in, out, SA); \ +} + +#define TESTINST_DROTRV(instruction, in, SA) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $t0, $zero" "\n\t" \ + "move $t1, %1" "\n\t" \ + "move $t2, %2" "\n\t" \ + instruction" $t0, $t1, $t2" "\n\t" \ + "move %0, $t0" "\n\t" \ + : "=r" (out) \ + : "r" (in), "r" (SA) \ + : "t0", "t1", "t2" \ + ); \ + printf("%s :: in 0x%llx, out 0x%llx, SA %d\n", \ + instruction, (long long) in, out, SA); \ +} + +#define TESTINST_DSWAP(instruction, in) \ +{ \ + unsigned long long out; \ + __asm__ __volatile__( \ + "move $t0, $0" "\n\t" \ + "move $t1, $0" "\n\t" \ + "move $t1, %1" "\n\t" \ + instruction" $t0, $t1" "\n\t" \ + "move %0, $t0" "\n\t" \ + : "=r" (out) \ + : "r" (in) \ + : "t0", "t1" \ + ); \ + printf("%s :: in 0x%llx, out 0x%llx\n", \ + instruction, (long long) in, out); \ +} + +int main() +{ +#if (__mips == 64) && (__mips_isa_rev >= 2) + printf("--- DROTR ---\n"); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 16); + TESTINST_DROTR("drotr", 0xffff0000ffffffff, 16); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 8); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 4); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 5); + TESTINST_DROTR("drotr", 0x31415927ffffffff, 10); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 4); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 0); + TESTINST_DROTR("drotr", 0xeeeeffffffffffff, 16); + TESTINST_DROTR("drotr", 0x2000ffffffffbbbb, 31); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 16); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 0); + TESTINST_DROTR("drotr", 0x7fffffffffffffff, 16); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 2); + TESTINST_DROTR("drotr", 0x2000ffffffffffff, 24); + TESTINST_DROTR("drotr", 0xfffffff31415927f, 16); + TESTINST_DROTR("drotr", 0xffffffffffff0008, 3); + TESTINST_DROTR("drotr", 0xffff0000ffffffff, 16); + TESTINST_DROTR("drotr", 0xff0000ffffffffff, 16); + TESTINST_DROTR("drotr", 0xfffffffff0000fff, 16); + + printf("--- DROTR32 ---\n"); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 16); + TESTINST_DROTR("drotr32", 0xffff0000ffffffff, 16); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 8); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 4); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 5); + TESTINST_DROTR("drotr32", 0x31415927ffffffff, 10); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 4); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 0); + TESTINST_DROTR("drotr32", 0xeeeeffffffffffff, 16); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 31); + TESTINST_DROTR("drotr32", 0x2000ffffffffbbbb, 16); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 0); + TESTINST_DROTR("drotr32", 0x7fffffffffffffff, 16); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 2); + TESTINST_DROTR("drotr32", 0x2000ffffffffffff, 24); + TESTINST_DROTR("drotr32", 0xfffffff31415927f, 16); + TESTINST_DROTR("drotr32", 0xffffffffffff0008, 3); + TESTINST_DROTR("drotr32", 0xffff0000ffffffff, 16); + TESTINST_DROTR("drotr32", 0xff0000ffffffffff, 16); + TESTINST_DROTR("drotr32", 0xfffffffff0000fff, 16); + + printf("--- DROTRV ---\n"); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 16); + TESTINST_DROTRV("drotrv", 0xffff0000ffffffff, 16); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 8); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 4); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 5); + TESTINST_DROTRV("drotrv", 0x31415927ffffffff, 10); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 4); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 0); + TESTINST_DROTRV("drotrv", 0xeeeeffffffffffff, 16); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 31); + TESTINST_DROTRV("drotrv", 0x2000ffffffffbbbb, 16); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 0); + TESTINST_DROTRV("drotrv", 0x7fffffffffffffff, 16); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 2); + TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 24); + TESTINST_DROTRV("drotrv", 0xfffffff31415927f, 16); + TESTINST_DROTRV("drotrv", 0xffffffffffff0008, 3); + TESTINST_DROTRV("drotrv", 0xffff0000ffffffff, 16); + TESTINST_DROTRV("drotrv", 0xff0000ffffffffff, 16); + TESTINST_DROTRV("drotrv", 0xfffffffff0000fff, 16); + + printf("--- DSBH ---\n"); + TESTINST_DSWAP("dsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("dsbh", 0xffff0000ffffffff); + TESTINST_DSWAP("dsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("dsbh", 0x2000ffffeeeeffff); + TESTINST_DSWAP("dsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("dsbh", 0x31415927ffffffff); + TESTINST_DSWAP("dsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("dsbh", 0x2000ffffffccccff); + TESTINST_DSWAP("dsbh", 0xeeeeffffffffffff); + TESTINST_DSWAP("dsbh", 0x2000ffff0000ffff); + TESTINST_DSWAP("dsbh", 0x2000ffffffffbbbb); + TESTINST_DSWAP("dsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("dsbh", 0x7fffffff5555ffff); + TESTINST_DSWAP("dsbh", 0x2000ffffff123123); + TESTINST_DSWAP("dsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("dsbh", 0xfffffff31415927f); + TESTINST_DSWAP("dsbh", 0xffffffffffff0008); + TESTINST_DSWAP("dsbh", 0xffff0000ffff88ff); + TESTINST_DSWAP("dsbh", 0xff0000ffffffffff); + TESTINST_DSWAP("dsbh", 0xfff10ffff0000fff); + + printf("--- DSHD ---\n"); + TESTINST_DSWAP("dshd", 0x2002ffffffffffff); + TESTINST_DSWAP("dshd", 0xffff0000ffffffff); + TESTINST_DSWAP("dshd", 0x2000ffffffffffff); + TESTINST_DSWAP("dshd", 0x2000ffffffddddff); + TESTINST_DSWAP("dshd", 0x2000ffffffffeeee); + TESTINST_DSWAP("dshd", 0x31415927ffffffff); + TESTINST_DSWAP("dshd", 0x2000ffffffffaaaa); + TESTINST_DSWAP("dshd", 0x2000ffffffbbbbff); + TESTINST_DSWAP("dshd", 0xeeeeff33ff22ffff); + TESTINST_DSWAP("dshd", 0x2000ffffffffffff); + TESTINST_DSWAP("dshd", 0x2000ffffffffbbbb); + TESTINST_DSWAP("dshd", 0x2000ffffffffffff); + TESTINST_DSWAP("dshd", 0x7fffffffddddffff); + TESTINST_DSWAP("dshd", 0x2000ffffffff2222); + TESTINST_DSWAP("dshd", 0x2000ffffffffffff); + TESTINST_DSWAP("dshd", 0xfffffff31415927f); + TESTINST_DSWAP("dshd", 0xffffffffffff0008); + TESTINST_DSWAP("dshd", 0xffff0000ffffffff); + TESTINST_DSWAP("dshd", 0xff0000ffffffffff); + TESTINST_DSWAP("dshd", 0xfffffffff0000fff); + + printf("--- WSBH ---\n"); + TESTINST_DSWAP("wsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("wsbh", 0xffff0000ffffffff); + TESTINST_DSWAP("wsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("wsbh", 0x2000ffffeeeeffff); + TESTINST_DSWAP("wsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("wsbh", 0x31415927ffffffff); + TESTINST_DSWAP("wsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("wsbh", 0x2000ffffffccccff); + TESTINST_DSWAP("wsbh", 0xeeeeffffffffffff); + TESTINST_DSWAP("wsbh", 0x2000ffff0000ffff); + TESTINST_DSWAP("wsbh", 0x2000ffffffffbbbb); + TESTINST_DSWAP("wsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("wsbh", 0x7fffffff5555ffff); + TESTINST_DSWAP("wsbh", 0x2000ffffff123123); + TESTINST_DSWAP("wsbh", 0x2000ffffffffffff); + TESTINST_DSWAP("wsbh", 0xfffffff31415927f); + TESTINST_DSWAP("wsbh", 0xffffffffffff0008); + TESTINST_DSWAP("wsbh", 0xffff0000ffff88ff); + TESTINST_DSWAP("wsbh", 0xff0000ffffffffff); + TESTINST_DSWAP("wsbh", 0xfff10ffff0000fff); +#else + printf("This test is testing mips64r2 instructions.\n"); +#endif + + return 0; +} diff --git a/none/tests/mips64/round.c b/none/tests/mips64/round.c new file mode 100644 index 0000000000..fc4e4f1ea4 --- /dev/null +++ b/none/tests/mips64/round.c @@ -0,0 +1,163 @@ +#include +#include "rounding_mode.h" +#include "macro_fpu.h" + +int directedRoundingMode(flt_dir_op_t op) { + int fd_w = 0; + long long int fd_l = 0; + int i; + for (i = 0; i < MAX_ARR; i++) { + switch(op) { + case CEILWS: + UNOPfw("ceil.w.s"); + printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]); + break; + case CEILWD: + UNOPdw("ceil.w.d"); + printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]); + break; + case FLOORWS: + UNOPfw("floor.w.s"); + printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]); + break; + case FLOORWD: + UNOPdw("floor.w.d"); + printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]); + break; + case ROUNDWS: + UNOPfw("round.w.s"); + printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]); + break; + case ROUNDWD: + UNOPdw("round.w.d"); + printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]); + break; + case TRUNCWS: + UNOPfw("trunc.w.s"); + printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]); + break; + case TRUNCWD: + UNOPdw("trunc.w.d"); + printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]); + break; + case CEILLS: + UNOPsl("ceil.l.s"); + printf("%s %lld %f\n", flt_dir_op_names[op], fd_l, fs_f[i]); + break; + case CEILLD: + UNOPdl("ceil.l.d"); + printf("%s %lld %lf\n", flt_dir_op_names[op], fd_l, fs_d[i]); + break; + case FLOORLS: + UNOPsl("floor.l.s"); + printf("%s %lld %f\n", flt_dir_op_names[op], fd_l, fs_f[i]); + break; + case FLOORLD: + UNOPdl("floor.l.d"); + printf("%s %lld %lf\n", flt_dir_op_names[op], fd_l, fs_d[i]); + break; + case ROUNDLS: + UNOPsl("round.l.s"); + printf("%s %lld %f\n", flt_dir_op_names[op], fd_l, fs_f[i]); + break; + case ROUNDLD: + UNOPdl("round.l.d"); + printf("%s %lld %lf\n", flt_dir_op_names[op], fd_l, fs_d[i]); + break; + case TRUNCLS: + UNOPsl("trunc.l.s"); + printf("%s %lld %f\n", flt_dir_op_names[op], fd_l, fs_f[i]); + break; + case TRUNCLD: + UNOPdl("trunc.l.d"); + printf("%s %lld %lf\n", flt_dir_op_names[op], fd_l, fs_d[i]); + break; + default: + printf("error\n"); + break; + } + } + return 0; +} + +int FCSRRoundingMode(flt_round_op_t op1) +{ + double fd_d = 0; + float fd_f = 0; + int fd_w = 0; + long long int fd_l = 0; + int i; + round_mode_t rm; + for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) { + set_rounding_mode(rm); + printf("roundig mode: %s\n", round_mode_name[rm]); + for (i = 0; i < MAX_ARR; i++) { + set_rounding_mode(rm); + switch(op1) { + case CVTDS: + UNOPfd("cvt.d.s"); + printf("%s %lf %lf\n", flt_round_op_names[op1], fd_d, fs_f[i]); + break; + case CVTDW: + UNOPwd("cvt.d.w"); + printf("%s %lf %d\n", flt_round_op_names[op1], fd_d, fs_w[i]); + break; + case CVTSD: + UNOPdf("cvt.s.d"); + printf("%s %f %lf\n", flt_round_op_names[op1], fd_f, fs_d[i]); + break; + case CVTSW: + UNOPwf("cvt.s.w"); + printf("%s %f %d\n", flt_round_op_names[op1], fd_f, fs_w[i]); + break; + case CVTWS: + UNOPfw("cvt.w.s"); + printf("%s %d %f\n", flt_round_op_names[op1], fd_w, fs_f[i]); + break; + case CVTWD: + UNOPdw("cvt.w.d"); + printf("%s %d %lf\n", flt_round_op_names[op1], fd_w, fs_d[i]); + break; + case CVTDL: + UNOPld("cvt.d.l"); + printf("%s %lf %ld\n", flt_round_op_names[op1], fd_d, fs_l[i]); + break; + case CVTLS: + UNOPsl("cvt.l.s"); + printf("%s %lld %f\n", flt_round_op_names[op1], fd_l, fs_f[i]); + break; + case CVTLD: + UNOPdl("cvt.l.d"); + printf("%s %lld %lf\n", flt_round_op_names[op1], fd_l, fs_d[i]); + break; + case CVTSL: + UNOPls("cvt.s.l"); + printf("%s %f %ld\n", flt_round_op_names[op1], fd_f, fs_l[i]); + break; + default: + printf("error\n"); + break; + } + } + } + return 0; +} + +int main() +{ + flt_dir_op_t op; + flt_round_op_t op1; + + printf("-------------------------- %s --------------------------\n", + "test FPU Conversion Operations Using a Directed Rounding Mode"); + for (op = CEILWS; op <= TRUNCLS; op++) { + directedRoundingMode(op); + } + + printf("-------------------------- %s --------------------------\n", + "test FPU Conversion Operations Using the FCSR Rounding Mode"); + for (op1 = CVTDS; op1 <= CVTSL; op1++) { + FCSRRoundingMode(op1); + } + return 0; +} diff --git a/none/tests/mips64/rounding_mode.h b/none/tests/mips64/rounding_mode.h new file mode 100644 index 0000000000..e47ee19680 --- /dev/null +++ b/none/tests/mips64/rounding_mode.h @@ -0,0 +1,61 @@ +typedef enum { + TO_NEAREST=0, + TO_ZERO, + TO_PLUS_INFINITY, + TO_MINUS_INFINITY +} round_mode_t; + +char *round_mode_name[] = { "near", "zero", "+inf", "-inf" }; + +void set_rounding_mode(round_mode_t mode) +{ + switch(mode) { + case TO_NEAREST: + __asm__ __volatile__( + "cfc1 $t0, $31" "\n\t" + "srl $t0, 2" "\n\t" + "sll $t0, 2" "\n\t" + "ctc1 $t0, $31" "\n\t" + : + : + : "t0" + ); + break; + case TO_ZERO: + __asm__ __volatile__( + "cfc1 $t0, $31" "\n\t" + "srl $t0, 2" "\n\t" + "sll $t0, 2" "\n\t" + "addiu $t0, 1" "\n\t" + "ctc1 $t0, $31" "\n\t" + : + : + : "t0" + ); + break; + case TO_PLUS_INFINITY: + __asm__ __volatile__( + "cfc1 $t0, $31" "\n\t" + "srl $t0, 2" "\n\t" + "sll $t0, 2" "\n\t" + "addiu $t0, 2" "\n\t" + "ctc1 $t0, $31" "\n\t" + : + : + : "t0" + ); + break; + case TO_MINUS_INFINITY: + __asm__ __volatile__( + "cfc1 $t0, $31" "\n\t" + "srl $t0, 2" "\n\t" + "sll $t0, 2" "\n\t" + "addiu $t0, 3" "\n\t" + "ctc1 $t0, $31" "\n\t" + : + : + : "t0" + ); + break; + } +} diff --git a/none/tests/mips64/shift_instructions.c b/none/tests/mips64/shift_instructions.c new file mode 100644 index 0000000000..307f440a18 --- /dev/null +++ b/none/tests/mips64/shift_instructions.c @@ -0,0 +1,205 @@ +#include +#include "const.h" +#include "macro_int.h" + +typedef enum { + DROTR=0, DROTR32, DROTRV, DSLL, + DSLL32, DSLLV, DSRA, DSRA32, + DSRAV, DSRL, DSRL32, DSRLV, + ROTR, ROTRV, SLL, SLLV, + SRA, SRAV, SRL, SRLV +} logical_op; + +int main() +{ + logical_op op; + int i; + init_reg_val2(); + for (op = DROTR; op <= SRLV; op++) { + for (i = 0; i < N; i++) { + switch(op) { + case DROTR: + /* Release 2 Only */ +#if (__mips == 64) && (__mips_isa_rev >= 2) + TEST2("drotr $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("drotr $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("drotr $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("drotr $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("drotr $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("drotr $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("drotr $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("drotr $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); +#endif + break; + case DROTR32: + /* Release 2 Only */ +#if (__mips == 64) && (__mips_isa_rev >= 2) + TEST2("drotr32 $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("drotr32 $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("drotr32 $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("drotr32 $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("drotr32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("drotr32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("drotr32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("drotr32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); +#endif + break; + case DROTRV: + /* Release 2 Only */ +#if (__mips == 64) && (__mips_isa_rev >= 2) + TEST1("drotrv $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("drotrv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); +#endif + break; + case DSLL: + TEST2("dsll $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("dsll $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("dsll $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("dsll $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("dsll $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("dsll $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("dsll $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("dsll $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); + break; + + case DSLL32: + TEST2("dsll32 $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("dsll32 $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("dsll32 $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("dsll32 $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("dsll32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("dsll32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("dsll32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("dsll32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); + break; + + case DSLLV: + TEST1("dsllv $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("dsllv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case DSRA: + TEST2("dsra $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("dsra $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("dsra $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("dsra $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("dsra $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("dsra $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("dsra $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("dsra $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); + break; + + case DSRA32: + TEST2("dsra32 $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("dsra32 $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("dsra32 $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("dsra32 $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("dsra32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("dsra32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("dsra32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("dsra32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); + break; + + case DSRAV: + TEST1("dsrav $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("dsrav $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case DSRL: + TEST2("dsrl $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("dsrl $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("dsrl $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("dsrl $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("dsrl $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("dsrl $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("dsrl $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("dsrl $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); + break; + + case DSRL32: + TEST2("dsrl32 $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("dsrl32 $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("dsrl32 $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("dsrl32 $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("dsrl32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("dsrl32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("dsrl32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("dsrl32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); + break; + + case DSRLV: + TEST1("dsrlv $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("dsrlv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case ROTR: + /* Release 2 Only */ +#if (__mips == 64) && (__mips_isa_rev >= 2) + TEST2("rotr $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("rotr $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("rotr $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("rotr $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); +#endif + break; + case ROTRV: + /* Release 2 Only */ +#if (__mips == 64) && (__mips_isa_rev >= 2) + TEST1("rotrv $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); +#endif + break; + case SLL: + TEST2("sll $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("sll $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("sll $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("sll $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + TEST2("sll $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1); + TEST2("sll $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3); + TEST2("sll $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1); + TEST2("sll $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1); + break; + + case SLLV: + TEST1("sllv $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + TEST1("sllv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1], + s0, s1, s2); + break; + + case SRA: + TEST2("sra $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("sra $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("sra $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("sra $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + break; + + case SRAV: + TEST1("srav $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + case SRL: + TEST2("srl $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1); + TEST2("srl $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3); + TEST2("srl $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1); + TEST2("srl $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1); + break; + + case SRLV: + TEST1("srlv $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1], + t0, t1, t2); + break; + + } + } + } + return 0; +} diff --git a/none/tests/mips64/test_block_size.c b/none/tests/mips64/test_block_size.c new file mode 100644 index 0000000000..7a29908a98 --- /dev/null +++ b/none/tests/mips64/test_block_size.c @@ -0,0 +1,71 @@ +#include + +__attribute__((noinline)) int test_block_size1 () +{ + int result = 1; + __asm__ __volatile__( + ".set noreorder" "\n\t" + ".set nomacro" "\n\t" + "b begin1" "\n\t" + "nop" "\n\t" + "begin1:" "\n\t" + ".rept 56" "\n\t" + ".word 0" "\n\t" + ".endr" "\n\t" + "li $a0, 0" "\n\t" + "j end1" "\n\t" + "nop" "\n\t" + "b label1" "\n\t" + "nop" "\n\t" + "label1:" "\n\t" + "li $a0, 1" "\n\t" + "end1:" "\n\t" + "move %0, $a0" "\n\t" + ".set reorder" "\n\t" + ".set macro" "\n\t" + : /* out */ "=r" (result) + : /* in */ + : /* trash */ "a0"); + return result; +} + +__attribute__((noinline)) int test_block_size2 () +{ + int result = 1; + __asm__ __volatile__( + ".set noreorder" "\n\t" + ".set nomacro" "\n\t" + "b begin2" "\n\t" + "nop" "\n\t" + "begin2:" "\n\t" + ".rept 58" "\n\t" + ".word 0" "\n\t" + ".endr" "\n\t" + "li $a0, 1" "\n\t" + "j end2" "\n\t" + "li $a0, 0" "\n\t" + "end2:" "\n\t" + "move %0, $a0" "\n\t" + ".set reorder" "\n\t" + ".set macro" "\n\t" + : /* out */ "=r" (result) + : /* in */ + : /* trash */ "a0"); + return result; +} + +int main () +{ + /*******************TEST1*******************/ + if (test_block_size1() == 0) + printf("test1 - PASS\n"); + else + printf("test1 - FAIL\n"); + + /*******************TEST2*******************/ + if (test_block_size2() == 0) + printf("test2 - PASS\n"); + else + printf("test2 - FAIL\n"); + return 0; +} diff --git a/none/tests/mips64/unaligned_load.c b/none/tests/mips64/unaligned_load.c new file mode 100644 index 0000000000..7739d6c974 --- /dev/null +++ b/none/tests/mips64/unaligned_load.c @@ -0,0 +1,40 @@ +#include + +#define N 15 +#define SOLL 8 /* size of unsigned long long */ + +unsigned long long memSrc[] = { + 0x12345658121f1e1f, 0, + 3, -1, + 0x232f2e2f56568441, 0x242c2b2b1236548c, + 0xffffffff252a2e2b, 0x262d2d2a4521dddd, + 0x3f343f3e22222222, 0x3e353d3c41231548, + 0x363a3c3b45421212, 0x3b373b3a4545afcb, + 0x454f4e4556984525, 0xfffffffffffffffc, + 0x474d474c55aaaaaa, 0x4a484a4c65665659 +}; + +int main() +{ + int i, index; + unsigned long long outLoad; + for (i = 8; i < N * SOLL ; i++) { + outLoad = 0; + __asm__ __volatile__( + "move $t0, %1" "\n\t" + "move $t1, %2" "\n\t" + "daddu $t0, $t0, $t1" "\n\t" + "move $t1, $zero" "\n\t" + "ldl $t1, 0($t0)" "\n\t" + "ldr $t1, 7($t0)" "\n\t" + "move %0, $t1" "\n\t" + : "=r" (outLoad) + : "r" (memSrc), "r" (i) + : "t0", "t1" + ); + index = (i / SOLL) % N; + printf("i: %d, memSrc[%d]: 0x%llx, outLoad: 0x%llx\n", + i, index, memSrc[index], outLoad); + } + return 0; +}