From: Sasha Levin Date: Thu, 28 Sep 2023 20:55:25 +0000 (-0400) Subject: Fixes for 5.10 X-Git-Tag: v6.5.6~84 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=d81a463998369c393db52f30396033bfb7aa5d95;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.10 Signed-off-by: Sasha Levin --- diff --git a/queue-5.10/arm64-dts-qcom-sdm845-db845c-mark-cont-splash-memory.patch b/queue-5.10/arm64-dts-qcom-sdm845-db845c-mark-cont-splash-memory.patch new file mode 100644 index 00000000000..8b36e336110 --- /dev/null +++ b/queue-5.10/arm64-dts-qcom-sdm845-db845c-mark-cont-splash-memory.patch @@ -0,0 +1,58 @@ +From edf940766b105830f37ad2cd3ecc56dad21393b4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Jul 2023 18:57:19 +0530 +Subject: arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as + reserved + +From: Amit Pundir + +[ Upstream commit 110e70fccce4f22b53986ae797d665ffb1950aa6 ] + +Adding a reserved memory region for the framebuffer memory +(the splash memory region set up by the bootloader). + +It fixes a kernel panic (arm-smmu: Unhandled context fault +at this particular memory region) reported on DB845c running +v5.10.y. + +Cc: stable@vger.kernel.org # v5.10+ +Reviewed-by: Caleb Connolly +Signed-off-by: Amit Pundir +Acked-by: Krzysztof Kozlowski +Link: https://lore.kernel.org/r/20230726132719.2117369-2-amit.pundir@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +index 1e889ca932e41..67cd869de3528 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts ++++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +@@ -85,6 +85,14 @@ + }; + }; + ++ reserved-memory { ++ /* Cont splash region set up by the bootloader */ ++ cont_splash_mem: framebuffer@9d400000 { ++ reg = <0x0 0x9d400000 0x0 0x2400000>; ++ no-map; ++ }; ++ }; ++ + lt9611_1v8: lt9611-vdd18-regulator { + compatible = "regulator-fixed"; + regulator-name = "LT9611_1V8"; +@@ -482,6 +490,7 @@ + }; + + &mdss { ++ memory-region = <&cont_splash_mem>; + status = "okay"; + }; + +-- +2.40.1 + diff --git a/queue-5.10/ata-ahci-add-elkhart-lake-ahci-controller.patch b/queue-5.10/ata-ahci-add-elkhart-lake-ahci-controller.patch new file mode 100644 index 00000000000..d6840ab03b2 --- /dev/null +++ b/queue-5.10/ata-ahci-add-elkhart-lake-ahci-controller.patch @@ -0,0 +1,66 @@ +From 25f3e71b8235309533859aa080d22b88b793d03a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 29 Aug 2023 13:33:58 +0200 +Subject: ata: ahci: Add Elkhart Lake AHCI controller +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Werner Fischer + +[ Upstream commit 2a2df98ec592667927b5c1351afa6493ea125c9f ] + +Elkhart Lake is the successor of Apollo Lake and Gemini Lake. These +CPUs and their PCHs are used in mobile and embedded environments. + +With this patch I suggest that Elkhart Lake SATA controllers [1] should +use the default LPM policy for mobile chipsets. +The disadvantage of missing hot-plug support with this setting should +not be an issue, as those CPUs are used in embedded environments and +not in servers with hot-plug backplanes. + +We discovered that the Elkhart Lake SATA controllers have been missing +in ahci.c after a customer reported the throttling of his SATA SSD +after a short period of higher I/O. We determined the high temperature +of the SSD controller in idle mode as the root cause for that. + +Depending on the used SSD, we have seen up to 1.8 Watt lower system +idle power usage and up to 30°C lower SSD controller temperatures in +our tests, when we set med_power_with_dipm manually. I have provided a +table showing seven different SATA SSDs from ATP, Intel/Solidigm and +Samsung [2]. + +Intel lists a total of 3 SATA controller IDs (4B60, 4B62, 4B63) in [1] +for those mobile PCHs. +This commit just adds 0x4b63 as I do not have test systems with 0x4b60 +and 0x4b62 SATA controllers. +I have tested this patch with a system which uses 0x4b63 as SATA +controller. + +[1] https://sata-io.org/product/8803 +[2] https://www.thomas-krenn.com/en/wiki/SATA_Link_Power_Management#Example_LES_v4 + +Signed-off-by: Werner Fischer +Cc: stable@vger.kernel.org +Signed-off-by: Damien Le Moal +Signed-off-by: Sasha Levin +--- + drivers/ata/ahci.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c +index 547c0d8460e8b..4297a8d69dbf7 100644 +--- a/drivers/ata/ahci.c ++++ b/drivers/ata/ahci.c +@@ -425,6 +425,8 @@ static const struct pci_device_id ahci_pci_tbl[] = { + { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */ + { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */ + { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */ ++ /* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */ ++ { PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */ + + /* JMicron 360/1/3/5/6, match class to avoid IDE function */ + { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, +-- +2.40.1 + diff --git a/queue-5.10/ata-ahci-add-support-for-amd-a85-fch-hudson-d4.patch b/queue-5.10/ata-ahci-add-support-for-amd-a85-fch-hudson-d4.patch new file mode 100644 index 00000000000..e1359c32cb0 --- /dev/null +++ b/queue-5.10/ata-ahci-add-support-for-amd-a85-fch-hudson-d4.patch @@ -0,0 +1,64 @@ +From 3ffa7386198ac1d28d885c7f761b4899e3c4765f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Jan 2022 16:36:18 +0100 +Subject: ata: ahci: Add support for AMD A85 FCH (Hudson D4) + +From: Paul Menzel + +[ Upstream commit a17ab7aba5df4135ef77d7f6d7105e1ea414936f ] + +Add support for the AMD A85 FCH (Hudson D4) AHCI adapter. + +Since this adapter does not require the default 200 ms debounce delay +in sata_link_resume(), create a new board board_ahci_no_debounce_delay +with the link flag ATA_LFLAG_NO_DEBOUNCE_DELAY, and, for now, configure +the AMD A85 FCH (Hudson D4) to use it. On the ASUS F2A85-M PRO it +reduces the Linux kernel boot time by the expected 200 ms from 787 ms +to 585 ms. + +Signed-off-by: Paul Menzel +Cc: Tejun Heo +Signed-off-by: Damien Le Moal +Stable-dep-of: 2a2df98ec592 ("ata: ahci: Add Elkhart Lake AHCI controller") +Signed-off-by: Sasha Levin +--- + drivers/ata/ahci.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c +index d831a80c25f04..1a3608f4209ec 100644 +--- a/drivers/ata/ahci.c ++++ b/drivers/ata/ahci.c +@@ -51,6 +51,7 @@ enum board_ids { + board_ahci, + board_ahci_ign_iferr, + board_ahci_mobile, ++ board_ahci_no_debounce_delay, + board_ahci_nomsi, + board_ahci_noncq, + board_ahci_nosntf, +@@ -142,6 +143,13 @@ static const struct ata_port_info ahci_port_info[] = { + .udma_mask = ATA_UDMA6, + .port_ops = &ahci_ops, + }, ++ [board_ahci_no_debounce_delay] = { ++ .flags = AHCI_FLAG_COMMON, ++ .link_flags = ATA_LFLAG_NO_DEBOUNCE_DELAY, ++ .pio_mask = ATA_PIO4, ++ .udma_mask = ATA_UDMA6, ++ .port_ops = &ahci_ops, ++ }, + [board_ahci_nomsi] = { + AHCI_HFLAGS (AHCI_HFLAG_NO_MSI), + .flags = AHCI_FLAG_COMMON, +@@ -442,6 +450,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { + board_ahci_al }, + /* AMD */ + { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ ++ { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */ + { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */ + { PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */ + /* AMD is using RAID class only for ahci controllers */ +-- +2.40.1 + diff --git a/queue-5.10/ata-ahci-rename-board_ahci_mobile.patch b/queue-5.10/ata-ahci-rename-board_ahci_mobile.patch new file mode 100644 index 00000000000..16d37fe0e2d --- /dev/null +++ b/queue-5.10/ata-ahci-rename-board_ahci_mobile.patch @@ -0,0 +1,211 @@ +From 65f97e08a972712298c924c33d502a52c71e7634 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 25 Feb 2022 11:23:17 -0600 +Subject: ata: ahci: Rename board_ahci_mobile + +From: Mario Limonciello + +[ Upstream commit 099849af27f74981c7e660dd93ff6a987307c1f2 ] + +This board definition was originally created for mobile devices to +designate default link power managmeent policy to influence runtime +power consumption. + +As this is interesting for more than just mobile designs, rename the +board to `board_ahci_low_power` to make it clear it is about default +policy. + +Reviewed-by: Hans de Goede +Reviewed-by: Paul Menzel +Signed-off-by: Mario Limonciello +Signed-off-by: Damien Le Moal +Stable-dep-of: 2a2df98ec592 ("ata: ahci: Add Elkhart Lake AHCI controller") +Signed-off-by: Sasha Levin +--- + drivers/ata/ahci.c | 96 +++++++++++++++++++++++----------------------- + 1 file changed, 48 insertions(+), 48 deletions(-) + +diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c +index 1a3608f4209ec..547c0d8460e8b 100644 +--- a/drivers/ata/ahci.c ++++ b/drivers/ata/ahci.c +@@ -50,7 +50,7 @@ enum board_ids { + /* board IDs by feature in alphabetical order */ + board_ahci, + board_ahci_ign_iferr, +- board_ahci_mobile, ++ board_ahci_low_power, + board_ahci_no_debounce_delay, + board_ahci_nomsi, + board_ahci_noncq, +@@ -136,7 +136,7 @@ static const struct ata_port_info ahci_port_info[] = { + .udma_mask = ATA_UDMA6, + .port_ops = &ahci_ops, + }, +- [board_ahci_mobile] = { ++ [board_ahci_low_power] = { + AHCI_HFLAGS (AHCI_HFLAG_IS_MOBILE), + .flags = AHCI_FLAG_COMMON, + .pio_mask = ATA_PIO4, +@@ -276,13 +276,13 @@ static const struct pci_device_id ahci_pci_tbl[] = { + { PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */ + { PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */ + { PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */ +- { PCI_VDEVICE(INTEL, 0x2929), board_ahci_mobile }, /* ICH9M */ +- { PCI_VDEVICE(INTEL, 0x292a), board_ahci_mobile }, /* ICH9M */ +- { PCI_VDEVICE(INTEL, 0x292b), board_ahci_mobile }, /* ICH9M */ +- { PCI_VDEVICE(INTEL, 0x292c), board_ahci_mobile }, /* ICH9M */ +- { PCI_VDEVICE(INTEL, 0x292f), board_ahci_mobile }, /* ICH9M */ ++ { PCI_VDEVICE(INTEL, 0x2929), board_ahci_low_power }, /* ICH9M */ ++ { PCI_VDEVICE(INTEL, 0x292a), board_ahci_low_power }, /* ICH9M */ ++ { PCI_VDEVICE(INTEL, 0x292b), board_ahci_low_power }, /* ICH9M */ ++ { PCI_VDEVICE(INTEL, 0x292c), board_ahci_low_power }, /* ICH9M */ ++ { PCI_VDEVICE(INTEL, 0x292f), board_ahci_low_power }, /* ICH9M */ + { PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */ +- { PCI_VDEVICE(INTEL, 0x294e), board_ahci_mobile }, /* ICH9M */ ++ { PCI_VDEVICE(INTEL, 0x294e), board_ahci_low_power }, /* ICH9M */ + { PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */ + { PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */ + { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */ +@@ -292,9 +292,9 @@ static const struct pci_device_id ahci_pci_tbl[] = { + { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */ + { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */ + { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */ +- { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_mobile }, /* PCH M AHCI */ ++ { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */ + { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ +- { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_mobile }, /* PCH M RAID */ ++ { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_low_power }, /* PCH M RAID */ + { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ + { PCI_VDEVICE(INTEL, 0x19b0), board_ahci_pcs7 }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19b1), board_ahci_pcs7 }, /* DNV AHCI */ +@@ -317,9 +317,9 @@ static const struct pci_device_id ahci_pci_tbl[] = { + { PCI_VDEVICE(INTEL, 0x19cE), board_ahci_pcs7 }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19cF), board_ahci_pcs7 }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */ +- { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_mobile }, /* CPT M AHCI */ ++ { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_low_power }, /* CPT M AHCI */ + { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */ +- { PCI_VDEVICE(INTEL, 0x1c05), board_ahci_mobile }, /* CPT M RAID */ ++ { PCI_VDEVICE(INTEL, 0x1c05), board_ahci_low_power }, /* CPT M RAID */ + { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */ + { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */ + { PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */ +@@ -328,29 +328,29 @@ static const struct pci_device_id ahci_pci_tbl[] = { + { PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG RAID */ + { PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */ + { PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */ +- { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_mobile }, /* Panther M AHCI */ ++ { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_low_power }, /* Panther M AHCI */ + { PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */ + { PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */ + { PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */ +- { PCI_VDEVICE(INTEL, 0x1e07), board_ahci_mobile }, /* Panther M RAID */ ++ { PCI_VDEVICE(INTEL, 0x1e07), board_ahci_low_power }, /* Panther M RAID */ + { PCI_VDEVICE(INTEL, 0x1e0e), board_ahci }, /* Panther Point RAID */ + { PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */ +- { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_mobile }, /* Lynx M AHCI */ ++ { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_low_power }, /* Lynx M AHCI */ + { PCI_VDEVICE(INTEL, 0x8c04), board_ahci }, /* Lynx Point RAID */ +- { PCI_VDEVICE(INTEL, 0x8c05), board_ahci_mobile }, /* Lynx M RAID */ ++ { PCI_VDEVICE(INTEL, 0x8c05), board_ahci_low_power }, /* Lynx M RAID */ + { PCI_VDEVICE(INTEL, 0x8c06), board_ahci }, /* Lynx Point RAID */ +- { PCI_VDEVICE(INTEL, 0x8c07), board_ahci_mobile }, /* Lynx M RAID */ ++ { PCI_VDEVICE(INTEL, 0x8c07), board_ahci_low_power }, /* Lynx M RAID */ + { PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */ +- { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_mobile }, /* Lynx M RAID */ +- { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_mobile }, /* Lynx LP AHCI */ +- { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_mobile }, /* Lynx LP AHCI */ +- { PCI_VDEVICE(INTEL, 0x9c04), board_ahci_mobile }, /* Lynx LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9c05), board_ahci_mobile }, /* Lynx LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9c06), board_ahci_mobile }, /* Lynx LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9c07), board_ahci_mobile }, /* Lynx LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_mobile }, /* Lynx LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_mobile }, /* Lynx LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_mobile }, /* Cannon Lake PCH-LP AHCI */ ++ { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_low_power }, /* Lynx M RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_low_power }, /* Lynx LP AHCI */ ++ { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_low_power }, /* Lynx LP AHCI */ ++ { PCI_VDEVICE(INTEL, 0x9c04), board_ahci_low_power }, /* Lynx LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c05), board_ahci_low_power }, /* Lynx LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c06), board_ahci_low_power }, /* Lynx LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c07), board_ahci_low_power }, /* Lynx LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_low_power }, /* Lynx LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_low_power }, /* Lynx LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_low_power }, /* Cannon Lake PCH-LP AHCI */ + { PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */ + { PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */ + { PCI_VDEVICE(INTEL, 0x1f24), board_ahci }, /* Avoton RAID */ +@@ -382,26 +382,26 @@ static const struct pci_device_id ahci_pci_tbl[] = { + { PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */ + { PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */ + { PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */ +- { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_mobile }, /* Wildcat LP AHCI */ +- { PCI_VDEVICE(INTEL, 0x9c85), board_ahci_mobile }, /* Wildcat LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9c87), board_ahci_mobile }, /* Wildcat LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_mobile }, /* Wildcat LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_low_power }, /* Wildcat LP AHCI */ ++ { PCI_VDEVICE(INTEL, 0x9c85), board_ahci_low_power }, /* Wildcat LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c87), board_ahci_low_power }, /* Wildcat LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_low_power }, /* Wildcat LP RAID */ + { PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */ +- { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_mobile }, /* 9 Series M AHCI */ ++ { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_low_power }, /* 9 Series M AHCI */ + { PCI_VDEVICE(INTEL, 0x8c84), board_ahci }, /* 9 Series RAID */ +- { PCI_VDEVICE(INTEL, 0x8c85), board_ahci_mobile }, /* 9 Series M RAID */ ++ { PCI_VDEVICE(INTEL, 0x8c85), board_ahci_low_power }, /* 9 Series M RAID */ + { PCI_VDEVICE(INTEL, 0x8c86), board_ahci }, /* 9 Series RAID */ +- { PCI_VDEVICE(INTEL, 0x8c87), board_ahci_mobile }, /* 9 Series M RAID */ ++ { PCI_VDEVICE(INTEL, 0x8c87), board_ahci_low_power }, /* 9 Series M RAID */ + { PCI_VDEVICE(INTEL, 0x8c8e), board_ahci }, /* 9 Series RAID */ +- { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_mobile }, /* 9 Series M RAID */ +- { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_mobile }, /* Sunrise LP AHCI */ +- { PCI_VDEVICE(INTEL, 0x9d05), board_ahci_mobile }, /* Sunrise LP RAID */ +- { PCI_VDEVICE(INTEL, 0x9d07), board_ahci_mobile }, /* Sunrise LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_low_power }, /* 9 Series M RAID */ ++ { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_low_power }, /* Sunrise LP AHCI */ ++ { PCI_VDEVICE(INTEL, 0x9d05), board_ahci_low_power }, /* Sunrise LP RAID */ ++ { PCI_VDEVICE(INTEL, 0x9d07), board_ahci_low_power }, /* Sunrise LP RAID */ + { PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */ +- { PCI_VDEVICE(INTEL, 0xa103), board_ahci_mobile }, /* Sunrise M AHCI */ ++ { PCI_VDEVICE(INTEL, 0xa103), board_ahci_low_power }, /* Sunrise M AHCI */ + { PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */ + { PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */ +- { PCI_VDEVICE(INTEL, 0xa107), board_ahci_mobile }, /* Sunrise M RAID */ ++ { PCI_VDEVICE(INTEL, 0xa107), board_ahci_low_power }, /* Sunrise M RAID */ + { PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */ + { PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* Lewisburg RAID*/ + { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Lewisburg AHCI*/ +@@ -418,13 +418,13 @@ static const struct pci_device_id ahci_pci_tbl[] = { + { PCI_VDEVICE(INTEL, 0xa356), board_ahci }, /* Cannon Lake PCH-H RAID */ + { PCI_VDEVICE(INTEL, 0x06d7), board_ahci }, /* Comet Lake-H RAID */ + { PCI_VDEVICE(INTEL, 0xa386), board_ahci }, /* Comet Lake PCH-V RAID */ +- { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_mobile }, /* Bay Trail AHCI */ +- { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_mobile }, /* Bay Trail AHCI */ +- { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */ +- { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */ +- { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */ +- { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_mobile }, /* Comet Lake PCH-U AHCI */ +- { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_mobile }, /* Comet Lake PCH RAID */ ++ { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_low_power }, /* Bay Trail AHCI */ ++ { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_low_power }, /* Bay Trail AHCI */ ++ { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_low_power }, /* Cherry Tr. AHCI */ ++ { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_low_power }, /* ApolloLake AHCI */ ++ { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */ ++ { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */ ++ { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */ + + /* JMicron 360/1/3/5/6, match class to avoid IDE function */ + { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, +@@ -452,7 +452,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { + { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ + { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */ + { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */ +- { PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */ ++ { PCI_VDEVICE(AMD, 0x7901), board_ahci_low_power }, /* AMD Green Sardine */ + /* AMD is using RAID class only for ahci controllers */ + { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, + PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci }, +-- +2.40.1 + diff --git a/queue-5.10/ata-libata-rename-link-flag-ata_lflag_no_db_delay.patch b/queue-5.10/ata-libata-rename-link-flag-ata_lflag_no_db_delay.patch new file mode 100644 index 00000000000..f73d90524e0 --- /dev/null +++ b/queue-5.10/ata-libata-rename-link-flag-ata_lflag_no_db_delay.patch @@ -0,0 +1,64 @@ +From 08bc5cb8f2f26a8d3388ed2fa8b97a275f6c9e60 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Jan 2022 16:36:16 +0100 +Subject: ata: libata: Rename link flag ATA_LFLAG_NO_DB_DELAY + +From: Paul Menzel + +[ Upstream commit b9ba367c513dbc165dd6c01266a59db4be2a3564 ] + +Rename the link flag ATA_LFLAG_NO_DB_DELAY to +ATA_LFLAG_NO_DEBOUNCE_DELAY. The new name is longer, but clearer. + +Signed-off-by: Paul Menzel +Signed-off-by: Damien Le Moal +Stable-dep-of: 2a2df98ec592 ("ata: ahci: Add Elkhart Lake AHCI controller") +Signed-off-by: Sasha Levin +--- + drivers/ata/ahci_brcm.c | 2 +- + drivers/ata/libata-sata.c | 2 +- + include/linux/libata.h | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/ata/ahci_brcm.c b/drivers/ata/ahci_brcm.c +index 5b32df5d33adc..2e4252545fd27 100644 +--- a/drivers/ata/ahci_brcm.c ++++ b/drivers/ata/ahci_brcm.c +@@ -332,7 +332,7 @@ static struct ata_port_operations ahci_brcm_platform_ops = { + + static const struct ata_port_info ahci_brcm_port_info = { + .flags = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM, +- .link_flags = ATA_LFLAG_NO_DB_DELAY, ++ .link_flags = ATA_LFLAG_NO_DEBOUNCE_DELAY, + .pio_mask = ATA_PIO4, + .udma_mask = ATA_UDMA6, + .port_ops = &ahci_brcm_platform_ops, +diff --git a/drivers/ata/libata-sata.c b/drivers/ata/libata-sata.c +index 4fd9a107fe7f8..45656067c547a 100644 +--- a/drivers/ata/libata-sata.c ++++ b/drivers/ata/libata-sata.c +@@ -317,7 +317,7 @@ int sata_link_resume(struct ata_link *link, const unsigned long *params, + * immediately after resuming. Delay 200ms before + * debouncing. + */ +- if (!(link->flags & ATA_LFLAG_NO_DB_DELAY)) ++ if (!(link->flags & ATA_LFLAG_NO_DEBOUNCE_DELAY)) + ata_msleep(link->ap, 200); + + /* is SControl restored correctly? */ +diff --git a/include/linux/libata.h b/include/linux/libata.h +index 5ca9347bd8ef9..2de6b4a613944 100644 +--- a/include/linux/libata.h ++++ b/include/linux/libata.h +@@ -187,7 +187,7 @@ enum { + ATA_LFLAG_NO_LPM = (1 << 8), /* disable LPM on this link */ + ATA_LFLAG_RST_ONCE = (1 << 9), /* limit recovery to one reset */ + ATA_LFLAG_CHANGED = (1 << 10), /* LPM state changed on this link */ +- ATA_LFLAG_NO_DB_DELAY = (1 << 11), /* no debounce delay on link resume */ ++ ATA_LFLAG_NO_DEBOUNCE_DELAY = (1 << 11), /* no debounce delay on link resume */ + + /* struct ata_port flags */ + ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */ +-- +2.40.1 + diff --git a/queue-5.10/bpf-fix-issue-in-verifying-allow_ptr_leaks.patch b/queue-5.10/bpf-fix-issue-in-verifying-allow_ptr_leaks.patch new file mode 100644 index 00000000000..8589d7e236e --- /dev/null +++ b/queue-5.10/bpf-fix-issue-in-verifying-allow_ptr_leaks.patch @@ -0,0 +1,95 @@ +From 80ab7ec37d80ac93467aa9fadb8912c2d15155b5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 23 Aug 2023 02:07:02 +0000 +Subject: bpf: Fix issue in verifying allow_ptr_leaks + +From: Yafang Shao + +[ Upstream commit d75e30dddf73449bc2d10bb8e2f1a2c446bc67a2 ] + +After we converted the capabilities of our networking-bpf program from +cap_sys_admin to cap_net_admin+cap_bpf, our networking-bpf program +failed to start. Because it failed the bpf verifier, and the error log +is "R3 pointer comparison prohibited". + +A simple reproducer as follows, + +SEC("cls-ingress") +int ingress(struct __sk_buff *skb) +{ + struct iphdr *iph = (void *)(long)skb->data + sizeof(struct ethhdr); + + if ((long)(iph + 1) > (long)skb->data_end) + return TC_ACT_STOLEN; + return TC_ACT_OK; +} + +Per discussion with Yonghong and Alexei [1], comparison of two packet +pointers is not a pointer leak. This patch fixes it. + +Our local kernel is 6.1.y and we expect this fix to be backported to +6.1.y, so stable is CCed. + +[1]. https://lore.kernel.org/bpf/CAADnVQ+Nmspr7Si+pxWn8zkE7hX-7s93ugwC+94aXSy4uQ9vBg@mail.gmail.com/ + +Suggested-by: Yonghong Song +Suggested-by: Alexei Starovoitov +Signed-off-by: Yafang Shao +Acked-by: Eduard Zingerman +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20230823020703.3790-2-laoar.shao@gmail.com +Signed-off-by: Alexei Starovoitov +Signed-off-by: Sasha Levin +--- + kernel/bpf/verifier.c | 17 +++++++++-------- + 1 file changed, 9 insertions(+), 8 deletions(-) + +diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c +index 8f1e43df8c5fa..3fb6f6e4857a0 100644 +--- a/kernel/bpf/verifier.c ++++ b/kernel/bpf/verifier.c +@@ -8178,6 +8178,12 @@ static int check_cond_jmp_op(struct bpf_verifier_env *env, + return -EINVAL; + } + ++ /* check src2 operand */ ++ err = check_reg_arg(env, insn->dst_reg, SRC_OP); ++ if (err) ++ return err; ++ ++ dst_reg = ®s[insn->dst_reg]; + if (BPF_SRC(insn->code) == BPF_X) { + if (insn->imm != 0) { + verbose(env, "BPF_JMP/JMP32 uses reserved fields\n"); +@@ -8189,12 +8195,13 @@ static int check_cond_jmp_op(struct bpf_verifier_env *env, + if (err) + return err; + +- if (is_pointer_value(env, insn->src_reg)) { ++ src_reg = ®s[insn->src_reg]; ++ if (!(reg_is_pkt_pointer_any(dst_reg) && reg_is_pkt_pointer_any(src_reg)) && ++ is_pointer_value(env, insn->src_reg)) { + verbose(env, "R%d pointer comparison prohibited\n", + insn->src_reg); + return -EACCES; + } +- src_reg = ®s[insn->src_reg]; + } else { + if (insn->src_reg != BPF_REG_0) { + verbose(env, "BPF_JMP/JMP32 uses reserved fields\n"); +@@ -8202,12 +8209,6 @@ static int check_cond_jmp_op(struct bpf_verifier_env *env, + } + } + +- /* check src2 operand */ +- err = check_reg_arg(env, insn->dst_reg, SRC_OP); +- if (err) +- return err; +- +- dst_reg = ®s[insn->dst_reg]; + is_jmp32 = BPF_CLASS(insn->code) == BPF_JMP32; + + if (BPF_SRC(insn->code) == BPF_K) { +-- +2.40.1 + diff --git a/queue-5.10/input-i8042-add-quirk-for-tuxedo-gemini-17-gen1-clev.patch b/queue-5.10/input-i8042-add-quirk-for-tuxedo-gemini-17-gen1-clev.patch new file mode 100644 index 00000000000..71a61df9015 --- /dev/null +++ b/queue-5.10/input-i8042-add-quirk-for-tuxedo-gemini-17-gen1-clev.patch @@ -0,0 +1,50 @@ +From 197c1aec873af22aad2b81c2f9c1f6e02a8ed50e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jul 2023 11:56:51 -0700 +Subject: Input: i8042 - add quirk for TUXEDO Gemini 17 Gen1/Clevo PD70PN + +From: Werner Sembach + +[ Upstream commit eb09074bdb05ffd6bfe77f8b4a41b76ef78c997b ] + +The touchpad of this device is both connected via PS/2 and i2c. This causes +strange behavior when both driver fight for control. The easy fix is to +prevent the PS/2 driver from accessing the mouse port as the full feature +set of the touchpad is only supported in the i2c interface anyway. + +The strange behavior in this case is, that when an external screen is +connected and the notebook is closed, the pointer on the external screen is +moving to the lower right corner. When the notebook is opened again, this +movement stops, but the touchpad clicks are unresponsive afterwards until +reboot. + +Signed-off-by: Werner Sembach +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20230607173331.851192-1-wse@tuxedocomputers.com +Signed-off-by: Dmitry Torokhov +Signed-off-by: Sasha Levin +--- + drivers/input/serio/i8042-acpipnpio.h | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/input/serio/i8042-acpipnpio.h b/drivers/input/serio/i8042-acpipnpio.h +index ced72b45aedc8..1bd5898abb97d 100644 +--- a/drivers/input/serio/i8042-acpipnpio.h ++++ b/drivers/input/serio/i8042-acpipnpio.h +@@ -1184,6 +1184,13 @@ static const struct dmi_system_id i8042_dmi_quirk_table[] __initconst = { + .driver_data = (void *)(SERIO_QUIRK_NOMUX | SERIO_QUIRK_RESET_ALWAYS | + SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP) + }, ++ /* See comment on TUXEDO InfinityBook S17 Gen6 / Clevo NS70MU above */ ++ { ++ .matches = { ++ DMI_MATCH(DMI_BOARD_NAME, "PD5x_7xPNP_PNR_PNN_PNT"), ++ }, ++ .driver_data = (void *)(SERIO_QUIRK_NOAUX) ++ }, + { + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "X170SM"), +-- +2.40.1 + diff --git a/queue-5.10/input-i8042-rename-i8042-x86ia64io.h-to-i8042-acpipn.patch b/queue-5.10/input-i8042-rename-i8042-x86ia64io.h-to-i8042-acpipn.patch new file mode 100644 index 00000000000..17a300a0a46 --- /dev/null +++ b/queue-5.10/input-i8042-rename-i8042-x86ia64io.h-to-i8042-acpipn.patch @@ -0,0 +1,64 @@ +From a370b99f3f290ba820839ae20cfa61cb4279169c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 1 Oct 2022 14:28:34 -0700 +Subject: Input: i8042 - rename i8042-x86ia64io.h to i8042-acpipnpio.h + +From: Huacai Chen + +[ Upstream commit 8761b9b580d53162cca7868385069c0d4354c9e0 ] + +Now i8042-x86ia64io.h is shared by X86 and IA64, but it can be shared +by more platforms (such as LoongArch) with ACPI firmware on which PNP +typed keyboard and mouse is configured in DSDT. So rename it to i8042- +acpipnpio.h. + +Signed-off-by: Huacai Chen +Reviewed-by: Mattijs Korpershoek +Link: https://lore.kernel.org/r/20220917064020.1639709-1-chenhuacai@loongson.cn +Signed-off-by: Dmitry Torokhov +Stable-dep-of: eb09074bdb05 ("Input: i8042 - add quirk for TUXEDO Gemini 17 Gen1/Clevo PD70PN") +Signed-off-by: Sasha Levin +--- + .../input/serio/{i8042-x86ia64io.h => i8042-acpipnpio.h} | 6 +++--- + drivers/input/serio/i8042.h | 2 +- + 2 files changed, 4 insertions(+), 4 deletions(-) + rename drivers/input/serio/{i8042-x86ia64io.h => i8042-acpipnpio.h} (99%) + +diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-acpipnpio.h +similarity index 99% +rename from drivers/input/serio/i8042-x86ia64io.h +rename to drivers/input/serio/i8042-acpipnpio.h +index 9dcdf21c50bdc..ced72b45aedc8 100644 +--- a/drivers/input/serio/i8042-x86ia64io.h ++++ b/drivers/input/serio/i8042-acpipnpio.h +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0-only */ +-#ifndef _I8042_X86IA64IO_H +-#define _I8042_X86IA64IO_H ++#ifndef _I8042_ACPIPNPIO_H ++#define _I8042_ACPIPNPIO_H + + + #ifdef CONFIG_X86 +@@ -1587,4 +1587,4 @@ static inline void i8042_platform_exit(void) + i8042_pnp_exit(); + } + +-#endif /* _I8042_X86IA64IO_H */ ++#endif /* _I8042_ACPIPNPIO_H */ +diff --git a/drivers/input/serio/i8042.h b/drivers/input/serio/i8042.h +index 55381783dc82d..bf2592fa9a783 100644 +--- a/drivers/input/serio/i8042.h ++++ b/drivers/input/serio/i8042.h +@@ -20,7 +20,7 @@ + #elif defined(CONFIG_SPARC) + #include "i8042-sparcio.h" + #elif defined(CONFIG_X86) || defined(CONFIG_IA64) +-#include "i8042-x86ia64io.h" ++#include "i8042-acpipnpio.h" + #else + #include "i8042-io.h" + #endif +-- +2.40.1 + diff --git a/queue-5.10/media-venus-core-add-differentiator-is_v6-core.patch b/queue-5.10/media-venus-core-add-differentiator-is_v6-core.patch new file mode 100644 index 00000000000..4b2301f8d3c --- /dev/null +++ b/queue-5.10/media-venus-core-add-differentiator-is_v6-core.patch @@ -0,0 +1,36 @@ +From f6a28f5dde0f35322ebc8c3f3523104f049cb95f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Apr 2021 12:06:31 +0200 +Subject: media: venus: core: Add differentiator IS_V6(core) + +From: Bryan O'Donoghue + +[ Upstream commit ff027906308fcda1661e05beac6abdcbe2b93f6d ] + +This commit adds the macro helper IS_V6() which will be used to +differentiate iris2/v6 silicon from previous versions. + +Signed-off-by: Bryan O'Donoghue +Signed-off-by: Stanimir Varbanov +Signed-off-by: Mauro Carvalho Chehab +Stable-dep-of: d74e48160980 ("media: venus: hfi_venus: Write to VIDC_CTRL_INIT after unmasking interrupts") +Signed-off-by: Sasha Levin +--- + drivers/media/platform/qcom/venus/core.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h +index 50eb0a9fb1347..75d0068033276 100644 +--- a/drivers/media/platform/qcom/venus/core.h ++++ b/drivers/media/platform/qcom/venus/core.h +@@ -426,6 +426,7 @@ struct venus_inst { + #define IS_V1(core) ((core)->res->hfi_version == HFI_VERSION_1XX) + #define IS_V3(core) ((core)->res->hfi_version == HFI_VERSION_3XX) + #define IS_V4(core) ((core)->res->hfi_version == HFI_VERSION_4XX) ++#define IS_V6(core) ((core)->res->hfi_version == HFI_VERSION_6XX) + + #define ctrl_to_inst(ctrl) \ + container_of((ctrl)->handler, struct venus_inst, ctrl_handler) +-- +2.40.1 + diff --git a/queue-5.10/media-venus-core-add-io-base-variables-for-each-bloc.patch b/queue-5.10/media-venus-core-add-io-base-variables-for-each-bloc.patch new file mode 100644 index 00000000000..c272d83b4e1 --- /dev/null +++ b/queue-5.10/media-venus-core-add-io-base-variables-for-each-bloc.patch @@ -0,0 +1,94 @@ +From 69e3e8cc93512ee8048d5b67340ea9c64acb94a9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Apr 2021 12:06:27 +0200 +Subject: media: venus: core: Add io base variables for each block + +From: Bryan O'Donoghue + +[ Upstream commit b4053a2097ec2f8ea622e817ae5a46a83b23aefe ] + +New silicon means that the pre-determined offsets we have been using +in this driver no longer hold. Existing blocks of registers can exist at +different offsets relative to the IO base address. + +This commit adds a routine to assign the IO base hooks a subsequent commit +will convert from absolute to relative addressing. + +Signed-off-by: Bryan O'Donoghue +Signed-off-by: Stanimir Varbanov +Signed-off-by: Mauro Carvalho Chehab +Stable-dep-of: d74e48160980 ("media: venus: hfi_venus: Write to VIDC_CTRL_INIT after unmasking interrupts") +Signed-off-by: Sasha Levin +--- + drivers/media/platform/qcom/venus/core.c | 12 ++++++++++++ + drivers/media/platform/qcom/venus/core.h | 10 ++++++++++ + 2 files changed, 22 insertions(+) + +diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c +index 62d11c6e41d60..5f7ac2807e5f4 100644 +--- a/drivers/media/platform/qcom/venus/core.c ++++ b/drivers/media/platform/qcom/venus/core.c +@@ -21,6 +21,7 @@ + #include "core.h" + #include "firmware.h" + #include "pm_helpers.h" ++#include "hfi_venus_io.h" + + static void venus_event_notify(struct venus_core *core, u32 event) + { +@@ -210,6 +211,15 @@ static int venus_enumerate_codecs(struct venus_core *core, u32 type) + return ret; + } + ++static void venus_assign_register_offsets(struct venus_core *core) ++{ ++ core->vbif_base = core->base + VBIF_BASE; ++ core->cpu_base = core->base + CPU_BASE; ++ core->cpu_cs_base = core->base + CPU_CS_BASE; ++ core->cpu_ic_base = core->base + CPU_IC_BASE; ++ core->wrapper_base = core->base + WRAPPER_BASE; ++} ++ + static int venus_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; +@@ -276,6 +286,8 @@ static int venus_probe(struct platform_device *pdev) + if (ret) + goto err_core_put; + ++ venus_assign_register_offsets(core); ++ + ret = v4l2_device_register(dev, &core->v4l2_dev); + if (ret) + goto err_core_deinit; +diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h +index aebd4c664bfa1..50eb0a9fb1347 100644 +--- a/drivers/media/platform/qcom/venus/core.h ++++ b/drivers/media/platform/qcom/venus/core.h +@@ -119,6 +119,11 @@ struct venus_caps { + * struct venus_core - holds core parameters valid for all instances + * + * @base: IO memory base address ++ * @vbif_base IO memory vbif base address ++ * @cpu_base IO memory cpu base address ++ * @cpu_cs_base IO memory cpu_cs base address ++ * @cpu_ic_base IO memory cpu_ic base address ++ * @wrapper_base IO memory wrapper base address + * @irq: Venus irq + * @clks: an array of struct clk pointers + * @vcodec0_clks: an array of vcodec0 struct clk pointers +@@ -152,6 +157,11 @@ struct venus_caps { + */ + struct venus_core { + void __iomem *base; ++ void __iomem *vbif_base; ++ void __iomem *cpu_base; ++ void __iomem *cpu_cs_base; ++ void __iomem *cpu_ic_base; ++ void __iomem *wrapper_base; + int irq; + struct clk *clks[VIDC_CLKS_NUM_MAX]; + struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX]; +-- +2.40.1 + diff --git a/queue-5.10/media-venus-hfi-add-a-6xx-boot-logic.patch b/queue-5.10/media-venus-hfi-add-a-6xx-boot-logic.patch new file mode 100644 index 00000000000..aa6243f3a42 --- /dev/null +++ b/queue-5.10/media-venus-hfi-add-a-6xx-boot-logic.patch @@ -0,0 +1,70 @@ +From 8c409c64f952ba2e327fcdbfc6bf395a0fcb787c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Apr 2021 12:06:35 +0200 +Subject: media: venus: hfi: Add a 6xx boot logic + +From: Dikshita Agarwal + +[ Upstream commit 255385ca433ce5ff621732f26a759211a27c8f85 ] + +This patch adds a 6xx specific boot logic. The goal is to share as much +code as possible between 3xx, 4xx and 6xx silicon. + +We need to do a different write to WRAPPER_INTR_MASK with an additional +write to CPU_CS_H2XSOFTINTEN_V6 and CPU_CS_X2RPMh_V6. + +The other writes are the same for 6xx and non-6xx silicon albeit at +different absolute relative locations to the base of the venus address +space. + +Signed-off-by: Dikshita Agarwal +Signed-off-by: Bryan O'Donoghue +Signed-off-by: Stanimir Varbanov +Signed-off-by: Mauro Carvalho Chehab +Stable-dep-of: d74e48160980 ("media: venus: hfi_venus: Write to VIDC_CTRL_INIT after unmasking interrupts") +Signed-off-by: Sasha Levin +--- + drivers/media/platform/qcom/venus/hfi_venus.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c +index 3d705fc5e1093..97d36cafd8cb2 100644 +--- a/drivers/media/platform/qcom/venus/hfi_venus.c ++++ b/drivers/media/platform/qcom/venus/hfi_venus.c +@@ -431,14 +431,21 @@ static int venus_boot_core(struct venus_hfi_device *hdev) + { + struct device *dev = hdev->core->dev; + static const unsigned int max_tries = 100; +- u32 ctrl_status = 0; ++ u32 ctrl_status = 0, mask_val; + unsigned int count = 0; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + void __iomem *wrapper_base = hdev->core->wrapper_base; + int ret = 0; + + writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT); +- writel(WRAPPER_INTR_MASK_A2HVCODEC_MASK, wrapper_base + WRAPPER_INTR_MASK); ++ if (IS_V6(hdev->core)) { ++ mask_val = readl(wrapper_base + WRAPPER_INTR_MASK); ++ mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BASK_V6 | ++ WRAPPER_INTR_MASK_A2HCPU_MASK); ++ } else { ++ mask_val = WRAPPER_INTR_MASK_A2HVCODEC_MASK; ++ } ++ writel(mask_val, wrapper_base + WRAPPER_INTR_MASK); + writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3); + + while (!ctrl_status && count < max_tries) { +@@ -456,6 +463,9 @@ static int venus_boot_core(struct venus_hfi_device *hdev) + if (count >= max_tries) + ret = -ETIMEDOUT; + ++ if (IS_V6(hdev->core)) ++ writel(0x0, cpu_cs_base + CPU_CS_X2RPMH_V6); ++ + return ret; + } + +-- +2.40.1 + diff --git a/queue-5.10/media-venus-hfi-define-additional-6xx-registers.patch b/queue-5.10/media-venus-hfi-define-additional-6xx-registers.patch new file mode 100644 index 00000000000..09b163e0aef --- /dev/null +++ b/queue-5.10/media-venus-hfi-define-additional-6xx-registers.patch @@ -0,0 +1,95 @@ +From 2b185499b368d068471a6d295c769a6bae30da45 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Apr 2021 12:06:30 +0200 +Subject: media: venus: hfi: Define additional 6xx registers + +From: Dikshita Agarwal + +[ Upstream commit 7f6631295f46070ee5cdbe939136ce48cc617272 ] + +- Add X2 RPMh registers and definitions from the downstream example. +- Add 6xx core power definitions +- Add 6xx AON definitions +- Add 6xx wrapper tz definitions +- Add 6xx wrapper interrupt definitions +- Add 6xx soft interrupt definitions +- Define wrapper LPI register offsets + +Signed-off-by: Dikshita Agarwal +Co-developed-by: Bryan O'Donoghue +Signed-off-by: Bryan O'Donoghue +Signed-off-by: Stanimir Varbanov +Signed-off-by: Mauro Carvalho Chehab +Stable-dep-of: d74e48160980 ("media: venus: hfi_venus: Write to VIDC_CTRL_INIT after unmasking interrupts") +Signed-off-by: Sasha Levin +--- + .../media/platform/qcom/venus/hfi_venus_io.h | 30 +++++++++++++++++++ + 1 file changed, 30 insertions(+) + +diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h +index 4c392b67252c2..9cad15eac9e80 100644 +--- a/drivers/media/platform/qcom/venus/hfi_venus_io.h ++++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h +@@ -53,10 +53,22 @@ + #define UC_REGION_ADDR 0x64 + #define UC_REGION_SIZE 0x68 + ++#define CPU_CS_H2XSOFTINTEN_V6 0x148 ++ ++#define CPU_CS_X2RPMH_V6 0x168 ++#define CPU_CS_X2RPMH_MASK0_BMSK_V6 0x1 ++#define CPU_CS_X2RPMH_MASK0_SHFT_V6 0x0 ++#define CPU_CS_X2RPMH_MASK1_BMSK_V6 0x2 ++#define CPU_CS_X2RPMH_MASK1_SHFT_V6 0x1 ++#define CPU_CS_X2RPMH_SWOVERRIDE_BMSK_V6 0x4 ++#define CPU_CS_X2RPMH_SWOVERRIDE_SHFT_V6 0x3 ++ + /* Relative to CPU_IC_BASE */ + #define CPU_IC_SOFTINT 0x18 ++#define CPU_IC_SOFTINT_V6 0x150 + #define CPU_IC_SOFTINT_H2A_MASK 0x8000 + #define CPU_IC_SOFTINT_H2A_SHIFT 0xf ++#define CPU_IC_SOFTINT_H2A_SHIFT_V6 0x0 + + /* Venus wrapper */ + #define WRAPPER_BASE 0x000e0000 +@@ -84,6 +96,9 @@ + #define WRAPPER_INTR_MASK_A2HCPU_MASK 0x4 + #define WRAPPER_INTR_MASK_A2HCPU_SHIFT 0x2 + ++#define WRAPPER_INTR_STATUS_A2HWD_MASK_V6 0x8 ++#define WRAPPER_INTR_MASK_A2HWD_BASK_V6 0x8 ++ + #define WRAPPER_INTR_CLEAR 0x14 + #define WRAPPER_INTR_CLEAR_A2HWD_MASK 0x10 + #define WRAPPER_INTR_CLEAR_A2HWD_SHIFT 0x4 +@@ -93,6 +108,8 @@ + #define WRAPPER_POWER_STATUS 0x44 + #define WRAPPER_VDEC_VCODEC_POWER_CONTROL 0x48 + #define WRAPPER_VENC_VCODEC_POWER_CONTROL 0x4c ++#define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6 0x54 ++#define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6 0x58 + #define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64 + + #define WRAPPER_CPU_CLOCK_CONFIG 0x2000 +@@ -121,4 +138,17 @@ + #define WRAPPER_VCODEC1_MMCC_POWER_STATUS 0x110 + #define WRAPPER_VCODEC1_MMCC_POWER_CONTROL 0x114 + ++/* Venus 6xx */ ++#define WRAPPER_CORE_POWER_STATUS_V6 0x80 ++#define WRAPPER_CORE_POWER_CONTROL_V6 0x84 ++ ++/* Wrapper TZ 6xx */ ++#define WRAPPER_TZ_BASE_V6 0x000c0000 ++#define WRAPPER_TZ_CPU_STATUS_V6 0x10 ++ ++/* Venus AON */ ++#define AON_BASE_V6 0x000e0000 ++#define AON_WRAPPER_MVP_NOC_LPI_CONTROL 0x00 ++#define AON_WRAPPER_MVP_NOC_LPI_STATUS 0x04 ++ + #endif +-- +2.40.1 + diff --git a/queue-5.10/media-venus-hfi-pm-firmware-convert-to-block-relativ.patch b/queue-5.10/media-venus-hfi-pm-firmware-convert-to-block-relativ.patch new file mode 100644 index 00000000000..c1d30131dcc --- /dev/null +++ b/queue-5.10/media-venus-hfi-pm-firmware-convert-to-block-relativ.patch @@ -0,0 +1,510 @@ +From 425b0e9d5b51cb82a467d3bf405e57338b664016 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Apr 2021 12:06:28 +0200 +Subject: media: venus: hfi,pm,firmware: Convert to block relative addressing + +From: Bryan O'Donoghue + +[ Upstream commit ff2a7013b3e6a3d34d2b5c7786b8a73093d25319 ] + +An upcoming silicon change places a number of existing blocks within the +Venus at different relative offsets to the base address of IO region. + +In order to handle this difference this patch changes the address offsets +of the registers to function as offsets relative to the relevant sub-block +of registers within the IO region not the base address of the IO region. + +As a result of this change venus_readl() and venus_writel() are deleted. + +Co-developed-by: Dikshita Agarwal +Signed-off-by: Dikshita Agarwal +Signed-off-by: Bryan O'Donoghue +Signed-off-by: Stanimir Varbanov +Signed-off-by: Mauro Carvalho Chehab +Stable-dep-of: d74e48160980 ("media: venus: hfi_venus: Write to VIDC_CTRL_INIT after unmasking interrupts") +Signed-off-by: Sasha Levin +--- + drivers/media/platform/qcom/venus/firmware.c | 28 +++---- + drivers/media/platform/qcom/venus/hfi_venus.c | 82 ++++++++++--------- + .../media/platform/qcom/venus/hfi_venus_io.h | 80 +++++++++--------- + .../media/platform/qcom/venus/pm_helpers.c | 12 +-- + 4 files changed, 105 insertions(+), 97 deletions(-) + +diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c +index 1db64a854b88b..67b9138a7c5fb 100644 +--- a/drivers/media/platform/qcom/venus/firmware.c ++++ b/drivers/media/platform/qcom/venus/firmware.c +@@ -27,19 +27,19 @@ + static void venus_reset_cpu(struct venus_core *core) + { + u32 fw_size = core->fw.mapped_mem_size; +- void __iomem *base = core->base; ++ void __iomem *wrapper_base = core->wrapper_base; + +- writel(0, base + WRAPPER_FW_START_ADDR); +- writel(fw_size, base + WRAPPER_FW_END_ADDR); +- writel(0, base + WRAPPER_CPA_START_ADDR); +- writel(fw_size, base + WRAPPER_CPA_END_ADDR); +- writel(fw_size, base + WRAPPER_NONPIX_START_ADDR); +- writel(fw_size, base + WRAPPER_NONPIX_END_ADDR); +- writel(0x0, base + WRAPPER_CPU_CGC_DIS); +- writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG); ++ writel(0, wrapper_base + WRAPPER_FW_START_ADDR); ++ writel(fw_size, wrapper_base + WRAPPER_FW_END_ADDR); ++ writel(0, wrapper_base + WRAPPER_CPA_START_ADDR); ++ writel(fw_size, wrapper_base + WRAPPER_CPA_END_ADDR); ++ writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR); ++ writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR); ++ writel(0x0, wrapper_base + WRAPPER_CPU_CGC_DIS); ++ writel(0x0, wrapper_base + WRAPPER_CPU_CLOCK_CONFIG); + + /* Bring ARM9 out of reset */ +- writel(0, base + WRAPPER_A9SS_SW_RESET); ++ writel(0, wrapper_base + WRAPPER_A9SS_SW_RESET); + } + + int venus_set_hw_state(struct venus_core *core, bool resume) +@@ -56,7 +56,7 @@ int venus_set_hw_state(struct venus_core *core, bool resume) + if (resume) + venus_reset_cpu(core); + else +- writel(1, core->base + WRAPPER_A9SS_SW_RESET); ++ writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET); + + return 0; + } +@@ -159,12 +159,12 @@ static int venus_shutdown_no_tz(struct venus_core *core) + size_t unmapped; + u32 reg; + struct device *dev = core->fw.dev; +- void __iomem *base = core->base; ++ void __iomem *wrapper_base = core->wrapper_base; + + /* Assert the reset to ARM9 */ +- reg = readl_relaxed(base + WRAPPER_A9SS_SW_RESET); ++ reg = readl_relaxed(wrapper_base + WRAPPER_A9SS_SW_RESET); + reg |= WRAPPER_A9SS_SW_RESET_BIT; +- writel_relaxed(reg, base + WRAPPER_A9SS_SW_RESET); ++ writel_relaxed(reg, wrapper_base + WRAPPER_A9SS_SW_RESET); + + /* Make sure reset is asserted before the mapping is removed */ + mb(); +diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c +index 4be4a75ddcb6e..3d705fc5e1093 100644 +--- a/drivers/media/platform/qcom/venus/hfi_venus.c ++++ b/drivers/media/platform/qcom/venus/hfi_venus.c +@@ -345,16 +345,6 @@ static void venus_free(struct venus_hfi_device *hdev, struct mem_desc *mem) + dma_free_attrs(dev, mem->size, mem->kva, mem->da, mem->attrs); + } + +-static void venus_writel(struct venus_hfi_device *hdev, u32 reg, u32 value) +-{ +- writel(value, hdev->core->base + reg); +-} +- +-static u32 venus_readl(struct venus_hfi_device *hdev, u32 reg) +-{ +- return readl(hdev->core->base + reg); +-} +- + static void venus_set_registers(struct venus_hfi_device *hdev) + { + const struct venus_resources *res = hdev->core->res; +@@ -363,12 +353,14 @@ static void venus_set_registers(struct venus_hfi_device *hdev) + unsigned int i; + + for (i = 0; i < count; i++) +- venus_writel(hdev, tbl[i].reg, tbl[i].value); ++ writel(tbl[i].value, hdev->core->base + tbl[i].reg); + } + + static void venus_soft_int(struct venus_hfi_device *hdev) + { +- venus_writel(hdev, CPU_IC_SOFTINT, BIT(CPU_IC_SOFTINT_H2A_SHIFT)); ++ void __iomem *cpu_ic_base = hdev->core->cpu_ic_base; ++ ++ writel(BIT(CPU_IC_SOFTINT_H2A_SHIFT), cpu_ic_base + CPU_IC_SOFTINT); + } + + static int venus_iface_cmdq_write_nolock(struct venus_hfi_device *hdev, +@@ -441,14 +433,16 @@ static int venus_boot_core(struct venus_hfi_device *hdev) + static const unsigned int max_tries = 100; + u32 ctrl_status = 0; + unsigned int count = 0; ++ void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; ++ void __iomem *wrapper_base = hdev->core->wrapper_base; + int ret = 0; + +- venus_writel(hdev, VIDC_CTRL_INIT, BIT(VIDC_CTRL_INIT_CTRL_SHIFT)); +- venus_writel(hdev, WRAPPER_INTR_MASK, WRAPPER_INTR_MASK_A2HVCODEC_MASK); +- venus_writel(hdev, CPU_CS_SCIACMDARG3, 1); ++ writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT); ++ writel(WRAPPER_INTR_MASK_A2HVCODEC_MASK, wrapper_base + WRAPPER_INTR_MASK); ++ writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3); + + while (!ctrl_status && count < max_tries) { +- ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); ++ ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); + if ((ctrl_status & CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK) == 4) { + dev_err(dev, "invalid setting for UC_REGION\n"); + ret = -EINVAL; +@@ -468,9 +462,11 @@ static int venus_boot_core(struct venus_hfi_device *hdev) + static u32 venus_hwversion(struct venus_hfi_device *hdev) + { + struct device *dev = hdev->core->dev; +- u32 ver = venus_readl(hdev, WRAPPER_HW_VERSION); ++ void __iomem *wrapper_base = hdev->core->wrapper_base; ++ u32 ver; + u32 major, minor, step; + ++ ver = readl(wrapper_base + WRAPPER_HW_VERSION); + major = ver & WRAPPER_HW_VERSION_MAJOR_VERSION_MASK; + major = major >> WRAPPER_HW_VERSION_MAJOR_VERSION_SHIFT; + minor = ver & WRAPPER_HW_VERSION_MINOR_VERSION_MASK; +@@ -485,6 +481,7 @@ static u32 venus_hwversion(struct venus_hfi_device *hdev) + static int venus_run(struct venus_hfi_device *hdev) + { + struct device *dev = hdev->core->dev; ++ void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + int ret; + + /* +@@ -493,12 +490,12 @@ static int venus_run(struct venus_hfi_device *hdev) + */ + venus_set_registers(hdev); + +- venus_writel(hdev, UC_REGION_ADDR, hdev->ifaceq_table.da); +- venus_writel(hdev, UC_REGION_SIZE, SHARED_QSIZE); +- venus_writel(hdev, CPU_CS_SCIACMDARG2, hdev->ifaceq_table.da); +- venus_writel(hdev, CPU_CS_SCIACMDARG1, 0x01); ++ writel(hdev->ifaceq_table.da, cpu_cs_base + UC_REGION_ADDR); ++ writel(SHARED_QSIZE, cpu_cs_base + UC_REGION_SIZE); ++ writel(hdev->ifaceq_table.da, cpu_cs_base + CPU_CS_SCIACMDARG2); ++ writel(0x01, cpu_cs_base + CPU_CS_SCIACMDARG1); + if (hdev->sfr.da) +- venus_writel(hdev, SFR_ADDR, hdev->sfr.da); ++ writel(hdev->sfr.da, cpu_cs_base + SFR_ADDR); + + ret = venus_boot_core(hdev); + if (ret) { +@@ -513,17 +510,18 @@ static int venus_run(struct venus_hfi_device *hdev) + + static int venus_halt_axi(struct venus_hfi_device *hdev) + { +- void __iomem *base = hdev->core->base; ++ void __iomem *wrapper_base = hdev->core->wrapper_base; ++ void __iomem *vbif_base = hdev->core->vbif_base; + struct device *dev = hdev->core->dev; + u32 val; + int ret; + + if (IS_V4(hdev->core)) { +- val = venus_readl(hdev, WRAPPER_CPU_AXI_HALT); ++ val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT); + val |= WRAPPER_CPU_AXI_HALT_HALT; +- venus_writel(hdev, WRAPPER_CPU_AXI_HALT, val); ++ writel(val, wrapper_base + WRAPPER_CPU_AXI_HALT); + +- ret = readl_poll_timeout(base + WRAPPER_CPU_AXI_HALT_STATUS, ++ ret = readl_poll_timeout(wrapper_base + WRAPPER_CPU_AXI_HALT_STATUS, + val, + val & WRAPPER_CPU_AXI_HALT_STATUS_IDLE, + POLL_INTERVAL_US, +@@ -537,12 +535,12 @@ static int venus_halt_axi(struct venus_hfi_device *hdev) + } + + /* Halt AXI and AXI IMEM VBIF Access */ +- val = venus_readl(hdev, VBIF_AXI_HALT_CTRL0); ++ val = readl(vbif_base + VBIF_AXI_HALT_CTRL0); + val |= VBIF_AXI_HALT_CTRL0_HALT_REQ; +- venus_writel(hdev, VBIF_AXI_HALT_CTRL0, val); ++ writel(val, vbif_base + VBIF_AXI_HALT_CTRL0); + + /* Request for AXI bus port halt */ +- ret = readl_poll_timeout(base + VBIF_AXI_HALT_CTRL1, val, ++ ret = readl_poll_timeout(vbif_base + VBIF_AXI_HALT_CTRL1, val, + val & VBIF_AXI_HALT_CTRL1_HALT_ACK, + POLL_INTERVAL_US, + VBIF_AXI_HALT_ACK_TIMEOUT_US); +@@ -1035,19 +1033,21 @@ static irqreturn_t venus_isr(struct venus_core *core) + { + struct venus_hfi_device *hdev = to_hfi_priv(core); + u32 status; ++ void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; ++ void __iomem *wrapper_base = hdev->core->wrapper_base; + + if (!hdev) + return IRQ_NONE; + +- status = venus_readl(hdev, WRAPPER_INTR_STATUS); ++ status = readl(wrapper_base + WRAPPER_INTR_STATUS); + + if (status & WRAPPER_INTR_STATUS_A2H_MASK || + status & WRAPPER_INTR_STATUS_A2HWD_MASK || + status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) + hdev->irq_status = status; + +- venus_writel(hdev, CPU_CS_A2HSOFTINTCLR, 1); +- venus_writel(hdev, WRAPPER_INTR_CLEAR, status); ++ writel(1, cpu_cs_base + CPU_CS_A2HSOFTINTCLR); ++ writel(status, wrapper_base + WRAPPER_INTR_CLEAR); + + return IRQ_WAKE_THREAD; + } +@@ -1380,6 +1380,7 @@ static int venus_suspend_1xx(struct venus_core *core) + { + struct venus_hfi_device *hdev = to_hfi_priv(core); + struct device *dev = core->dev; ++ void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + u32 ctrl_status; + int ret; + +@@ -1414,7 +1415,7 @@ static int venus_suspend_1xx(struct venus_core *core) + return -EINVAL; + } + +- ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); ++ ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); + if (!(ctrl_status & CPU_CS_SCIACMDARG0_PC_READY)) { + mutex_unlock(&hdev->lock); + return -EINVAL; +@@ -1435,10 +1436,12 @@ static int venus_suspend_1xx(struct venus_core *core) + + static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) + { ++ void __iomem *wrapper_base = hdev->core->wrapper_base; ++ void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + u32 ctrl_status, cpu_status; + +- cpu_status = venus_readl(hdev, WRAPPER_CPU_STATUS); +- ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); ++ cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); ++ ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); + + if (cpu_status & WRAPPER_CPU_STATUS_WFI && + ctrl_status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) +@@ -1449,10 +1452,12 @@ static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) + + static bool venus_cpu_idle_and_pc_ready(struct venus_hfi_device *hdev) + { ++ void __iomem *wrapper_base = hdev->core->wrapper_base; ++ void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + u32 ctrl_status, cpu_status; + +- cpu_status = venus_readl(hdev, WRAPPER_CPU_STATUS); +- ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); ++ cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); ++ ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); + + if (cpu_status & WRAPPER_CPU_STATUS_WFI && + ctrl_status & CPU_CS_SCIACMDARG0_PC_READY) +@@ -1465,6 +1470,7 @@ static int venus_suspend_3xx(struct venus_core *core) + { + struct venus_hfi_device *hdev = to_hfi_priv(core); + struct device *dev = core->dev; ++ void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + u32 ctrl_status; + bool val; + int ret; +@@ -1481,7 +1487,7 @@ static int venus_suspend_3xx(struct venus_core *core) + return -EINVAL; + } + +- ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); ++ ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); + if (ctrl_status & CPU_CS_SCIACMDARG0_PC_READY) + goto power_off; + +diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h +index 3b52f98478db0..4c392b67252c2 100644 +--- a/drivers/media/platform/qcom/venus/hfi_venus_io.h ++++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h +@@ -8,27 +8,28 @@ + + #define VBIF_BASE 0x80000 + +-#define VBIF_AXI_HALT_CTRL0 (VBIF_BASE + 0x208) +-#define VBIF_AXI_HALT_CTRL1 (VBIF_BASE + 0x20c) ++#define VBIF_AXI_HALT_CTRL0 0x208 ++#define VBIF_AXI_HALT_CTRL1 0x20c + + #define VBIF_AXI_HALT_CTRL0_HALT_REQ BIT(0) + #define VBIF_AXI_HALT_CTRL1_HALT_ACK BIT(0) + #define VBIF_AXI_HALT_ACK_TIMEOUT_US 500000 + + #define CPU_BASE 0xc0000 ++ + #define CPU_CS_BASE (CPU_BASE + 0x12000) + #define CPU_IC_BASE (CPU_BASE + 0x1f000) + +-#define CPU_CS_A2HSOFTINTCLR (CPU_CS_BASE + 0x1c) ++#define CPU_CS_A2HSOFTINTCLR 0x1c + +-#define VIDC_CTRL_INIT (CPU_CS_BASE + 0x48) ++#define VIDC_CTRL_INIT 0x48 + #define VIDC_CTRL_INIT_RESERVED_BITS31_1_MASK 0xfffffffe + #define VIDC_CTRL_INIT_RESERVED_BITS31_1_SHIFT 1 + #define VIDC_CTRL_INIT_CTRL_MASK 0x1 + #define VIDC_CTRL_INIT_CTRL_SHIFT 0 + + /* HFI control status */ +-#define CPU_CS_SCIACMDARG0 (CPU_CS_BASE + 0x4c) ++#define CPU_CS_SCIACMDARG0 0x4c + #define CPU_CS_SCIACMDARG0_MASK 0xff + #define CPU_CS_SCIACMDARG0_SHIFT 0x0 + #define CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK 0xfe +@@ -39,42 +40,43 @@ + #define CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK BIT(30) + + /* HFI queue table info */ +-#define CPU_CS_SCIACMDARG1 (CPU_CS_BASE + 0x50) ++#define CPU_CS_SCIACMDARG1 0x50 + + /* HFI queue table address */ +-#define CPU_CS_SCIACMDARG2 (CPU_CS_BASE + 0x54) ++#define CPU_CS_SCIACMDARG2 0x54 + + /* Venus cpu */ +-#define CPU_CS_SCIACMDARG3 (CPU_CS_BASE + 0x58) ++#define CPU_CS_SCIACMDARG3 0x58 + +-#define SFR_ADDR (CPU_CS_BASE + 0x5c) +-#define MMAP_ADDR (CPU_CS_BASE + 0x60) +-#define UC_REGION_ADDR (CPU_CS_BASE + 0x64) +-#define UC_REGION_SIZE (CPU_CS_BASE + 0x68) ++#define SFR_ADDR 0x5c ++#define MMAP_ADDR 0x60 ++#define UC_REGION_ADDR 0x64 ++#define UC_REGION_SIZE 0x68 + +-#define CPU_IC_SOFTINT (CPU_IC_BASE + 0x18) ++/* Relative to CPU_IC_BASE */ ++#define CPU_IC_SOFTINT 0x18 + #define CPU_IC_SOFTINT_H2A_MASK 0x8000 + #define CPU_IC_SOFTINT_H2A_SHIFT 0xf + + /* Venus wrapper */ + #define WRAPPER_BASE 0x000e0000 + +-#define WRAPPER_HW_VERSION (WRAPPER_BASE + 0x00) ++#define WRAPPER_HW_VERSION 0x00 + #define WRAPPER_HW_VERSION_MAJOR_VERSION_MASK 0x78000000 + #define WRAPPER_HW_VERSION_MAJOR_VERSION_SHIFT 28 + #define WRAPPER_HW_VERSION_MINOR_VERSION_MASK 0xfff0000 + #define WRAPPER_HW_VERSION_MINOR_VERSION_SHIFT 16 + #define WRAPPER_HW_VERSION_STEP_VERSION_MASK 0xffff + +-#define WRAPPER_CLOCK_CONFIG (WRAPPER_BASE + 0x04) ++#define WRAPPER_CLOCK_CONFIG 0x04 + +-#define WRAPPER_INTR_STATUS (WRAPPER_BASE + 0x0c) ++#define WRAPPER_INTR_STATUS 0x0c + #define WRAPPER_INTR_STATUS_A2HWD_MASK 0x10 + #define WRAPPER_INTR_STATUS_A2HWD_SHIFT 0x4 + #define WRAPPER_INTR_STATUS_A2H_MASK 0x4 + #define WRAPPER_INTR_STATUS_A2H_SHIFT 0x2 + +-#define WRAPPER_INTR_MASK (WRAPPER_BASE + 0x10) ++#define WRAPPER_INTR_MASK 0x10 + #define WRAPPER_INTR_MASK_A2HWD_BASK 0x10 + #define WRAPPER_INTR_MASK_A2HWD_SHIFT 0x4 + #define WRAPPER_INTR_MASK_A2HVCODEC_MASK 0x8 +@@ -82,41 +84,41 @@ + #define WRAPPER_INTR_MASK_A2HCPU_MASK 0x4 + #define WRAPPER_INTR_MASK_A2HCPU_SHIFT 0x2 + +-#define WRAPPER_INTR_CLEAR (WRAPPER_BASE + 0x14) ++#define WRAPPER_INTR_CLEAR 0x14 + #define WRAPPER_INTR_CLEAR_A2HWD_MASK 0x10 + #define WRAPPER_INTR_CLEAR_A2HWD_SHIFT 0x4 + #define WRAPPER_INTR_CLEAR_A2H_MASK 0x4 + #define WRAPPER_INTR_CLEAR_A2H_SHIFT 0x2 + +-#define WRAPPER_POWER_STATUS (WRAPPER_BASE + 0x44) +-#define WRAPPER_VDEC_VCODEC_POWER_CONTROL (WRAPPER_BASE + 0x48) +-#define WRAPPER_VENC_VCODEC_POWER_CONTROL (WRAPPER_BASE + 0x4c) +-#define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET (WRAPPER_BASE + 0x64) ++#define WRAPPER_POWER_STATUS 0x44 ++#define WRAPPER_VDEC_VCODEC_POWER_CONTROL 0x48 ++#define WRAPPER_VENC_VCODEC_POWER_CONTROL 0x4c ++#define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64 + +-#define WRAPPER_CPU_CLOCK_CONFIG (WRAPPER_BASE + 0x2000) +-#define WRAPPER_CPU_AXI_HALT (WRAPPER_BASE + 0x2008) ++#define WRAPPER_CPU_CLOCK_CONFIG 0x2000 ++#define WRAPPER_CPU_AXI_HALT 0x2008 + #define WRAPPER_CPU_AXI_HALT_HALT BIT(16) +-#define WRAPPER_CPU_AXI_HALT_STATUS (WRAPPER_BASE + 0x200c) ++#define WRAPPER_CPU_AXI_HALT_STATUS 0x200c + #define WRAPPER_CPU_AXI_HALT_STATUS_IDLE BIT(24) + +-#define WRAPPER_CPU_CGC_DIS (WRAPPER_BASE + 0x2010) +-#define WRAPPER_CPU_STATUS (WRAPPER_BASE + 0x2014) ++#define WRAPPER_CPU_CGC_DIS 0x2010 ++#define WRAPPER_CPU_STATUS 0x2014 + #define WRAPPER_CPU_STATUS_WFI BIT(0) +-#define WRAPPER_SW_RESET (WRAPPER_BASE + 0x3000) +-#define WRAPPER_CPA_START_ADDR (WRAPPER_BASE + 0x1020) +-#define WRAPPER_CPA_END_ADDR (WRAPPER_BASE + 0x1024) +-#define WRAPPER_FW_START_ADDR (WRAPPER_BASE + 0x1028) +-#define WRAPPER_FW_END_ADDR (WRAPPER_BASE + 0x102C) +-#define WRAPPER_NONPIX_START_ADDR (WRAPPER_BASE + 0x1030) +-#define WRAPPER_NONPIX_END_ADDR (WRAPPER_BASE + 0x1034) +-#define WRAPPER_A9SS_SW_RESET (WRAPPER_BASE + 0x3000) ++#define WRAPPER_SW_RESET 0x3000 ++#define WRAPPER_CPA_START_ADDR 0x1020 ++#define WRAPPER_CPA_END_ADDR 0x1024 ++#define WRAPPER_FW_START_ADDR 0x1028 ++#define WRAPPER_FW_END_ADDR 0x102C ++#define WRAPPER_NONPIX_START_ADDR 0x1030 ++#define WRAPPER_NONPIX_END_ADDR 0x1034 ++#define WRAPPER_A9SS_SW_RESET 0x3000 + #define WRAPPER_A9SS_SW_RESET_BIT BIT(4) + + /* Venus 4xx */ +-#define WRAPPER_VCODEC0_MMCC_POWER_STATUS (WRAPPER_BASE + 0x90) +-#define WRAPPER_VCODEC0_MMCC_POWER_CONTROL (WRAPPER_BASE + 0x94) ++#define WRAPPER_VCODEC0_MMCC_POWER_STATUS 0x90 ++#define WRAPPER_VCODEC0_MMCC_POWER_CONTROL 0x94 + +-#define WRAPPER_VCODEC1_MMCC_POWER_STATUS (WRAPPER_BASE + 0x110) +-#define WRAPPER_VCODEC1_MMCC_POWER_CONTROL (WRAPPER_BASE + 0x114) ++#define WRAPPER_VCODEC1_MMCC_POWER_STATUS 0x110 ++#define WRAPPER_VCODEC1_MMCC_POWER_CONTROL 0x114 + + #endif +diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c +index f7de02352f1b0..6bf9c5c319de7 100644 +--- a/drivers/media/platform/qcom/venus/pm_helpers.c ++++ b/drivers/media/platform/qcom/venus/pm_helpers.c +@@ -304,9 +304,9 @@ vcodec_control_v3(struct venus_core *core, u32 session_type, bool enable) + void __iomem *ctrl; + + if (session_type == VIDC_SESSION_TYPE_DEC) +- ctrl = core->base + WRAPPER_VDEC_VCODEC_POWER_CONTROL; ++ ctrl = core->wrapper_base + WRAPPER_VDEC_VCODEC_POWER_CONTROL; + else +- ctrl = core->base + WRAPPER_VENC_VCODEC_POWER_CONTROL; ++ ctrl = core->wrapper_base + WRAPPER_VENC_VCODEC_POWER_CONTROL; + + if (enable) + writel(0, ctrl); +@@ -381,11 +381,11 @@ static int vcodec_control_v4(struct venus_core *core, u32 coreid, bool enable) + int ret; + + if (coreid == VIDC_CORE_ID_1) { +- ctrl = core->base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; +- stat = core->base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; ++ ctrl = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; ++ stat = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; + } else { +- ctrl = core->base + WRAPPER_VCODEC1_MMCC_POWER_CONTROL; +- stat = core->base + WRAPPER_VCODEC1_MMCC_POWER_STATUS; ++ ctrl = core->wrapper_base + WRAPPER_VCODEC1_MMCC_POWER_CONTROL; ++ stat = core->wrapper_base + WRAPPER_VCODEC1_MMCC_POWER_STATUS; + } + + if (enable) { +-- +2.40.1 + diff --git a/queue-5.10/media-venus-hfi_venus-write-to-vidc_ctrl_init-after-.patch b/queue-5.10/media-venus-hfi_venus-write-to-vidc_ctrl_init-after-.patch new file mode 100644 index 00000000000..320f58665cc --- /dev/null +++ b/queue-5.10/media-venus-hfi_venus-write-to-vidc_ctrl_init-after-.patch @@ -0,0 +1,48 @@ +From 989428d9fadf8b67cc473bee9f81df6c0c1659db Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 30 May 2023 14:30:36 +0200 +Subject: media: venus: hfi_venus: Write to VIDC_CTRL_INIT after unmasking + interrupts + +From: Konrad Dybcio + +[ Upstream commit d74e481609808330b4625b3691cf01e1f56e255e ] + +The startup procedure shouldn't be started with interrupts masked, as that +may entail silent failures. + +Kick off initialization only after the interrupts are unmasked. + +Cc: stable@vger.kernel.org # v4.12+ +Fixes: d96d3f30c0f2 ("[media] media: venus: hfi: add Venus HFI files") +Signed-off-by: Konrad Dybcio +Signed-off-by: Stanimir Varbanov +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/platform/qcom/venus/hfi_venus.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c +index 97d36cafd8cb2..9d939f63d16f4 100644 +--- a/drivers/media/platform/qcom/venus/hfi_venus.c ++++ b/drivers/media/platform/qcom/venus/hfi_venus.c +@@ -437,7 +437,6 @@ static int venus_boot_core(struct venus_hfi_device *hdev) + void __iomem *wrapper_base = hdev->core->wrapper_base; + int ret = 0; + +- writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT); + if (IS_V6(hdev->core)) { + mask_val = readl(wrapper_base + WRAPPER_INTR_MASK); + mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BASK_V6 | +@@ -448,6 +447,7 @@ static int venus_boot_core(struct venus_hfi_device *hdev) + writel(mask_val, wrapper_base + WRAPPER_INTR_MASK); + writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3); + ++ writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT); + while (!ctrl_status && count < max_tries) { + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); + if ((ctrl_status & CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK) == 4) { +-- +2.40.1 + diff --git a/queue-5.10/mmc-renesas_sdhi-populate-scc-pointer-at-the-proper-.patch b/queue-5.10/mmc-renesas_sdhi-populate-scc-pointer-at-the-proper-.patch new file mode 100644 index 00000000000..923a89a8fc2 --- /dev/null +++ b/queue-5.10/mmc-renesas_sdhi-populate-scc-pointer-at-the-proper-.patch @@ -0,0 +1,61 @@ +From b2cc381f72391ad4d76c42a4903a39d53699e7ed Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Nov 2020 15:20:57 +0100 +Subject: mmc: renesas_sdhi: populate SCC pointer at the proper place +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Wolfram Sang + +[ Upstream commit d14ac691bb6f6ebaa7eeec21ca04dd47300ff5b6 ] + +The SCC pointer is currently filled whenever the SoC is Gen2+. This is +wrong because there is a Gen2-variant without SCC (SDHI_VER_GEN2_SDR50). +We have been lucky because the writes to unintended registers have not +caused problems so far. But further refactoring work exposed the +problem. So, move the pointer initialization to the place where we know +that the SDHI instance supports tuning. And also populate the 'reset' +pointer unconditionally to make sure the interrupt enable register is +always properly set for Gen2+. + +Signed-off-by: Wolfram Sang +Reviewed-by: Niklas Söderlund +Reviewed-by: Yoshihiro Shimoda +Tested-by: Yoshihiro Shimoda +Link: https://lore.kernel.org/r/20201110142058.36393-4-wsa+renesas@sang-engineering.com +Signed-off-by: Ulf Hansson +Stable-dep-of: 74f45de394d9 ("mmc: renesas_sdhi: register irqs before registering controller") +Signed-off-by: Sasha Levin +--- + drivers/mmc/host/renesas_sdhi_core.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c +index 2cf7360d6cade..bf8d934fb7511 100644 +--- a/drivers/mmc/host/renesas_sdhi_core.c ++++ b/drivers/mmc/host/renesas_sdhi_core.c +@@ -1010,11 +1010,7 @@ int renesas_sdhi_probe(struct platform_device *pdev, + host->ops.start_signal_voltage_switch = + renesas_sdhi_start_signal_voltage_switch; + host->sdcard_irq_setbit_mask = TMIO_STAT_ALWAYS_SET_27; +- +- if (of_data && of_data->scc_offset) { +- priv->scc_ctl = host->ctl + of_data->scc_offset; +- host->reset = renesas_sdhi_reset; +- } ++ host->reset = renesas_sdhi_reset; + } + + /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */ +@@ -1094,6 +1090,7 @@ int renesas_sdhi_probe(struct platform_device *pdev, + if (!hit) + dev_warn(&host->pdev->dev, "Unknown clock rate for tuning\n"); + ++ priv->scc_ctl = host->ctl + of_data->scc_offset; + host->check_retune = renesas_sdhi_check_scc_error; + host->ops.execute_tuning = renesas_sdhi_execute_tuning; + host->ops.prepare_hs400_tuning = renesas_sdhi_prepare_hs400_tuning; +-- +2.40.1 + diff --git a/queue-5.10/mmc-renesas_sdhi-probe-into-tmio-after-scc-parameter.patch b/queue-5.10/mmc-renesas_sdhi-probe-into-tmio-after-scc-parameter.patch new file mode 100644 index 00000000000..f2677729215 --- /dev/null +++ b/queue-5.10/mmc-renesas_sdhi-probe-into-tmio-after-scc-parameter.patch @@ -0,0 +1,58 @@ +From 41ed0718c3f22668a7a91aa11ab9a7b24475a84d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Nov 2020 15:20:56 +0100 +Subject: mmc: renesas_sdhi: probe into TMIO after SCC parameters have been + setup +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Wolfram Sang + +[ Upstream commit b161d87dfd3d9f3fb064a089a9e521d0e5d3e38f ] + +Setting up the SCC parameters does not need a probed TMIO device. But in +the near future, probing the TMIO device needs the SCC parameters setup. +So, fix the ordering. + +Signed-off-by: Wolfram Sang +Reviewed-by: Niklas Söderlund +Reviewed-by: Yoshihiro Shimoda +Tested-by: Yoshihiro Shimoda +Link: https://lore.kernel.org/r/20201110142058.36393-3-wsa+renesas@sang-engineering.com +Signed-off-by: Ulf Hansson +Stable-dep-of: 74f45de394d9 ("mmc: renesas_sdhi: register irqs before registering controller") +Signed-off-by: Sasha Levin +--- + drivers/mmc/host/renesas_sdhi_core.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c +index a49b8fe2a0982..2cf7360d6cade 100644 +--- a/drivers/mmc/host/renesas_sdhi_core.c ++++ b/drivers/mmc/host/renesas_sdhi_core.c +@@ -1070,10 +1070,6 @@ int renesas_sdhi_probe(struct platform_device *pdev, + quirks->hs400_calib_table + 1); + } + +- ret = tmio_mmc_host_probe(host); +- if (ret < 0) +- goto edisclk; +- + /* Enable tuning iff we have an SCC and a supported mode */ + if (of_data && of_data->scc_offset && + (host->mmc->caps & MMC_CAP_UHS_SDR104 || +@@ -1105,6 +1101,10 @@ int renesas_sdhi_probe(struct platform_device *pdev, + host->ops.hs400_complete = renesas_sdhi_hs400_complete; + } + ++ ret = tmio_mmc_host_probe(host); ++ if (ret < 0) ++ goto edisclk; ++ + num_irqs = platform_irq_count(pdev); + if (num_irqs < 0) { + ret = num_irqs; +-- +2.40.1 + diff --git a/queue-5.10/mmc-renesas_sdhi-register-irqs-before-registering-co.patch b/queue-5.10/mmc-renesas_sdhi-register-irqs-before-registering-co.patch new file mode 100644 index 00000000000..231ffe83a5e --- /dev/null +++ b/queue-5.10/mmc-renesas_sdhi-register-irqs-before-registering-co.patch @@ -0,0 +1,63 @@ +From ceed51fad98f0221d12a919dda2a819c454902e6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jul 2023 16:00:11 +0200 +Subject: mmc: renesas_sdhi: register irqs before registering controller + +From: Wolfram Sang + +[ Upstream commit 74f45de394d979cc7770271f92fafa53e1ed3119 ] + +IRQs should be ready to serve when we call mmc_add_host() via +tmio_mmc_host_probe(). To achieve that, ensure that all irqs are masked +before registering the handlers. + +Signed-off-by: Wolfram Sang +Tested-by: Biju Das +Reviewed-by: Geert Uytterhoeven +Tested-by: Geert Uytterhoeven +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20230712140011.18602-1-wsa+renesas@sang-engineering.com +Signed-off-by: Ulf Hansson +Signed-off-by: Sasha Levin +--- + drivers/mmc/host/renesas_sdhi_core.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c +index bf8d934fb7511..95abd421d0d24 100644 +--- a/drivers/mmc/host/renesas_sdhi_core.c ++++ b/drivers/mmc/host/renesas_sdhi_core.c +@@ -1011,6 +1011,8 @@ int renesas_sdhi_probe(struct platform_device *pdev, + renesas_sdhi_start_signal_voltage_switch; + host->sdcard_irq_setbit_mask = TMIO_STAT_ALWAYS_SET_27; + host->reset = renesas_sdhi_reset; ++ } else { ++ host->sdcard_irq_mask_all = TMIO_MASK_ALL; + } + + /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */ +@@ -1098,9 +1100,7 @@ int renesas_sdhi_probe(struct platform_device *pdev, + host->ops.hs400_complete = renesas_sdhi_hs400_complete; + } + +- ret = tmio_mmc_host_probe(host); +- if (ret < 0) +- goto edisclk; ++ sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all); + + num_irqs = platform_irq_count(pdev); + if (num_irqs < 0) { +@@ -1127,6 +1127,10 @@ int renesas_sdhi_probe(struct platform_device *pdev, + goto eirq; + } + ++ ret = tmio_mmc_host_probe(host); ++ if (ret < 0) ++ goto edisclk; ++ + dev_info(&pdev->dev, "%s base at %pa, max clock rate %u MHz\n", + mmc_hostname(host->mmc), &res->start, host->mmc->f_max / 1000000); + +-- +2.40.1 + diff --git a/queue-5.10/mmc-tmio-support-custom-irq-masks.patch b/queue-5.10/mmc-tmio-support-custom-irq-masks.patch new file mode 100644 index 00000000000..67d3134c796 --- /dev/null +++ b/queue-5.10/mmc-tmio-support-custom-irq-masks.patch @@ -0,0 +1,73 @@ +From f36312e1b5b5e33db9e91c89fa27d836c75ab33b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 23 Feb 2021 11:08:29 +0100 +Subject: mmc: tmio: support custom irq masks + +From: Wolfram Sang + +[ Upstream commit 0d856c4c68c639f96cb12c26aaeb906353b9a76e ] + +SDHI Gen2+ has a different value for TMIO_MASK_ALL, so add a member to +support that. If the member is not used, the previous default value is +applied. + +Signed-off-by: Wolfram Sang +Reviewed-by: Yoshihiro Shimoda +Tested-by: Yoshihiro Shimoda +Link: https://lore.kernel.org/r/20210223100830.25125-2-wsa+renesas@sang-engineering.com +Signed-off-by: Ulf Hansson +Stable-dep-of: 74f45de394d9 ("mmc: renesas_sdhi: register irqs before registering controller") +Signed-off-by: Sasha Levin +--- + drivers/mmc/host/tmio_mmc.h | 1 + + drivers/mmc/host/tmio_mmc_core.c | 8 +++++--- + 2 files changed, 6 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h +index 9546e542619cb..d6ed5e1f8386e 100644 +--- a/drivers/mmc/host/tmio_mmc.h ++++ b/drivers/mmc/host/tmio_mmc.h +@@ -161,6 +161,7 @@ struct tmio_mmc_host { + u32 sdio_irq_mask; + unsigned int clk_cache; + u32 sdcard_irq_setbit_mask; ++ u32 sdcard_irq_mask_all; + + spinlock_t lock; /* protect host private data */ + unsigned long last_req_ts; +diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c +index ac4e7874a3f13..abf36acb2641f 100644 +--- a/drivers/mmc/host/tmio_mmc_core.c ++++ b/drivers/mmc/host/tmio_mmc_core.c +@@ -1158,7 +1158,9 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host) + tmio_mmc_reset(_host); + + _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK); +- tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); ++ if (!_host->sdcard_irq_mask_all) ++ _host->sdcard_irq_mask_all = TMIO_MASK_ALL; ++ tmio_mmc_disable_mmc_irqs(_host, _host->sdcard_irq_mask_all); + + if (_host->native_hotplug) + tmio_mmc_enable_mmc_irqs(_host, +@@ -1212,7 +1214,7 @@ void tmio_mmc_host_remove(struct tmio_mmc_host *host) + cancel_work_sync(&host->done); + cancel_delayed_work_sync(&host->delayed_reset_work); + tmio_mmc_release_dma(host); +- tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); ++ tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all); + + if (host->native_hotplug) + pm_runtime_put_noidle(&pdev->dev); +@@ -1242,7 +1244,7 @@ int tmio_mmc_host_runtime_suspend(struct device *dev) + { + struct tmio_mmc_host *host = dev_get_drvdata(dev); + +- tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); ++ tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all); + + if (host->clk_cache) + host->set_clock(host, 0); +-- +2.40.1 + diff --git a/queue-5.10/netfilter-exthdr-add-support-for-tcp-option-removal.patch b/queue-5.10/netfilter-exthdr-add-support-for-tcp-option-removal.patch new file mode 100644 index 00000000000..2b7bca74ea2 --- /dev/null +++ b/queue-5.10/netfilter-exthdr-add-support-for-tcp-option-removal.patch @@ -0,0 +1,171 @@ +From eeb919da7b64e4cf1583dd2057dd60c6203f6821 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Jan 2022 13:00:36 +0100 +Subject: netfilter: exthdr: add support for tcp option removal + +From: Florian Westphal + +[ Upstream commit 7890cbea66e78a3a6037b2a12827118d7243270b ] + +This allows to replace a tcp option with nop padding to selectively disable +a particular tcp option. + +Optstrip mode is chosen when userspace passes the exthdr expression with +neither a source nor a destination register attribute. + +This is identical to xtables TCPOPTSTRIP extension. +The only difference is that TCPOPTSTRIP allows to pass in a bitmap +of options to remove rather than a single number. + +Unlike TCPOPTSTRIP this expression can be used multiple times +in the same rule to get the same effect. + +We could add a new nested attribute later on in case there is a +use case for single-expression-multi-remove. + +Signed-off-by: Florian Westphal +Signed-off-by: Pablo Neira Ayuso +Stable-dep-of: 28427f368f0e ("netfilter: nft_exthdr: Fix non-linear header modification") +Signed-off-by: Sasha Levin +--- + net/netfilter/nft_exthdr.c | 96 +++++++++++++++++++++++++++++++++++++- + 1 file changed, 95 insertions(+), 1 deletion(-) + +diff --git a/net/netfilter/nft_exthdr.c b/net/netfilter/nft_exthdr.c +index 10a510fef75c5..7a00867aa64ba 100644 +--- a/net/netfilter/nft_exthdr.c ++++ b/net/netfilter/nft_exthdr.c +@@ -308,6 +308,63 @@ static void nft_exthdr_tcp_set_eval(const struct nft_expr *expr, + regs->verdict.code = NFT_BREAK; + } + ++static void nft_exthdr_tcp_strip_eval(const struct nft_expr *expr, ++ struct nft_regs *regs, ++ const struct nft_pktinfo *pkt) ++{ ++ u8 buff[sizeof(struct tcphdr) + MAX_TCP_OPTION_SPACE]; ++ struct nft_exthdr *priv = nft_expr_priv(expr); ++ unsigned int i, tcphdr_len, optl; ++ struct tcphdr *tcph; ++ u8 *opt; ++ ++ tcph = nft_tcp_header_pointer(pkt, sizeof(buff), buff, &tcphdr_len); ++ if (!tcph) ++ goto err; ++ ++ if (skb_ensure_writable(pkt->skb, nft_thoff(pkt) + tcphdr_len)) ++ goto drop; ++ ++ opt = (u8 *)nft_tcp_header_pointer(pkt, sizeof(buff), buff, &tcphdr_len); ++ if (!opt) ++ goto err; ++ for (i = sizeof(*tcph); i < tcphdr_len - 1; i += optl) { ++ unsigned int j; ++ ++ optl = optlen(opt, i); ++ if (priv->type != opt[i]) ++ continue; ++ ++ if (i + optl > tcphdr_len) ++ goto drop; ++ ++ for (j = 0; j < optl; ++j) { ++ u16 n = TCPOPT_NOP; ++ u16 o = opt[i+j]; ++ ++ if ((i + j) % 2 == 0) { ++ o <<= 8; ++ n <<= 8; ++ } ++ inet_proto_csum_replace2(&tcph->check, pkt->skb, htons(o), ++ htons(n), false); ++ } ++ memset(opt + i, TCPOPT_NOP, optl); ++ return; ++ } ++ ++ /* option not found, continue. This allows to do multiple ++ * option removals per rule. ++ */ ++ return; ++err: ++ regs->verdict.code = NFT_BREAK; ++ return; ++drop: ++ /* can't remove, no choice but to drop */ ++ regs->verdict.code = NF_DROP; ++} ++ + static void nft_exthdr_sctp_eval(const struct nft_expr *expr, + struct nft_regs *regs, + const struct nft_pktinfo *pkt) +@@ -452,6 +509,28 @@ static int nft_exthdr_tcp_set_init(const struct nft_ctx *ctx, + priv->len); + } + ++static int nft_exthdr_tcp_strip_init(const struct nft_ctx *ctx, ++ const struct nft_expr *expr, ++ const struct nlattr * const tb[]) ++{ ++ struct nft_exthdr *priv = nft_expr_priv(expr); ++ ++ if (tb[NFTA_EXTHDR_SREG] || ++ tb[NFTA_EXTHDR_DREG] || ++ tb[NFTA_EXTHDR_FLAGS] || ++ tb[NFTA_EXTHDR_OFFSET] || ++ tb[NFTA_EXTHDR_LEN]) ++ return -EINVAL; ++ ++ if (!tb[NFTA_EXTHDR_TYPE]) ++ return -EINVAL; ++ ++ priv->type = nla_get_u8(tb[NFTA_EXTHDR_TYPE]); ++ priv->op = NFT_EXTHDR_OP_TCPOPT; ++ ++ return 0; ++} ++ + static int nft_exthdr_ipv4_init(const struct nft_ctx *ctx, + const struct nft_expr *expr, + const struct nlattr * const tb[]) +@@ -512,6 +591,13 @@ static int nft_exthdr_dump_set(struct sk_buff *skb, const struct nft_expr *expr) + return nft_exthdr_dump_common(skb, priv); + } + ++static int nft_exthdr_dump_strip(struct sk_buff *skb, const struct nft_expr *expr) ++{ ++ const struct nft_exthdr *priv = nft_expr_priv(expr); ++ ++ return nft_exthdr_dump_common(skb, priv); ++} ++ + static const struct nft_expr_ops nft_exthdr_ipv6_ops = { + .type = &nft_exthdr_type, + .size = NFT_EXPR_SIZE(sizeof(struct nft_exthdr)), +@@ -544,6 +630,14 @@ static const struct nft_expr_ops nft_exthdr_tcp_set_ops = { + .dump = nft_exthdr_dump_set, + }; + ++static const struct nft_expr_ops nft_exthdr_tcp_strip_ops = { ++ .type = &nft_exthdr_type, ++ .size = NFT_EXPR_SIZE(sizeof(struct nft_exthdr)), ++ .eval = nft_exthdr_tcp_strip_eval, ++ .init = nft_exthdr_tcp_strip_init, ++ .dump = nft_exthdr_dump_strip, ++}; ++ + static const struct nft_expr_ops nft_exthdr_sctp_ops = { + .type = &nft_exthdr_type, + .size = NFT_EXPR_SIZE(sizeof(struct nft_exthdr)), +@@ -571,7 +665,7 @@ nft_exthdr_select_ops(const struct nft_ctx *ctx, + return &nft_exthdr_tcp_set_ops; + if (tb[NFTA_EXTHDR_DREG]) + return &nft_exthdr_tcp_ops; +- break; ++ return &nft_exthdr_tcp_strip_ops; + case NFT_EXTHDR_OP_IPV6: + if (tb[NFTA_EXTHDR_DREG]) + return &nft_exthdr_ipv6_ops; +-- +2.40.1 + diff --git a/queue-5.10/netfilter-nf_tables-add-and-use-nft_sk-helper.patch b/queue-5.10/netfilter-nf_tables-add-and-use-nft_sk-helper.patch new file mode 100644 index 00000000000..ccdfbf4cf99 --- /dev/null +++ b/queue-5.10/netfilter-nf_tables-add-and-use-nft_sk-helper.patch @@ -0,0 +1,89 @@ +From 30125579bbd1707187934b99945bac148d1f39e6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 May 2021 12:30:05 +0200 +Subject: netfilter: nf_tables: add and use nft_sk helper + +From: Florian Westphal + +[ Upstream commit 85554eb981e5a8b0b8947611193aef1737081ef2 ] + +This allows to change storage placement later on without changing readers. + +Signed-off-by: Florian Westphal +Signed-off-by: Pablo Neira Ayuso +Stable-dep-of: 28427f368f0e ("netfilter: nft_exthdr: Fix non-linear header modification") +Signed-off-by: Sasha Levin +--- + include/net/netfilter/nf_tables.h | 5 +++++ + net/ipv4/netfilter/nft_reject_ipv4.c | 2 +- + net/ipv6/netfilter/nft_reject_ipv6.c | 2 +- + net/netfilter/nft_reject_inet.c | 4 ++-- + 4 files changed, 9 insertions(+), 4 deletions(-) + +diff --git a/include/net/netfilter/nf_tables.h b/include/net/netfilter/nf_tables.h +index 5619642b9ad47..013f11c9de85a 100644 +--- a/include/net/netfilter/nf_tables.h ++++ b/include/net/netfilter/nf_tables.h +@@ -28,6 +28,11 @@ struct nft_pktinfo { + struct xt_action_param xt; + }; + ++static inline struct sock *nft_sk(const struct nft_pktinfo *pkt) ++{ ++ return pkt->xt.state->sk; ++} ++ + static inline struct net *nft_net(const struct nft_pktinfo *pkt) + { + return pkt->xt.state->net; +diff --git a/net/ipv4/netfilter/nft_reject_ipv4.c b/net/ipv4/netfilter/nft_reject_ipv4.c +index ff437e4ed6db0..55fc23a8f7a70 100644 +--- a/net/ipv4/netfilter/nft_reject_ipv4.c ++++ b/net/ipv4/netfilter/nft_reject_ipv4.c +@@ -27,7 +27,7 @@ static void nft_reject_ipv4_eval(const struct nft_expr *expr, + nf_send_unreach(pkt->skb, priv->icmp_code, nft_hook(pkt)); + break; + case NFT_REJECT_TCP_RST: +- nf_send_reset(nft_net(pkt), pkt->xt.state->sk, pkt->skb, ++ nf_send_reset(nft_net(pkt), nft_sk(pkt), pkt->skb, + nft_hook(pkt)); + break; + default: +diff --git a/net/ipv6/netfilter/nft_reject_ipv6.c b/net/ipv6/netfilter/nft_reject_ipv6.c +index 7969d1f3018dc..ed69c768797ec 100644 +--- a/net/ipv6/netfilter/nft_reject_ipv6.c ++++ b/net/ipv6/netfilter/nft_reject_ipv6.c +@@ -28,7 +28,7 @@ static void nft_reject_ipv6_eval(const struct nft_expr *expr, + nft_hook(pkt)); + break; + case NFT_REJECT_TCP_RST: +- nf_send_reset6(nft_net(pkt), pkt->xt.state->sk, pkt->skb, ++ nf_send_reset6(nft_net(pkt), nft_sk(pkt), pkt->skb, + nft_hook(pkt)); + break; + default: +diff --git a/net/netfilter/nft_reject_inet.c b/net/netfilter/nft_reject_inet.c +index 36b219e2e896c..c00b94a166824 100644 +--- a/net/netfilter/nft_reject_inet.c ++++ b/net/netfilter/nft_reject_inet.c +@@ -28,7 +28,7 @@ static void nft_reject_inet_eval(const struct nft_expr *expr, + nft_hook(pkt)); + break; + case NFT_REJECT_TCP_RST: +- nf_send_reset(nft_net(pkt), pkt->xt.state->sk, ++ nf_send_reset(nft_net(pkt), nft_sk(pkt), + pkt->skb, nft_hook(pkt)); + break; + case NFT_REJECT_ICMPX_UNREACH: +@@ -45,7 +45,7 @@ static void nft_reject_inet_eval(const struct nft_expr *expr, + priv->icmp_code, nft_hook(pkt)); + break; + case NFT_REJECT_TCP_RST: +- nf_send_reset6(nft_net(pkt), pkt->xt.state->sk, ++ nf_send_reset6(nft_net(pkt), nft_sk(pkt), + pkt->skb, nft_hook(pkt)); + break; + case NFT_REJECT_ICMPX_UNREACH: +-- +2.40.1 + diff --git a/queue-5.10/netfilter-nf_tables-add-and-use-nft_thoff-helper.patch b/queue-5.10/netfilter-nf_tables-add-and-use-nft_thoff-helper.patch new file mode 100644 index 00000000000..74e5f8d3778 --- /dev/null +++ b/queue-5.10/netfilter-nf_tables-add-and-use-nft_thoff-helper.patch @@ -0,0 +1,223 @@ +From fc008baf87d021741eeb26c9e7108b6577d4d919 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 May 2021 12:30:06 +0200 +Subject: netfilter: nf_tables: add and use nft_thoff helper + +From: Florian Westphal + +[ Upstream commit 2d7b4ace0754ebaaf71c6824880178d46aa0ab33 ] + +This allows to change storage placement later on without changing readers. + +Signed-off-by: Florian Westphal +Signed-off-by: Pablo Neira Ayuso +Stable-dep-of: 28427f368f0e ("netfilter: nft_exthdr: Fix non-linear header modification") +Signed-off-by: Sasha Levin +--- + include/net/netfilter/nf_tables.h | 5 +++++ + net/netfilter/nf_tables_core.c | 2 +- + net/netfilter/nf_tables_trace.c | 6 +++--- + net/netfilter/nft_exthdr.c | 8 ++++---- + net/netfilter/nft_flow_offload.c | 2 +- + net/netfilter/nft_payload.c | 10 +++++----- + net/netfilter/nft_synproxy.c | 4 ++-- + net/netfilter/nft_tproxy.c | 4 ++-- + 8 files changed, 23 insertions(+), 18 deletions(-) + +diff --git a/include/net/netfilter/nf_tables.h b/include/net/netfilter/nf_tables.h +index 013f11c9de85a..152cd46915d6d 100644 +--- a/include/net/netfilter/nf_tables.h ++++ b/include/net/netfilter/nf_tables.h +@@ -33,6 +33,11 @@ static inline struct sock *nft_sk(const struct nft_pktinfo *pkt) + return pkt->xt.state->sk; + } + ++static inline unsigned int nft_thoff(const struct nft_pktinfo *pkt) ++{ ++ return pkt->xt.thoff; ++} ++ + static inline struct net *nft_net(const struct nft_pktinfo *pkt) + { + return pkt->xt.state->net; +diff --git a/net/netfilter/nf_tables_core.c b/net/netfilter/nf_tables_core.c +index 9dc18429ed875..b0d711d498c66 100644 +--- a/net/netfilter/nf_tables_core.c ++++ b/net/netfilter/nf_tables_core.c +@@ -125,7 +125,7 @@ static bool nft_payload_fast_eval(const struct nft_expr *expr, + else { + if (!pkt->tprot_set) + return false; +- ptr = skb_network_header(skb) + pkt->xt.thoff; ++ ptr = skb_network_header(skb) + nft_thoff(pkt); + } + + ptr += priv->offset; +diff --git a/net/netfilter/nf_tables_trace.c b/net/netfilter/nf_tables_trace.c +index 0cf3278007ba5..e4fe2f0780eb6 100644 +--- a/net/netfilter/nf_tables_trace.c ++++ b/net/netfilter/nf_tables_trace.c +@@ -113,17 +113,17 @@ static int nf_trace_fill_pkt_info(struct sk_buff *nlskb, + int off = skb_network_offset(skb); + unsigned int len, nh_end; + +- nh_end = pkt->tprot_set ? pkt->xt.thoff : skb->len; ++ nh_end = pkt->tprot_set ? nft_thoff(pkt) : skb->len; + len = min_t(unsigned int, nh_end - skb_network_offset(skb), + NFT_TRACETYPE_NETWORK_HSIZE); + if (trace_fill_header(nlskb, NFTA_TRACE_NETWORK_HEADER, skb, off, len)) + return -1; + + if (pkt->tprot_set) { +- len = min_t(unsigned int, skb->len - pkt->xt.thoff, ++ len = min_t(unsigned int, skb->len - nft_thoff(pkt), + NFT_TRACETYPE_TRANSPORT_HSIZE); + if (trace_fill_header(nlskb, NFTA_TRACE_TRANSPORT_HEADER, skb, +- pkt->xt.thoff, len)) ++ nft_thoff(pkt), len)) + return -1; + } + +diff --git a/net/netfilter/nft_exthdr.c b/net/netfilter/nft_exthdr.c +index 2f852ea67e5d5..73f82483f2429 100644 +--- a/net/netfilter/nft_exthdr.c ++++ b/net/netfilter/nft_exthdr.c +@@ -170,7 +170,7 @@ nft_tcp_header_pointer(const struct nft_pktinfo *pkt, + if (!pkt->tprot_set || pkt->tprot != IPPROTO_TCP) + return NULL; + +- tcph = skb_header_pointer(pkt->skb, pkt->xt.thoff, sizeof(*tcph), buffer); ++ tcph = skb_header_pointer(pkt->skb, nft_thoff(pkt), sizeof(*tcph), buffer); + if (!tcph) + return NULL; + +@@ -178,7 +178,7 @@ nft_tcp_header_pointer(const struct nft_pktinfo *pkt, + if (*tcphdr_len < sizeof(*tcph) || *tcphdr_len > len) + return NULL; + +- return skb_header_pointer(pkt->skb, pkt->xt.thoff, *tcphdr_len, buffer); ++ return skb_header_pointer(pkt->skb, nft_thoff(pkt), *tcphdr_len, buffer); + } + + static void nft_exthdr_tcp_eval(const struct nft_expr *expr, +@@ -254,7 +254,7 @@ static void nft_exthdr_tcp_set_eval(const struct nft_expr *expr, + return; + + if (skb_ensure_writable(pkt->skb, +- pkt->xt.thoff + i + priv->len)) ++ nft_thoff(pkt) + i + priv->len)) + return; + + tcph = nft_tcp_header_pointer(pkt, sizeof(buff), buff, +@@ -309,7 +309,7 @@ static void nft_exthdr_sctp_eval(const struct nft_expr *expr, + struct nft_regs *regs, + const struct nft_pktinfo *pkt) + { +- unsigned int offset = pkt->xt.thoff + sizeof(struct sctphdr); ++ unsigned int offset = nft_thoff(pkt) + sizeof(struct sctphdr); + struct nft_exthdr *priv = nft_expr_priv(expr); + u32 *dest = ®s->data[priv->dreg]; + const struct sctp_chunkhdr *sch; +diff --git a/net/netfilter/nft_flow_offload.c b/net/netfilter/nft_flow_offload.c +index d868eade60176..a44340dd3ce64 100644 +--- a/net/netfilter/nft_flow_offload.c ++++ b/net/netfilter/nft_flow_offload.c +@@ -90,7 +90,7 @@ static void nft_flow_offload_eval(const struct nft_expr *expr, + + switch (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.dst.protonum) { + case IPPROTO_TCP: +- tcph = skb_header_pointer(pkt->skb, pkt->xt.thoff, ++ tcph = skb_header_pointer(pkt->skb, nft_thoff(pkt), + sizeof(_tcph), &_tcph); + if (unlikely(!tcph || tcph->fin || tcph->rst)) + goto out; +diff --git a/net/netfilter/nft_payload.c b/net/netfilter/nft_payload.c +index 74c220eeec1a8..b2b63c3653d49 100644 +--- a/net/netfilter/nft_payload.c ++++ b/net/netfilter/nft_payload.c +@@ -110,7 +110,7 @@ void nft_payload_eval(const struct nft_expr *expr, + case NFT_PAYLOAD_TRANSPORT_HEADER: + if (!pkt->tprot_set) + goto err; +- offset = pkt->xt.thoff; ++ offset = nft_thoff(pkt); + break; + default: + BUG(); +@@ -510,7 +510,7 @@ static int nft_payload_l4csum_offset(const struct nft_pktinfo *pkt, + *l4csum_offset = offsetof(struct tcphdr, check); + break; + case IPPROTO_UDP: +- if (!nft_payload_udp_checksum(skb, pkt->xt.thoff)) ++ if (!nft_payload_udp_checksum(skb, nft_thoff(pkt))) + return -1; + fallthrough; + case IPPROTO_UDPLITE: +@@ -523,7 +523,7 @@ static int nft_payload_l4csum_offset(const struct nft_pktinfo *pkt, + return -1; + } + +- *l4csum_offset += pkt->xt.thoff; ++ *l4csum_offset += nft_thoff(pkt); + return 0; + } + +@@ -615,7 +615,7 @@ static void nft_payload_set_eval(const struct nft_expr *expr, + case NFT_PAYLOAD_TRANSPORT_HEADER: + if (!pkt->tprot_set) + goto err; +- offset = pkt->xt.thoff; ++ offset = nft_thoff(pkt); + break; + default: + BUG(); +@@ -646,7 +646,7 @@ static void nft_payload_set_eval(const struct nft_expr *expr, + if (priv->csum_type == NFT_PAYLOAD_CSUM_SCTP && + pkt->tprot == IPPROTO_SCTP && + skb->ip_summed != CHECKSUM_PARTIAL) { +- if (nft_payload_csum_sctp(skb, pkt->xt.thoff)) ++ if (nft_payload_csum_sctp(skb, nft_thoff(pkt))) + goto err; + } + +diff --git a/net/netfilter/nft_synproxy.c b/net/netfilter/nft_synproxy.c +index 59c4dfaf2ea1f..1133e06f3c40e 100644 +--- a/net/netfilter/nft_synproxy.c ++++ b/net/netfilter/nft_synproxy.c +@@ -109,7 +109,7 @@ static void nft_synproxy_do_eval(const struct nft_synproxy *priv, + { + struct synproxy_options opts = {}; + struct sk_buff *skb = pkt->skb; +- int thoff = pkt->xt.thoff; ++ int thoff = nft_thoff(pkt); + const struct tcphdr *tcp; + struct tcphdr _tcph; + +@@ -123,7 +123,7 @@ static void nft_synproxy_do_eval(const struct nft_synproxy *priv, + return; + } + +- tcp = skb_header_pointer(skb, pkt->xt.thoff, ++ tcp = skb_header_pointer(skb, thoff, + sizeof(struct tcphdr), + &_tcph); + if (!tcp) { +diff --git a/net/netfilter/nft_tproxy.c b/net/netfilter/nft_tproxy.c +index c49d318f8e6ed..f8d277e05ef4f 100644 +--- a/net/netfilter/nft_tproxy.c ++++ b/net/netfilter/nft_tproxy.c +@@ -88,9 +88,9 @@ static void nft_tproxy_eval_v6(const struct nft_expr *expr, + const struct nft_tproxy *priv = nft_expr_priv(expr); + struct sk_buff *skb = pkt->skb; + const struct ipv6hdr *iph = ipv6_hdr(skb); +- struct in6_addr taddr; +- int thoff = pkt->xt.thoff; ++ int thoff = nft_thoff(pkt); + struct udphdr _hdr, *hp; ++ struct in6_addr taddr; + __be16 tport = 0; + struct sock *sk; + int l4proto; +-- +2.40.1 + diff --git a/queue-5.10/netfilter-nft_exthdr-break-evaluation-if-setting-tcp.patch b/queue-5.10/netfilter-nft_exthdr-break-evaluation-if-setting-tcp.patch new file mode 100644 index 00000000000..98b427f37af --- /dev/null +++ b/queue-5.10/netfilter-nft_exthdr-break-evaluation-if-setting-tcp.patch @@ -0,0 +1,65 @@ +From e9f67d7e8acd114583f0990dc1e2921888391d51 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 30 Nov 2021 11:34:04 +0100 +Subject: netfilter: nft_exthdr: break evaluation if setting TCP option fails + +From: Pablo Neira Ayuso + +[ Upstream commit 962e5a40358787105f126ab1dc01604da3d169e9 ] + +Break rule evaluation on malformed TCP options. + +Fixes: 99d1712bc41c ("netfilter: exthdr: tcp option set support") +Signed-off-by: Pablo Neira Ayuso +Stable-dep-of: 28427f368f0e ("netfilter: nft_exthdr: Fix non-linear header modification") +Signed-off-by: Sasha Levin +--- + net/netfilter/nft_exthdr.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +diff --git a/net/netfilter/nft_exthdr.c b/net/netfilter/nft_exthdr.c +index 73f82483f2429..10a510fef75c5 100644 +--- a/net/netfilter/nft_exthdr.c ++++ b/net/netfilter/nft_exthdr.c +@@ -236,7 +236,7 @@ static void nft_exthdr_tcp_set_eval(const struct nft_expr *expr, + + tcph = nft_tcp_header_pointer(pkt, sizeof(buff), buff, &tcphdr_len); + if (!tcph) +- return; ++ goto err; + + opt = (u8 *)tcph; + for (i = sizeof(*tcph); i < tcphdr_len - 1; i += optl) { +@@ -251,16 +251,16 @@ static void nft_exthdr_tcp_set_eval(const struct nft_expr *expr, + continue; + + if (i + optl > tcphdr_len || priv->len + priv->offset > optl) +- return; ++ goto err; + + if (skb_ensure_writable(pkt->skb, + nft_thoff(pkt) + i + priv->len)) +- return; ++ goto err; + + tcph = nft_tcp_header_pointer(pkt, sizeof(buff), buff, + &tcphdr_len); + if (!tcph) +- return; ++ goto err; + + offset = i + priv->offset; + +@@ -303,6 +303,9 @@ static void nft_exthdr_tcp_set_eval(const struct nft_expr *expr, + + return; + } ++ return; ++err: ++ regs->verdict.code = NFT_BREAK; + } + + static void nft_exthdr_sctp_eval(const struct nft_expr *expr, +-- +2.40.1 + diff --git a/queue-5.10/netfilter-nft_exthdr-fix-non-linear-header-modificat.patch b/queue-5.10/netfilter-nft_exthdr-fix-non-linear-header-modificat.patch new file mode 100644 index 00000000000..2153dee36da --- /dev/null +++ b/queue-5.10/netfilter-nft_exthdr-fix-non-linear-header-modificat.patch @@ -0,0 +1,71 @@ +From 7d1d46a83980f1a851312ee9f53c3351ab1d1087 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 25 Aug 2023 13:33:27 +0800 +Subject: netfilter: nft_exthdr: Fix non-linear header modification + +From: Xiao Liang + +[ Upstream commit 28427f368f0e08d504ed06e74bc7cc79d6d06511 ] + +Fix skb_ensure_writable() size. Don't use nft_tcp_header_pointer() to +make it explicit that pointers point to the packet (not local buffer). + +Fixes: 99d1712bc41c ("netfilter: exthdr: tcp option set support") +Fixes: 7890cbea66e7 ("netfilter: exthdr: add support for tcp option removal") +Cc: stable@vger.kernel.org +Signed-off-by: Xiao Liang +Signed-off-by: Pablo Neira Ayuso +Signed-off-by: Sasha Levin +--- + net/netfilter/nft_exthdr.c | 20 ++++++++------------ + 1 file changed, 8 insertions(+), 12 deletions(-) + +diff --git a/net/netfilter/nft_exthdr.c b/net/netfilter/nft_exthdr.c +index 7a00867aa64ba..b4682aeabab96 100644 +--- a/net/netfilter/nft_exthdr.c ++++ b/net/netfilter/nft_exthdr.c +@@ -238,7 +238,12 @@ static void nft_exthdr_tcp_set_eval(const struct nft_expr *expr, + if (!tcph) + goto err; + ++ if (skb_ensure_writable(pkt->skb, nft_thoff(pkt) + tcphdr_len)) ++ goto err; ++ ++ tcph = (struct tcphdr *)(pkt->skb->data + nft_thoff(pkt)); + opt = (u8 *)tcph; ++ + for (i = sizeof(*tcph); i < tcphdr_len - 1; i += optl) { + union { + __be16 v16; +@@ -253,15 +258,6 @@ static void nft_exthdr_tcp_set_eval(const struct nft_expr *expr, + if (i + optl > tcphdr_len || priv->len + priv->offset > optl) + goto err; + +- if (skb_ensure_writable(pkt->skb, +- nft_thoff(pkt) + i + priv->len)) +- goto err; +- +- tcph = nft_tcp_header_pointer(pkt, sizeof(buff), buff, +- &tcphdr_len); +- if (!tcph) +- goto err; +- + offset = i + priv->offset; + + switch (priv->len) { +@@ -325,9 +321,9 @@ static void nft_exthdr_tcp_strip_eval(const struct nft_expr *expr, + if (skb_ensure_writable(pkt->skb, nft_thoff(pkt) + tcphdr_len)) + goto drop; + +- opt = (u8 *)nft_tcp_header_pointer(pkt, sizeof(buff), buff, &tcphdr_len); +- if (!opt) +- goto err; ++ tcph = (struct tcphdr *)(pkt->skb->data + nft_thoff(pkt)); ++ opt = (u8 *)tcph; ++ + for (i = sizeof(*tcph); i < tcphdr_len - 1; i += optl) { + unsigned int j; + +-- +2.40.1 + diff --git a/queue-5.10/netfilter-nft_exthdr-support-sctp-chunks.patch b/queue-5.10/netfilter-nft_exthdr-support-sctp-chunks.patch new file mode 100644 index 00000000000..3087d28f3f9 --- /dev/null +++ b/queue-5.10/netfilter-nft_exthdr-support-sctp-chunks.patch @@ -0,0 +1,133 @@ +From 71331e82d5403cc7493c9710166033b0e7b0e637 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 May 2021 17:54:06 +0200 +Subject: netfilter: nft_exthdr: Support SCTP chunks + +From: Phil Sutter + +[ Upstream commit 133dc203d77dff617d9c4673973ef3859be2c476 ] + +Chunks are SCTP header extensions similar in implementation to IPv6 +extension headers or TCP options. Reusing exthdr expression to find and +extract field values from them is therefore pretty straightforward. + +For now, this supports extracting data from chunks at a fixed offset +(and length) only - chunks themselves are an extensible data structure; +in order to make all fields available, a nested extension search is +needed. + +Signed-off-by: Phil Sutter +Signed-off-by: Pablo Neira Ayuso +Stable-dep-of: 28427f368f0e ("netfilter: nft_exthdr: Fix non-linear header modification") +Signed-off-by: Sasha Levin +--- + include/uapi/linux/netfilter/nf_tables.h | 2 + + net/netfilter/nft_exthdr.c | 51 ++++++++++++++++++++++++ + 2 files changed, 53 insertions(+) + +diff --git a/include/uapi/linux/netfilter/nf_tables.h b/include/uapi/linux/netfilter/nf_tables.h +index 98272cb5f6178..1d8dd58f83a50 100644 +--- a/include/uapi/linux/netfilter/nf_tables.h ++++ b/include/uapi/linux/netfilter/nf_tables.h +@@ -797,11 +797,13 @@ enum nft_exthdr_flags { + * @NFT_EXTHDR_OP_IPV6: match against ipv6 extension headers + * @NFT_EXTHDR_OP_TCP: match against tcp options + * @NFT_EXTHDR_OP_IPV4: match against ipv4 options ++ * @NFT_EXTHDR_OP_SCTP: match against sctp chunks + */ + enum nft_exthdr_op { + NFT_EXTHDR_OP_IPV6, + NFT_EXTHDR_OP_TCPOPT, + NFT_EXTHDR_OP_IPV4, ++ NFT_EXTHDR_OP_SCTP, + __NFT_EXTHDR_OP_MAX + }; + #define NFT_EXTHDR_OP_MAX (__NFT_EXTHDR_OP_MAX - 1) +diff --git a/net/netfilter/nft_exthdr.c b/net/netfilter/nft_exthdr.c +index 670dd146fb2b1..2f852ea67e5d5 100644 +--- a/net/netfilter/nft_exthdr.c ++++ b/net/netfilter/nft_exthdr.c +@@ -10,8 +10,10 @@ + #include + #include + #include ++#include + #include + #include ++#include + #include + + struct nft_exthdr { +@@ -303,6 +305,43 @@ static void nft_exthdr_tcp_set_eval(const struct nft_expr *expr, + } + } + ++static void nft_exthdr_sctp_eval(const struct nft_expr *expr, ++ struct nft_regs *regs, ++ const struct nft_pktinfo *pkt) ++{ ++ unsigned int offset = pkt->xt.thoff + sizeof(struct sctphdr); ++ struct nft_exthdr *priv = nft_expr_priv(expr); ++ u32 *dest = ®s->data[priv->dreg]; ++ const struct sctp_chunkhdr *sch; ++ struct sctp_chunkhdr _sch; ++ ++ do { ++ sch = skb_header_pointer(pkt->skb, offset, sizeof(_sch), &_sch); ++ if (!sch || !sch->length) ++ break; ++ ++ if (sch->type == priv->type) { ++ if (priv->flags & NFT_EXTHDR_F_PRESENT) { ++ nft_reg_store8(dest, true); ++ return; ++ } ++ if (priv->offset + priv->len > ntohs(sch->length) || ++ offset + ntohs(sch->length) > pkt->skb->len) ++ break; ++ ++ dest[priv->len / NFT_REG32_SIZE] = 0; ++ memcpy(dest, (char *)sch + priv->offset, priv->len); ++ return; ++ } ++ offset += SCTP_PAD4(ntohs(sch->length)); ++ } while (offset < pkt->skb->len); ++ ++ if (priv->flags & NFT_EXTHDR_F_PRESENT) ++ nft_reg_store8(dest, false); ++ else ++ regs->verdict.code = NFT_BREAK; ++} ++ + static const struct nla_policy nft_exthdr_policy[NFTA_EXTHDR_MAX + 1] = { + [NFTA_EXTHDR_DREG] = { .type = NLA_U32 }, + [NFTA_EXTHDR_TYPE] = { .type = NLA_U8 }, +@@ -502,6 +541,14 @@ static const struct nft_expr_ops nft_exthdr_tcp_set_ops = { + .dump = nft_exthdr_dump_set, + }; + ++static const struct nft_expr_ops nft_exthdr_sctp_ops = { ++ .type = &nft_exthdr_type, ++ .size = NFT_EXPR_SIZE(sizeof(struct nft_exthdr)), ++ .eval = nft_exthdr_sctp_eval, ++ .init = nft_exthdr_init, ++ .dump = nft_exthdr_dump, ++}; ++ + static const struct nft_expr_ops * + nft_exthdr_select_ops(const struct nft_ctx *ctx, + const struct nlattr * const tb[]) +@@ -532,6 +579,10 @@ nft_exthdr_select_ops(const struct nft_ctx *ctx, + return &nft_exthdr_ipv4_ops; + } + break; ++ case NFT_EXTHDR_OP_SCTP: ++ if (tb[NFTA_EXTHDR_DREG]) ++ return &nft_exthdr_sctp_ops; ++ break; + } + + return ERR_PTR(-EOPNOTSUPP); +-- +2.40.1 + diff --git a/queue-5.10/netfilter-use-actual-socket-sk-for-reject-action.patch b/queue-5.10/netfilter-use-actual-socket-sk-for-reject-action.patch new file mode 100644 index 00000000000..f13e40573d9 --- /dev/null +++ b/queue-5.10/netfilter-use-actual-socket-sk-for-reject-action.patch @@ -0,0 +1,191 @@ +From 80112170ca4a9ce763d40994a840075237abdb1a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 21 Nov 2020 12:11:51 +0100 +Subject: netfilter: use actual socket sk for REJECT action + +From: Jan Engelhardt + +[ Upstream commit 04295878beac396dae47ba93141cae0d9386e7ef ] + +True to the message of commit v5.10-rc1-105-g46d6c5ae953c, _do_ +actually make use of state->sk when possible, such as in the REJECT +modules. + +Reported-by: Minqiang Chen +Cc: Jason A. Donenfeld +Signed-off-by: Jan Engelhardt +Signed-off-by: Pablo Neira Ayuso +Stable-dep-of: 28427f368f0e ("netfilter: nft_exthdr: Fix non-linear header modification") +Signed-off-by: Sasha Levin +--- + include/net/netfilter/ipv4/nf_reject.h | 4 ++-- + include/net/netfilter/ipv6/nf_reject.h | 5 ++--- + net/ipv4/netfilter/ipt_REJECT.c | 3 ++- + net/ipv4/netfilter/nf_reject_ipv4.c | 6 +++--- + net/ipv4/netfilter/nft_reject_ipv4.c | 3 ++- + net/ipv6/netfilter/ip6t_REJECT.c | 2 +- + net/ipv6/netfilter/nf_reject_ipv6.c | 5 +++-- + net/ipv6/netfilter/nft_reject_ipv6.c | 3 ++- + net/netfilter/nft_reject_inet.c | 6 ++++-- + 9 files changed, 21 insertions(+), 16 deletions(-) + +diff --git a/include/net/netfilter/ipv4/nf_reject.h b/include/net/netfilter/ipv4/nf_reject.h +index 40e0e0623f461..d8207a82d761a 100644 +--- a/include/net/netfilter/ipv4/nf_reject.h ++++ b/include/net/netfilter/ipv4/nf_reject.h +@@ -8,8 +8,8 @@ + #include + + void nf_send_unreach(struct sk_buff *skb_in, int code, int hook); +-void nf_send_reset(struct net *net, struct sk_buff *oldskb, int hook); +- ++void nf_send_reset(struct net *net, struct sock *, struct sk_buff *oldskb, ++ int hook); + const struct tcphdr *nf_reject_ip_tcphdr_get(struct sk_buff *oldskb, + struct tcphdr *_oth, int hook); + struct iphdr *nf_reject_iphdr_put(struct sk_buff *nskb, +diff --git a/include/net/netfilter/ipv6/nf_reject.h b/include/net/netfilter/ipv6/nf_reject.h +index 4a3ef9ebdf6f6..86e87bc2c5167 100644 +--- a/include/net/netfilter/ipv6/nf_reject.h ++++ b/include/net/netfilter/ipv6/nf_reject.h +@@ -7,9 +7,8 @@ + + void nf_send_unreach6(struct net *net, struct sk_buff *skb_in, unsigned char code, + unsigned int hooknum); +- +-void nf_send_reset6(struct net *net, struct sk_buff *oldskb, int hook); +- ++void nf_send_reset6(struct net *net, struct sock *sk, struct sk_buff *oldskb, ++ int hook); + const struct tcphdr *nf_reject_ip6_tcphdr_get(struct sk_buff *oldskb, + struct tcphdr *otcph, + unsigned int *otcplen, int hook); +diff --git a/net/ipv4/netfilter/ipt_REJECT.c b/net/ipv4/netfilter/ipt_REJECT.c +index e16b98ee6266e..4b88407347629 100644 +--- a/net/ipv4/netfilter/ipt_REJECT.c ++++ b/net/ipv4/netfilter/ipt_REJECT.c +@@ -56,7 +56,8 @@ reject_tg(struct sk_buff *skb, const struct xt_action_param *par) + nf_send_unreach(skb, ICMP_PKT_FILTERED, hook); + break; + case IPT_TCP_RESET: +- nf_send_reset(xt_net(par), skb, hook); ++ nf_send_reset(xt_net(par), par->state->sk, skb, hook); ++ break; + case IPT_ICMP_ECHOREPLY: + /* Doesn't happen. */ + break; +diff --git a/net/ipv4/netfilter/nf_reject_ipv4.c b/net/ipv4/netfilter/nf_reject_ipv4.c +index 93b07739807b2..efe14a6a5d9b8 100644 +--- a/net/ipv4/netfilter/nf_reject_ipv4.c ++++ b/net/ipv4/netfilter/nf_reject_ipv4.c +@@ -112,7 +112,8 @@ static int nf_reject_fill_skb_dst(struct sk_buff *skb_in) + } + + /* Send RST reply */ +-void nf_send_reset(struct net *net, struct sk_buff *oldskb, int hook) ++void nf_send_reset(struct net *net, struct sock *sk, struct sk_buff *oldskb, ++ int hook) + { + struct net_device *br_indev __maybe_unused; + struct sk_buff *nskb; +@@ -144,8 +145,7 @@ void nf_send_reset(struct net *net, struct sk_buff *oldskb, int hook) + niph = nf_reject_iphdr_put(nskb, oldskb, IPPROTO_TCP, + ip4_dst_hoplimit(skb_dst(nskb))); + nf_reject_ip_tcphdr_put(nskb, oldskb, oth); +- +- if (ip_route_me_harder(net, nskb->sk, nskb, RTN_UNSPEC)) ++ if (ip_route_me_harder(net, sk, nskb, RTN_UNSPEC)) + goto free_nskb; + + niph = ip_hdr(nskb); +diff --git a/net/ipv4/netfilter/nft_reject_ipv4.c b/net/ipv4/netfilter/nft_reject_ipv4.c +index e408f813f5d80..ff437e4ed6db0 100644 +--- a/net/ipv4/netfilter/nft_reject_ipv4.c ++++ b/net/ipv4/netfilter/nft_reject_ipv4.c +@@ -27,7 +27,8 @@ static void nft_reject_ipv4_eval(const struct nft_expr *expr, + nf_send_unreach(pkt->skb, priv->icmp_code, nft_hook(pkt)); + break; + case NFT_REJECT_TCP_RST: +- nf_send_reset(nft_net(pkt), pkt->skb, nft_hook(pkt)); ++ nf_send_reset(nft_net(pkt), pkt->xt.state->sk, pkt->skb, ++ nft_hook(pkt)); + break; + default: + break; +diff --git a/net/ipv6/netfilter/ip6t_REJECT.c b/net/ipv6/netfilter/ip6t_REJECT.c +index 3ac5485049f09..a35019d2e480c 100644 +--- a/net/ipv6/netfilter/ip6t_REJECT.c ++++ b/net/ipv6/netfilter/ip6t_REJECT.c +@@ -61,7 +61,7 @@ reject_tg6(struct sk_buff *skb, const struct xt_action_param *par) + /* Do nothing */ + break; + case IP6T_TCP_RESET: +- nf_send_reset6(net, skb, xt_hooknum(par)); ++ nf_send_reset6(net, par->state->sk, skb, xt_hooknum(par)); + break; + case IP6T_ICMP6_POLICY_FAIL: + nf_send_unreach6(net, skb, ICMPV6_POLICY_FAIL, xt_hooknum(par)); +diff --git a/net/ipv6/netfilter/nf_reject_ipv6.c b/net/ipv6/netfilter/nf_reject_ipv6.c +index bf95513736c92..832d9f9cd10ad 100644 +--- a/net/ipv6/netfilter/nf_reject_ipv6.c ++++ b/net/ipv6/netfilter/nf_reject_ipv6.c +@@ -141,7 +141,8 @@ static int nf_reject6_fill_skb_dst(struct sk_buff *skb_in) + return 0; + } + +-void nf_send_reset6(struct net *net, struct sk_buff *oldskb, int hook) ++void nf_send_reset6(struct net *net, struct sock *sk, struct sk_buff *oldskb, ++ int hook) + { + struct net_device *br_indev __maybe_unused; + struct sk_buff *nskb; +@@ -233,7 +234,7 @@ void nf_send_reset6(struct net *net, struct sk_buff *oldskb, int hook) + dev_queue_xmit(nskb); + } else + #endif +- ip6_local_out(net, nskb->sk, nskb); ++ ip6_local_out(net, sk, nskb); + } + EXPORT_SYMBOL_GPL(nf_send_reset6); + +diff --git a/net/ipv6/netfilter/nft_reject_ipv6.c b/net/ipv6/netfilter/nft_reject_ipv6.c +index c1098a1968e1e..7969d1f3018dc 100644 +--- a/net/ipv6/netfilter/nft_reject_ipv6.c ++++ b/net/ipv6/netfilter/nft_reject_ipv6.c +@@ -28,7 +28,8 @@ static void nft_reject_ipv6_eval(const struct nft_expr *expr, + nft_hook(pkt)); + break; + case NFT_REJECT_TCP_RST: +- nf_send_reset6(nft_net(pkt), pkt->skb, nft_hook(pkt)); ++ nf_send_reset6(nft_net(pkt), pkt->xt.state->sk, pkt->skb, ++ nft_hook(pkt)); + break; + default: + break; +diff --git a/net/netfilter/nft_reject_inet.c b/net/netfilter/nft_reject_inet.c +index cf8f2646e93c6..36b219e2e896c 100644 +--- a/net/netfilter/nft_reject_inet.c ++++ b/net/netfilter/nft_reject_inet.c +@@ -28,7 +28,8 @@ static void nft_reject_inet_eval(const struct nft_expr *expr, + nft_hook(pkt)); + break; + case NFT_REJECT_TCP_RST: +- nf_send_reset(nft_net(pkt), pkt->skb, nft_hook(pkt)); ++ nf_send_reset(nft_net(pkt), pkt->xt.state->sk, ++ pkt->skb, nft_hook(pkt)); + break; + case NFT_REJECT_ICMPX_UNREACH: + nf_send_unreach(pkt->skb, +@@ -44,7 +45,8 @@ static void nft_reject_inet_eval(const struct nft_expr *expr, + priv->icmp_code, nft_hook(pkt)); + break; + case NFT_REJECT_TCP_RST: +- nf_send_reset6(nft_net(pkt), pkt->skb, nft_hook(pkt)); ++ nf_send_reset6(nft_net(pkt), pkt->xt.state->sk, ++ pkt->skb, nft_hook(pkt)); + break; + case NFT_REJECT_ICMPX_UNREACH: + nf_send_unreach6(nft_net(pkt), pkt->skb, +-- +2.40.1 + diff --git a/queue-5.10/perf-build-update-build-rule-for-generated-files.patch b/queue-5.10/perf-build-update-build-rule-for-generated-files.patch new file mode 100644 index 00000000000..33448322214 --- /dev/null +++ b/queue-5.10/perf-build-update-build-rule-for-generated-files.patch @@ -0,0 +1,87 @@ +From 96b1738d47e2644e71a84ebf6a9a3ffc696da897 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Jul 2023 19:24:46 -0700 +Subject: perf build: Update build rule for generated files + +From: Namhyung Kim + +[ Upstream commit 7822a8913f4c51c7d1aff793b525d60c3384fb5b ] + +The bison and flex generate C files from the source (.y and .l) +files. When O= option is used, they are saved in a separate directory +but the default build rule assumes the .C files are in the source +directory. So it might read invalid file if there are generated files +from an old version. The same is true for the pmu-events files. + +For example, the following command would cause a build failure: + + $ git checkout v6.3 + $ make -C tools/perf # build in the same directory + + $ git checkout v6.5-rc2 + $ mkdir build # create a build directory + $ make -C tools/perf O=build # build in a different directory but it + # refers files in the source directory + +Let's update the build rule to specify those cases explicitly to depend +on the files in the output directory. + +Note that it's not a complete fix and it needs the next patch for the +include path too. + +Fixes: 80eeb67fe577aa76 ("perf jevents: Program to convert JSON file") +Signed-off-by: Namhyung Kim +Cc: Adrian Hunter +Cc: Andi Kleen +Cc: Anup Sharma +Cc: Ian Rogers +Cc: Ingo Molnar +Cc: Jiri Olsa +Cc: Peter Zijlstra +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20230728022447.1323563-1-namhyung@kernel.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/build/Makefile.build | 10 ++++++++++ + tools/perf/pmu-events/Build | 6 ++++++ + 2 files changed, 16 insertions(+) + +diff --git a/tools/build/Makefile.build b/tools/build/Makefile.build +index cd72016c3cfa7..5a727094ae832 100644 +--- a/tools/build/Makefile.build ++++ b/tools/build/Makefile.build +@@ -116,6 +116,16 @@ $(OUTPUT)%.s: %.c FORCE + $(call rule_mkdir) + $(call if_changed_dep,cc_s_c) + ++# bison and flex files are generated in the OUTPUT directory ++# so it needs a separate rule to depend on them properly ++$(OUTPUT)%-bison.o: $(OUTPUT)%-bison.c FORCE ++ $(call rule_mkdir) ++ $(call if_changed_dep,$(host)cc_o_c) ++ ++$(OUTPUT)%-flex.o: $(OUTPUT)%-flex.c FORCE ++ $(call rule_mkdir) ++ $(call if_changed_dep,$(host)cc_o_c) ++ + # Gather build data: + # obj-y - list of build objects + # subdir-y - list of directories to nest +diff --git a/tools/perf/pmu-events/Build b/tools/perf/pmu-events/Build +index 5ec5ce8c31bab..ea8c41f9c7398 100644 +--- a/tools/perf/pmu-events/Build ++++ b/tools/perf/pmu-events/Build +@@ -25,3 +25,9 @@ $(OUTPUT)pmu-events/pmu-events.c: $(JSON) $(JSON_TEST) $(JEVENTS_PY) + $(call rule_mkdir) + $(Q)$(call echo-cmd,gen)$(PYTHON) $(JEVENTS_PY) $(SRCARCH) pmu-events/arch $@ + endif ++ ++# pmu-events.c file is generated in the OUTPUT directory so it needs a ++# separate rule to depend on it properly ++$(OUTPUT)pmu-events/pmu-events.o: $(PMU_EVENTS_C) ++ $(call rule_mkdir) ++ $(call if_changed_dep,cc_o_c) +-- +2.40.1 + diff --git a/queue-5.10/perf-jevents-switch-build-to-use-jevents.py.patch b/queue-5.10/perf-jevents-switch-build-to-use-jevents.py.patch new file mode 100644 index 00000000000..9b4a976e812 --- /dev/null +++ b/queue-5.10/perf-jevents-switch-build-to-use-jevents.py.patch @@ -0,0 +1,295 @@ +From 7662c434527119517af9ed50d1147363871d008a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 29 Jun 2022 11:25:04 -0700 +Subject: perf jevents: Switch build to use jevents.py + +From: Ian Rogers + +[ Upstream commit 00facc760903be6675870c2749e2cd72140e396e ] + +Generate pmu-events.c using jevents.py rather than the binary built from +jevents.c. + +Add a new config variable NO_JEVENTS that is set when there is no +architecture json or an appropriate python interpreter isn't present. + +When NO_JEVENTS is defined the file pmu-events/empty-pmu-events.c is +copied and used as the pmu-events.c file. + +Signed-off-by: Ian Rogers +Tested-by: John Garry +Cc: Alexander Shishkin +Cc: Ananth Narayan +Cc: Andi Kleen +Cc: Andrew Kilroy +Cc: Caleb Biggers +Cc: Felix Fietkau +Cc: Ian Rogers +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: Kajol Jain +Cc: Kan Liang +Cc: Kshipra Bopardikar +Cc: Like Xu +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Nick Forrington +Cc: Paul Clarke +Cc: Perry Taylor +Cc: Peter Zijlstra +Cc: Qi Liu +Cc: Ravi Bangoria +Cc: Sandipan Das +Cc: Santosh Shukla +Cc: Stephane Eranian +Cc: Will Deacon +Cc: Xing Zhengjun +Link: https://lore.kernel.org/r/20220629182505.406269-4-irogers@google.com +Signed-off-by: Arnaldo Carvalho de Melo +Stable-dep-of: 7822a8913f4c ("perf build: Update build rule for generated files") +Signed-off-by: Sasha Levin +--- + tools/perf/Makefile.config | 19 +++ + tools/perf/Makefile.perf | 1 + + tools/perf/pmu-events/Build | 13 +- + tools/perf/pmu-events/empty-pmu-events.c | 158 +++++++++++++++++++++++ + 4 files changed, 189 insertions(+), 2 deletions(-) + create mode 100644 tools/perf/pmu-events/empty-pmu-events.c + +diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config +index 89905b4e93091..a92d5422041ee 100644 +--- a/tools/perf/Makefile.config ++++ b/tools/perf/Makefile.config +@@ -824,6 +824,25 @@ else + endif + endif + ++ifneq ($(NO_JEVENTS),1) ++ ifeq ($(wildcard pmu-events/arch/$(SRCARCH)/mapfile.csv),) ++ NO_JEVENTS := 1 ++ endif ++endif ++ifneq ($(NO_JEVENTS),1) ++ NO_JEVENTS := 0 ++ ifndef PYTHON ++ $(warning No python interpreter disabling jevent generation) ++ NO_JEVENTS := 1 ++ else ++ # jevents.py uses f-strings present in Python 3.6 released in Dec. 2016. ++ JEVENTS_PYTHON_GOOD := $(shell $(PYTHON) -c 'import sys;print("1" if(sys.version_info.major >= 3 and sys.version_info.minor >= 6) else "0")' 2> /dev/null) ++ ifneq ($(JEVENTS_PYTHON_GOOD), 1) ++ $(warning Python interpreter too old (older than 3.6) disabling jevent generation) ++ NO_JEVENTS := 1 ++ endif ++ endif ++endif + + ifndef NO_LIBBFD + ifeq ($(feature-libbfd), 1) +diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf +index e41a8f9b99d2d..ef25028b2e2fa 100644 +--- a/tools/perf/Makefile.perf ++++ b/tools/perf/Makefile.perf +@@ -634,6 +634,7 @@ JEVENTS := $(OUTPUT)pmu-events/jevents + JEVENTS_IN := $(OUTPUT)pmu-events/jevents-in.o + + PMU_EVENTS_IN := $(OUTPUT)pmu-events/pmu-events-in.o ++export NO_JEVENTS + + export JEVENTS + +diff --git a/tools/perf/pmu-events/Build b/tools/perf/pmu-events/Build +index a055dee6a46af..5ec5ce8c31bab 100644 +--- a/tools/perf/pmu-events/Build ++++ b/tools/perf/pmu-events/Build +@@ -9,10 +9,19 @@ JSON = $(shell [ -d $(JDIR) ] && \ + JDIR_TEST = pmu-events/arch/test + JSON_TEST = $(shell [ -d $(JDIR_TEST) ] && \ + find $(JDIR_TEST) -name '*.json') ++JEVENTS_PY = pmu-events/jevents.py + + # + # Locate/process JSON files in pmu-events/arch/ + # directory and create tables in pmu-events.c. + # +-$(OUTPUT)pmu-events/pmu-events.c: $(JSON) $(JSON_TEST) $(JEVENTS) +- $(Q)$(call echo-cmd,gen)$(JEVENTS) $(SRCARCH) pmu-events/arch $(OUTPUT)pmu-events/pmu-events.c $(V) ++ ++ifeq ($(NO_JEVENTS),1) ++$(OUTPUT)pmu-events/pmu-events.c: pmu-events/empty-pmu-events.c ++ $(call rule_mkdir) ++ $(Q)$(call echo-cmd,gen)cp $< $@ ++else ++$(OUTPUT)pmu-events/pmu-events.c: $(JSON) $(JSON_TEST) $(JEVENTS_PY) ++ $(call rule_mkdir) ++ $(Q)$(call echo-cmd,gen)$(PYTHON) $(JEVENTS_PY) $(SRCARCH) pmu-events/arch $@ ++endif +diff --git a/tools/perf/pmu-events/empty-pmu-events.c b/tools/perf/pmu-events/empty-pmu-events.c +new file mode 100644 +index 0000000000000..77e655c6f1162 +--- /dev/null ++++ b/tools/perf/pmu-events/empty-pmu-events.c +@@ -0,0 +1,158 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * An empty pmu-events.c file used when there is no architecture json files in ++ * arch or when the jevents.py script cannot be run. ++ * ++ * The test cpu/soc is provided for testing. ++ */ ++#include "pmu-events/pmu-events.h" ++ ++static const struct pmu_event pme_test_soc_cpu[] = { ++ { ++ .name = "l3_cache_rd", ++ .event = "event=0x40", ++ .desc = "L3 cache access, read", ++ .topic = "cache", ++ .long_desc = "Attributable Level 3 cache access, read", ++ }, ++ { ++ .name = "segment_reg_loads.any", ++ .event = "event=0x6,period=200000,umask=0x80", ++ .desc = "Number of segment register loads", ++ .topic = "other", ++ }, ++ { ++ .name = "dispatch_blocked.any", ++ .event = "event=0x9,period=200000,umask=0x20", ++ .desc = "Memory cluster signals to block micro-op dispatch for any reason", ++ .topic = "other", ++ }, ++ { ++ .name = "eist_trans", ++ .event = "event=0x3a,period=200000,umask=0x0", ++ .desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions", ++ .topic = "other", ++ }, ++ { ++ .name = "uncore_hisi_ddrc.flux_wcmd", ++ .event = "event=0x2", ++ .desc = "DDRC write commands. Unit: hisi_sccl,ddrc ", ++ .topic = "uncore", ++ .long_desc = "DDRC write commands", ++ .pmu = "hisi_sccl,ddrc", ++ }, ++ { ++ .name = "unc_cbo_xsnp_response.miss_eviction", ++ .event = "event=0x22,umask=0x81", ++ .desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core. Unit: uncore_cbox ", ++ .topic = "uncore", ++ .long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core", ++ .pmu = "uncore_cbox", ++ }, ++ { ++ .name = "event-hyphen", ++ .event = "event=0xe0,umask=0x00", ++ .desc = "UNC_CBO_HYPHEN. Unit: uncore_cbox ", ++ .topic = "uncore", ++ .long_desc = "UNC_CBO_HYPHEN", ++ .pmu = "uncore_cbox", ++ }, ++ { ++ .name = "event-two-hyph", ++ .event = "event=0xc0,umask=0x00", ++ .desc = "UNC_CBO_TWO_HYPH. Unit: uncore_cbox ", ++ .topic = "uncore", ++ .long_desc = "UNC_CBO_TWO_HYPH", ++ .pmu = "uncore_cbox", ++ }, ++ { ++ .name = "uncore_hisi_l3c.rd_hit_cpipe", ++ .event = "event=0x7", ++ .desc = "Total read hits. Unit: hisi_sccl,l3c ", ++ .topic = "uncore", ++ .long_desc = "Total read hits", ++ .pmu = "hisi_sccl,l3c", ++ }, ++ { ++ .name = "uncore_imc_free_running.cache_miss", ++ .event = "event=0x12", ++ .desc = "Total cache misses. Unit: uncore_imc_free_running ", ++ .topic = "uncore", ++ .long_desc = "Total cache misses", ++ .pmu = "uncore_imc_free_running", ++ }, ++ { ++ .name = "uncore_imc.cache_hits", ++ .event = "event=0x34", ++ .desc = "Total cache hits. Unit: uncore_imc ", ++ .topic = "uncore", ++ .long_desc = "Total cache hits", ++ .pmu = "uncore_imc", ++ }, ++ { ++ .name = "bp_l1_btb_correct", ++ .event = "event=0x8a", ++ .desc = "L1 BTB Correction", ++ .topic = "branch", ++ }, ++ { ++ .name = "bp_l2_btb_correct", ++ .event = "event=0x8b", ++ .desc = "L2 BTB Correction", ++ .topic = "branch", ++ }, ++ { ++ .name = 0, ++ .event = 0, ++ .desc = 0, ++ }, ++}; ++ ++const struct pmu_events_map pmu_events_map[] = { ++ { ++ .cpuid = "testcpu", ++ .version = "v1", ++ .type = "core", ++ .table = pme_test_soc_cpu, ++ }, ++ { ++ .cpuid = 0, ++ .version = 0, ++ .type = 0, ++ .table = 0, ++ }, ++}; ++ ++static const struct pmu_event pme_test_soc_sys[] = { ++ { ++ .name = "sys_ddr_pmu.write_cycles", ++ .event = "event=0x2b", ++ .desc = "ddr write-cycles event. Unit: uncore_sys_ddr_pmu ", ++ .compat = "v8", ++ .topic = "uncore", ++ .pmu = "uncore_sys_ddr_pmu", ++ }, ++ { ++ .name = "sys_ccn_pmu.read_cycles", ++ .event = "config=0x2c", ++ .desc = "ccn read-cycles event. Unit: uncore_sys_ccn_pmu ", ++ .compat = "0x01", ++ .topic = "uncore", ++ .pmu = "uncore_sys_ccn_pmu", ++ }, ++ { ++ .name = 0, ++ .event = 0, ++ .desc = 0, ++ }, ++}; ++ ++const struct pmu_sys_events pmu_sys_event_tables[] = { ++ { ++ .table = pme_test_soc_sys, ++ .name = "pme_test_soc_sys", ++ }, ++ { ++ .table = 0 ++ }, ++}; +-- +2.40.1 + diff --git a/queue-5.10/series b/queue-5.10/series index 342302491d9..bfe6d3c2542 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -61,3 +61,30 @@ gpio-tb10x-fix-an-error-handling-path-in-tb10x_gpio_.patch i2c-mux-demux-pinctrl-check-the-return-value-of-devm.patch netfilter-nf_tables-unregister-flowtable-hooks-on-ne.patch netfilter-nf_tables-double-hook-unregistration-in-ne.patch +input-i8042-rename-i8042-x86ia64io.h-to-i8042-acpipn.patch +input-i8042-add-quirk-for-tuxedo-gemini-17-gen1-clev.patch +perf-jevents-switch-build-to-use-jevents.py.patch +perf-build-update-build-rule-for-generated-files.patch +mmc-renesas_sdhi-probe-into-tmio-after-scc-parameter.patch +mmc-renesas_sdhi-populate-scc-pointer-at-the-proper-.patch +mmc-tmio-support-custom-irq-masks.patch +mmc-renesas_sdhi-register-irqs-before-registering-co.patch +media-venus-core-add-io-base-variables-for-each-bloc.patch +media-venus-hfi-pm-firmware-convert-to-block-relativ.patch +media-venus-hfi-define-additional-6xx-registers.patch +media-venus-core-add-differentiator-is_v6-core.patch +media-venus-hfi-add-a-6xx-boot-logic.patch +media-venus-hfi_venus-write-to-vidc_ctrl_init-after-.patch +arm64-dts-qcom-sdm845-db845c-mark-cont-splash-memory.patch +bpf-fix-issue-in-verifying-allow_ptr_leaks.patch +netfilter-use-actual-socket-sk-for-reject-action.patch +netfilter-nft_exthdr-support-sctp-chunks.patch +netfilter-nf_tables-add-and-use-nft_sk-helper.patch +netfilter-nf_tables-add-and-use-nft_thoff-helper.patch +netfilter-nft_exthdr-break-evaluation-if-setting-tcp.patch +netfilter-exthdr-add-support-for-tcp-option-removal.patch +netfilter-nft_exthdr-fix-non-linear-header-modificat.patch +ata-libata-rename-link-flag-ata_lflag_no_db_delay.patch +ata-ahci-add-support-for-amd-a85-fch-hudson-d4.patch +ata-ahci-rename-board_ahci_mobile.patch +ata-ahci-add-elkhart-lake-ahci-controller.patch