From: Greg Kroah-Hartman Date: Sun, 16 Jul 2023 19:22:29 +0000 (+0200) Subject: 4.19-stable patches X-Git-Tag: v6.1.39~31 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=dc231a3fb32774243ee8a6a64fb7944d14e39795;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: spi-spi-fsl-spi-allow-changing-bits_per_word-while-cs-is-still-active.patch spi-spi-fsl-spi-relax-message-sanity-checking-a-little.patch spi-spi-fsl-spi-remove-always-true-conditional-in-fsl_spi_do_one_msg.patch --- diff --git a/queue-4.19/series b/queue-4.19/series index 8fec94defe6..a9e164a778b 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -119,3 +119,6 @@ integrity-fix-possible-multiple-allocation-in-integrity_inode_get.patch jffs2-reduce-stack-usage-in-jffs2_build_xattr_subsystem.patch btrfs-fix-race-when-deleting-quota-root-from-the-dirty-cow-roots-list.patch arm-orion5x-fix-d2net-gpio-initialization.patch +spi-spi-fsl-spi-remove-always-true-conditional-in-fsl_spi_do_one_msg.patch +spi-spi-fsl-spi-relax-message-sanity-checking-a-little.patch +spi-spi-fsl-spi-allow-changing-bits_per_word-while-cs-is-still-active.patch diff --git a/queue-4.19/spi-spi-fsl-spi-allow-changing-bits_per_word-while-cs-is-still-active.patch b/queue-4.19/spi-spi-fsl-spi-allow-changing-bits_per_word-while-cs-is-still-active.patch new file mode 100644 index 00000000000..e408cdd52bc --- /dev/null +++ b/queue-4.19/spi-spi-fsl-spi-allow-changing-bits_per_word-while-cs-is-still-active.patch @@ -0,0 +1,72 @@ +From a798a7086c38d91d304132c194cff9f02197f5cd Mon Sep 17 00:00:00 2001 +From: Rasmus Villemoes +Date: Wed, 27 Mar 2019 14:30:51 +0000 +Subject: spi: spi-fsl-spi: allow changing bits_per_word while CS is still active + +From: Rasmus Villemoes + +commit a798a7086c38d91d304132c194cff9f02197f5cd upstream. + +Commit c9bfcb315104 (spi_mpc83xx: much improved driver) introduced +logic to ensure bits_per_word and speed_hz stay the same for a series +of spi_transfers with CS active, arguing that + + The current driver may cause glitches on SPI CLK line since one + must disable the SPI controller before changing any HW settings. + +This sounds quite reasonable. So this is a quite naive attempt at +relaxing this sanity checking to only ensure that speed_hz is +constant - in the faint hope that if we do not causes changes to the +clock-related fields of the SPMODE register (DIV16 and PM), those +glitches won't appear. + +The purpose of this change is to allow automatically optimizing large +transfers to use 32 bits-per-word; taking one interrupt for every byte +is extremely slow. + +Signed-off-by: Rasmus Villemoes +Signed-off-by: Mark Brown +Cc: Christophe Leroy +Signed-off-by: Greg Kroah-Hartman +--- + drivers/spi/spi-fsl-spi.c | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +--- a/drivers/spi/spi-fsl-spi.c ++++ b/drivers/spi/spi-fsl-spi.c +@@ -339,7 +339,7 @@ static int fsl_spi_do_one_msg(struct spi + struct spi_transfer *t, *first; + unsigned int cs_change; + const int nsecs = 50; +- int status; ++ int status, last_bpw; + + /* + * In CPU mode, optimize large byte transfers to use larger +@@ -378,21 +378,22 @@ static int fsl_spi_do_one_msg(struct spi + if (cs_change) + first = t; + cs_change = t->cs_change; +- if ((first->bits_per_word != t->bits_per_word) || +- (first->speed_hz != t->speed_hz)) { ++ if (first->speed_hz != t->speed_hz) { + dev_err(&spi->dev, +- "bits_per_word/speed_hz cannot change while CS is active\n"); ++ "speed_hz cannot change while CS is active\n"); + return -EINVAL; + } + } + ++ last_bpw = -1; + cs_change = 1; + status = -EINVAL; + list_for_each_entry(t, &m->transfers, transfer_list) { +- if (cs_change) ++ if (cs_change || last_bpw != t->bits_per_word) + status = fsl_spi_setup_transfer(spi, t); + if (status < 0) + break; ++ last_bpw = t->bits_per_word; + + if (cs_change) { + fsl_spi_chipselect(spi, BITBANG_CS_ACTIVE); diff --git a/queue-4.19/spi-spi-fsl-spi-relax-message-sanity-checking-a-little.patch b/queue-4.19/spi-spi-fsl-spi-relax-message-sanity-checking-a-little.patch new file mode 100644 index 00000000000..0b001f6556d --- /dev/null +++ b/queue-4.19/spi-spi-fsl-spi-relax-message-sanity-checking-a-little.patch @@ -0,0 +1,46 @@ +From 17ecffa289489e8442306bbc62ebb964e235cdad Mon Sep 17 00:00:00 2001 +From: Rasmus Villemoes +Date: Wed, 27 Mar 2019 14:30:51 +0000 +Subject: spi: spi-fsl-spi: relax message sanity checking a little + +From: Rasmus Villemoes + +commit 17ecffa289489e8442306bbc62ebb964e235cdad upstream. + +The comment says that we should not allow changes (to +bits_per_word/speed_hz) while CS is active, and indeed the code below +does fsl_spi_setup_transfer() when the ->cs_change of the previous +spi_transfer was set (and for the very first transfer). + +So the sanity checking is a bit too strict - we can change it to +follow the same logic as is used by the actual transfer loop. + +Signed-off-by: Rasmus Villemoes +Signed-off-by: Mark Brown +Cc: Christophe Leroy +Signed-off-by: Greg Kroah-Hartman +--- + drivers/spi/spi-fsl-spi.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/spi/spi-fsl-spi.c ++++ b/drivers/spi/spi-fsl-spi.c +@@ -373,13 +373,15 @@ static int fsl_spi_do_one_msg(struct spi + } + + /* Don't allow changes if CS is active */ +- first = list_first_entry(&m->transfers, struct spi_transfer, +- transfer_list); ++ cs_change = 1; + list_for_each_entry(t, &m->transfers, transfer_list) { ++ if (cs_change) ++ first = t; ++ cs_change = t->cs_change; + if ((first->bits_per_word != t->bits_per_word) || + (first->speed_hz != t->speed_hz)) { + dev_err(&spi->dev, +- "bits_per_word/speed_hz should be same for the same SPI transfer\n"); ++ "bits_per_word/speed_hz cannot change while CS is active\n"); + return -EINVAL; + } + } diff --git a/queue-4.19/spi-spi-fsl-spi-remove-always-true-conditional-in-fsl_spi_do_one_msg.patch b/queue-4.19/spi-spi-fsl-spi-remove-always-true-conditional-in-fsl_spi_do_one_msg.patch new file mode 100644 index 00000000000..92a1a73ed6e --- /dev/null +++ b/queue-4.19/spi-spi-fsl-spi-remove-always-true-conditional-in-fsl_spi_do_one_msg.patch @@ -0,0 +1,39 @@ +From 24c363623361b430fb79459ca922e816e6f48603 Mon Sep 17 00:00:00 2001 +From: Rasmus Villemoes +Date: Wed, 27 Mar 2019 14:30:50 +0000 +Subject: spi: spi-fsl-spi: remove always-true conditional in fsl_spi_do_one_msg + +From: Rasmus Villemoes + +commit 24c363623361b430fb79459ca922e816e6f48603 upstream. + +__spi_validate() in the generic SPI code sets ->speed_hz and +->bits_per_word to non-zero values, so this condition is always true. + +Signed-off-by: Rasmus Villemoes +Signed-off-by: Mark Brown +Cc: Christophe Leroy +Signed-off-by: Greg Kroah-Hartman +--- + drivers/spi/spi-fsl-spi.c | 10 ++++------ + 1 file changed, 4 insertions(+), 6 deletions(-) + +--- a/drivers/spi/spi-fsl-spi.c ++++ b/drivers/spi/spi-fsl-spi.c +@@ -387,12 +387,10 @@ static int fsl_spi_do_one_msg(struct spi + cs_change = 1; + status = -EINVAL; + list_for_each_entry(t, &m->transfers, transfer_list) { +- if (t->bits_per_word || t->speed_hz) { +- if (cs_change) +- status = fsl_spi_setup_transfer(spi, t); +- if (status < 0) +- break; +- } ++ if (cs_change) ++ status = fsl_spi_setup_transfer(spi, t); ++ if (status < 0) ++ break; + + if (cs_change) { + fsl_spi_chipselect(spi, BITBANG_CS_ACTIVE);