From: Greg Kroah-Hartman Date: Mon, 29 Jun 2020 10:49:09 +0000 (+0200) Subject: 4.19-stable patches X-Git-Tag: v5.7.7~32 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=dc3343753ee8f22a7af00235d61eba4fd49c2105;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: acpi-sysfs-fix-pm_profile_attr-type.patch alsa-hda-add-nvidia-codec-ids-9a-9d-through-a0-to-patch-table.patch alsa-hda-realtek-add-quirk-for-msi-ge63-laptop.patch erofs-fix-partially-uninitialized-misuse-in-z_erofs_onlinepage_fixup.patch kvm-nvmx-plumb-l2-gpa-through-to-pml-emulation.patch kvm-x86-fix-msr-range-of-apic-registers-in-x2apic-mode.patch x86-asm-64-align-start-of-__clear_user-loop-to-16-bytes.patch --- diff --git a/queue-4.19/acpi-sysfs-fix-pm_profile_attr-type.patch b/queue-4.19/acpi-sysfs-fix-pm_profile_attr-type.patch new file mode 100644 index 00000000000..8400508fd28 --- /dev/null +++ b/queue-4.19/acpi-sysfs-fix-pm_profile_attr-type.patch @@ -0,0 +1,94 @@ +From e6d701dca9893990d999fd145e3e07223c002b06 Mon Sep 17 00:00:00 2001 +From: Nathan Chancellor +Date: Thu, 11 Jun 2020 21:51:50 -0700 +Subject: ACPI: sysfs: Fix pm_profile_attr type + +From: Nathan Chancellor + +commit e6d701dca9893990d999fd145e3e07223c002b06 upstream. + +When running a kernel with Clang's Control Flow Integrity implemented, +there is a violation that happens when accessing +/sys/firmware/acpi/pm_profile: + +$ cat /sys/firmware/acpi/pm_profile +0 + +$ dmesg +... +[ 17.352564] ------------[ cut here ]------------ +[ 17.352568] CFI failure (target: acpi_show_profile+0x0/0x8): +[ 17.352572] WARNING: CPU: 3 PID: 497 at kernel/cfi.c:29 __cfi_check_fail+0x33/0x40 +[ 17.352573] Modules linked in: +[ 17.352575] CPU: 3 PID: 497 Comm: cat Tainted: G W 5.7.0-microsoft-standard+ #1 +[ 17.352576] RIP: 0010:__cfi_check_fail+0x33/0x40 +[ 17.352577] Code: 48 c7 c7 50 b3 85 84 48 c7 c6 50 0a 4e 84 e8 a4 d8 60 00 85 c0 75 02 5b c3 48 c7 c7 dc 5e 49 84 48 89 de 31 c0 e8 7d 06 eb ff <0f> 0b 5b c3 00 00 cc cc 00 00 cc cc 00 85 f6 74 25 41 b9 ea ff ff +[ 17.352577] RSP: 0018:ffffaa6dc3c53d30 EFLAGS: 00010246 +[ 17.352578] RAX: 331267e0c06cee00 RBX: ffffffff83d85890 RCX: ffffffff8483a6f8 +[ 17.352579] RDX: ffff9cceabbb37c0 RSI: 0000000000000082 RDI: ffffffff84bb9e1c +[ 17.352579] RBP: ffffffff845b2bc8 R08: 0000000000000001 R09: ffff9cceabbba200 +[ 17.352579] R10: 000000000000019d R11: 0000000000000000 R12: ffff9cc947766f00 +[ 17.352580] R13: ffffffff83d6bd50 R14: ffff9ccc6fa80000 R15: ffffffff845bd328 +[ 17.352582] FS: 00007fdbc8d13580(0000) GS:ffff9cce91ac0000(0000) knlGS:0000000000000000 +[ 17.352582] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[ 17.352583] CR2: 00007fdbc858e000 CR3: 00000005174d0000 CR4: 0000000000340ea0 +[ 17.352584] Call Trace: +[ 17.352586] ? rev_id_show+0x8/0x8 +[ 17.352587] ? __cfi_check+0x45bac/0x4b640 +[ 17.352589] ? kobj_attr_show+0x73/0x80 +[ 17.352590] ? sysfs_kf_seq_show+0xc1/0x140 +[ 17.352592] ? ext4_seq_options_show.cfi_jt+0x8/0x8 +[ 17.352593] ? seq_read+0x180/0x600 +[ 17.352595] ? sysfs_create_file_ns.cfi_jt+0x10/0x10 +[ 17.352596] ? tlbflush_read_file+0x8/0x8 +[ 17.352597] ? __vfs_read+0x6b/0x220 +[ 17.352598] ? handle_mm_fault+0xa23/0x11b0 +[ 17.352599] ? vfs_read+0xa2/0x130 +[ 17.352599] ? ksys_read+0x6a/0xd0 +[ 17.352601] ? __do_sys_getpgrp+0x8/0x8 +[ 17.352602] ? do_syscall_64+0x72/0x120 +[ 17.352603] ? entry_SYSCALL_64_after_hwframe+0x44/0xa9 +[ 17.352604] ---[ end trace 7b1fa81dc897e419 ]--- + +When /sys/firmware/acpi/pm_profile is read, sysfs_kf_seq_show is called, +which in turn calls kobj_attr_show, which gets the ->show callback +member by calling container_of on attr (casting it to struct +kobj_attribute) then calls it. + +There is a CFI violation because pm_profile_attr is of type +struct device_attribute but kobj_attr_show calls ->show expecting it +to be from struct kobj_attribute. CFI checking ensures that function +pointer types match when doing indirect calls. Fix pm_profile_attr to +be defined in terms of kobj_attribute so there is no violation or +mismatch. + +Fixes: 362b646062b2 ("ACPI: Export FADT pm_profile integer value to userspace") +Link: https://github.com/ClangBuiltLinux/linux/issues/1051 +Reported-by: yuu ichii +Signed-off-by: Nathan Chancellor +Cc: 3.10+ # 3.10+ +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/acpi/sysfs.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/acpi/sysfs.c ++++ b/drivers/acpi/sysfs.c +@@ -935,13 +935,13 @@ static void __exit interrupt_stats_exit( + } + + static ssize_t +-acpi_show_profile(struct device *dev, struct device_attribute *attr, ++acpi_show_profile(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) + { + return sprintf(buf, "%d\n", acpi_gbl_FADT.preferred_profile); + } + +-static const struct device_attribute pm_profile_attr = ++static const struct kobj_attribute pm_profile_attr = + __ATTR(pm_profile, S_IRUGO, acpi_show_profile, NULL); + + static ssize_t hotplug_enabled_show(struct kobject *kobj, diff --git a/queue-4.19/alsa-hda-add-nvidia-codec-ids-9a-9d-through-a0-to-patch-table.patch b/queue-4.19/alsa-hda-add-nvidia-codec-ids-9a-9d-through-a0-to-patch-table.patch new file mode 100644 index 00000000000..be91298573b --- /dev/null +++ b/queue-4.19/alsa-hda-add-nvidia-codec-ids-9a-9d-through-a0-to-patch-table.patch @@ -0,0 +1,36 @@ +From adb36a8203831e40494a92095dacd566b2ad4a69 Mon Sep 17 00:00:00 2001 +From: Aaron Plattner +Date: Thu, 11 Jun 2020 11:08:45 -0700 +Subject: ALSA: hda: Add NVIDIA codec IDs 9a & 9d through a0 to patch table + +From: Aaron Plattner + +commit adb36a8203831e40494a92095dacd566b2ad4a69 upstream. + +These IDs are for upcoming NVIDIA chips with audio functions that are largely +similar to the existing ones. + +Signed-off-by: Aaron Plattner +Cc: +Link: https://lore.kernel.org/r/20200611180845.39942-1-aplattner@nvidia.com +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/pci/hda/patch_hdmi.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/sound/pci/hda/patch_hdmi.c ++++ b/sound/pci/hda/patch_hdmi.c +@@ -3898,6 +3898,11 @@ HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI + HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi), + HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP", patch_nvhdmi), + HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP", patch_nvhdmi), ++HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP", patch_nvhdmi), ++HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP", patch_nvhdmi), ++HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP", patch_nvhdmi), ++HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP", patch_nvhdmi), ++HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP", patch_nvhdmi), + HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch), + HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch), + HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi), diff --git a/queue-4.19/alsa-hda-realtek-add-quirk-for-msi-ge63-laptop.patch b/queue-4.19/alsa-hda-realtek-add-quirk-for-msi-ge63-laptop.patch new file mode 100644 index 00000000000..dbf9fbc1712 --- /dev/null +++ b/queue-4.19/alsa-hda-realtek-add-quirk-for-msi-ge63-laptop.patch @@ -0,0 +1,33 @@ +From a0b03952a797591d4b6d6fa7b9b7872e27783729 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 16 Jun 2020 15:21:50 +0200 +Subject: ALSA: hda/realtek - Add quirk for MSI GE63 laptop + +From: Takashi Iwai + +commit a0b03952a797591d4b6d6fa7b9b7872e27783729 upstream. + +MSI GE63 laptop with ALC1220 codec requires the very same quirk +(ALC1220_FIXUP_CLEVO_P950) as other MSI devices for the proper sound +output. + +BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=208057 +Cc: +Link: https://lore.kernel.org/r/20200616132150.8778-1-tiwai@suse.de +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/pci/hda/patch_realtek.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -2446,6 +2446,7 @@ static const struct snd_pci_quirk alc882 + SND_PCI_QUIRK(0x1458, 0xa0b8, "Gigabyte AZ370-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS), + SND_PCI_QUIRK(0x1458, 0xa0cd, "Gigabyte X570 Aorus Master", ALC1220_FIXUP_CLEVO_P950), + SND_PCI_QUIRK(0x1458, 0xa0ce, "Gigabyte X570 Aorus Xtreme", ALC1220_FIXUP_CLEVO_P950), ++ SND_PCI_QUIRK(0x1462, 0x11f7, "MSI-GE63", ALC1220_FIXUP_CLEVO_P950), + SND_PCI_QUIRK(0x1462, 0x1228, "MSI-GP63", ALC1220_FIXUP_CLEVO_P950), + SND_PCI_QUIRK(0x1462, 0x1275, "MSI-GL63", ALC1220_FIXUP_CLEVO_P950), + SND_PCI_QUIRK(0x1462, 0x1276, "MSI-GL73", ALC1220_FIXUP_CLEVO_P950), diff --git a/queue-4.19/erofs-fix-partially-uninitialized-misuse-in-z_erofs_onlinepage_fixup.patch b/queue-4.19/erofs-fix-partially-uninitialized-misuse-in-z_erofs_onlinepage_fixup.patch new file mode 100644 index 00000000000..56b4d60b24c --- /dev/null +++ b/queue-4.19/erofs-fix-partially-uninitialized-misuse-in-z_erofs_onlinepage_fixup.patch @@ -0,0 +1,69 @@ +From 3c597282887fd55181578996dca52ce697d985a5 Mon Sep 17 00:00:00 2001 +From: Gao Xiang +Date: Fri, 19 Jun 2020 07:43:49 +0800 +Subject: erofs: fix partially uninitialized misuse in z_erofs_onlinepage_fixup + +From: Gao Xiang + +commit 3c597282887fd55181578996dca52ce697d985a5 upstream. + +Hongyu reported "id != index" in z_erofs_onlinepage_fixup() with +specific aarch64 environment easily, which wasn't shown before. + +After digging into that, I found that high 32 bits of page->private +was set to 0xaaaaaaaa rather than 0 (due to z_erofs_onlinepage_init +behavior with specific compiler options). Actually we only use low +32 bits to keep the page information since page->private is only 4 +bytes on most 32-bit platforms. However z_erofs_onlinepage_fixup() +uses the upper 32 bits by mistake. + +Let's fix it now. + +Reported-and-tested-by: Hongyu Jin +Fixes: 3883a79abd02 ("staging: erofs: introduce VLE decompression support") +Cc: # 4.19+ +Reviewed-by: Chao Yu +Link: https://lore.kernel.org/r/20200618234349.22553-1-hsiangkao@aol.com +Signed-off-by: Gao Xiang +Signed-off-by: Greg Kroah-Hartman + + +--- + drivers/staging/erofs/unzip_vle.h | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +--- a/drivers/staging/erofs/unzip_vle.h ++++ b/drivers/staging/erofs/unzip_vle.h +@@ -169,22 +169,22 @@ static inline void z_erofs_onlinepage_in + static inline void z_erofs_onlinepage_fixup(struct page *page, + uintptr_t index, bool down) + { +- unsigned long *p, o, v, id; +-repeat: +- p = &page_private(page); +- o = READ_ONCE(*p); ++ union z_erofs_onlinepage_converter u = { .v = &page_private(page) }; ++ int orig, orig_index, val; + +- id = o >> Z_EROFS_ONLINEPAGE_INDEX_SHIFT; +- if (id) { ++repeat: ++ orig = atomic_read(u.o); ++ orig_index = orig >> Z_EROFS_ONLINEPAGE_INDEX_SHIFT; ++ if (orig_index) { + if (!index) + return; + +- BUG_ON(id != index); ++ DBG_BUGON(orig_index != index); + } + +- v = (index << Z_EROFS_ONLINEPAGE_INDEX_SHIFT) | +- ((o & Z_EROFS_ONLINEPAGE_COUNT_MASK) + (unsigned)down); +- if (cmpxchg(p, o, v) != o) ++ val = (index << Z_EROFS_ONLINEPAGE_INDEX_SHIFT) | ++ ((orig & Z_EROFS_ONLINEPAGE_COUNT_MASK) + (unsigned int)down); ++ if (atomic_cmpxchg(u.o, orig, val) != orig) + goto repeat; + } + diff --git a/queue-4.19/kvm-nvmx-plumb-l2-gpa-through-to-pml-emulation.patch b/queue-4.19/kvm-nvmx-plumb-l2-gpa-through-to-pml-emulation.patch new file mode 100644 index 00000000000..9503106664c --- /dev/null +++ b/queue-4.19/kvm-nvmx-plumb-l2-gpa-through-to-pml-emulation.patch @@ -0,0 +1,121 @@ +From 2dbebf7ae1ed9a420d954305e2c9d5ed39ec57c3 Mon Sep 17 00:00:00 2001 +From: Sean Christopherson +Date: Mon, 22 Jun 2020 14:58:29 -0700 +Subject: KVM: nVMX: Plumb L2 GPA through to PML emulation + +From: Sean Christopherson + +commit 2dbebf7ae1ed9a420d954305e2c9d5ed39ec57c3 upstream. + +Explicitly pass the L2 GPA to kvm_arch_write_log_dirty(), which for all +intents and purposes is vmx_write_pml_buffer(), instead of having the +latter pull the GPA from vmcs.GUEST_PHYSICAL_ADDRESS. If the dirty bit +update is the result of KVM emulation (rare for L2), then the GPA in the +VMCS may be stale and/or hold a completely unrelated GPA. + +Fixes: c5f983f6e8455 ("nVMX: Implement emulated Page Modification Logging") +Cc: stable@vger.kernel.org +Signed-off-by: Sean Christopherson +Message-Id: <20200622215832.22090-2-sean.j.christopherson@intel.com> +Signed-off-by: Paolo Bonzini +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/include/asm/kvm_host.h | 2 +- + arch/x86/kvm/mmu.c | 4 ++-- + arch/x86/kvm/mmu.h | 2 +- + arch/x86/kvm/paging_tmpl.h | 7 ++++--- + arch/x86/kvm/vmx.c | 5 ++--- + 5 files changed, 10 insertions(+), 10 deletions(-) + +--- a/arch/x86/include/asm/kvm_host.h ++++ b/arch/x86/include/asm/kvm_host.h +@@ -1099,7 +1099,7 @@ struct kvm_x86_ops { + void (*enable_log_dirty_pt_masked)(struct kvm *kvm, + struct kvm_memory_slot *slot, + gfn_t offset, unsigned long mask); +- int (*write_log_dirty)(struct kvm_vcpu *vcpu); ++ int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); + + /* pmu operations of sub-arch */ + const struct kvm_pmu_ops *pmu_ops; +--- a/arch/x86/kvm/mmu.c ++++ b/arch/x86/kvm/mmu.c +@@ -1732,10 +1732,10 @@ void kvm_arch_mmu_enable_log_dirty_pt_ma + * Emulate arch specific page modification logging for the + * nested hypervisor + */ +-int kvm_arch_write_log_dirty(struct kvm_vcpu *vcpu) ++int kvm_arch_write_log_dirty(struct kvm_vcpu *vcpu, gpa_t l2_gpa) + { + if (kvm_x86_ops->write_log_dirty) +- return kvm_x86_ops->write_log_dirty(vcpu); ++ return kvm_x86_ops->write_log_dirty(vcpu, l2_gpa); + + return 0; + } +--- a/arch/x86/kvm/mmu.h ++++ b/arch/x86/kvm/mmu.h +@@ -215,7 +215,7 @@ void kvm_mmu_gfn_disallow_lpage(struct k + void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn); + bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, + struct kvm_memory_slot *slot, u64 gfn); +-int kvm_arch_write_log_dirty(struct kvm_vcpu *vcpu); ++int kvm_arch_write_log_dirty(struct kvm_vcpu *vcpu, gpa_t l2_gpa); + + int kvm_mmu_post_init_vm(struct kvm *kvm); + void kvm_mmu_pre_destroy_vm(struct kvm *kvm); +--- a/arch/x86/kvm/paging_tmpl.h ++++ b/arch/x86/kvm/paging_tmpl.h +@@ -202,7 +202,7 @@ static inline unsigned FNAME(gpte_access + static int FNAME(update_accessed_dirty_bits)(struct kvm_vcpu *vcpu, + struct kvm_mmu *mmu, + struct guest_walker *walker, +- int write_fault) ++ gpa_t addr, int write_fault) + { + unsigned level, index; + pt_element_t pte, orig_pte; +@@ -227,7 +227,7 @@ static int FNAME(update_accessed_dirty_b + !(pte & PT_GUEST_DIRTY_MASK)) { + trace_kvm_mmu_set_dirty_bit(table_gfn, index, sizeof(pte)); + #if PTTYPE == PTTYPE_EPT +- if (kvm_arch_write_log_dirty(vcpu)) ++ if (kvm_arch_write_log_dirty(vcpu, addr)) + return -EINVAL; + #endif + pte |= PT_GUEST_DIRTY_MASK; +@@ -424,7 +424,8 @@ retry_walk: + (PT_GUEST_DIRTY_SHIFT - PT_GUEST_ACCESSED_SHIFT); + + if (unlikely(!accessed_dirty)) { +- ret = FNAME(update_accessed_dirty_bits)(vcpu, mmu, walker, write_fault); ++ ret = FNAME(update_accessed_dirty_bits)(vcpu, mmu, walker, ++ addr, write_fault); + if (unlikely(ret < 0)) + goto error; + else if (ret) +--- a/arch/x86/kvm/vmx.c ++++ b/arch/x86/kvm/vmx.c +@@ -13845,11 +13845,10 @@ static void vmx_flush_log_dirty(struct k + kvm_flush_pml_buffers(kvm); + } + +-static int vmx_write_pml_buffer(struct kvm_vcpu *vcpu) ++static int vmx_write_pml_buffer(struct kvm_vcpu *vcpu, gpa_t gpa) + { + struct vmcs12 *vmcs12; + struct vcpu_vmx *vmx = to_vmx(vcpu); +- gpa_t gpa; + struct page *page = NULL; + u64 *pml_address; + +@@ -13870,7 +13869,7 @@ static int vmx_write_pml_buffer(struct k + return 1; + } + +- gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS) & ~0xFFFull; ++ gpa &= ~0xFFFull; + + page = kvm_vcpu_gpa_to_page(vcpu, vmcs12->pml_address); + if (is_error_page(page)) diff --git a/queue-4.19/kvm-x86-fix-msr-range-of-apic-registers-in-x2apic-mode.patch b/queue-4.19/kvm-x86-fix-msr-range-of-apic-registers-in-x2apic-mode.patch new file mode 100644 index 00000000000..82140b376b0 --- /dev/null +++ b/queue-4.19/kvm-x86-fix-msr-range-of-apic-registers-in-x2apic-mode.patch @@ -0,0 +1,45 @@ +From bf10bd0be53282183f374af23577b18b5fbf7801 Mon Sep 17 00:00:00 2001 +From: Xiaoyao Li +Date: Tue, 16 Jun 2020 15:33:07 +0800 +Subject: KVM: X86: Fix MSR range of APIC registers in X2APIC mode + +From: Xiaoyao Li + +commit bf10bd0be53282183f374af23577b18b5fbf7801 upstream. + +Only MSR address range 0x800 through 0x8ff is architecturally reserved +and dedicated for accessing APIC registers in x2APIC mode. + +Fixes: 0105d1a52640 ("KVM: x2apic interface to lapic") +Signed-off-by: Xiaoyao Li +Message-Id: <20200616073307.16440-1-xiaoyao.li@intel.com> +Cc: stable@vger.kernel.org +Reviewed-by: Sean Christopherson +Reviewed-by: Jim Mattson +Signed-off-by: Paolo Bonzini +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/kvm/x86.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/x86/kvm/x86.c ++++ b/arch/x86/kvm/x86.c +@@ -2499,7 +2499,7 @@ int kvm_set_msr_common(struct kvm_vcpu * + return kvm_mtrr_set_msr(vcpu, msr, data); + case MSR_IA32_APICBASE: + return kvm_set_apic_base(vcpu, msr_info); +- case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff: ++ case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff: + return kvm_x2apic_msr_write(vcpu, msr, data); + case MSR_IA32_TSCDEADLINE: + kvm_set_lapic_tscdeadline_msr(vcpu, data); +@@ -2797,7 +2797,7 @@ int kvm_get_msr_common(struct kvm_vcpu * + case MSR_IA32_APICBASE: + msr_info->data = kvm_get_apic_base(vcpu); + break; +- case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff: ++ case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff: + return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data); + break; + case MSR_IA32_TSCDEADLINE: diff --git a/queue-4.19/series b/queue-4.19/series index 9afa1061b76..cd0e00674f6 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -101,3 +101,10 @@ arm64-sve-fix-build-failure-when-arm64_sve-y-and-sys.patch kbuild-improve-cc-option-to-clean-up-all-temporary-f.patch blktrace-break-out-of-blktrace-setup-on-concurrent-c.patch risc-v-don-t-allow-write-exec-only-page-mapping-requ.patch +alsa-hda-add-nvidia-codec-ids-9a-9d-through-a0-to-patch-table.patch +alsa-hda-realtek-add-quirk-for-msi-ge63-laptop.patch +acpi-sysfs-fix-pm_profile_attr-type.patch +erofs-fix-partially-uninitialized-misuse-in-z_erofs_onlinepage_fixup.patch +kvm-x86-fix-msr-range-of-apic-registers-in-x2apic-mode.patch +kvm-nvmx-plumb-l2-gpa-through-to-pml-emulation.patch +x86-asm-64-align-start-of-__clear_user-loop-to-16-bytes.patch diff --git a/queue-4.19/x86-asm-64-align-start-of-__clear_user-loop-to-16-bytes.patch b/queue-4.19/x86-asm-64-align-start-of-__clear_user-loop-to-16-bytes.patch new file mode 100644 index 00000000000..252e4ea034b --- /dev/null +++ b/queue-4.19/x86-asm-64-align-start-of-__clear_user-loop-to-16-bytes.patch @@ -0,0 +1,64 @@ +From bb5570ad3b54e7930997aec76ab68256d5236d94 Mon Sep 17 00:00:00 2001 +From: Matt Fleming +Date: Thu, 18 Jun 2020 11:20:02 +0100 +Subject: x86/asm/64: Align start of __clear_user() loop to 16-bytes + +From: Matt Fleming + +commit bb5570ad3b54e7930997aec76ab68256d5236d94 upstream. + +x86 CPUs can suffer severe performance drops if a tight loop, such as +the ones in __clear_user(), straddles a 16-byte instruction fetch +window, or worse, a 64-byte cacheline. This issues was discovered in the +SUSE kernel with the following commit, + + 1153933703d9 ("x86/asm/64: Micro-optimize __clear_user() - Use immediate constants") + +which increased the code object size from 10 bytes to 15 bytes and +caused the 8-byte copy loop in __clear_user() to be split across a +64-byte cacheline. + +Aligning the start of the loop to 16-bytes makes this fit neatly inside +a single instruction fetch window again and restores the performance of +__clear_user() which is used heavily when reading from /dev/zero. + +Here are some numbers from running libmicro's read_z* and pread_z* +microbenchmarks which read from /dev/zero: + + Zen 1 (Naples) + + libmicro-file + 5.7.0-rc6 5.7.0-rc6 5.7.0-rc6 + revert-1153933703d9+ align16+ + Time mean95-pread_z100k 9.9195 ( 0.00%) 5.9856 ( 39.66%) 5.9938 ( 39.58%) + Time mean95-pread_z10k 1.1378 ( 0.00%) 0.7450 ( 34.52%) 0.7467 ( 34.38%) + Time mean95-pread_z1k 0.2623 ( 0.00%) 0.2251 ( 14.18%) 0.2252 ( 14.15%) + Time mean95-pread_zw100k 9.9974 ( 0.00%) 6.0648 ( 39.34%) 6.0756 ( 39.23%) + Time mean95-read_z100k 9.8940 ( 0.00%) 5.9885 ( 39.47%) 5.9994 ( 39.36%) + Time mean95-read_z10k 1.1394 ( 0.00%) 0.7483 ( 34.33%) 0.7482 ( 34.33%) + +Note that this doesn't affect Haswell or Broadwell microarchitectures +which seem to avoid the alignment issue by executing the loop straight +out of the Loop Stream Detector (verified using perf events). + +Fixes: 1153933703d9 ("x86/asm/64: Micro-optimize __clear_user() - Use immediate constants") +Signed-off-by: Matt Fleming +Signed-off-by: Borislav Petkov +Cc: # v4.19+ +Link: https://lkml.kernel.org/r/20200618102002.30034-1-matt@codeblueprint.co.uk +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/lib/usercopy_64.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/x86/lib/usercopy_64.c ++++ b/arch/x86/lib/usercopy_64.c +@@ -23,6 +23,7 @@ unsigned long __clear_user(void __user * + asm volatile( + " testq %[size8],%[size8]\n" + " jz 4f\n" ++ " .align 16\n" + "0: movq $0,(%[dst])\n" + " addq $8,%[dst]\n" + " decl %%ecx ; jnz 0b\n"