From: Segher Boessenkool <segher@gcc.gnu.org>
Date: Wed, 12 Apr 2017 08:32:56 +0000 (+0200)
Subject: rs6000: Enforce quad_address_p in TImode atomic_load/store (PR80382)
X-Git-Tag: basepoints/gcc-8~80
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=de81c2f2f9499ba85257b597cdfce3f088758d48;p=thirdparty%2Fgcc.git

rs6000: Enforce quad_address_p in TImode atomic_load/store (PR80382)

Whatever expand expands to should be valid instructions.  The defined
instructions here have a quad_memory_operand predicate, which boils
down to quad_address_p on the address, so let's test for that instead
of only disallowing indexed addresses.


	* config/rs6000/sync.md (atomic_load<mode>, atomic_store<mode): Test
	for quad_address_p for TImode, instead of just not indexed_address.

From-SVN: r246868
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ba4ae5f7b447..1458921cb449 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,6 @@
 2017-04-12  Segher Boessenkool  <segher@kernel.crashing.org>
 
+	PR target/80382
 	* config/rs6000/sync.md (atomic_load<mode>, atomic_store<mode): Test
 	for quad_address_p for TImode, instead of just not indexed_address.