From: Greg Kroah-Hartman Date: Sun, 10 Oct 2021 10:22:36 +0000 (+0200) Subject: 5.10-stable patches X-Git-Tag: v5.14.12~28 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=e09c720e8a80e6ade634bf7379e1faa303a80796;p=thirdparty%2Fkernel%2Fstable-queue.git 5.10-stable patches added patches: riscv-flush-current-cpu-icache-before-other-cpus.patch --- diff --git a/queue-5.10/riscv-flush-current-cpu-icache-before-other-cpus.patch b/queue-5.10/riscv-flush-current-cpu-icache-before-other-cpus.patch new file mode 100644 index 00000000000..00900a3245c --- /dev/null +++ b/queue-5.10/riscv-flush-current-cpu-icache-before-other-cpus.patch @@ -0,0 +1,79 @@ +From bb8958d5dc79acbd071397abb57b8756375fe1ce Mon Sep 17 00:00:00 2001 +From: Alexandre Ghiti +Date: Sat, 18 Sep 2021 18:02:21 +0200 +Subject: riscv: Flush current cpu icache before other cpus + +From: Alexandre Ghiti + +commit bb8958d5dc79acbd071397abb57b8756375fe1ce upstream. + +On SiFive Unmatched, I recently fell onto the following BUG when booting: + +[ 0.000000] ftrace: allocating 36610 entries in 144 pages +[ 0.000000] Oops - illegal instruction [#1] +[ 0.000000] Modules linked in: +[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.13.1+ #5 +[ 0.000000] Hardware name: SiFive HiFive Unmatched A00 (DT) +[ 0.000000] epc : riscv_cpuid_to_hartid_mask+0x6/0xae +[ 0.000000] ra : __sbi_rfence_v02+0xc8/0x10a +[ 0.000000] epc : ffffffff80007240 ra : ffffffff80009964 sp : ffffffff81803e10 +[ 0.000000] gp : ffffffff81a1ea70 tp : ffffffff8180f500 t0 : ffffffe07fe30000 +[ 0.000000] t1 : 0000000000000004 t2 : 0000000000000000 s0 : ffffffff81803e60 +[ 0.000000] s1 : 0000000000000000 a0 : ffffffff81a22238 a1 : ffffffff81803e10 +[ 0.000000] a2 : 0000000000000000 a3 : 0000000000000000 a4 : 0000000000000000 +[ 0.000000] a5 : 0000000000000000 a6 : ffffffff8000989c a7 : 0000000052464e43 +[ 0.000000] s2 : ffffffff81a220c8 s3 : 0000000000000000 s4 : 0000000000000000 +[ 0.000000] s5 : 0000000000000000 s6 : 0000000200000100 s7 : 0000000000000001 +[ 0.000000] s8 : ffffffe07fe04040 s9 : ffffffff81a22c80 s10: 0000000000001000 +[ 0.000000] s11: 0000000000000004 t3 : 0000000000000001 t4 : 0000000000000008 +[ 0.000000] t5 : ffffffcf04000808 t6 : ffffffe3ffddf188 +[ 0.000000] status: 0000000200000100 badaddr: 0000000000000000 cause: 0000000000000002 +[ 0.000000] [] riscv_cpuid_to_hartid_mask+0x6/0xae +[ 0.000000] [] sbi_remote_fence_i+0x1e/0x26 +[ 0.000000] [] flush_icache_all+0x12/0x1a +[ 0.000000] [] patch_text_nosync+0x26/0x32 +[ 0.000000] [] ftrace_init_nop+0x52/0x8c +[ 0.000000] [] ftrace_process_locs.isra.0+0x29c/0x360 +[ 0.000000] [] ftrace_init+0x80/0x130 +[ 0.000000] [] start_kernel+0x5c4/0x8f6 +[ 0.000000] ---[ end trace f67eb9af4d8d492b ]--- +[ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task! +[ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]--- + +While ftrace is looping over a list of addresses to patch, it always failed +when patching the same function: riscv_cpuid_to_hartid_mask. Looking at the +backtrace, the illegal instruction is encountered in this same function. +However, patch_text_nosync, after patching the instructions, calls +flush_icache_range. But looking at what happens in this function: + +flush_icache_range -> flush_icache_all + -> sbi_remote_fence_i + -> __sbi_rfence_v02 + -> riscv_cpuid_to_hartid_mask + +The icache and dcache of the current cpu are never synchronized between the +patching of riscv_cpuid_to_hartid_mask and calling this same function. + +So fix this by flushing the current cpu's icache before asking for the other +cpus to do the same. + +Signed-off-by: Alexandre Ghiti +Fixes: fab957c11efe ("RISC-V: Atomic and Locking Code") +Cc: stable@vger.kernel.org +Signed-off-by: Palmer Dabbelt +Signed-off-by: Greg Kroah-Hartman +--- + arch/riscv/mm/cacheflush.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/riscv/mm/cacheflush.c ++++ b/arch/riscv/mm/cacheflush.c +@@ -16,6 +16,8 @@ static void ipi_remote_fence_i(void *inf + + void flush_icache_all(void) + { ++ local_flush_icache_all(); ++ + if (IS_ENABLED(CONFIG_RISCV_SBI)) + sbi_remote_fence_i(NULL); + else diff --git a/queue-5.10/series b/queue-5.10/series index ce42df57e97..9028d7a628f 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -17,3 +17,4 @@ xen-balloon-fix-cancelled-balloon-action.patch arm-dts-omap3430-sdp-fix-nand-device-node.patch arm-dts-imx6dl-yapp4-fix-lp5562-led-driver-probe.patch arm-dts-qcom-apq8064-use-compatible-which-contains-chipid.patch +riscv-flush-current-cpu-icache-before-other-cpus.patch