From: Biju Das <biju.das.jz@bp.renesas.com>
Date: Tue, 24 Mar 2026 11:43:14 +0000 (+0000)
Subject: arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=e130dde0ab3ea21932cac19c27cf7650f53fa78d;p=thirdparty%2Fkernel%2Flinux.git

arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM

Add initial support for the RZ/G3L SMARC SoM with 2GiB memory and
extal clk.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20260324114329.268249-10-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
new file mode 100644
index 0000000000000..ab4950671c7c8
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for R9A08G046L48 SMARC SoM board.
+ *
+ * Copyright (C) 2026 Renesas Electronics Corp.
+ */
+
+/ {
+	compatible = "renesas,rzg3l-smarcm", "renesas,r9a08g046l48", "renesas,r9a08g046";
+
+	memory@48000000 {
+		device_type = "memory";
+		/* First 128MiB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x78000000>;
+	};
+};
+
+&extal_clk {
+	clock-frequency = <24000000>;
+};