From: Julian Seward Date: Thu, 4 Nov 2004 15:20:15 +0000 (+0000) Subject: Fill in a few more Memcheck-supporting cases. X-Git-Tag: svn/VALGRIND_3_0_1^2~851 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=e51b03ec3e0475c97077f72bf4c8f09d81649395;p=thirdparty%2Fvalgrind.git Fill in a few more Memcheck-supporting cases. git-svn-id: svn://svn.valgrind.org/vex/trunk@483 --- diff --git a/VEX/priv/host-x86/isel.c b/VEX/priv/host-x86/isel.c index 1696564f8f..64b8149434 100644 --- a/VEX/priv/host-x86/isel.c +++ b/VEX/priv/host-x86/isel.c @@ -849,6 +849,15 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ) addInstr(env, X86Instr_Set32(cond,dst)); return dst; } + case Iop_1Sto32: { + /* could do better than this, but for now ... */ + HReg dst = newVRegI(env); + X86CondCode cond = iselCondCode(env, e->Iex.Unop.arg); + addInstr(env, X86Instr_Set32(cond,dst)); + addInstr(env, X86Instr_Sh32(Xsh_SHL, 31, X86RM_Reg(dst))); + addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, X86RM_Reg(dst))); + return dst; + } case Iop_Ctz32: { /* Count trailing zeroes, implemented by x86 'bsfl' */ HReg dst = newVRegI(env); @@ -2209,7 +2218,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) addInstr(env, mk_MOVsd_RR(hregX86_EAX(),dstLo) ); return; } - if (retty == Ity_I32 || retty == Ity_I16) { + if (retty == Ity_I32 || retty == Ity_I16 || retty == Ity_I8) { /* The returned value is in %eax. Park it in the register associated with tmp. */ HReg dst = lookupIRTemp(env, d->tmp); diff --git a/VEX/priv/ir/irdefs.c b/VEX/priv/ir/irdefs.c index eec3759b3f..dbd38b6b84 100644 --- a/VEX/priv/ir/irdefs.c +++ b/VEX/priv/ir/irdefs.c @@ -113,10 +113,13 @@ void ppIROp ( IROp op ) case Iop_32Uto64: vex_printf("32Uto64"); return; case Iop_32to8: vex_printf("32to8"); return; + case Iop_And1: vex_printf("And1"); return; + case Iop_Or1: vex_printf("Or1"); return; case Iop_Not1: vex_printf("Not1"); return; case Iop_32to1: vex_printf("32to1"); return; case Iop_1Uto8: vex_printf("1Uto8"); return; case Iop_1Uto32: vex_printf("1Uto32"); return; + case Iop_1Sto32: vex_printf("1Sto32"); return; case Iop_MullS8: vex_printf("MullS8"); return; case Iop_MullS16: vex_printf("MullS16"); return; @@ -967,9 +970,11 @@ void typeOfPrimop ( IROp op, IRType* t_dst, IRType* t_arg1, IRType* t_arg2 ) case Iop_32HLto64: BINARY(Ity_I64,Ity_I32,Ity_I32); + case Iop_And1: + case Iop_Or1: BINARY(Ity_Bit,Ity_Bit,Ity_Bit); case Iop_Not1: UNARY(Ity_Bit,Ity_Bit); case Iop_1Uto8: UNARY(Ity_I8,Ity_Bit); - case Iop_1Uto32: UNARY(Ity_I32,Ity_Bit); + case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I32,Ity_Bit); case Iop_32to1: UNARY(Ity_Bit,Ity_I32); case Iop_8Uto32: case Iop_8Sto32: diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h index d8da1963dc..e4943cff7e 100644 --- a/VEX/pub/libvex_ir.h +++ b/VEX/pub/libvex_ir.h @@ -187,6 +187,8 @@ typedef Iop_32HLto64, // :: (I32,I32) -> I64 /* 1-bit stuff */ Iop_Not1, /* :: Ity_Bit -> Ity_Bit */ + Iop_Or1, /* :: Ity_Bit, Ity_Bit -> Ity_Bit */ + Iop_And1, /* :: Ity_Bit, Ity_Bit -> Ity_Bit */ Iop_32to1, /* :: Ity_I32 -> Ity_Bit, just select bit[0] */ Iop_1Uto8, /* :: Ity_Bit -> Ity_I8, unsigned widen */ Iop_1Uto32, /* :: Ity_Bit -> Ity_I32, unsigned widen */