From: Hans-Peter Nilsson <hp@axis.com>
Date: Tue, 21 Apr 2026 18:06:49 +0000 (+0200)
Subject: Fix PR124959, gcc.dg/hoist-register-pressure-1.c, *-[23].c, failing
X-Git-Tag: basepoints/gcc-17~11
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=e6bc437a340486307eb5413f32a52deb888d2bbe;p=thirdparty%2Fgcc.git

Fix PR124959, gcc.dg/hoist-register-pressure-1.c, *-[23].c, failing

These test-cases got typo-corrected in
r16-8316-g630b53cd4ff1c3, which exposed them failing for
cris-elf.  Though, at one time they were passing for the
right reason, and bisection shows they'd start failing when
the CRIS target was CC0-converted, and for the same reason
the S/390 32-bit fails.  See the pre-existing comment in the
test and also see the PR for details, including a suggested
plan how to fix the optimization pass, if someone is
interested in an "easy hack".  Though admittedly, the missed
optimization doesn't affect many targets.

Regarding the target pattern selector expression, I went for
the simplest possible, even though I'm including CRIS in the
64-bit exception.

	PR target/124959
	* gcc.dg/hoist-register-pressure-1.c,
	gcc.dg/hoist-register-pressure-2.c,
	gcc.dg/hoist-register-pressure-3.c: Exclude cris-*-*.
---

diff --git a/gcc/testsuite/gcc.dg/hoist-register-pressure-1.c b/gcc/testsuite/gcc.dg/hoist-register-pressure-1.c
index 516357d3c92..38d19a8914a 100644
--- a/gcc/testsuite/gcc.dg/hoist-register-pressure-1.c
+++ b/gcc/testsuite/gcc.dg/hoist-register-pressure-1.c
@@ -3,7 +3,7 @@
    be assigned without clobbering cc.  For a PLUS rtx on S/390 this
    requires a load address instruction which is fine on 64 bit but
    cannot be used on 31 bit since it does a 31 bit add only.  */
-/* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { { { ! s390*-*-* } || lp64 } && nonpic } } } } */
+/* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { { { ! { s390*-*-* cris-*-* } } || lp64 } && nonpic } } } } */
 
 #define BUF 100
 long a[BUF];
diff --git a/gcc/testsuite/gcc.dg/hoist-register-pressure-2.c b/gcc/testsuite/gcc.dg/hoist-register-pressure-2.c
index 2e128323378..d8af93db653 100644
--- a/gcc/testsuite/gcc.dg/hoist-register-pressure-2.c
+++ b/gcc/testsuite/gcc.dg/hoist-register-pressure-2.c
@@ -3,7 +3,7 @@
    be assigned without clobbering cc.  For a PLUS rtx on S/390 this
    requires a load address instruction which is fine on 64 bit but
    cannot be used on 31 bit since it does a 31 bit add only.  */
-/* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { { ! s390*-*-* } || lp64 } } } } */
+/* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { { ! { s390*-*-* cris-*-* } } || lp64 } } } } */
 
 #define BUF 100
 long a[BUF];
diff --git a/gcc/testsuite/gcc.dg/hoist-register-pressure-3.c b/gcc/testsuite/gcc.dg/hoist-register-pressure-3.c
index 0a705edd79c..97b22c6a969 100644
--- a/gcc/testsuite/gcc.dg/hoist-register-pressure-3.c
+++ b/gcc/testsuite/gcc.dg/hoist-register-pressure-3.c
@@ -3,7 +3,7 @@
    be assigned without clobbering cc.  For a PLUS rtx on S/390 this
    requires a load address instruction which is fine on 64 bit but
    cannot be used on 31 bit since it does a 31 bit add only.  */
-/* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { { ! s390*-*-* } || lp64 } } } } */
+/* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { { ! { s390*-*-* cris-*-* } } || lp64 } } } } */
 
 #define BUF 100
 long a[BUF];