From: Yixun Lan Date: Fri, 20 Mar 2026 07:15:37 +0000 (+0000) Subject: dt-bindings: usb: dwc3: spacemit: add support for K3 SoC X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=e7e86965a69d0f6797116e54dda01b56deca71c0;p=thirdparty%2Fkernel%2Fstable.git dt-bindings: usb: dwc3: spacemit: add support for K3 SoC Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC. The USB2.0 host controller in K3 SoC actually use DWC3 IP but only support USB2.0 functionality, thus in the hardware layer, it has only one USB2 PHY. While in K1 SoC, the USB controller has both USB2 and USB3 Combo PHY connected, but able to work in a reduced USB2.0 mode which requres only one USB2 PHY, leaves the USB3 Combo PHY to PCIe controller. So both K1 and K3 SoC are able to work in the USB2.0 mode which requires one PHY. Explicitly reduce number of phy property to minimal one. Signed-off-by: Yixun Lan Acked-by: Conor Dooley Link: https://patch.msgid.link/20260320-02-k3-usb20-support-v2-1-308ea0e44038@kernel.org Signed-off-by: Greg Kroah-Hartman --- diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml index 0f0b5e061ca1..cc27b363ca79 100644 --- a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml @@ -27,7 +27,9 @@ allOf: properties: compatible: - const: spacemit,k1-dwc3 + enum: + - spacemit,k1-dwc3 + - spacemit,k3-dwc3 reg: maxItems: 1 @@ -42,11 +44,13 @@ properties: maxItems: 1 phys: + minItems: 1 items: - description: phandle to USB2/HS PHY - description: phandle to USB3/SS PHY phy-names: + minItems: 1 items: - const: usb2-phy - const: usb3-phy