From: Greg Kroah-Hartman <gregkh@suse.de>
Date: Sun, 27 Nov 2011 23:58:08 +0000 (+0900)
Subject: 3.1 patches
X-Git-Tag: v3.0.13~22
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=ea4dd66af42a817de22d9148c2195fd4c2602221;p=thirdparty%2Fkernel%2Fstable-queue.git

3.1 patches

added patches:
	drm-radeon-kms-fix-up-gpio-i2c-mask-bits-for-r4xx.patch
---

diff --git a/queue-3.1/drm-radeon-kms-fix-up-gpio-i2c-mask-bits-for-r4xx.patch b/queue-3.1/drm-radeon-kms-fix-up-gpio-i2c-mask-bits-for-r4xx.patch
new file mode 100644
index 00000000000..f38481f8c28
--- /dev/null
+++ b/queue-3.1/drm-radeon-kms-fix-up-gpio-i2c-mask-bits-for-r4xx.patch
@@ -0,0 +1,43 @@
+From 6c47e5c23aa2a7c54ad7ac13af4bd56cd9e703bf Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 14 Nov 2011 14:32:01 -0500
+Subject: drm/radeon/kms: fix up gpio i2c mask bits for r4xx
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 6c47e5c23aa2a7c54ad7ac13af4bd56cd9e703bf upstream.
+
+Fixes i2c test failures when i2c_algo_bit.bit_test=1.
+
+The hw doesn't actually require a mask, so just set it
+to the default mask bits for r1xx-r4xx radeon ddc.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: Jean Delvare <khali@linux-fr.org>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+
+---
+ drivers/gpu/drm/radeon/radeon_atombios.c |   12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_atombios.c
++++ b/drivers/gpu/drm/radeon/radeon_atombios.c
+@@ -85,6 +85,18 @@ static inline struct radeon_i2c_bus_rec
+ 		for (i = 0; i < num_indices; i++) {
+ 			gpio = &i2c_info->asGPIO_Info[i];
+ 
++			/* r4xx mask is technically not used by the hw, so patch in the legacy mask bits */
++			if ((rdev->family == CHIP_R420) ||
++			    (rdev->family == CHIP_R423) ||
++			    (rdev->family == CHIP_RV410)) {
++				if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
++				    (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
++				    (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
++					gpio->ucClkMaskShift = 0x19;
++					gpio->ucDataMaskShift = 0x18;
++				}
++			}
++
+ 			/* some evergreen boards have bad data for this entry */
+ 			if (ASIC_IS_DCE4(rdev)) {
+ 				if ((i == 7) &&
diff --git a/queue-3.1/series b/queue-3.1/series
index 98209823780..48da661ef6b 100644
--- a/queue-3.1/series
+++ b/queue-3.1/series
@@ -10,3 +10,4 @@ drm-i915-turn-on-a-required-3d-clock-gating-bit-on-sandybridge.patch
 drm-i915-turn-on-another-required-clock-gating-bit-on-gen6.patch
 drm-i915-fix-inconsistent-backlight-level-during-disabled.patch
 pci-hotplug-shpchp-don-t-blindly-claim-non-amd-0x7450-device-ids.patch
+drm-radeon-kms-fix-up-gpio-i2c-mask-bits-for-r4xx.patch