From: Jonathan Cameron Date: Sun, 15 Dec 2024 18:29:11 +0000 (+0000) Subject: iio: adc: rockchip: correct alignment of timestamp X-Git-Tag: v6.14-rc1~67^2~12^2~18 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=ec2253b064b4b1b074a5a2e0ca0f89fcec323418;p=thirdparty%2Fkernel%2Flinux.git iio: adc: rockchip: correct alignment of timestamp I assume this device is only used on architectures where a 8 byte integer type is always 8 byte aligned. However, I would prefer IIO drivers to never make that assumption as the code gets copied into new drivers which are not so tightly couple to one driver and those can run on architectures that align these types to only 4 bytes in which case this structure may be 4 byte to small leading to a buffer overrun. Reviewed-by: Andy Shevchenko Link: https://patch.msgid.link/20241215182912.481706-21-jic23@kernel.org Signed-off-by: Jonathan Cameron --- diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 240cfa391674e..bf43400940311 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -363,7 +363,7 @@ static irqreturn_t rockchip_saradc_trigger_handler(int irq, void *p) */ struct { u16 values[SARADC_MAX_CHANNELS]; - int64_t timestamp; + aligned_s64 timestamp; } data; int ret; int i, j = 0;