From: Nirmoy Das <nirmoy.das@amd.com>
Date: Thu, 7 Jan 2021 11:26:55 +0000 (+0100)
Subject: PCI: Add a REBAR size quirk for Sapphire RX 5600 XT Pulse
X-Git-Tag: v5.4.103~29
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=f1fef55a3f1a59b751fd58e287cbdb4defa18fba;p=thirdparty%2Fkernel%2Fstable.git

PCI: Add a REBAR size quirk for Sapphire RX 5600 XT Pulse

[ Upstream commit 907830b0fc9e374d00f3c83de5e426157b482c01 ]

RX 5600 XT Pulse advertises support for BAR 0 being 256MB, 512MB,
or 1GB, but it also supports 2GB, 4GB, and 8GB. Add a rebar
size quirk so that the BAR 0 is big enough to cover complete VARM.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20210107175017.15893-5-nirmoy.das@amd.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 89dece8a41321..9add26438be50 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3471,7 +3471,14 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
 		return 0;
 
 	pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap);
-	return (cap & PCI_REBAR_CAP_SIZES) >> 4;
+	cap &= PCI_REBAR_CAP_SIZES;
+
+	/* Sapphire RX 5600 XT Pulse has an invalid cap dword for BAR 0 */
+	if (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x731f &&
+	    bar == 0 && cap == 0x7000)
+		cap = 0x3f000;
+
+	return cap >> 4;
 }
 
 /**