From: Sasha Levin Date: Sun, 25 Apr 2021 00:35:57 +0000 (-0400) Subject: Fixes for 5.11 X-Git-Tag: v4.4.268~30 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=f3ded2fddc7b2463fbc2391c84383ebdad9d9aab;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.11 Signed-off-by: Sasha Levin --- diff --git a/queue-5.11/arm64-dts-allwinner-revert-sd-card-cd-gpio-for-pine6.patch b/queue-5.11/arm64-dts-allwinner-revert-sd-card-cd-gpio-for-pine6.patch new file mode 100644 index 00000000000..83e16a602c6 --- /dev/null +++ b/queue-5.11/arm64-dts-allwinner-revert-sd-card-cd-gpio-for-pine6.patch @@ -0,0 +1,59 @@ +From 554f1540eff41759edf9bde80acfc3fd17b5b705 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 14 Apr 2021 11:47:40 +0100 +Subject: arm64: dts: allwinner: Revert SD card CD GPIO for Pine64-LTS + +From: Andre Przywara + +[ Upstream commit 4d09ccc4a81e7de6b002482af554d8b5626f5041 ] + +Commit 941432d00768 ("arm64: dts: allwinner: Drop non-removable from +SoPine/LTS SD card") enabled the card detect GPIO for the SOPine module, +along the way with the Pine64-LTS, which share the same base .dtsi. + +This was based on the observation that the Pine64-LTS has as "push-push" +SD card socket, and that the schematic mentions the card detect GPIO. + +After having received two reports about failing SD card access with that +patch, some more research and polls on that subject revealed that there +are at least two different versions of the Pine64-LTS out there: +- On some boards (including mine) the card detect pin is "stuck" at + high, regardless of an microSD card being inserted or not. +- On other boards the card-detect is working, but is active-high, by + virtue of an explicit inverter circuit, as shown in the schematic. + +To cover all versions of the board out there, and don't take any chances, +let's revert the introduction of the active-low CD GPIO, but let's use +the broken-cd property for the Pine64-LTS this time. That should avoid +regressions and should work for everyone, even allowing SD card changes +now. +The SOPine card detect has proven to be working, so let's keep that +GPIO in place. + +Fixes: 941432d00768 ("arm64: dts: allwinner: Drop non-removable from SoPine/LTS SD card") +Reported-by: Michael Weiser +Reported-by: Daniel Kulesz +Suggested-by: Chen-Yu Tsai +Signed-off-by: Andre Przywara +Tested-by: Michael Weiser +Signed-off-by: Maxime Ripard +Link: https://lore.kernel.org/r/20210414104740.31497-1-andre.przywara@arm.com +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts +index a1f621b388fe..358df6d926af 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts +@@ -10,5 +10,5 @@ + }; + + &mmc0 { +- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 push-push switch */ ++ broken-cd; /* card detect is broken on *some* boards */ + }; +-- +2.30.2 + diff --git a/queue-5.11/block-return-ebusy-when-there-are-open-partitions-in.patch b/queue-5.11/block-return-ebusy-when-there-are-open-partitions-in.patch new file mode 100644 index 00000000000..6756f01c22c --- /dev/null +++ b/queue-5.11/block-return-ebusy-when-there-are-open-partitions-in.patch @@ -0,0 +1,40 @@ +From d566f0d302bac089e259c8426168db6f1d3a47cd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 21 Apr 2021 18:05:02 +0200 +Subject: block: return -EBUSY when there are open partitions in + blkdev_reread_part + +From: Christoph Hellwig + +[ Upstream commit 68e6582e8f2dc32fd2458b9926564faa1fb4560e ] + +The switch to go through blkdev_get_by_dev means we now ignore the +return value from bdev_disk_changed in __blkdev_get. Add a manual +check to restore the old semantics. + +Fixes: 4601b4b130de ("block: reopen the device in blkdev_reread_part") +Reported-by: Karel Zak +Signed-off-by: Christoph Hellwig +Link: https://lore.kernel.org/r/20210421160502.447418-1-hch@lst.de +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + block/ioctl.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/block/ioctl.c b/block/ioctl.c +index ff241e663c01..8ba1ed8defd0 100644 +--- a/block/ioctl.c ++++ b/block/ioctl.c +@@ -89,6 +89,8 @@ static int blkdev_reread_part(struct block_device *bdev, fmode_t mode) + return -EINVAL; + if (!capable(CAP_SYS_ADMIN)) + return -EACCES; ++ if (bdev->bd_part_count) ++ return -EBUSY; + + /* + * Reopen the device to revalidate the driver state and force a +-- +2.30.2 + diff --git a/queue-5.11/gpio-omap-save-and-restore-sysconfig.patch b/queue-5.11/gpio-omap-save-and-restore-sysconfig.patch new file mode 100644 index 00000000000..a7b78bda163 --- /dev/null +++ b/queue-5.11/gpio-omap-save-and-restore-sysconfig.patch @@ -0,0 +1,118 @@ +From 8579ef0a98c770873eab555080f61a65355547fd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 11:38:39 +0300 +Subject: gpio: omap: Save and restore sysconfig + +From: Tony Lindgren + +[ Upstream commit ddd8d94ca31e768c76cf8bfe34ba7b10136b3694 ] + +As we are using cpu_pm to save and restore context, we must also save and +restore the GPIO sysconfig register. This is needed because we are not +calling PM runtime functions at all with cpu_pm. + +We need to save the sysconfig on idle as it's value can get reconfigured by +PM runtime and can be different from the init time value. Device specific +flags like "ti,no-idle-on-init" can affect the init value. + +Fixes: b764a5863fd8 ("gpio: omap: Remove custom PM calls and use cpu_pm instead") +Cc: Aaro Koskinen +Cc: Adam Ford +Cc: Andreas Kemnade +Cc: Grygorii Strashko +Cc: Peter Ujfalusi +Signed-off-by: Tony Lindgren +Acked-by: Grygorii Strashko +Signed-off-by: Bartosz Golaszewski +Signed-off-by: Sasha Levin +--- + drivers/gpio/gpio-omap.c | 9 +++++++++ + include/linux/platform_data/gpio-omap.h | 3 +++ + 2 files changed, 12 insertions(+) + +diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c +index 41952bb818ad..56152263ab38 100644 +--- a/drivers/gpio/gpio-omap.c ++++ b/drivers/gpio/gpio-omap.c +@@ -29,6 +29,7 @@ + #define OMAP4_GPIO_DEBOUNCINGTIME_MASK 0xFF + + struct gpio_regs { ++ u32 sysconfig; + u32 irqenable1; + u32 irqenable2; + u32 wake_en; +@@ -1069,6 +1070,7 @@ static void omap_gpio_init_context(struct gpio_bank *p) + const struct omap_gpio_reg_offs *regs = p->regs; + void __iomem *base = p->base; + ++ p->context.sysconfig = readl_relaxed(base + regs->sysconfig); + p->context.ctrl = readl_relaxed(base + regs->ctrl); + p->context.oe = readl_relaxed(base + regs->direction); + p->context.wake_en = readl_relaxed(base + regs->wkup_en); +@@ -1088,6 +1090,7 @@ static void omap_gpio_restore_context(struct gpio_bank *bank) + const struct omap_gpio_reg_offs *regs = bank->regs; + void __iomem *base = bank->base; + ++ writel_relaxed(bank->context.sysconfig, base + regs->sysconfig); + writel_relaxed(bank->context.wake_en, base + regs->wkup_en); + writel_relaxed(bank->context.ctrl, base + regs->ctrl); + writel_relaxed(bank->context.leveldetect0, base + regs->leveldetect0); +@@ -1115,6 +1118,10 @@ static void omap_gpio_idle(struct gpio_bank *bank, bool may_lose_context) + + bank->saved_datain = readl_relaxed(base + bank->regs->datain); + ++ /* Save syconfig, it's runtime value can be different from init value */ ++ if (bank->loses_context) ++ bank->context.sysconfig = readl_relaxed(base + bank->regs->sysconfig); ++ + if (!bank->enabled_non_wakeup_gpios) + goto update_gpio_context_count; + +@@ -1279,6 +1286,7 @@ static int gpio_omap_cpu_notifier(struct notifier_block *nb, + + static const struct omap_gpio_reg_offs omap2_gpio_regs = { + .revision = OMAP24XX_GPIO_REVISION, ++ .sysconfig = OMAP24XX_GPIO_SYSCONFIG, + .direction = OMAP24XX_GPIO_OE, + .datain = OMAP24XX_GPIO_DATAIN, + .dataout = OMAP24XX_GPIO_DATAOUT, +@@ -1302,6 +1310,7 @@ static const struct omap_gpio_reg_offs omap2_gpio_regs = { + + static const struct omap_gpio_reg_offs omap4_gpio_regs = { + .revision = OMAP4_GPIO_REVISION, ++ .sysconfig = OMAP4_GPIO_SYSCONFIG, + .direction = OMAP4_GPIO_OE, + .datain = OMAP4_GPIO_DATAIN, + .dataout = OMAP4_GPIO_DATAOUT, +diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h +index 8b30b14b47d3..f377817ce75c 100644 +--- a/include/linux/platform_data/gpio-omap.h ++++ b/include/linux/platform_data/gpio-omap.h +@@ -85,6 +85,7 @@ + * omap2+ specific GPIO registers + */ + #define OMAP24XX_GPIO_REVISION 0x0000 ++#define OMAP24XX_GPIO_SYSCONFIG 0x0010 + #define OMAP24XX_GPIO_IRQSTATUS1 0x0018 + #define OMAP24XX_GPIO_IRQSTATUS2 0x0028 + #define OMAP24XX_GPIO_IRQENABLE2 0x002c +@@ -108,6 +109,7 @@ + #define OMAP24XX_GPIO_SETDATAOUT 0x0094 + + #define OMAP4_GPIO_REVISION 0x0000 ++#define OMAP4_GPIO_SYSCONFIG 0x0010 + #define OMAP4_GPIO_EOI 0x0020 + #define OMAP4_GPIO_IRQSTATUSRAW0 0x0024 + #define OMAP4_GPIO_IRQSTATUSRAW1 0x0028 +@@ -148,6 +150,7 @@ + #ifndef __ASSEMBLER__ + struct omap_gpio_reg_offs { + u16 revision; ++ u16 sysconfig; + u16 direction; + u16 datain; + u16 dataout; +-- +2.30.2 + diff --git a/queue-5.11/keys-trusted-fix-tpm-reservation-for-seal-unseal.patch b/queue-5.11/keys-trusted-fix-tpm-reservation-for-seal-unseal.patch new file mode 100644 index 00000000000..2352e138f5b --- /dev/null +++ b/queue-5.11/keys-trusted-fix-tpm-reservation-for-seal-unseal.patch @@ -0,0 +1,45 @@ +From 030b7def6a7833e50a639efb3753c85248c6ba80 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 21 Apr 2021 15:42:47 -0700 +Subject: KEYS: trusted: Fix TPM reservation for seal/unseal + +From: James Bottomley + +[ Upstream commit 9d5171eab462a63e2fbebfccf6026e92be018f20 ] + +The original patch 8c657a0590de ("KEYS: trusted: Reserve TPM for seal +and unseal operations") was correct on the mailing list: + +https://lore.kernel.org/linux-integrity/20210128235621.127925-4-jarkko@kernel.org/ + +But somehow got rebased so that the tpm_try_get_ops() in +tpm2_seal_trusted() got lost. This causes an imbalanced put of the +TPM ops and causes oopses on TIS based hardware. + +This fix puts back the lost tpm_try_get_ops() + +Fixes: 8c657a0590de ("KEYS: trusted: Reserve TPM for seal and unseal operations") +Reported-by: Mimi Zohar +Acked-by: Mimi Zohar +Signed-off-by: James Bottomley +Signed-off-by: Sasha Levin +--- + security/keys/trusted-keys/trusted_tpm2.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/security/keys/trusted-keys/trusted_tpm2.c b/security/keys/trusted-keys/trusted_tpm2.c +index e2a0ed5d02f0..c87c4df8703d 100644 +--- a/security/keys/trusted-keys/trusted_tpm2.c ++++ b/security/keys/trusted-keys/trusted_tpm2.c +@@ -79,7 +79,7 @@ int tpm2_seal_trusted(struct tpm_chip *chip, + if (i == ARRAY_SIZE(tpm2_hash_map)) + return -EINVAL; + +- rc = tpm_buf_init(&buf, TPM2_ST_SESSIONS, TPM2_CC_CREATE); ++ rc = tpm_try_get_ops(chip); + if (rc) + return rc; + +-- +2.30.2 + diff --git a/queue-5.11/pinctrl-core-show-pin-numbers-for-the-controllers-wi.patch b/queue-5.11/pinctrl-core-show-pin-numbers-for-the-controllers-wi.patch new file mode 100644 index 00000000000..1c9aaf02632 --- /dev/null +++ b/queue-5.11/pinctrl-core-show-pin-numbers-for-the-controllers-wi.patch @@ -0,0 +1,70 @@ +From 1c7830316cd391c8667d73003347922a05b66bf8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 16:03:56 +0300 +Subject: pinctrl: core: Show pin numbers for the controllers with base = 0 + +From: Andy Shevchenko + +[ Upstream commit 482715ff0601c836152b792f06c353464d826b9b ] + +The commit f1b206cf7c57 ("pinctrl: core: print gpio in pins debugfs file") +enabled GPIO pin number and label in debugfs for pin controller. However, +it limited that feature to the chips where base is positive number. This, +in particular, excluded chips where base is 0 for the historical or backward +compatibility reasons. Refactor the code to include the latter as well. + +Fixes: f1b206cf7c57 ("pinctrl: core: print gpio in pins debugfs file") +Cc: Drew Fustini +Signed-off-by: Andy Shevchenko +Tested-by: Drew Fustini +Reviewed-by: Drew Fustini +Link: https://lore.kernel.org/r/20210415130356.15885-1-andriy.shevchenko@linux.intel.com +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/core.c | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index 9fc4433fece4..20b477cd5a30 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -1604,8 +1604,8 @@ static int pinctrl_pins_show(struct seq_file *s, void *what) + unsigned i, pin; + #ifdef CONFIG_GPIOLIB + struct pinctrl_gpio_range *range; +- unsigned int gpio_num; + struct gpio_chip *chip; ++ int gpio_num; + #endif + + seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); +@@ -1625,7 +1625,7 @@ static int pinctrl_pins_show(struct seq_file *s, void *what) + seq_printf(s, "pin %d (%s) ", pin, desc->name); + + #ifdef CONFIG_GPIOLIB +- gpio_num = 0; ++ gpio_num = -1; + list_for_each_entry(range, &pctldev->gpio_ranges, node) { + if ((pin >= range->pin_base) && + (pin < (range->pin_base + range->npins))) { +@@ -1633,10 +1633,12 @@ static int pinctrl_pins_show(struct seq_file *s, void *what) + break; + } + } +- chip = gpio_to_chip(gpio_num); +- if (chip && chip->gpiodev && chip->gpiodev->base) +- seq_printf(s, "%u:%s ", gpio_num - +- chip->gpiodev->base, chip->label); ++ if (gpio_num >= 0) ++ chip = gpio_to_chip(gpio_num); ++ else ++ chip = NULL; ++ if (chip) ++ seq_printf(s, "%u:%s ", gpio_num - chip->gpiodev->base, chip->label); + else + seq_puts(s, "0:? "); + #endif +-- +2.30.2 + diff --git a/queue-5.11/pinctrl-lewisburg-update-number-of-pins-in-community.patch b/queue-5.11/pinctrl-lewisburg-update-number-of-pins-in-community.patch new file mode 100644 index 00000000000..19e63dee658 --- /dev/null +++ b/queue-5.11/pinctrl-lewisburg-update-number-of-pins-in-community.patch @@ -0,0 +1,40 @@ +From 9896211a22479bdcd9c78a6e6234e388b488cd41 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 12 Apr 2021 17:17:59 -0600 +Subject: pinctrl: lewisburg: Update number of pins in community + +From: Yuanyuan Zhong + +[ Upstream commit 196d941753297d0ca73c563ccd7d00be049ec226 ] + +When updating pin names for Intel Lewisburg, the numbers of pins were +left behind. Update them accordingly. + +Fixes: e66ff71fd0db ("pinctrl: lewisburg: Update pin list according to v1.1v6") +Signed-off-by: Yuanyuan Zhong +Signed-off-by: Andy Shevchenko +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/intel/pinctrl-lewisburg.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/pinctrl/intel/pinctrl-lewisburg.c b/drivers/pinctrl/intel/pinctrl-lewisburg.c +index 7fdf4257df1e..ad4b446d588e 100644 +--- a/drivers/pinctrl/intel/pinctrl-lewisburg.c ++++ b/drivers/pinctrl/intel/pinctrl-lewisburg.c +@@ -299,9 +299,9 @@ static const struct pinctrl_pin_desc lbg_pins[] = { + static const struct intel_community lbg_communities[] = { + LBG_COMMUNITY(0, 0, 71), + LBG_COMMUNITY(1, 72, 132), +- LBG_COMMUNITY(3, 133, 144), +- LBG_COMMUNITY(4, 145, 180), +- LBG_COMMUNITY(5, 181, 246), ++ LBG_COMMUNITY(3, 133, 143), ++ LBG_COMMUNITY(4, 144, 178), ++ LBG_COMMUNITY(5, 179, 246), + }; + + static const struct intel_pinctrl_soc_data lbg_soc_data = { +-- +2.30.2 + diff --git a/queue-5.11/series b/queue-5.11/series index 4c8d85cc8ec..a648839b173 100644 --- a/queue-5.11/series +++ b/queue-5.11/series @@ -4,3 +4,10 @@ coda-fix-reference-counting-in-coda_file_mmap-error-path.patch amd-display-allow-non-linear-multi-planar-formats.patch drm-amdgpu-reserve-fence-slot-to-update-page-table.patch drm-amdgpu-fix-gcr_general_cntl-offset-for-dimgrey_cavefish.patch +gpio-omap-save-and-restore-sysconfig.patch +keys-trusted-fix-tpm-reservation-for-seal-unseal.patch +vdpa-mlx5-set-err-enomem-in-case-dma_map_sg_attrs-fa.patch +pinctrl-lewisburg-update-number-of-pins-in-community.patch +block-return-ebusy-when-there-are-open-partitions-in.patch +pinctrl-core-show-pin-numbers-for-the-controllers-wi.patch +arm64-dts-allwinner-revert-sd-card-cd-gpio-for-pine6.patch diff --git a/queue-5.11/vdpa-mlx5-set-err-enomem-in-case-dma_map_sg_attrs-fa.patch b/queue-5.11/vdpa-mlx5-set-err-enomem-in-case-dma_map_sg_attrs-fa.patch new file mode 100644 index 00000000000..1c877e08f31 --- /dev/null +++ b/queue-5.11/vdpa-mlx5-set-err-enomem-in-case-dma_map_sg_attrs-fa.patch @@ -0,0 +1,44 @@ +From f220a2816d170d307f281c7ddcc58d8c93d42c71 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 11 Apr 2021 11:36:46 +0300 +Subject: vdpa/mlx5: Set err = -ENOMEM in case dma_map_sg_attrs fails + +From: Eli Cohen + +[ Upstream commit be286f84e33da1a7f83142b64dbd86f600e73363 ] + +Set err = -ENOMEM if dma_map_sg_attrs() fails so the function reutrns +error. + +Fixes: 94abbccdf291 ("vdpa/mlx5: Add shared memory registration code") +Signed-off-by: Eli Cohen +Reported-by: kernel test robot +Reported-by: Dan Carpenter +Link: https://lore.kernel.org/r/20210411083646.910546-1-elic@nvidia.com +Signed-off-by: Michael S. Tsirkin +Acked-by: Jason Wang +Reviewed-by: Stefano Garzarella +Signed-off-by: Sasha Levin +--- + drivers/vdpa/mlx5/core/mr.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/vdpa/mlx5/core/mr.c b/drivers/vdpa/mlx5/core/mr.c +index d300f799efcd..aa656f57bf5b 100644 +--- a/drivers/vdpa/mlx5/core/mr.c ++++ b/drivers/vdpa/mlx5/core/mr.c +@@ -273,8 +273,10 @@ static int map_direct_mr(struct mlx5_vdpa_dev *mvdev, struct mlx5_vdpa_direct_mr + mr->log_size = log_entity_size; + mr->nsg = nsg; + mr->nent = dma_map_sg_attrs(dma, mr->sg_head.sgl, mr->nsg, DMA_BIDIRECTIONAL, 0); +- if (!mr->nent) ++ if (!mr->nent) { ++ err = -ENOMEM; + goto err_map; ++ } + + err = create_direct_mr(mvdev, mr); + if (err) +-- +2.30.2 +