From: Julian Seward <jseward@acm.org>
Date: Mon, 21 Feb 2005 08:23:39 +0000 (+0000)
Subject: Add %xmm0 .. %xmm15 to the amd64 guest state.
X-Git-Tag: svn/VALGRIND_3_0_1^2~399
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=f47d5bde591e698afe3a13f36395acc84f299e33;p=thirdparty%2Fvalgrind.git

Add %xmm0 .. %xmm15 to the amd64 guest state.


git-svn-id: svn://svn.valgrind.org/vex/trunk@935
---

diff --git a/VEX/priv/guest-amd64/ghelpers.c b/VEX/priv/guest-amd64/ghelpers.c
index 797c34fe01..02d1f3cb8c 100644
--- a/VEX/priv/guest-amd64/ghelpers.c
+++ b/VEX/priv/guest-amd64/ghelpers.c
@@ -1181,12 +1181,34 @@ void LibVEX_GuestAMD64_initialise ( /*OUT*/VexGuestAMD64State* vex_state )
    vex_state->guest_DFLAG   = 1; /* forwards */
    vex_state->guest_IDFLAG  = 0;
 
-   // HACK
+   /* HACK: represent the offset associated with %fs==0. This
+      assumes that %fs is only ever zero. */
    vex_state->guest_FS_ZERO = 0;
 
    vex_state->guest_RIP = 0;
 
-   // XXX: add more here later, for segment registers, FPU, etc.
+   /* Initialise the SSE state. */
+#  define SSEZERO(_xmm) _xmm[0]=_xmm[1]=_xmm[2]=_xmm[3] = 0;
+
+   vex_state->guest_SSEROUND = (ULong)Irrm_NEAREST;
+   SSEZERO(vex_state->guest_XMM0);
+   SSEZERO(vex_state->guest_XMM1);
+   SSEZERO(vex_state->guest_XMM2);
+   SSEZERO(vex_state->guest_XMM3);
+   SSEZERO(vex_state->guest_XMM4);
+   SSEZERO(vex_state->guest_XMM5);
+   SSEZERO(vex_state->guest_XMM6);
+   SSEZERO(vex_state->guest_XMM7);
+   SSEZERO(vex_state->guest_XMM8);
+   SSEZERO(vex_state->guest_XMM9);
+   SSEZERO(vex_state->guest_XMM10);
+   SSEZERO(vex_state->guest_XMM11);
+   SSEZERO(vex_state->guest_XMM12);
+   SSEZERO(vex_state->guest_XMM13);
+   SSEZERO(vex_state->guest_XMM14);
+   SSEZERO(vex_state->guest_XMM15);
+
+#  undef SSEZERO
 
    vex_state->guest_EMWARN = EmWarn_NONE;
 }
diff --git a/VEX/pub/libvex_guest_amd64.h b/VEX/pub/libvex_guest_amd64.h
index bbb6b79ceb..a5d4c5b415 100644
--- a/VEX/pub/libvex_guest_amd64.h
+++ b/VEX/pub/libvex_guest_amd64.h
@@ -44,6 +44,15 @@
 /*--- Vex's representation of the AMD64 CPU state.            ---*/
 /*---------------------------------------------------------------*/
 
+/* See detailed comments at the top of libvex_guest_x86.h for
+   further info.  This representation pretty closely mimics the
+   x86 representation.
+
+   SSEROUND[1:0] is the SSE unit's notional rounding mode, encoded as
+   per the IRRoundingMode type.
+*/
+
+
 typedef
    struct {
       /*   0 */ ULong  guest_RAX;
@@ -86,6 +95,25 @@ typedef
          associated with a %fs value of zero. */
       ULong guest_FS_ZERO;
 
+      /* XMM registers */
+      ULong guest_SSEROUND;
+      U128  guest_XMM0;
+      U128  guest_XMM1;
+      U128  guest_XMM2;
+      U128  guest_XMM3;
+      U128  guest_XMM4;
+      U128  guest_XMM5;
+      U128  guest_XMM6;
+      U128  guest_XMM7;
+      U128  guest_XMM8;
+      U128  guest_XMM9;
+      U128  guest_XMM10;
+      U128  guest_XMM11;
+      U128  guest_XMM12;
+      U128  guest_XMM13;
+      U128  guest_XMM14;
+      U128  guest_XMM15;
+
       /* Emulation warnings */
       UInt   guest_EMWARN;
       /* Padding to make it have an 8-aligned size */