From: Greg Kroah-Hartman Date: Tue, 21 Feb 2012 18:42:45 +0000 (-0800) Subject: 3.0-stable patches X-Git-Tag: v3.2.8~20 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=f57f51d4c2d14d8f02a013fdd8ca30df733aef16;p=thirdparty%2Fkernel%2Fstable-queue.git 3.0-stable patches added patches: drm-radeon-kms-fix-msi-re-arm-on-rv370.patch ecryptfs-copy-up-lower-inode-attrs-after-setting-lower-xattr.patch ipheth-add-iphone-4s.patch mac80211-fix-a-rwlock-bad-magic-bug.patch pci-workaround-hard-wired-bus-number-v2.patch powerpc-perf-power_pmu_start-restores-incorrect-values-breaking-frequency-events.patch --- diff --git a/queue-3.0/drm-radeon-kms-fix-msi-re-arm-on-rv370.patch b/queue-3.0/drm-radeon-kms-fix-msi-re-arm-on-rv370.patch new file mode 100644 index 00000000000..58457460256 --- /dev/null +++ b/queue-3.0/drm-radeon-kms-fix-msi-re-arm-on-rv370.patch @@ -0,0 +1,50 @@ +From b7f5b7dec3d539a84734f2bcb7e53fbb1532a40b Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 13 Feb 2012 16:36:34 -0500 +Subject: drm/radeon/kms: fix MSI re-arm on rv370+ + +From: Alex Deucher + +commit b7f5b7dec3d539a84734f2bcb7e53fbb1532a40b upstream. + +MSI_REARM_EN register is a write only trigger register. +There is no need RMW when re-arming. + +May fix: +https://bugs.freedesktop.org/show_bug.cgi?id=41668 + +Signed-off-by: Alex Deucher +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/r100.c | 4 +--- + drivers/gpu/drm/radeon/rs600.c | 4 +--- + 2 files changed, 2 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/radeon/r100.c ++++ b/drivers/gpu/drm/radeon/r100.c +@@ -681,9 +681,7 @@ int r100_irq_process(struct radeon_devic + WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM); + break; + default: +- msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; +- WREG32(RADEON_MSI_REARM_EN, msi_rearm); +- WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); ++ WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN); + break; + } + } +--- a/drivers/gpu/drm/radeon/rs600.c ++++ b/drivers/gpu/drm/radeon/rs600.c +@@ -698,9 +698,7 @@ int rs600_irq_process(struct radeon_devi + WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM); + break; + default: +- msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; +- WREG32(RADEON_MSI_REARM_EN, msi_rearm); +- WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); ++ WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN); + break; + } + } diff --git a/queue-3.0/ecryptfs-copy-up-lower-inode-attrs-after-setting-lower-xattr.patch b/queue-3.0/ecryptfs-copy-up-lower-inode-attrs-after-setting-lower-xattr.patch new file mode 100644 index 00000000000..651904fd396 --- /dev/null +++ b/queue-3.0/ecryptfs-copy-up-lower-inode-attrs-after-setting-lower-xattr.patch @@ -0,0 +1,40 @@ +From 545d680938be1e86a6c5250701ce9abaf360c495 Mon Sep 17 00:00:00 2001 +From: Tyler Hicks +Date: Tue, 7 Feb 2012 17:55:40 -0600 +Subject: eCryptfs: Copy up lower inode attrs after setting lower xattr + +From: Tyler Hicks + +commit 545d680938be1e86a6c5250701ce9abaf360c495 upstream. + +After passing through a ->setxattr() call, eCryptfs needs to copy the +inode attributes from the lower inode to the eCryptfs inode, as they +may have changed in the lower filesystem's ->setxattr() path. + +One example is if an extended attribute containing a POSIX Access +Control List is being set. The new ACL may cause the lower filesystem to +modify the mode of the lower inode and the eCryptfs inode would need to +be updated to reflect the new mode. + +https://launchpad.net/bugs/926292 + +Signed-off-by: Tyler Hicks +Reported-by: Sebastien Bacher +Cc: John Johansen +Signed-off-by: Greg Kroah-Hartman + +--- + fs/ecryptfs/inode.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/fs/ecryptfs/inode.c ++++ b/fs/ecryptfs/inode.c +@@ -1119,6 +1119,8 @@ ecryptfs_setxattr(struct dentry *dentry, + } + + rc = vfs_setxattr(lower_dentry, name, value, size, flags); ++ if (!rc) ++ fsstack_copy_attr_all(dentry->d_inode, lower_dentry->d_inode); + out: + return rc; + } diff --git a/queue-3.0/ipheth-add-iphone-4s.patch b/queue-3.0/ipheth-add-iphone-4s.patch new file mode 100644 index 00000000000..2830ff5679d --- /dev/null +++ b/queue-3.0/ipheth-add-iphone-4s.patch @@ -0,0 +1,41 @@ +From 72ba009b8a159e995e40d3b4e5d7d265acead983 Mon Sep 17 00:00:00 2001 +From: Tim Gardner +Date: Wed, 15 Feb 2012 07:50:15 +0000 +Subject: ipheth: Add iPhone 4S + +From: Tim Gardner + +commit 72ba009b8a159e995e40d3b4e5d7d265acead983 upstream. + +BugLink: http://bugs.launchpad.net/bugs/900802 + +Signed-off-by: Till Kamppeter +Signed-off-by: Tim Gardner +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/usb/ipheth.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/net/usb/ipheth.c ++++ b/drivers/net/usb/ipheth.c +@@ -60,6 +60,7 @@ + #define USB_PRODUCT_IPHONE_3GS 0x1294 + #define USB_PRODUCT_IPHONE_4 0x1297 + #define USB_PRODUCT_IPHONE_4_VZW 0x129c ++#define USB_PRODUCT_IPHONE_4S 0x12a0 + + #define IPHETH_USBINTF_CLASS 255 + #define IPHETH_USBINTF_SUBCLASS 253 +@@ -103,6 +104,10 @@ static struct usb_device_id ipheth_table + USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_4_VZW, + IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, + IPHETH_USBINTF_PROTO) }, ++ { USB_DEVICE_AND_INTERFACE_INFO( ++ USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_4S, ++ IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, ++ IPHETH_USBINTF_PROTO) }, + { } + }; + MODULE_DEVICE_TABLE(usb, ipheth_table); diff --git a/queue-3.0/mac80211-fix-a-rwlock-bad-magic-bug.patch b/queue-3.0/mac80211-fix-a-rwlock-bad-magic-bug.patch new file mode 100644 index 00000000000..d08f2b495ee --- /dev/null +++ b/queue-3.0/mac80211-fix-a-rwlock-bad-magic-bug.patch @@ -0,0 +1,89 @@ +From b57e6b560fc2a2742910ac5ca0eb2c46e45aeac2 Mon Sep 17 00:00:00 2001 +From: Mohammed Shafi Shajakhan +Date: Thu, 9 Feb 2012 19:59:43 +0530 +Subject: mac80211: Fix a rwlock bad magic bug + +From: Mohammed Shafi Shajakhan + +commit b57e6b560fc2a2742910ac5ca0eb2c46e45aeac2 upstream. + +read_lock(&tpt_trig->trig.leddev_list_lock) is accessed via the path +ieee80211_open (->) ieee80211_do_open (->) ieee80211_mod_tpt_led_trig +(->) ieee80211_start_tpt_led_trig (->) tpt_trig_timer before initializing +it. +the intilization of this read/write lock happens via the path +ieee80211_led_init (->) led_trigger_register, but we are doing +'ieee80211_led_init' after 'ieeee80211_if_add' where we +register netdev_ops. +so we access leddev_list_lock before initializing it and causes the +following bug in chrome laptops with AR928X cards with the following +script + +while true +do +sudo modprobe -v ath9k +sleep 3 +sudo modprobe -r ath9k +sleep 3 +done + + BUG: rwlock bad magic on CPU#1, wpa_supplicant/358, f5b9eccc + Pid: 358, comm: wpa_supplicant Not tainted 3.0.13 #1 + Call Trace: + + [<8137b9df>] rwlock_bug+0x3d/0x47 + [<81179830>] do_raw_read_lock+0x19/0x29 + [<8137f063>] _raw_read_lock+0xd/0xf + [] tpt_trig_timer+0xc3/0x145 [mac80211] + [] ieee80211_mod_tpt_led_trig+0x152/0x174 [mac80211] + [] ieee80211_do_open+0x11e/0x42e [mac80211] + [] ? ieee80211_check_concurrent_iface+0x26/0x13c [mac80211] + [] ieee80211_open+0x48/0x4c [mac80211] + [<812dbed8>] __dev_open+0x82/0xab + [<812dc0c9>] __dev_change_flags+0x9c/0x113 + [<812dc1ae>] dev_change_flags+0x18/0x44 + [<8132144f>] devinet_ioctl+0x243/0x51a + [<81321ba9>] inet_ioctl+0x93/0xac + [<812cc951>] sock_ioctl+0x1c6/0x1ea + [<812cc78b>] ? might_fault+0x20/0x20 + [<810b1ebb>] do_vfs_ioctl+0x46e/0x4a2 + [<810a6ebb>] ? fget_light+0x2f/0x70 + [<812ce549>] ? sys_recvmsg+0x3e/0x48 + [<810b1f35>] sys_ioctl+0x46/0x69 + [<8137fa77>] sysenter_do_call+0x12/0x2 + +Cc: Gary Morain +Cc: Paul Stewart +Cc: Abhijit Pradhan +Cc: Vasanthakumar Thiagarajan +Cc: Rajkumar Manoharan +Acked-by: Johannes Berg +Tested-by: Mohammed Shafi Shajakhan +Signed-off-by: Mohammed Shafi Shajakhan +Signed-off-by: John W. Linville +Signed-off-by: Greg Kroah-Hartman + +--- + net/mac80211/main.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/net/mac80211/main.c ++++ b/net/mac80211/main.c +@@ -910,6 +910,8 @@ int ieee80211_register_hw(struct ieee802 + wiphy_debug(local->hw.wiphy, "Failed to initialize wep: %d\n", + result); + ++ ieee80211_led_init(local); ++ + rtnl_lock(); + + result = ieee80211_init_rate_ctrl_alg(local, +@@ -931,8 +933,6 @@ int ieee80211_register_hw(struct ieee802 + + rtnl_unlock(); + +- ieee80211_led_init(local); +- + local->network_latency_notifier.notifier_call = + ieee80211_max_network_latency; + result = pm_qos_add_notifier(PM_QOS_NETWORK_LATENCY, diff --git a/queue-3.0/pci-workaround-hard-wired-bus-number-v2.patch b/queue-3.0/pci-workaround-hard-wired-bus-number-v2.patch new file mode 100644 index 00000000000..a70a22e38f3 --- /dev/null +++ b/queue-3.0/pci-workaround-hard-wired-bus-number-v2.patch @@ -0,0 +1,42 @@ +From 71f6bd4a23130cd2f4b036010c5790b1295290b9 Mon Sep 17 00:00:00 2001 +From: Yinghai Lu +Date: Mon, 30 Jan 2012 12:25:24 +0100 +Subject: PCI: workaround hard-wired bus number V2 + +From: Yinghai Lu + +commit 71f6bd4a23130cd2f4b036010c5790b1295290b9 upstream. + +Fixes PCI device detection on IBM xSeries IBM 3850 M2 / x3950 M2 +when using ACPI resources (_CRS). +This is default, a manual workaround (without this patch) +would be pci=nocrs boot param. + +V2: Add dev_warn if the workaround is hit. This should reveal +how common such setups are (via google) and point to possible +problems if things are still not working as expected. +-> Suggested by Jan Beulich. + +Tested-by: garyhade@us.ibm.com +Signed-off-by: Yinghai Lu +Signed-off-by: Jesse Barnes +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pci/probe.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/pci/probe.c ++++ b/drivers/pci/probe.c +@@ -657,6 +657,11 @@ int __devinit pci_scan_bridge(struct pci + dev_dbg(&dev->dev, "scanning [bus %02x-%02x] behind bridge, pass %d\n", + secondary, subordinate, pass); + ++ if (!primary && (primary != bus->number) && secondary && subordinate) { ++ dev_warn(&dev->dev, "Primary bus is hard wired to 0\n"); ++ primary = bus->number; ++ } ++ + /* Check if setup is sensible at all */ + if (!pass && + (primary != bus->number || secondary <= bus->number)) { diff --git a/queue-3.0/powerpc-perf-power_pmu_start-restores-incorrect-values-breaking-frequency-events.patch b/queue-3.0/powerpc-perf-power_pmu_start-restores-incorrect-values-breaking-frequency-events.patch new file mode 100644 index 00000000000..8f1f3d8e53c --- /dev/null +++ b/queue-3.0/powerpc-perf-power_pmu_start-restores-incorrect-values-breaking-frequency-events.patch @@ -0,0 +1,55 @@ +From 9a45a9407c69d068500923480884661e2b9cc421 Mon Sep 17 00:00:00 2001 +From: Anton Blanchard +Date: Wed, 15 Feb 2012 18:48:22 +0000 +Subject: powerpc/perf: power_pmu_start restores incorrect values, breaking frequency events + +From: Anton Blanchard + +commit 9a45a9407c69d068500923480884661e2b9cc421 upstream. + +perf on POWER stopped working after commit e050e3f0a71b (perf: Fix +broken interrupt rate throttling). That patch exposed a bug in +the POWER perf_events code. + +Since the PMCs count upwards and take an exception when the top bit +is set, we want to write 0x80000000 - left in power_pmu_start. We were +instead programming in left which effectively disables the counter +until we eventually hit 0x80000000. This could take seconds or longer. + +With the patch applied I get the expected number of samples: + + SAMPLE events: 9948 + +Signed-off-by: Anton Blanchard +Acked-by: Paul Mackerras +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/kernel/perf_event.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/arch/powerpc/kernel/perf_event.c ++++ b/arch/powerpc/kernel/perf_event.c +@@ -865,6 +865,7 @@ static void power_pmu_start(struct perf_ + { + unsigned long flags; + s64 left; ++ unsigned long val; + + if (!event->hw.idx || !event->hw.sample_period) + return; +@@ -880,7 +881,12 @@ static void power_pmu_start(struct perf_ + + event->hw.state = 0; + left = local64_read(&event->hw.period_left); +- write_pmc(event->hw.idx, left); ++ ++ val = 0; ++ if (left < 0x80000000L) ++ val = 0x80000000L - left; ++ ++ write_pmc(event->hw.idx, val); + + perf_event_update_userpage(event); + perf_pmu_enable(event->pmu); diff --git a/queue-3.0/series b/queue-3.0/series new file mode 100644 index 00000000000..82016e6e3dd --- /dev/null +++ b/queue-3.0/series @@ -0,0 +1,6 @@ +powerpc-perf-power_pmu_start-restores-incorrect-values-breaking-frequency-events.patch +drm-radeon-kms-fix-msi-re-arm-on-rv370.patch +pci-workaround-hard-wired-bus-number-v2.patch +mac80211-fix-a-rwlock-bad-magic-bug.patch +ipheth-add-iphone-4s.patch +ecryptfs-copy-up-lower-inode-attrs-after-setting-lower-xattr.patch