From: Greg Kroah-Hartman Date: Fri, 30 Apr 2021 13:37:58 +0000 (+0200) Subject: 5.11-stable patches X-Git-Tag: v5.4.116~7 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=fd28bde5272b1e980f8549dec046ca07fa30872b;p=thirdparty%2Fkernel%2Fstable-queue.git 5.11-stable patches added patches: drm-amd-display-update-modifier-list-for-gfx10_3.patch --- diff --git a/queue-5.11/drm-amd-display-update-modifier-list-for-gfx10_3.patch b/queue-5.11/drm-amd-display-update-modifier-list-for-gfx10_3.patch new file mode 100644 index 00000000000..9bd4f82e69a --- /dev/null +++ b/queue-5.11/drm-amd-display-update-modifier-list-for-gfx10_3.patch @@ -0,0 +1,50 @@ +From 6d638b3ffd27036c062d32cb4efd4be172c2a65e Mon Sep 17 00:00:00 2001 +From: Qingqing Zhuo +Date: Wed, 14 Apr 2021 19:00:01 -0400 +Subject: drm/amd/display: Update modifier list for gfx10_3 + +From: Qingqing Zhuo + +commit 6d638b3ffd27036c062d32cb4efd4be172c2a65e upstream. + +[Why] +Current list supports modifiers that have DCC_MAX_COMPRESSED_BLOCK +set to AMD_FMT_MOD_DCC_BLOCK_128B, while AMD_FMT_MOD_DCC_BLOCK_64B +is used instead by userspace. + +[How] +Replace AMD_FMT_MOD_DCC_BLOCK_128B with AMD_FMT_MOD_DCC_BLOCK_64B +for modifiers with DCC supported. + +Fixes: faa37f54ce0462 ("drm/amd/display: Expose modifiers") +Signed-off-by: Qingqing Zhuo +Reviewed-by: Bas Nieuwenhuizen +Tested-by: Bas Nieuwenhuizen +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -4184,7 +4184,7 @@ add_gfx10_3_modifiers(const struct amdgp + AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) | + AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) | + AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) | +- AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_128B)); ++ AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B)); + + add_modifier(mods, size, capacity, AMD_FMT_MOD | + AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) | +@@ -4196,7 +4196,7 @@ add_gfx10_3_modifiers(const struct amdgp + AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) | + AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) | + AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) | +- AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_128B)); ++ AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B)); + + add_modifier(mods, size, capacity, AMD_FMT_MOD | + AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) | diff --git a/queue-5.11/series b/queue-5.11/series index b68ba8e0087..8521fa6b3ae 100644 --- a/queue-5.11/series +++ b/queue-5.11/series @@ -1 +1,2 @@ iwlwifi-fix-softirq-hardirq-disabling-in-iwl_pcie_gen2_enqueue_hcmd.patch +drm-amd-display-update-modifier-list-for-gfx10_3.patch