From: Felix Baumann Date: Sun, 26 Oct 2025 01:54:14 +0000 (+0100) Subject: realtek: rtl838x: fix regression in enable_phy_polling X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=refs%2Fpull%2F20549%2Fhead;p=thirdparty%2Fopenwrt.git realtek: rtl838x: fix regression in enable_phy_polling Fix regression from back when support for RTL930x was added. While at it replace 0x8000 by BIT(15). Fixes: 27029277f98ddd0006175bdc5beec8b0b150f187 Tested-by: Jonas Jelonek Signed-off-by: Felix Baumann Link: https://github.com/openwrt/openwrt/pull/20549 Signed-off-by: Robert Marko --- diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c index f05aa2313e7..0e5e79c45d0 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c @@ -58,11 +58,11 @@ static void rtl83xx_enable_phy_polling(struct rtl838x_switch_priv *priv) pr_info("%s: %16llx\n", __func__, v); priv->r->set_port_reg_le(v, priv->r->smi_poll_ctrl); - /* PHY update complete, there is no global PHY polling enable bit on the 9300 */ + /* PHY update complete, there is no global PHY polling enable bit on the 93xx */ if (priv->family_id == RTL8390_FAMILY_ID) sw_w32_mask(0, BIT(7), RTL839X_SMI_GLB_CTRL); - else if(priv->family_id == RTL9300_FAMILY_ID) - sw_w32_mask(0, 0x8000, RTL838X_SMI_GLB_CTRL); + else if(priv->family_id == RTL8380_FAMILY_ID) + sw_w32_mask(0, BIT(15), RTL838X_SMI_GLB_CTRL); } const struct rtldsa_mib_list_item rtldsa_838x_mib_list[] = {