From: Wayen Yan Date: Fri, 19 Jun 2026 08:03:52 +0000 (+0800) Subject: net: pcs: airoha: fix swapped JCPLL SDM DI_LS/DI_EN REG_FIELD entries X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=refs%2Fpull%2F23876%2Fhead;p=thirdparty%2Fopenwrt.git net: pcs: airoha: fix swapped JCPLL SDM DI_LS/DI_EN REG_FIELD entries The JCPLL SDM DI_LS and DI_EN REG_FIELD entries have their bit positions swapped compared to the #define macros: #define JCPLL_SDM_DI_LS GENMASK(25,24) → bits 24-25 #define JCPLL_SDM_DI_EN BIT(16) → bit 16 But the REG_FIELD mapping is: DI_LS → REG_FIELD(..., 16, 16) ← wrong, should be (24, 25) DI_EN → REG_FIELD(..., 24, 25) ← wrong, should be (16, 16) Fix by swapping the enum and REG_FIELD order so DI_EN comes before DI_LS, keeping the bit values in ascending order and matching the register layout. This way: [DI_EN] = REG_FIELD(..., 16, 16) ← BIT(16) ✓ [DI_LS] = REG_FIELD(..., 24, 25) ← GENMASK(25,24) ✓ The TXPLL section in the same file already follows this bit-order convention (DI_EN at bit 0, DI_LS at bits 8-9). Signed-off-by: Wayen Yan Link: https://github.com/openwrt/openwrt/pull/23876 Signed-off-by: Christian Marangi --- diff --git a/target/linux/airoha/patches-6.18/310-09-net-pcs-airoha-add-PCS-driver-for-Airoha-AN7581-SoC.patch b/target/linux/airoha/patches-6.18/310-09-net-pcs-airoha-add-PCS-driver-for-Airoha-AN7581-SoC.patch index 7c6c687b300..3bd81271c02 100644 --- a/target/linux/airoha/patches-6.18/310-09-net-pcs-airoha-add-PCS-driver-for-Airoha-AN7581-SoC.patch +++ b/target/linux/airoha/patches-6.18/310-09-net-pcs-airoha-add-PCS-driver-for-Airoha-AN7581-SoC.patch @@ -2717,8 +2717,8 @@ Signed-off-by: Christian Marangi + AN7581_PCS_JCPLL_SPARE_L, + AN7581_PCS_JCPLL_RST_DLY, + AN7581_PCS_JCPLL_PLL_RSTB, -+ AN7581_PCS_JCPLL_SDM_DI_LS, + AN7581_PCS_JCPLL_SDM_DI_EN, ++ AN7581_PCS_JCPLL_SDM_DI_LS, + + AN7581_PCS_JCPLL_SDM_OUT, + AN7581_PCS_JCPLL_SDM_ORD, @@ -2879,8 +2879,8 @@ Signed-off-by: Christian Marangi + + [AN7581_PCS_JCPLL_RST_DLY] = REG_FIELD(AIROHA_PCS_ANA_PXP_JCPLL_RST_DLY, 0, 2), + [AN7581_PCS_JCPLL_PLL_RSTB] = REG_FIELD(AIROHA_PCS_ANA_PXP_JCPLL_RST_DLY, 8, 8), -+ [AN7581_PCS_JCPLL_SDM_DI_LS] = REG_FIELD(AIROHA_PCS_ANA_PXP_JCPLL_RST_DLY, 16, 16), -+ [AN7581_PCS_JCPLL_SDM_DI_EN] = REG_FIELD(AIROHA_PCS_ANA_PXP_JCPLL_RST_DLY, 24, 25), ++ [AN7581_PCS_JCPLL_SDM_DI_EN] = REG_FIELD(AIROHA_PCS_ANA_PXP_JCPLL_RST_DLY, 16, 16), ++ [AN7581_PCS_JCPLL_SDM_DI_LS] = REG_FIELD(AIROHA_PCS_ANA_PXP_JCPLL_RST_DLY, 24, 25), + + [AN7581_PCS_JCPLL_SDM_OUT] = REG_FIELD(AIROHA_PCS_ANA_PXP_JCPLL_SDM_IFM, 24, 24), + [AN7581_PCS_JCPLL_SDM_ORD] = REG_FIELD(AIROHA_PCS_ANA_PXP_JCPLL_SDM_IFM, 16, 17), @@ -3045,8 +3045,8 @@ Signed-off-by: Christian Marangi + + [AN7581_PCS_JCPLL_RST_DLY] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 0, 2), + [AN7581_PCS_JCPLL_PLL_RSTB] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 8, 8), -+ [AN7581_PCS_JCPLL_SDM_DI_LS] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 16, 16), -+ [AN7581_PCS_JCPLL_SDM_DI_EN] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 24, 25), ++ [AN7581_PCS_JCPLL_SDM_DI_EN] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 16, 16), ++ [AN7581_PCS_JCPLL_SDM_DI_LS] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 24, 25), + + [AN7581_PCS_JCPLL_SDM_OUT] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_SDM_IFM, 24, 24), + [AN7581_PCS_JCPLL_SDM_ORD] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_SDM_IFM, 16, 17), @@ -3211,8 +3211,8 @@ Signed-off-by: Christian Marangi + + [AN7581_PCS_JCPLL_RST_DLY] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 0, 2), + [AN7581_PCS_JCPLL_PLL_RSTB] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 8, 8), -+ [AN7581_PCS_JCPLL_SDM_DI_LS] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 16, 16), -+ [AN7581_PCS_JCPLL_SDM_DI_EN] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 24, 25), ++ [AN7581_PCS_JCPLL_SDM_DI_EN] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 16, 16), ++ [AN7581_PCS_JCPLL_SDM_DI_LS] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_RST_DLY, 24, 25), + + [AN7581_PCS_JCPLL_SDM_OUT] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_SDM_IFM, 24, 24), + [AN7581_PCS_JCPLL_SDM_ORD] = REG_FIELD(AIROHA_PCS_ANA_PXP_2L_JCPLL_SDM_IFM, 16, 17),