Alan Modra [Tue, 14 Jan 2020 10:15:53 +0000 (20:45 +1030)]
PR25384, PowerPC64 ELFv1 copy relocs against function symbols
Function symbols of course don't normally want .dynbss copies but
with some old versions of gcc they are needed to copy the function
descriptor. This patch restricts the cases where they are useful to
compilers using dot-symbols, and enables the warning regardless of
whether a PLT entry is emitted in the executable. PLTs in shared
libraries are affected by a .dynbss copy in the executable.
bfd/
PR 25384
* elf64-ppc.c (ELIMINATE_COPY_RELOCS): Update comment.
(ppc64_elf_adjust_dynamic_symbol): Don't allow .dynbss copies
of function symbols unless dot symbols are present. Do warn
whenever one is created, regardles of whether a PLT entry is
also emitted for the function symbol.
ld/
* testsuite/ld-powerpc/ambiguousv1b.d: Adjust expected output.
* testsuite/ld-powerpc/funref.s: Align func_tab.
* testsuite/ld-powerpc/funref2.s: Likewise.
* testsuite/ld-powerpc/funv1.s: Add dot symbols.
Szabolcs Nagy [Thu, 9 Jan 2020 17:20:56 +0000 (17:20 +0000)]
[PR ld/22269] arm: Avoid dynamic relocs for undefweak symbols in static PIE
With static PIE linking undefined weak symbols are resolved to 0, so no
dynamic relocation is needed for them. The UNDEFWEAK_NO_DYNAMIC_RELOC
macro was introduced so this case can be handled easily, but it was not
applied consistently in the first attempt to fix ld/22269 for arm:
[bfd] Provide 8-byte minimum alignment for .plt section
This change increases the default alignment for the .plt section
from 4 bytes to 8 bytes. When function descriptors are 8-byte
aligned, they can be updated atomically on 32-bit hppa. This
helps with ordering issues on SMP machines. It also ensures
that descriptors reside on the same cache line. This reduces
the probability of a double TLB miss in a call.
2019-10-20 John David Anglin <danglin@gcc.gnu.org>
* elf32-hppa.c (elf32_hppa_size_dynamic_sections): Provide 8-byte
minimum alignment for .plt section.
This commit updates the import stubs to leave the pointer to the
function descriptor in register %r22. This provides a backup
mechanism for _dl_runtime_resolve to fixup descriptors during
lazy binding.
bfd/ChangeLog
2019-10-20 John David Anglin <danglin@gcc.gnu.org>
* elf32-hppa.c: Revise import stub sequences.
(LONG_BRANCH_STUB_SIZE): Define.
(LONG_BRANCH_SHARED_STUB_SIZE): Define.
(IMPORT_STUB_SIZE): Define.
(IMPORT_SHARED_STUB_SIZE): Define.
(EXPORT_STUB_SIZE): Define.
(plt_stub): Revise to not use register %r22.
(LDO_R1_R22): Define.
(LDW_R22_R21): Define.
(LDW_R22_R19): Define.
(hppa_build_one_stub): Update stub generation and use new defines.
(hppa_size_one_stub): Likewise.
Tamar Christina [Tue, 24 Sep 2019 13:46:17 +0000 (14:46 +0100)]
Arm: Fix out of range conditional branch (PR/24991)
The fix for PR12848 introduced an off by one error in the mask, this corrected
the negative overflows but not the positive overflows. As a result the
conditional branch instructions accepted a too wide positive immediate which
resulted in it corrupting the instruction during encoding.
The relocation I believe has been incorrectly named, to be consistent with the
other relocations it should have been named BRANCH21 which is why the masks for
it are confusing.
I've replaced the masks with a function out_of_range_p which should make it
harder to make such mistakes.
The mask for BL/BLX on Armv6t+ is also wrong, the extended range is 25-bits
and so the mask should be checking for 24-bits for positive overflow.
gas/ChangeLog:
PR gas/24991
* config/tc-arm.c (out_of_range_p): New.
(md_apply_fix): Use it in BFD_RELOC_THUMB_PCREL_BRANCH9,
BFD_RELOC_THUMB_PCREL_BRANCH12, BFD_RELOC_THUMB_PCREL_BRANCH20,
BFD_RELOC_THUMB_PCREL_BRANCH23, BFD_RELOC_THUMB_PCREL_BRANCH25
* testsuite/gas/arm/pr24991.d: New test.
* testsuite/gas/arm/pr24991.l: New test.
* testsuite/gas/arm/pr24991.s: New test.
projects / thirdparty / binutils-gdb.git / log
