net: xilinx_axi: Declare missing variable

Since commit
"net: xilinx_axi: Clear Isolate bit if found set suring phy"
(sha1: 39579875c) u-boot fails to build as the ret variable is
never declared. This patch declares the variable in the setup_phy()
function.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

cmd: mem: Show 64bit addresses which are tested

Fix print message.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

defconfig: zynqmp: ep108: Enable configs SPI_FLASH and SPI_FLASH_BAR

Enable configs SPI_FLASH and SPI_FLASH_BAR for ep
platform of zynqmp. This fixes the issues of qspi
flash probe failure on ep108

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Disable internal clock enable bit

Disable internal clock by clearing the internal
clock enable bit. This bit needs to be cleared too
when we stop the SDCLK for changing the frequency
divisor. This bit should be set to zero when the
device is not using the Host controller.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM: zynq: zynqmp: Enable DCC serial driver by default

Compile DCC serial driver by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

serial: dcc: Move driver to DM

Enabling this driver requires some DT changes.
Adding DCC to root or main bus:
dcc: dcc {
compatible = "arm,dcc";
u-boot,dm-pre-reloc;
};

Extend alias list to link DCC:
serial0 = &uart0;
serial1 = &uart1;
serial2 = &dcc;

Change stdout-path to point to dcc port.
stdout-path = "serial2:115200n8";

Also add support for debug uart to help with early debug.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM64: zynqmp: Extend early malloc space to be able to run DM drivers

DM drivers need more malloc space for early DM models allocation.
Use 4k instead of 1k.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add missing mmc aliases

Add missing mmc aliases.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Clear temporary place for storing DDR sizes

tmp is placed in BSS section but BSS section is initialized after
relocation but DDR layout needs to be known before relocation that's
why clear temporary place for DDR sizes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

net: xilinx_axi: Clear Isolate bit if found set suring phy

In SGMII cases the isolate bit might set after DMA and
ethernet resets and hence check and clear during
setup_phy if it was set.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

net: xilinx_axi: use interface type instead of zero

Pass appropriate interface type to phy_connect
instead of zero.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

configs: zynqmp: Fix SPI position in DC2 defconfig

No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

configs: zynqmp: Enable config NET_RANDOM_ETHADDR for DC1 and DC2

Enable config NET_RANDOM_ETHADDR for DC1 and DC2, as it may
lead to Ethernet probe failure if mac address is not found
in environment

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Enable SF test command

Add option to test flash memory.
Please make sure you have enough malloc space if you want to test larger
memories (CONFIG_SYS_MALLOC_LEN).

ZynqMP> sf test 0 20000
SPI flash test:
0 erase: 2906 ticks, 44 KiB/s 0.352 Mbps
1 check: 9 ticks, 14222 KiB/s 113.776 Mbps
2 write: 166 ticks, 771 KiB/s 6.168 Mbps
3 read: 8 ticks, 16000 KiB/s 128.000 Mbps
Test passed
0 erase: 2906 ticks, 44 KiB/s 0.352 Mbps
1 check: 9 ticks, 14222 KiB/s 113.776 Mbps
2 write: 166 ticks, 771 KiB/s 6.168 Mbps
3 read: 8 ticks, 16000 KiB/s 128.000 Mbps

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Remove !OF_CONTROL code for timer and interrupt

OF_CONTROL is enabled by default that's why this is dead code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Read information about timer/interrupts from DT

Read information about timer and interrupts from DT. This is the first
small step to move timer and intc to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Do not enable CMD_GPIO in board config file

CMD_GPIO is enabled (and can be enabled) via menuconfig
that's why it should be removed from board config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Do not setup the same mac adress for all boards

This was fixed in mainline some time ago and none board should hardcode
mac address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Remove earlyconX helper variables

There is no need to specify earlycon for certain because only earlycon
can be add to bootargs. Linux kernel read information about console from
stdout-path property.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

dm: ns16550: Add support for reg-offset property

reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Sai Pavan Boddu <saipava@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
Tested-by: Alistair Francis <alistair.francis@xilinx.com>

phy: ti: Do not use binary specification in macros

Sync it with mainline.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Revert "microblaze: Overwrite default GCC-5.x behavior"

This reverts commit 2cf38db35bc4644717d151d42f636dc5a93f294b.

All gnu89 inlining functions were fixed that's why this flag is not
needed anymore.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Revert "arm: smc: Add helper asm code for invoking smc"

This reverts commit 1f4dc97747abd75fb23f8d9f43f9acbf49408da6.

SMC call is replaced by mainline patch:
"armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure"
(sha1: a5b9fa30cebd91082f9fea93d7ef33812910da6a)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

fpga: zynqmp: Use mainline smc_call() instead of own

Use mainline smc_call() instead of our out of tree smc implementation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure

This commit adds functions issuing calls to secure monitor or
hypervisore. This allows using services such as Power State
Coordination Interface (PSCI) provided by firmware, e.g. ARM
Trusted Firmware (ATF)

The SMC call can destroy all registers declared temporary by the
calling conventions. The clobber list is "x0..x17" because of
this

Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>

zynq-common: Enable phy driver for Xilinx PCS/PMA core

Add support of Xilinx PCS/PMA core phy for Zynq

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

net: zynq_gem: Add support for SGMII interface

Add support of SGMII interface for zynq GEM.
Read xlnx,emio property from DT.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

phy: Add phy driver support for xilinx PCS/PMA core

Add phy driver support for xilinx PCS/PMA core

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Use SPDX header in zcu102 revB

No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Prepade DT for include headers

To be able to include headers from dt generic location.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: zcu102: dp: Use si570_1 for pixel clock

Enable the video clock from PL, and set phandle to si570_1.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: zcu102: Enable DisplayPort

Enable DisplayPort related drivers.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add property snps,quirk-frame-length-adjustment

Added snps,quirk-frame-length-adjustment and snps,refclk_fladj
for USB

Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Move usb description to the latest state

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Align node address with parent node for dpdma

Use right addresses for channel names

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Use correct addresses in node names

Reflect acutal silicon addresses in DT node names.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: DT: Added PM domains for PLLs

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: DT: Added PM domain for DDR

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: DT: Add power domains

Add power-domains to the DT and attach devices to them.
The power-domains are all logical domains as understood by firmware.
Each PD is identified by a unique identifier that the platform firmware
understands.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add backward compatible string for uart

Mainline kernel has no r1p12 compatible string that's why console stops
to work with the latest DTS files. Append generic compatible string.
Keep in your mind that using this generic compatible string not all uart
features will be available.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Sync GEM nodes with Linux

Remove jumbo properties which are handled in the driver directly
and use mainline compatible string which is already handled by the
driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Hook up the GEMs to the SMMU

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Correct IRQ nr for the SMMU

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes

This patch adds broken-tuning property to SD and
eMMC nodes.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Fix coding style for pcie

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add interrupt-controller property to gpio nodes

GPIO driver supports an input interrupt that's why gpio node itself can
be labeled as interrupt controller.

Reported-by: John Linn <linnj@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add CCI-400 node

Add CCI-400 node to DTSI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: DT: Add power domains

Add power-domains to the DT and attach devices to them.
The power-domains are all logical domains as understood by firmware.
Each PD is identified by a unique identifier that the platform firmware
understands.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Put qspi size to comment for zcu102 rev A

Different board revisions have different QSPI parts.
Use comments to mentioned it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Disable PCIe for zcu102

PCIe is valid configuration for this board but GT muxes are setup to use
DP, USB and SATA instead of PCIe x4.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Added OOB timing settings in zynqmp-zcu102.dts

This patch adds the sata port phy OOB timing values in the sata
device-tree node.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add missing compatible property for si5328

Missing compatible string It is causing error in bootlog
i2c i2c-10: of_i2c: modalias failure on
/amba/i2c@ff030000/i2cswitch@74/i2c@4/clock-generator4@69

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: zcu102: Change factory-fout of si570_1 to 300Hz

'factory-fout' should reflect correct default value.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Use different clock-generator names

If the same names in front of @ are used si570 driver reject clock
registration.
Error message:
si570: probe of 10-005d failed with error -17

Change all names to avoid it.

Reported-by: Chris Kohn <ckohn@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Fix i2c u8 chip address on rev B

There was conflict with 0x20 with i2c mux that's why it was changed on
rev B board.
Disable unreachable i2c chip.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add missing compatible string for zcu102

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zcu102: GT selection via DT

Use gpio hogs to select GT muxes based on HW design.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zcu102: Fix i2c gpio GT muxes description

Add simple u-boot i2c command to know how to setup GPIO gt outputs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Mark zcu102 revision A in DTS

Extend model description for zcu102 revA.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: dc1: Remove default properties

Remove default properies which are present in zynqmp.dtsi.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: dp: Add default properties to zynqmp.dtsi

Add some default properties to zynqmp.dtsi.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add no-1-8-v property to SD node.

There is no support to switch to 1.8V and use
UHS mode on 1.0 silicon. Hence, this patch add
no-1-8-v property to SD node to denotes 1.8v card
voltage is not supported on this system, even if
the controller claims it is.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Added OOB timing settings in zynqmp-zc1751-xm015-dc1.dts

This patch adds the sata port phy OOB timing values in the sata
device-tree node.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add 8-bit bus width property.

This patch add 8-bit bus width property to eMMC node.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Added OOB timing settings in zynqmp-ep108.dts

This patch adds the sata port phy OOB timing values in the sata
device-tree node.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: dt: Change qspi node compatible string

This patch makes compatible string as "m25p80" for qspi node in
ep108 device tree file

Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: DT: Add earlycon to EP108

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: clk: Enable the aud_clk for ALSA drivers

Enable audio clock for ALSA drivers.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Use 64bit size cell format

Use 64bit size cell format instead of 32bit for memory
description. Change 64bit sizes also for all others IPs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add serdes address space dp driver

Probably for run time serdes adjustment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Read RAM information from DT

Read information about memory from DT. This patch simplify life with
synchronization between DT and board files.

zynqmp-mini-nand, zynqmp-mini-qspi are not converted because they need
specific settings which needs to be tested.

dram_init() only needs maximum RAM size below 4GB that's why please sort
banks in memory node.
dram_init_banksize() copies memory setup to bi_dram[].
This will avoid reading information from DT twice.

Memory test start/end were changed to DDR location to let memtest still
compiled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

fdt: Try to read address-cells/size-cells from parent

Read address-cells and size-cells from parent if they are not present in
current node.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Enable libfdt for mini configurations

Even mini configuration requires libfdt because of DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Separate qspi register to two blocks

Separation is easier for reading.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Fix mics_clk alignment

Fix mics_clk alignment to follow rules.
Also remove one blank line.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

net: axi_emac: Report phy-node error message permanently

Do not use debug() when printing error message. Use printf instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM: zynq: Remove ZYNQ_BOOT_FREEBSD option

Remove CONFIG_ZYNQ_BOOT_FREEBSD configuration option and setup
CONFIG_SYS_MMC_MAX_DEVICE 1 for all Zynq boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zynq: Serial driver is enabled by default if DCC is not enabled

Remove ancient definitions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zynq: cc108: Information about memory is taken from DTS

Remove unneeded macro from board file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zynq: cc108: Enable gem for cc108

And remove definition from config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM: zynq: Remove unused SPI base addresses

Remove unused macros. Adresses are taken from DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

spi: zynqmp: Load qspi based address from DT

Read information from DT instead of hardcoded it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Fix indentation in cpu.c

Fix coding style problems.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

serial: zynq: Change logic in putc

Sync logic with Linux kernel where TX empty flag is checked before char
is sent.
This logic is fixing problem with console on zynqmp platform.

For example:
DRAM:  2 GiB
Enabling Caches...
EL Level: ��   sdhci@ff170000: 0
Using default environment

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zynqmp: Decrease boot delay

Synchronize it with zynq platform.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: mmc_write: Write only single block at a time

Write only single block at a time while doing write
operations mmc/SD/eMMC
This is workaround for an issue with multiple block write

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zynqmp: Add GEM to zc1751-dc(1|2)

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mtd: nand: arasan: Correct nand ecc initialization

Correct the nand ecc initialization code
This fixes the issue of incorrect nand ecc
init if no device is found in ecc_matric then
it endsup ecc init with junk intialization
instead of the most suited one.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Resize fdt to prepare for DT changes

It is good to resize fdt before it is changed to ensure that there is
enough space for changes which veloce command does.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM: zynq: zynqmp: Line up checkboard message

Use space instead of tab in checkboard print to aligned
it with others boards.

Reported-by: David Glessner <david.glessner@rockwellcollins.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>

ARM64: zynqmp: Add sataboot command

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

block: Add support for Ceva sata

Initial Ceva Sata init code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Overwrite default GCC-5.x behavior

From GCC-5.x version the default mode for C is -std=gnu11
instead of -std=gnu89 but the is still the code in u-boot which doesn't
full fill gnu11 standard. Enable gnu89 inlining.

https://gcc.gnu.org/gcc-5/porting_to.html (go through the
“C languages issues” section).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

test/py: add a test for the sleep command

Execute "sleep", and validate that it sleeps for approximately the correct
amount of time.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

test/py: test the ums command

This test invokes the "ums" command in U-Boot, and validates that a USB
storage device is enumerated on the test host system, and can be read
from.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

test/py: test the shell if command

Migrate all most tests from command_ut.c into the Python test system.
This allows the tests to be run against any U-Boot binary that supports
the if command (i.e. where hush is enabled) without requiring that
binary to be permanently bloated with the code from command_ut.

Some tests in command_ut.c can only be executed from C code, since they
test internal (more unit-level) features of various U-Boot APIs. The
migrated tests can all operate directly from the U-Boot console.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

test/py: add test of basic shell functionality

This tests whether the following features of the U-Boot shell:
- Execution of a directly entered command.
- Compound commands (; delimiter).
- Quoting of arguments containing spaces.
- Executing commands from environment variables.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

test/py: test the md/mw commands

This tests whether md/mw work, and affect each-other.

Command repeat is also tested.

test/cmd_repeat.sh is removed, since the new Python-based test does
everything it used to.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

test/py: add test of setenv/printenv/echo

This tests basic environment variable functionality.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

test/py: test that sandbox exits when asked

Test the sandbox port's implementation of the reset command and SIGHUP
handling. These should both cause the U-Boot process to exit gracefully.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>