imx: kontron-sl-mx8mm: Add support for reading HW UIDs
The factory provides a CPU UID in the OTPs and the SoM module
and the carrier board might provide additional UIDs in the GP
registers of the OTPs. Load these values in the following order
and create a serial number string:
* Board UID (GP2)
* SoM UID (GP1)
* CPU UID (UNIQUE_ID)
The string is stored in the "serial#" env variable and
exported to Linux. Further this prints the used UID to the
console which looks like this
imx: kontron-sl-mx6ul: Add support for reading HW UIDs
The factory provides a CPU UID in the OTPs and the SoM module
and the carrier board might provide additional UIDs in the GP
registers of the OTPs. Load these values in the following order
and create a serial number string:
* Board UID (GP2)
* SoM UID (GP1)
* CPU UID (UNIQUE_ID)
The string is stored in the "serial#" env variable and
exported to Linux. Further this prints the used UID to the
console which looks like this
imx: kontron-sl-mx6ul: Enable CONFIG_BOARD_LATE_INIT to fix auto fastboot
Recently code was added in board_late_init() to autostart fastboot
in case of booting from USB OTG. This change was ineffective as
enabling CONFIG_BOARD_LATE_INIT got lost during upstreaming.
Fixes: 410d9ccc0388 ("imx: kontron-sl-mx6ul: Autostart fastboot if booted from USB") Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
imx: kontron-sl-mx8mm: Adjust offset for U-Boot proper in case of eMMC fastboot
The image offset on SD/MMC devices is 33 KiB, except for eMMC boot if
fastboot is enabled. In this case it is 1 KiB. In order to make the
the bootloader universal, check the fastboot OTP boot fuse and adjust
the offset.
Peng Fan [Tue, 4 Nov 2025 10:05:53 +0000 (18:05 +0800)]
remoteproc: imx_rproc: Add support for i.MX93 CM33
Introduce remote processor configuration for the i.MX93 Cortex-M33 core.
This patch adds:
- Address translation table (ATT) for i.MX93, including TCM
(secure and non-secure) and DDR regions.
- A new device configuration structure `imx_rproc_cfg_imx93` using SMC
method and ARM SMC ops.
- Device tree match entry for "fsl,imx93-cm33"
This enables remoteproc framework to properly initialize and manage the
Cortex-M33 core on i.MX93 platforms.
Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 4 Nov 2025 10:05:51 +0000 (18:05 +0800)]
remoteproc: Add imx_rproc driver to support NXP i.MX8MP/N
Support i.MX8MP/N with start/stop/device_to_virt/is_running/load
implemented. The device static configuration is mostly reused from
Linux Kernel with adapation to U-Boot dm_rproc_ops.
The booting method:
- load mmc 2:2 0x90000000 /lib/firmware/imx8mp_m7_DDR_rpmsg_lite_str_echo_
rtos.elf
- rproc load 0 0x90000000 ${filesize}
- rproc start 0
Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 4 Nov 2025 10:05:50 +0000 (18:05 +0800)]
remoteproc: Extend device_to_virt with a is_iomem parameter
Some areas needs to be initialized by using memcpy_toio and memset_io.
Following Linux Kernel commit: 40df0a91b2a5 ("remoteproc: add is_iomem to
da_to_va"), add this to U-Boot.
Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Tue, 4 Nov 2025 01:52:03 +0000 (02:52 +0100)]
arm64: dts: imx8mp: Add missing LED enumerators for DH electronics i.MX8M Plus DHCOM on PDK2
The LED enumerators are missing, which prevents the LEDs from being
accurately told apart by label. Fill in the enumerators the same way
they are already present on PDK3. Put this into local DT extras until
matching kernel patch lands in Linux.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Alice Guo [Mon, 3 Nov 2025 07:36:54 +0000 (15:36 +0800)]
arm64: imx8ulp: Split SRAM0 mapping to isolate the SCMI shared memory as non-cacheable
This patch splits the 2MB SRAM0 mapping into three regions:
- 0x22000000~0x2201f000: cacheable normal memory
- 0x2201f000~0x22020000: non-cacheable device memory
- 0x22020000~0x22200000: cacheable normal memory
The change ensures the SCMI shared memory is non-cacheable, which
avoids cache-related issues after removing
mmu_set_region_dcache_behaviour() from scmi_dt_get_smt_buffer().
Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Marek Vasut [Sun, 2 Nov 2025 21:45:33 +0000 (22:45 +0100)]
ARM: imx: Enable DFU SF on all i.MX6 DHSOM and include dfu_alt_info in env
Enable DFU SF on all i.MX6 DHSOM so the SPI NOR can be exposed via
DFU, and include dfu_alt_info which exposes the full SPI NOR via DFU.
To install new bootloader into the SPI NOR using DFU, it is necessary
to pad the u-boot-with-spl.imx to 0x400 Bytes offset first and then
send it to the board as follows:
configs: toradex-smarc-imx95: enable USB Gadget OS Descriptors for fastboot
USB OS Descriptors are used to install and configure the device without
requiring any user interaction on OS which support them (e.g. Windows).
Enable them in order to improve the user experience when fastboot is used.
Improve support for the BSH SystemMaster (SMM) M2B board.
In particular, this patch adds the timing for the 512 MB version, and
the spi.c reflects it by removing the safe guards.
Signed-off-by: Andrea Calabrese <andrea.calabrese@amarulasolutions.com>
Ye Li [Tue, 28 Oct 2025 02:46:30 +0000 (10:46 +0800)]
net: fsl_enetc_mdio: Add support for phy-supply property
Add support for the optional 'phy-supply' property in the ENETC MDIO
driver. This allows the driver to enable and manage the PHY's power
supply via the regulator framework when specified in device tree.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com>
Ye Li [Tue, 28 Oct 2025 02:46:29 +0000 (10:46 +0800)]
net: fsl_enetc: Add i.MX94 support to NETC block control driver
Extend the NETC block control driver to support the i.MX94 SoC.
Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com>
Alice Guo [Tue, 28 Oct 2025 02:46:27 +0000 (10:46 +0800)]
phy: imx8mq-usb: Add SPL support for i.MX8MQ, i.MX8MP, i.MX95, and i.MX94 USB3.0 PHY
This patch adds SPL Kconfig option (SPL_PHY_IMX8MQ_USB) for the i.MX8MQ,
i.MX8MP, i.MX95, and i.MX94 USB3.0 PHY driver, allowing the driver to be
compiled and probed in SPL stage.
Ye Li [Tue, 28 Oct 2025 02:46:26 +0000 (10:46 +0800)]
usb: f_sdp: Update SDP driver to support PQC container
Since PQC container has changed version to 0x2 in container header,
update the header's check.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Alice Guo [Tue, 28 Oct 2025 02:46:24 +0000 (10:46 +0800)]
imx943_evk: Enable USB 2.0 controller host mode
This patch enables the USB 2.0 controller to operate in host mode on the
i.MX943 EVK board. It updates the device tree files to configure the USB
2.0 controller appropriately and modifies the defconfig to include
necessary support.
Tom Rini [Mon, 3 Nov 2025 17:52:31 +0000 (11:52 -0600)]
Merge patch series "Allow falcon boot from A-core SPL on K3 devices"
Anshul Dalal <anshuld@ti.com> says:
With the addition of secure falcon mode since commit 7674ac9c820f ("Merge patch
series "Add support for secure falcon mode: disable args file""), this series now
adds support for the same to TI's K3 devices and documents the feature taking
AM62x EVM as an example.
With secure falcon mode from A-Core SPL, the boot flow changes as follows:
Tom Rini [Mon, 3 Nov 2025 17:52:09 +0000 (11:52 -0600)]
Merge patch series "Remove usage of CMD_BOOTx from SPL code"
Anshul Dalal <anshuld@ti.com> says:
Hi all,
We currently make use of CMD_BOOTI and CMD_BOOTZ in the SPL boot flow in
falcon mode, this isn't correct since all CMD_* configs are only meant
for U-Boot proper and not the SPL.
Therefore this patch set adds new LIB_BOOT[IMZ] configs that allow for
more granular selection of their respective compilation targets.
Additionally, this also allows us to more easily disable support for
raw images from secure falcon mode (SPL_OS_BOOT_SECURE) by doing the
following:
config LIB_SPL_BOOTI
...
depends on SPL_OS_BOOT && !SPL_OS_BOOT_SECURE
...
Anshul Dalal [Fri, 24 Oct 2025 08:14:06 +0000 (13:44 +0530)]
arm: mach-k3: enable support for falcon mode
With CONFIG_SPL_OS_BOOT enabled, U-Boot checks for the return value of
spl_start_uboot to select between falcon or the regular boot flow. Where
a return value of 0 means 'boot to linux'.
This patch overrides the weak definition form common/spl/spl.c to allow
K3 devices to use falcon mode with SPL_OS_BOOT_SECURE enabled for the
A-Core SPL.
Anshul Dalal [Fri, 24 Oct 2025 08:14:05 +0000 (13:44 +0530)]
board: ti: common: Kconfig: add CMD_SPL
Add CMD_SPL to list of configs implied by TI_COMMON_CMD_OPTIONS. This
allows the use of 'spl export'[1] command for preparing a device-tree
for falcon boot.
Anshul Dalal [Fri, 24 Oct 2025 08:14:04 +0000 (13:44 +0530)]
spl: Kconfig: allow falcon mode for TI secure devices
Falcon mode was disabled for TI_SECURE_DEVICE at commit e95b9b4437bc
("ti_armv7_common: Disable Falcon Mode on HS devices") for older 32-bit
HS devices and but can now be enabled with the addition of
OS_BOOT_SECURE.
For secure boot, the kernel with x509 headers can be packaged in a fit
container (fitImage) signed with TIFS keys for authentication.
Tom Rini [Mon, 3 Nov 2025 17:52:09 +0000 (11:52 -0600)]
Merge patch series "Remove usage of CMD_BOOTx from SPL code"
Anshul Dalal <anshuld@ti.com> says:
Hi all,
We currently make use of CMD_BOOTI and CMD_BOOTZ in the SPL boot flow in
falcon mode, this isn't correct since all CMD_* configs are only meant
for U-Boot proper and not the SPL.
Therefore this patch set adds new LIB_BOOT[IMZ] configs that allow for
more granular selection of their respective compilation targets.
Additionally, this also allows us to more easily disable support for
raw images from secure falcon mode (SPL_OS_BOOT_SECURE) by doing the
following:
config LIB_SPL_BOOTI
...
depends on SPL_OS_BOOT && !SPL_OS_BOOT_SECURE
...
Anshul Dalal [Mon, 27 Oct 2025 14:17:03 +0000 (19:47 +0530)]
configs: disable SPL_BOOTZ to preserve spl size
In the existing behaviour, CMD_BOOTZ is not enabled by default which
means zimage.o is not compiled in the SPL in falcon mode unless
explicitly enabled. This changes now as SPL_BOOTZ is default y for
falcon users which leads to larger SPL size with zimage.o being present.
This patch modifies the defconfigs that used falcon mode but don't
require zimage support.
Anshul Dalal [Mon, 27 Oct 2025 14:17:02 +0000 (19:47 +0530)]
spl: remove usage of CMD_BOOTx from image parsing
Using CMD_* configs from spl doesn't make logical sense. Therefore
this patch replaces the checks for CMD_BOOTx with newly added library
symbols LIB_BOOT[IMZ] and SPL_LIB_BOOT[IMZ] which are enabled by their
respective CMD_* or SPL_* counterparts.
On platforms with non-secure falcon mode, SPL_BOOTZ is enabled by
default for 32-bit ARM systems and SPL_BOOTI is enabled by default for
64-bit ARM and RISCV.
The respective C files (image.c/zimage.c) are compiled based on library
symbols $(PHASE_)LIB_BOOTx instead which are in turn selected by both
CMD_BOOTx and SPL_BOOTx as required.
Signed-off-by: Anshul Dalal <anshuld@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
This series converts the extension board framework to use UCLASS as
requested by Simon Glass, then adds extension support to pxe_utils
and bootmeth_efi (not tested) to enable extension boards devicetree load
in the standard boot process.
I can't test the imx8 extension scan enabled by the
imx8mm-cl-iot-gate_defconfig as I don't have this board.
I also can't test the efi bootmeth change as I don't have such board.
boot: bootmeth_efi: Add extension board devicetree overlay support
Add support for scanning and applying extension board devicetree
overlays during EFI boot. After loading the main board devicetree,
the system now scans for available extension boards and applies their
overlays automatically.
Signed-off-by: Kory Maincent (TI.com) <kory.maincent@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
boot: pxe_utils: Add extension board devicetree overlay support
Add support for scanning and applying extension board devicetree
overlays during PXE boot. After loading the main board devicetree,
the system now scans for available extension boards and applies their
overlays automatically.
This enables dynamic hardware configuration for systems with extension
boards during boot scenarios which are using pxe_utils.
Signed-off-by: Kory Maincent (TI.com) <kory.maincent@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
boot: extension: Move overlay apply custom logic to command level
The extension_overlay_cmd environment variable approach is specific to
the U-Boot extension_board command, while other boot flows (pxe_utils,
bootstd) handle overlay loading differently.
Move the extension_overlay_cmd execution out of the core extension
framework to the command level. This decouples the framework from
command-specific behavior and prepares for future extension support
in other boot flows.
Signed-off-by: Kory Maincent (TI.com) <kory.maincent@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Remove the legacy extension board implementation now that all boards
have been converted to use the new UCLASS-based framework. This
eliminates lines of legacy code while preserving functionality
through the modern driver model approach.
Update the bootstd tests, due to the removal of extension hunter.
Introduce UCLASS-based extension board support to enable more
standardized and automatic loading of extension board device tree
overlays in preparation for integration with bootstd and pxe_utils.
Several #if CONFIG_IS_ENABLED are used in cmd/extension_board.c to ease the
development but don't worry they are removed later in the series.
Signed-off-by: Kory Maincent (TI.com) <kory.maincent@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
boot: Move extension board support from cmd/ to boot/
Relocate extension board support from cmd/ to boot/ directory in
preparation for converting the extension framework to use UCLASS.
Also improve code style by applying reverse xmas tree ordering.
board: compulab: Exclude compulab extension board detection from XPL builds
Disable compulab extension board detection functionality in XPL (eXtended
Program Loader) images to reduce size and complexity in the early boot
stage.
The CAPE_EEPROM_BUS_NUM configuration option was incorrectly depending
on CMD_EXTENSION, which represents the extension board command. However,
the cape scan functionality can be built and used independently of the
command interface through the SUPPORT_EXTENSION_SCAN option.
Change the dependency from CMD_EXTENSION to SUPPORT_EXTENSION_SCAN to
properly reflect that the I2C bus configuration is needed for the cape
scan function itself, not specifically for the command.
Jonas Karlman [Mon, 14 Jul 2025 20:34:07 +0000 (20:34 +0000)]
mmc: rockchip_sdhci: Set xx_TAP_VALUE for RK3528
eMMC erase and write support on RK3528 is somewhat unreliable, sometime
e.g. mmc erase and write commands will fail with an error.
Use the delay line lock value for half card clock cycle, DLL_LOCK_VALUE,
to set a manual xx_TAP_VALUE to fix the unreliable eMMC support.
This is only enabled for RK3528, remaining SoCs still use the automatic
tap value, (DLL_LOCK_VALUE * 2) % 256, same value we configure manually
for RK3528.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sat, 12 Jul 2025 21:12:29 +0000 (21:12 +0000)]
rockchip: spl-boot-order: Defer probe of boot device
Boot devices are being probed when SPL boot order is determined. This
may delay boot slightly and can prevent booting from SPI Flash on boards
that use same pins for SPI Flash and eMMC due to pinctrl being applied
prior to booting.
Instead defer probe of the boot device until SPL try to load image from
the boot device by using uclass_find_device_by_of_offset() instead of
the get variant.
Peter Robinson [Fri, 26 Sep 2025 16:29:56 +0000 (17:29 +0100)]
board: rockchip: Add support for rk3588 MNT Reform2
Add support for MNT Reform2, it works as a carrier board
with a Firefly iCore-3588Q SoM.
Specification:
- Rockchip RK3588
- LPDDR5X 16/32 GB
- eMMC 128/256 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- DSI to eDP panel
- 1Gb Ethernet w/ Microchip KSZ9310 PHY
Tested using Fedora boot on USB stick and eMMC.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
David Barbion [Wed, 10 Sep 2025 21:18:55 +0000 (23:18 +0200)]
board: rockchip: Fix RG353M model renaming
Anbernic RG353M is hardware compatible with RG353P. Only the form-factor
differs. So only one DTS is created for both machines with
"Anbernic RG353P" as default model. If a RG353M is detected, the model
should be overwritten with the correct name.
Actually, it's overwritten with "Anbernic" only making the process of
machine detection a little harder.
However, to determine the size of the string "Anbernic RG353M", it is
sizeof() which is used resulting in obtaining the size of the pointer
(which is 8 bytes on ARM64) not the size of the pointed string.
strlen() should be used instead.
Signed-off-by: David Barbion <davidb@230ruedubac.fr> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Wed, 29 Oct 2025 11:34:25 +0000 (12:34 +0100)]
rockchip: imply most symbols for ARCH_ROCKCHIP
Forcing all those symbols on means we cannot make the binary smaller or
with unnecessary features or drivers disabled. This is especially useful
for security, auditing and certification where less code built means
less to look at (and less surface attack) and less to patch, but also
for making binary images smaller which typically means faster boot.
It is possible to have boards without MMC, NAND or SPI flashes, without
anything on SPI or I2C buses, nothing to control over PWM or GPIO or for
which we have no interest in regulator control or serial output so make
it possible to remove all that if desired.
No intended change in default selected symbols.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 65e2c14d5a5a ("binman: btool: mkimage: use Bintool.version")
removed the version argument from the run method but forgot to remove it
from the method docstring, so let's fix this oversight.
Fixes: 65e2c14d5a5a ("binman: btool: mkimage: use Bintool.version") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Tue, 28 Oct 2025 16:57:37 +0000 (17:57 +0100)]
rockchip: spl_common: fix TIMER_FMODE constant
The free running mode is 0 at bit offset 1. User mode is 1 at bit offset
1. Currently, free running mode is 1 at offset 0, which is already the
case thanks to TIME_EN.
So, this essentially does not change the actual value written to the
register as it is TIME_EN | TIMER_FMODE which currently is 0x1 | BIT(0)
= 0b1, and will become 0x1 | (0 << 1) = 0b1.
I checked PX30, RK3128, RK3188, RK3228, RK3288, RK3308, RK3328, RK3368
RK3506, RK3562 and RK3568 TRMs.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Tue, 28 Oct 2025 16:57:36 +0000 (17:57 +0100)]
rockchip: rk3399: fix TIMER_FMODE constant
The free running mode is 0 at bit offset 1. User mode is 1 at bit offset
1. Currently, free running mode is 1 at offset 0, which is already the
case thanks to TIME_EN.
So, this essentially does not change the actual value written to the
register as it is TIME_EN | TIMER_FMODE which currently is 0x1 | BIT(0)
= 0b1, and will become 0x1 | (0 << 1) = 0b1.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Tue, 28 Oct 2025 16:57:35 +0000 (17:57 +0100)]
rockchip: rk3036: use rockchip_stimer_init from spl_common.o
The only difference with the implementation in spl_common.c is that we
check whether the timer has already been enabled. Considering this is
running in SPL, the first stage on RK3036, I feel like it's guaranteed
to not be enabled by default. No public TRM though and I don't have
access to an RK3036 device so take this as a guess.
Size of SPL binary increases by 8B for evb-rk3036.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Tue, 28 Oct 2025 16:57:34 +0000 (17:57 +0100)]
rockchip: px30: use rockchip_stimer_init from spl_common.o for TPL
Instead of redefining what is essentially the same code in
secure_timer_init, let's simply use rockchip_stimer_init from
spl_common.o instead.
This increases the size of the TPL by 16B, due to the added check of
STIMER already being enabled. Experimentally, STIMER is not already
enabled when in TPL.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 3ba04aa78ba71faab4a339f5ab15bc81a3e0a51b) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit d272bc0c747a5af49cf98140ebd25a702f84ab52) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 19 Oct 2025 16:50:50 +0000 (16:50 +0000)]
board: rockchip: Add Luckfox Omni3576
Luckfox Omni3576 Carrier Board with Core3576 Module, powered by the
Rockchip RK3576 SoC with four Cortex-A72 cores, four Cortex-A53 cores,
and a Mali-G52 MC3 GPU.
Features tested with a Core3576 Rev1.1 on a Omni3576 carrier board:
- SD-card boot
- eMMC boot
- LED
- PCIe/NVMe
- USB2.0 HOST
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 19 Oct 2025 15:47:19 +0000 (15:47 +0000)]
board: rockchip: Add Radxa ROCK 4D
The Radxa ROCK 4D is a compact single-board computer (SBC) featuring
numerous top-tier functions, features, and expansion options.
Equipped with the Rockchip RK3576 or RK3576J SoC, the ROCK 4D boasts an
octa-core CPU (4x Cortex-A72 + 4x Cortex-A53), Mali-G52 GPU, and a
powerful 6 TOPS NPU, making it ideal for AI and multimedia tasks.
Features tested on a Radxa ROCK 4D v1.112:
- SPI Flash boot
- Ethernet
- PCIe/NVMe
- USB host
ROCK 4D boards with SPI Flash is configured to boot from FSPI0->UFS->USB,
or directly from USB when the MASKROM button is pressed, booting
directly from SD-card is not possible on these boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 19 Oct 2025 15:47:18 +0000 (15:47 +0000)]
rockchip: rk3576: Add SPI Flash boot support
The bootsource ids reported by BootROM of RK3576 for SPI NOR and USB
differs slightly compared to prior SoCs:
- Booting from sfc0 (ROCK 4D) report the normal bootsource id 0x3.
- Booting from sfc1 M1 (NanoPi M5) report a new bootsource id 0x23.
- Booting from sfc1 M0 has not been tested (no board using this config).
- Booting from USB report a new bootsource id 0x81.
Add a RK3576 specific read_brom_bootsource_id() function to help decode
the new bootsource id values and the required boot_devices mapping of
sfc0 and sfc1 to help support booting from SPI flash on RK3576.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 19 Oct 2025 15:47:16 +0000 (15:47 +0000)]
rockchip: spl: Add a read_brom_bootsource_id() helper
The bootsource ids reported by BootROM of RK3528 and RK3576 for e.g.
SPI NOR and USB differs slightly compared to prior SoCs:
- Booting from sfc0 (ROCK 4D) report the normal bootsource id 0x3.
- Booting from sfc1 M1 (NanoPi M5) report a new bootsource id 0x23.
- Booting from sfc1 M0 has not been tested (no board using this config).
- Booting from USB report a new bootsource id 0x81 on RK3528 and RK3576.
Add a helper function to read the bootsource id. This helper function
will be used to translate the new values to the common BROM_BOOTSOURCE
enum values on RK3528 and RK3576.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 31 Aug 2025 16:49:35 +0000 (16:49 +0000)]
arm: dts: rockchip: Include OTP in U-Boot pre-reloc phase for RK3326
Update rk3326-u-boot.dtsi to include OTP in U-Boot pre-reloc phase for
checkboard() to be able to read information about the running SoC model
and variant from OTP and print it during boot:
Jonas Karlman [Sun, 31 Aug 2025 16:49:30 +0000 (16:49 +0000)]
rockchip: odroid-go2: Use env from same storage FIT was loaded from
Change to dynamically select what storage media to use for the U-Boot
environment depending on from what storage media the FIT images was
loaded from, fall back to use env from nowhere.
U-Boot SPL 2025.07 (Jul 13 2025 - 10:07:16 +0000)
Trying to boot from MMC1
...
Loading Environment from MMC... Reading from MMC(0)...
or
U-Boot SPL 2025.07 (Jul 13 2025 - 10:07:16 +0000)
Trying to boot from SPI
...
Loading Environment from SPIFlash...
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 31 Aug 2025 16:49:27 +0000 (16:49 +0000)]
rockchip: odroid-go2: Use power off at power plug-in event
Include the RK817 PMIC in SPL and enable Kconfig options to power off
the handheld gaming device when it was powered on due to a power cable
plug-in event:
DDR3, 333MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB
out
Power Off due to plug-in event
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
projects / thirdparty / u-boot.git / log
