Andreas Krebbel [Fri, 24 Mar 2017 14:04:12 +0000 (14:04 +0000)]
S/390: arch12: New builtins.
This patch implements a set of low-level builtins for instruction
which would otherwise not be emitted by the compiler plus a set of
high-level builtins as defined by the IBM XL compiler. The high-level
builtins will be described in a future revision of the z/OS XL C/C++
Programming Guide.
I'll try to come up with a documentation appropriate for the GCC
manual as well (sometimes in the future).
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390-builtins.def: Add VXE builtins. Add a flags
argument to the overloaded builtin variants. Use the new flag to
deprecate certain builtin variants.
* config/s390/s390-builtin-types.def: Add new builtin types.
* config/s390/s390-builtins.h: Support new flags field for
overloaded builtins.
* config/s390/s390-c.c (OB_DEF_VAR): New flags field.
(s390_macro_to_expand): Enable vector float data type.
(s390_cpu_cpp_builtins_internal): Indicate support of the new
builtins by incrementing the __VEC__ version number.
(s390_expand_overloaded_builtin): Support expansion of vec_xl and
vec_xst.
(s390_resolve_overloaded_builtin): Emit error messages depending
on the builtin flags.
* config/s390/s390.c (s390_expand_builtin): Support additional
flags argument. Change error message to match the messages
emitted in s390-c.c.
* config/s390/s390.md: New UNSPEC_* constants.
(op_type): Add new instruction types.
* config/s390/vecintrin.h: Add new builtins and test data class
constants.
* config/s390/vx-builtins.md (V_HW_32_64): Add V4SF.
(V_HW_4, VEC_HW, VECF_HW): New mode iterators.
(VEC_INEXACT, VEC_NOINEXACT): New constants.
("vec_splats<mode>", "vec_insert<mode>", "vec_promote<mode>")
("vec_insert_and_zero<mode>", "vec_mergeh<mode>")
("vec_mergel<mode>"): V_HW -> VEC_HW.
("vec_ctd_s64", "vec_ctsl", "vec_ctul", "vec_st2f"): Use rounding
mode constant instead of magic value.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/target-attribute/tattr-3.c: Adjust error message
and remove the high-level builtin. The error message for the
would prevent compilation from reaching the second.
* gcc.target/s390/target-attribute/tattr-4.c: Likewise.
Andreas Krebbel [Fri, 24 Mar 2017 14:03:24 +0000 (14:03 +0000)]
S/390: arch12: Support new vector floating point modes.
This patch adds support for the new floating point vector elements (SF
and TF) introduced with arch12.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_compare): Support other
vector floating point modes than just V2DF.
(s390_expand_vcond): Likewise.
(s390_hard_regno_mode_ok): Allow SFmode values in VRs.
(s390_cannot_change_mode_class): Prevent mode changes between TF
and V1TF in vector registers.
* config/s390/s390.md (DF, SF): New mode attributes.
("*cmp<mode>_ccs", "add<mode>3", "sub<mode>3", "mul<mode>3")
("fma<mode>4", "fms<mode>4", "div<mode>3", "*neg<mode>2"): Add
SFmode support for VRs.
* config/s390/vector.md (V_HW, V_HW2, VT_HW, ti*, nonvec): Add new
vector fp modes.
(VFT, VF_HW): New mode iterators.
(vw, sdx): New mode attributes.
("addv2df3", "subv2df3", "mulv2df3", "divv2df3", "sqrtv2df2")
("fmav2df4","fmsv2df4", "negv2df2", "absv2df2", "*negabsv2df2")
("smaxv2df3", "sminv2df3", "*vec_cmp<VFCMP_HW_OP:code>v2df_nocc")
("vec_cmpuneqv2df", "vec_cmpltgtv2df", "vec_orderedv2df")
("vec_unorderedv2df"): Adjust the v2df only patterns to support
also the new vector floating point modes. Renaming to ...
Andreas Krebbel [Fri, 24 Mar 2017 14:01:54 +0000 (14:01 +0000)]
S/390: arch12: Add vllezlf instruction.
This adds support for the vector load element and zero instruction and
makes sure it is used when initializing vectors with elements while
setting the rest to 0.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_init): Use vllezl
instruction if possible.
* config/s390/vector.md (vec_halfnumelts): New mode
attribute.
("*vec_vllezlf<mode>"): New pattern.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Andreas Krebbel [Fri, 24 Mar 2017 14:01:18 +0000 (14:01 +0000)]
S/390: arch12: New vector popcount variants
arch12 provides pop count vector instructions for bigger elements than
just chars.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/popcount-1.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vector.md ("popcountv16qi2", "popcountv8hi2")
("popcountv4si2", "popcountv2di2"): Rename to ...
("popcount<mode>2", "popcountv8hi2_vx", "popcountv4si2_vx")
("popcountv2di2_vx"): ... these and add !TARGET_VXE to the
condition.
("popcount<mode>2_vxe"): New pattern.
Andreas Krebbel [Fri, 24 Mar 2017 14:00:43 +0000 (14:00 +0000)]
S/390: arch12: Add support for new vector bit
operations.
This patch adds support for the new bit operations introduced with
arch12.
The patch also renames the one complement pattern to the proper RTL
standard name.
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_rtx_costs): Return low costs for the
canonical form of ~AND to make sure the new instruction will be
used.
* config/s390/vector.md ("notand<mode>3", "ior_not<mode>3")
("notxor<mode>3"): Add new pattern definitions.
("*not<mode>"): Rename to ...
("one_cmpl<mode>2"): ... this.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
This reworks the fixuns_trunc* patterns a bit which got quite confusing
after adding z13 support. Now we just have a single RTL standard name
expander definition ("fixuns_trunc<FP:mode><GPR:mode>2") which then
multiplexes to either the emulation variants *_emu or the hardware
implementations.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md
("fixuns_truncdddi2", "fixuns_trunctddi2")
("fixuns_trunc<BFP:mode><GPR:mode>2"): Merge into ...
("fixuns_trunc<FP:mode><GPR:mode>2"): New expander.
("fixuns_trunc<BFP:mode><GPR:mode>2", "fixuns_trunc<mode>si2"):
Rename expanders to ...
Andreas Krebbel [Fri, 24 Mar 2017 13:58:41 +0000 (13:58 +0000)]
S/390: Use wfc for scalar vector compares
The z13 vector support used the vector style comparison instructions
also for the scalar compares in vector registers. However, it is much
more convenient to just use the compare scalar instruction for that
purpose. The advantage is that this instruction generates a CC result
as our compares usually do. So this results in quite some code to be
removed from the backend.
Regression tested on s390x.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/2964.md: Remove the single element vector compare
instructions which are no longer used.
* config/s390/s390.c (s390_select_ccmode): Remove handling of
vector CCmodes.
(s390_canonicalize_comparison): Remove handling of DFmode
compares.
(s390_expand_vec_compare_scalar): Remove function.
(s390_emit_compare): Don't call s390_expand_vec_compare_scalar.
* config/s390/s390.md ("*vec_cmp<insn_cmp>df_cconly"): Remove
pattern.
("*cmp<mode>_ccs"): Add wfcdb instruction.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-scalar-cmp-1.c: Adjust for the
comparison instructions used from now on.
Andreas Krebbel [Fri, 24 Mar 2017 13:57:58 +0000 (13:57 +0000)]
S/390: Move and rename vector check.
Move the target support routine for the vector facility to the common
code file. This is required to enable the generic vectorization tests
on S/390. While doing this the too generic name for the check (vector)
is changed to s390_vx. The renaming required to modify all the
testcases currently using that check.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/s390.exp (check_effective_target_vector):
Include target-supports.exp and move target_vector check routine
...
* lib/target-supports.exp (check_effective_target_s390_vx): ... to
here and rename it.
* gcc.target/s390/htm-builtins-z13-1.c: Rename effective target
check from vector to s390_vx.
* gcc.target/s390/target-attribute/tpragma-struct-vx-1.c: Likewise.
* gcc.target/s390/target-attribute/tpragma-struct-vx-2.c: Likewise.
* gcc.target/s390/vector/stpcpy-1.c: Likewise.
* gcc.target/s390/vector/vec-abi-vararg-1.c: Likewise.
* gcc.target/s390/vector/vec-clobber-1.c: Likewise.
* gcc.target/s390/vector/vec-genbytemask-1.c: Likewise.
* gcc.target/s390/vector/vec-genmask-1.c: Likewise.
* gcc.target/s390/vector/vec-nopeel-1.c: Likewise.
* gcc.target/s390/vector/vec-vrepi-1.c: Likewise.
Andreas Krebbel [Fri, 24 Mar 2017 13:57:19 +0000 (13:57 +0000)]
S/390: movdf improvements
This patch add the vector load element from immediate instruction to the
movdf/dd pattern for loading a FP zero and it removes the vector
instructions from the mov<mode>_64 pattern. These were pointless in
there because z13 support implies DFP support so these instructions will
always be matched in the mov<mode>_64dfp pattern instead.
Regression tested on s390x
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("mov<mode>_64dfp" DD_DF): Use vleig for loading a
FP zero.
("*mov<mode>_64" DD_DF): Remove the vector instructions. These
will anyway by matched by mov<mode>_64dfp.
Andreas Krebbel [Fri, 24 Mar 2017 13:54:23 +0000 (13:54 +0000)]
S/390: vec_init improvements
This enables the vec_init pattern also for V4SF, V1TI, and V1TF.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-init-2.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_init): Enable vector load
pair for all vector types with 64 bit elements.
* config/s390/vx-builtins.md (V_HW_64): Move mode iterator to ...
* config/s390/vector.md (V_HW_64): ... here.
(V_128_NOSINGLE): New mode iterator.
("vec_init<V_HW:mode>"): Use V_128 as mode iterator.
("*vec_splat<mode>"): Use V_128_NOSINGLE mode iterator.
("*vec_tf_to_v1tf", "*vec_ti_to_v1ti"): New pattern definitions.
("*vec_load_pairv2di"): Change to ...
("*vec_load_pair<mode>"): ... this one.
Andreas Krebbel [Fri, 24 Mar 2017 13:53:43 +0000 (13:53 +0000)]
S/390: Improve support of 128 bit vectors in GPRs
This patch improves the handling of 128 bit vectors residing in GPRs
by adding more alternatives to the move pattern.
Regression tested on s390x.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/constraints.md: Add comments.
(jKK): Reject element sizes > 8 bytes.
* config/s390/s390.c (s390_split_ok_p): Enable splitting also for
s_operands.
* config/s390/s390.md: Add the s_operand checks formerly in
s390_split_ok_p to various splitters where they are still
required.
* config/s390/vector.md ("mov<mode>" V_128): Add GPR alternatives
for 128 bit vectors. Plus two splitters.
Andreas Krebbel [Fri, 24 Mar 2017 13:52:30 +0000 (13:52 +0000)]
S/390: PR79904: Disallow reg + sym_ref literal pool addresses.
We accept reg + sym_ref as valid address if sym_ref is a literal pool
reference knowing that it will be rewritten as r13 + reg + offset.
However, annotate_constant_pool_refs was never able to handle that.
With the patch only single sym_refs are accepted.
Regression tested on s390x.
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
The boundary argument of the vec_load_bndry builtin needs to be
rewritten. At that point it must be constant already. The current
diagnostics in s390_expand_builtins is too late for this. The patch
adds an additional check for that builtin which will be triggered
already during preprocessing.
Regression tested on s390x.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79893
* gcc.target/s390/zvector/pr79893.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79893
* config/s390/s390-c.c (s390_adjust_builtin_arglist): Issue an
error if the boundary argument is not constant.
Bill Schmidt [Fri, 24 Mar 2017 12:34:19 +0000 (12:34 +0000)]
re PR tree-optimization/80158 (ICE in all_phi_incrs_profitable)
2017-03-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/80158
* gimple-ssa-strength-reduction.c (replace_mult_candidate): When
replacing a candidate statement, also replace it for the
candidate's alternate interpretation.
(replace_rhs_if_not_dup): Likewise.
(replace_one_candidate): Likewise.
* gfortran.fortran-torture/compile/pr80158.f: New file.
Kelvin Nilsen [Thu, 23 Mar 2017 22:12:06 +0000 (22:12 +0000)]
p9-options-1.c: New test.
gcc/testsuite/ChangeLog:
2017-03-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/p9-options-1.c: New test.
gcc/ChangeLog:
2017-03-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/rs6000.c (rs6000_option_override_internal): Change
handling of certain combinations of target options, including the
combinations -mpower8-vector vs. -mno-vsx, -mpower9-vector vs.
-mno-power8-vector, and -mpower9_dform vs. -mno-power9-vector.
Jonathan Wakely [Thu, 23 Mar 2017 19:40:41 +0000 (19:40 +0000)]
Fix Debug Mode test failures
* testsuite/23_containers/array/tuple_interface/
tuple_element_debug_neg.cc: Adjust dg-error.
* testsuite/23_containers/list/operations/78389.cc: Fix less-than to
define a valid strict weak ordering.
* testsuite/23_containers/priority_queue/67085.cc: Disable test for
Debug Mode, due to debug checks making extra copies of predicate.
* testsuite/ext/pb_ds/regression/priority_queue_binary_heap-62045.cc:
Likewise.
Daniel Kruegler [Thu, 23 Mar 2017 19:40:16 +0000 (19:40 +0000)]
Implement LWG 2686, std::hash<error_condition>, for C++17
2017-03-23 Daniel Kruegler <daniel.kruegler@gmail.com>
Implement LWG 2686, Why is std::hash specialized for error_code,
but not error_condition?
* include/std/system_error (hash<error_condition>): Define for C++17.
* testsuite/20_util/hash/operators/size_t.cc (hash<error_condition>):
Instantiate test for error_condition.
* testsuite/20_util/hash/requirements/explicit_instantiation.cc
(hash<error_condition>): Instantiate hash<error_condition>.
William Schmidt [Thu, 23 Mar 2017 13:13:44 +0000 (13:13 +0000)]
re PR tree-optimization/79908 (ICE in gimplify_expr (gimplify.c:12155) gimplification failed)
[gcc]
2017-03-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Richard Biener <rguenth@suse.com>
PR tree-optimization/79908
PR tree-optimization/80136
* tree-stdarg.c (expand_ifn_va_arg_1): For a VA_ARG whose LHS has
been cast away, gimplify_and_add suffices.
[gcc/testsuite]
2017-03-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Richard Biener <rguenther@suse.de>
PR tree-optimization/79908
PR tree-optimization/80136
* gcc.dg/torture/pr79908.c: New file.
Jakub Jelinek [Wed, 22 Mar 2017 21:52:13 +0000 (22:52 +0100)]
re PR tree-optimization/80072 (ICE in gimple_build_assign_1 with -O3 -march=broadwell/skylake-avx512)
PR tree-optimization/80072
* tree-ssa-reassoc.c (struct operand_entry): Change id field type
to unsigned int.
(next_operand_entry_id): Change type to unsigned int.
(sort_by_operand_rank): Make sure to return the right return value
even if unsigned fields are bigger than INT_MAX.
(struct oecount): Change cnt and id type to unsigned int.
(oecount_hasher::equal): Formatting fix.
(oecount_cmp): Make sure to return the right return value
even if unsigned fields are bigger than INT_MAX.
(undistribute_ops_list): Change next_oecount_id type to unsigned int.
Ian Lance Taylor [Wed, 22 Mar 2017 21:02:53 +0000 (21:02 +0000)]
compiler: initialize gogo fields
A couple of the data members in the Gogo class were not
being initialized properly. This was causing "uninitialized value"
errors during Valgrind memcheck runs. This patch insures that
all of the fields receive an initial value.
Jakub Jelinek [Wed, 22 Mar 2017 18:53:47 +0000 (19:53 +0100)]
re PR c++/80141 (ICE with pragma omp declare)
PR c++/80141
* semantics.c (finish_omp_clause) <case OMP_CLAUSE_SIMDLEN,
case OMP_CLAUSE_ALIGNED>: Call maybe_constant_value only when not
processing_template_decl.
Jakub Jelinek [Wed, 22 Mar 2017 18:34:44 +0000 (19:34 +0100)]
re PR sanitizer/80110 (error: statement marked for throw, but doesn’t w/ -fsanitize=thread)
PR sanitizer/80110
* tsan.c: Include tree-eh.h.
(instrument_builtin_call): Call maybe_clean_eh_stmt or
maybe_clean_or_replace_eh_stmt where needed.
(instrument_memory_accesses): Add cfg_changed argument.
Call gimple_purge_dead_eh_edges on each block and set *cfg_changed
if it returned true.
(tsan_pass): Adjust caller. Return TODO_cleanup_cfg if cfg_changed.
Jakub Jelinek [Wed, 22 Mar 2017 18:33:37 +0000 (19:33 +0100)]
re PR rtl-optimization/63191 (32-bit gcc uses excessive memory during dead store elimination with -fPIC)
PR rtl-optimization/63191
* config/i386/i386.c (ix86_delegitimize_address): Turn into small
wrapper function, moved the whole old content into ...
(ix86_delegitimize_address_1): ... this. New inline function.
(ix86_find_base_term): Use ix86_delegitimize_address_1 with
true as last argument instead of ix86_delegitimize_address.
Wilco Dijkstra [Wed, 22 Mar 2017 18:12:05 +0000 (18:12 +0000)]
Recently we've put a lot of effort into improving ifcvt to use CSEL on AArch64.
In https://gcc.gnu.org/ml/gcc-patches/2015-11/msg01639.html James determined
the best value for AArch64 code generation. Although this setting is used when
explicitly targeting Cortex cores, it is not otherwise used. This means by
default GCC will not use (F)CSEL in many common cases.
Change the generic_branch_cost to be the same as cortexa57_branch_cost so that
all supported cores benefit from CSEL. This is generally faster and smaller.
On one benchmark the new setting fixes a regression since GCC6 and improves
performance by 49%.
Wilco Dijkstra [Wed, 22 Mar 2017 17:51:12 +0000 (17:51 +0000)]
Many supported cores implement fusion of AES instructions.
Many supported cores implement fusion of AES instructions. When fusion
happens it can give a significant performance gain. If not, scheduling
fusion candidates next to each other has almost no effect on performance.
Due to the high benefit/low cost it makes sense to enable AES fusion with
-mcpu=generic so that cores that support it always benefit.
Ian Lance Taylor [Wed, 22 Mar 2017 13:59:01 +0000 (13:59 +0000)]
re PR go/80128 (go1: internal compiler error: in write_specific_type_functions, at go/gofrontend/types.cc:2002)
PR go/80128
compiler: check backend alignment for memequalNN functions
The code was assuming the usual required alignment for the memequalNN
functions (16 bits for int16, 32 for int32, etc.). However, on m68k
the required alignment of int32 is only 16 bits. Assuming the
memequalNN alignment caused the compiler to incorrectly decide that
int32 required a specially generated function rather than calling
memequal32. This then crashed if the type descriptor were generated
after type-specific functions had been written.
re PR c++/80029 (valgrind error in new_omp_context(omp_region_type) (gimplify.c:400))
PR c++/80029
gcc/
* gimplify.c (is_oacc_declared): New function.
(oacc_default_clause): Use it to set default flags for acc declared
variables inside parallel regions.
(gimplify_scan_omp_clauses): Strip firstprivate pointers for acc
declared variables.
(gimplify_oacc_declare): Gimplify the declare clauses. Add the
declare attribute to any decl as necessary.
libgomp/
* testsuite/libgomp.oacc-c-c++-common/declare-vla.c: New test.
Fix PR80082: LDRD erronously used for 64bit load on ARMv7-R
2017-03-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR target/80082
* config/arm/arm-isa.h (isa_bit_lpae): New feature bit.
(ISA_ARMv7ve): Add isa_bit_lpae to the definition.
* config/arm/arm-protos.h (arm_arch7ve): Rename into ...
(arm_arch_lpae): This.
* config/arm/arm.c (arm_arch7ve): Rename into ...
(arm_arch_lpae): This. Define it in term of isa_bit_lpae.
* config/arm/arm.h (TARGET_HAVE_LPAE): Redefine in term of
arm_arch_lpae.
gcc/testsuite/
PR target/80082
* gcc.target/arm/atomic_loaddi_10.c: New testcase.
* gcc.target/arm/atomic_loaddi_11.c: Likewise.
Bill Schmidt [Tue, 21 Mar 2017 18:14:42 +0000 (18:14 +0000)]
re PR tree-optimization/79908 (ICE in gimplify_expr (gimplify.c:12155) gimplification failed)
[gcc]
2017-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/79908
* tree-stdarg.c (expand_ifn_va_arg_1): Revert the following
change: For a VA_ARG whose LHS has been cast away, use
force_gimple_operand to construct the side effects.
[gcc/testsuite]
2017-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/79908
* gcc.dg/torture/pr79908.c: Revert addition of new file.
gcc/ChangeLog:
PR translation/80001
* omp-offload.c (oacc_loop_fixed_partitions): Make diagnostics
more amenable to translation.
(oacc_loop_auto_partitions): Likewise.
Jakub Jelinek [Tue, 21 Mar 2017 14:49:51 +0000 (15:49 +0100)]
re PR target/80125 (r246297 causes segfault in reg_used_between_p())
PR target/80125
* combine.c (can_combine_p): Revert the 2017-03-20 change, only
check reg_used_between_p between insn and one of succ or succ2
depending on if succ is artificial insn not inserted into insn
stream.
Martin Liska [Tue, 21 Mar 2017 14:41:11 +0000 (15:41 +0100)]
Document gcov-dump and fix installation of gcov-tool (PR gcov-profile/80081).
2017-03-21 Martin Liska <mliska@suse.cz>
PR gcov-profile/80081
* Makefile.in: Add gcov-dump and fix installation of gcov-tool.
* doc/gcc.texi: Include gcov-dump stuff.
* doc/gcov-dump.texi: New file.
Toma Tabacu [Tue, 21 Mar 2017 14:00:19 +0000 (14:00 +0000)]
Apply temporary fix for PR rtl-optimization/79150.
gcc/
PR rtl-optimization/79150
* config/mips/mips.c (mips_block_move_loop): Emit a NOP after the
conditional jump, if the jump is the last insn of the loop.
Bill Schmidt [Tue, 21 Mar 2017 13:57:20 +0000 (13:57 +0000)]
re PR tree-optimization/79908 (ICE in gimplify_expr (gimplify.c:12155) gimplification failed)
[gcc]
2017-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Richard Biener <rguenth@suse.com>
PR tree-optimization/79908
* tree-stdarg.c (expand_ifn_va_arg_1): For a VA_ARG whose LHS has
been cast away, use force_gimple_operand to construct the side
effects.
[gcc/testsuite]
2017-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Richard Biener <rguenther@suse.de>
PR tree-optimization/79908
* gcc.dg/torture/pr79908.c: New file.
Co-Authored-By: Richard Biener <rguenth@suse.com> Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r246319
Brad Spengler [Tue, 21 Mar 2017 11:50:18 +0000 (11:50 +0000)]
re PR plugins/80094 (GCC plugin hash table corruption on hash table expansion (>10 plugins) on GCC 4.5+)
2017-03-21 Brad Spengler <spender@grsecurity.net>
PR plugins/80094
* plugin.c (htab_hash_plugin): New function.
(add_new_plugin): Use it and adjust.
(parse_plugin_arg_opt): Adjust.
(init_one_plugin): Likewise.
Richard Biener [Tue, 21 Mar 2017 11:43:45 +0000 (11:43 +0000)]
re PR tree-optimization/80032 (C++ excessive stack usage (no stack reuse))
2017-03-21 Richard Biener <rguenther@suse.de>
PR tree-optimization/80032
* gimplify.c (gimple_push_cleanup): Add force_uncond parameter,
if set force the cleanup to happen unconditionally.
(gimplify_target_expr): Push inserted clobbers with force_uncond
to avoid them being removed by control-dependent DCE.
Richard Biener [Tue, 21 Mar 2017 11:42:22 +0000 (11:42 +0000)]
re PR tree-optimization/80122 (__builtin_va_arg_pack() and __builtin_va_arg_pack_len() does not work correctly)
2017-03-21 Richard Biener <rguenther@suse.de>
PR tree-optimization/80122
* tree-inline.c (copy_bb): Do not expans va-arg packs or
va_arg_pack_len when the inlined call stmt requires pack
expansion itself.
* tree-inline.h (struct copy_body_data): Make call_stmt a gcall *.