]> git.ipfire.org Git - thirdparty/gcc.git/log
thirdparty/gcc.git
6 weeks agoDaily bump.
GCC Administrator [Tue, 23 Sep 2025 00:27:13 +0000 (00:27 +0000)] 
Daily bump.

6 weeks agoAda: Fix internal error on use clause present in generic formal part
Eric Botcazou [Mon, 22 Sep 2025 09:08:34 +0000 (11:08 +0200)] 
Ada: Fix internal error on use clause present in generic formal part

This is a regression present on the mainline and 15 branch: the compiler
aborts on a use clause present in the formal part of a generic unit because
of an oversight in the new inference code for generic actual parameters.

The fix also adds a missing test to Analyze_Dimension_Array_Aggregate.

gcc/ada/
PR ada/121968
* sem_ch12.adb (Associations.Find_Assoc): Add guard for clauses.
* sem_dim.adb (Analyze_Dimension_Array_Aggregate): Add test for
N_Iterated_Component_Association nodes.

6 weeks agoDaily bump.
GCC Administrator [Mon, 22 Sep 2025 00:26:58 +0000 (00:26 +0000)] 
Daily bump.

6 weeks agoDaily bump.
GCC Administrator [Sun, 21 Sep 2025 00:24:25 +0000 (00:24 +0000)] 
Daily bump.

7 weeks ago[MicroBlaze][PR target/118280] Fix __atomic_test_and_set
Michael Eager [Fri, 19 Sep 2025 16:53:28 +0000 (09:53 -0700)] 
[MicroBlaze][PR target/118280] Fix __atomic_test_and_set

Atomic support enhanced to fix existing atomic_compare_and_swapsi pattern
to handle side effects; new patterns atomic_fetch_op and atomic_test_and_set
added. As MicroBlaze has no QImode test/set instruction, use shift magic
to implement atomic_test_and_set.

PR target/118280
gcc/
* config/microblaze/iterators.md: New.
* config/microblaze/microblaze-protos.h: Add
microblaze_subword_address.
* config/microblaze/microblaze.cc: Ditto.
* config/microblaze/microblaze.md: constants: Add UNSPECV_CAS_BOOL,
UNSPECV_CAS_MEM, UNSPECV_CAS_VAL, UNSPECV_ATOMIC_FETCH_OP
type: add atomic
* config/microblaze/sync.md: Add atomic_fetch_<atomic_optab>si
atomic_test_and_set

Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Gopi Kumar Bulusu <gopi@sankhya.com>
Signed-off-by: Michael Eager <eager@eagercon.com>
7 weeks agoDaily bump.
GCC Administrator [Sat, 20 Sep 2025 00:25:46 +0000 (00:25 +0000)] 
Daily bump.

7 weeks agoDaily bump.
GCC Administrator [Fri, 19 Sep 2025 00:27:53 +0000 (00:27 +0000)] 
Daily bump.

7 weeks agolibstdc++: Explicitly pass -Wsystem-headers in tests that need it
Patrick Palka [Wed, 17 Sep 2025 00:59:10 +0000 (20:59 -0400)] 
libstdc++: Explicitly pass -Wsystem-headers in tests that need it

When running libstdc++ tests using an installed gcc (as opposed to an
in-tree gcc), we naturally use system stdlib headers instead of the
in-tree headers.  But warnings from within system headers are suppressed
by default, so tests that check for such warnings spuriously fail in such
a setup.  This patch makes us compile such tests with -Wsystem-headers so
that they consistently pass.

libstdc++-v3/ChangeLog:

* testsuite/20_util/bind/dangling_ref.cc: Compile with
-Wsystem-headers.
* testsuite/20_util/ratio/operations/ops_overflow_neg.cc: Likewise.
* testsuite/20_util/unique_ptr/lwg4148.cc: Likewise.
* testsuite/29_atomics/atomic/operators/pointer_partial_void.cc:
Likewise.
* testsuite/30_threads/packaged_task/cons/dangling_ref.cc:
Likewise.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
(cherry picked from commit e690b97761e18daccb4fff0151c97c1d0115b55f)

7 weeks agoRemove SPR/GNR/DMR from avx512_{move,store}_by pieces tune.
hongtao.liu [Tue, 16 Sep 2025 01:23:45 +0000 (03:23 +0200)] 
Remove SPR/GNR/DMR from avx512_{move,store}_by pieces tune.

Align move_max with prefer_vector_width for SPR/GNR/DMR similar as
below commit.

commit 6ea25c041964bf63014fcf7bb68fb1f5a0a4e123
Author: liuhongt <hongtao.liu@intel.com>
Date:   Thu Aug 15 12:54:07 2024 +0800

    Align ix86_{move_max,store_max} with vectorizer.

    When none of mprefer-vector-width, avx256_optimal/avx128_optimal,
    avx256_store_by_pieces/avx512_store_by_pieces is specified, GCC will
    set ix86_{move_max,store_max} as max available vector length except
    for AVX part.

                  if (TARGET_AVX512F_P (opts->x_ix86_isa_flags)
                      && TARGET_EVEX512_P (opts->x_ix86_isa_flags2))
                    opts->x_ix86_move_max = PVW_AVX512;
                  else
                    opts->x_ix86_move_max = PVW_AVX128;

    So for -mavx2, vectorizer will choose 256-bit for vectorization, but
    128-bit is used for struct copy, there could be a potential STLF issue
    due to this "misalign".

gcc/ChangeLog:

* config/i386/x86-tune.def (X86_TUNE_AVX512_MOVE_BY_PIECES):
Remove SPR/GNR/DMR.
(X86_TUNE_AVX512_STORE_BY_PIECES): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pieces-memcpy-18.c: Use -mtune=znver5
instead of -mtune=sapphirerapids.
* gcc.target/i386/pieces-memcpy-21.c: Ditto.
* gcc.target/i386/pieces-memset-46.c: Ditto.
* gcc.target/i386/pieces-memset-49.c: Ditto.

(cherry picked from commit dd713d0f3fc88778a9b3d4f8f1895a3cd6c145ca)

7 weeks agoDaily bump.
GCC Administrator [Thu, 18 Sep 2025 00:27:15 +0000 (00:27 +0000)] 
Daily bump.

7 weeks agotestsuite: arm: Simplify fp16-aapcs tests
Torbjörn SVENSSON [Wed, 27 Aug 2025 14:25:14 +0000 (16:25 +0200)] 
testsuite: arm: Simplify fp16-aapcs tests

Reduce fp16-aapcs testcases to return value testing since parameter
passing are already tested in aapcs/vfp*.c

gcc/testsuite/ChangeLog:
* gcc.target/arm/fp16-aapcs.c: New test.
* gcc.target/arm/fp16-aapcs-1.c: Removed.
* gcc.target/arm/fp16-aapcs-2.c: Likewise.
* gcc.target/arm/fp16-aapcs-3.c: Likewise.
* gcc.target/arm/fp16-aapcs-4.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 1cf8cb45d872a5f09d65c63c891c091710c37432)

7 weeks agoDaily bump.
GCC Administrator [Wed, 17 Sep 2025 00:26:44 +0000 (00:26 +0000)] 
Daily bump.

7 weeks agoFix latent LRA bug
Jeff Law [Fri, 12 Sep 2025 22:08:38 +0000 (16:08 -0600)] 
Fix latent LRA bug

Shreya's work to add the addptr pattern on the RISC-V port exposed a latent bug
in LRA.

We lazily allocate/reallocate the ira_reg_equiv structure and when we do
(re)allocation we'll over-allocate and zero-fill so that we don't have to
actually allocate and relocate the data so often.

In the case exposed by Shreya's work we had N requested entries at the last
rellocation step.  We actually allocate N+M entries.  During LRA we allocate
enough new pseudos and thus have N+M+1 pseudos.

In get_equiv we read ira_reg_equiv[regno] without bounds checking so we read
past the allocated part of the array and get back junk which we use and
depending on the precise contents we fault in various fun and interesting ways.

We could either arrange to re-allocate ira_reg_equiv again on some path through
LRA (possibly in get_equiv itself).  We could also just insert the bounds check
in get_equiv like is done elsewhere in LRA.  Vlad indicated no strong
preference in an email last week.

So this just adds the bounds check in a manner similar to what's done elsewhere
in LRA.  Bootstrapped and regression tested on x86_64 as well as RISC-V with
Shreya's work enabled and regtested across the various embedded targets.

gcc/
* lra-constraints.cc (get_equiv): Bounds check before accessing
data in ira_reg_equiv.

(cherry picked from commit 0c6ad3f5dfbd45150eeef2474899ba7ef0d8e592)

7 weeks agoaarch64: Force vector in SVE gimple_folder::fold_active_lanes_to.
Jennifer Schmitz [Thu, 28 Aug 2025 10:10:27 +0000 (03:10 -0700)] 
aarch64: Force vector in SVE gimple_folder::fold_active_lanes_to.

An ICE was reported in the following test case:
svint8_t foo(svbool_t pg, int8_t op2) {
      return svmul_n_s8_z(pg, svdup_s8(1), op2);
}
with a type mismatch in ‘vec_cond_expr’:
_4 = VEC_COND_EXPR <v16_2(D), v32_3(D), { 0, ... }>;

The reason is that svmul_impl::fold folds calls where one of the operands
is all ones to the other operand using
gimple_folder::fold_active_lanes_to. However, we implicitly assumed
that the argument that is passed to fold_active_lanes_to is a vector
type. In the given test case op2 is a scalar type, resulting in the type
mismatch in the vec_cond_expr.

This patch fixes the ICE by forcing a vector type of the argument
in fold_active_lanes_to before the statement with the vec_cond_expr.

In the initial version of this patch, the force_vector statement was placed in
svmul_impl::fold, but it was moved to fold_active_lanes_to to align it with
fold_const_binary which takes care of the fixup from scalar to vector
type using vector_const_binop.

The patch was bootstrapped and tested on aarch64-linux-gnu, no regression.
OK for trunk?
OK to backport to GCC 15?

Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com>
gcc/
PR target/121602
* config/aarch64/aarch64-sve-builtins.cc
(gimple_folder::fold_active_lanes_to): Add force_vector
statement.

gcc/testsuite/
PR target/121602
* gcc.target/aarch64/sve/acle/asm/mul_s16.c: New test.
* gcc.target/aarch64/sve/acle/asm/mul_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_u8.c: Likewise.

7 weeks agoarm: Fix operand check for __arm_{mrrc{2},mcrr{2]} intrinsics [PR 121464]
Andre Vieira [Mon, 11 Aug 2025 08:49:18 +0000 (09:49 +0100)] 
arm: Fix operand check for __arm_{mrrc{2},mcrr{2]} intrinsics [PR 121464]

Fix the bound checking for the opc1  operand of the following intrinsics:
  __arm_mcrr
  __arm_mcrr2
  __arm_mrrc
  __arm_mrrc2

gcc/ChangeLog:

PR target/121464
* config/arm/arm.md (arm_<mrrc>, arm_<mcrr>): Fix operand check.

gcc/testsuite/ChangeLog:

PR target/121464
* gcc.target/arm/acle/mcrr.c: Update testcase.
* gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc.target/arm/acle/mrrc.c: Likewise.
* gcc.target/arm/acle/mrrc2.c: Likewise.

(cherry picked from commit b29abdc333cce9acbc9537a1df8a4ec09444658f)

7 weeks agoDaily bump.
GCC Administrator [Tue, 16 Sep 2025 00:27:37 +0000 (00:27 +0000)] 
Daily bump.

7 weeks agoada: Fix internal error on aspect in complex object declaration
Eric Botcazou [Fri, 22 Aug 2025 12:51:58 +0000 (14:51 +0200)] 
ada: Fix internal error on aspect in complex object declaration

The sufficient conditions are that the aspect be deferred and the object be
rewritten as a renaming because of the complex initialization expression.

gcc/ada/ChangeLog:

* gcc-interface/trans.cc (gnat_to_gnu)
<N_Object_Renaming_Declaration>: Deal with objects whose elaboration
is deferred.
(process_freeze_entity): Deal with renamed objects whose elaboration
is deferred.

7 weeks agoada: Fix wrong finalization of aliased array of bounded vector
Eric Botcazou [Wed, 3 Sep 2025 07:17:39 +0000 (09:17 +0200)] 
ada: Fix wrong finalization of aliased array of bounded vector

The problem is that Apply_Discriminant_Check introduces an unnecessary
temporary for an assignment where both sides have the same constrained
subtype but the left-hand side is an aliased component.

This comes from an approximation in the implementation introduced long
time ago to deal with aliased unconstrained objects in Ada 95, more
specifically to still generate a check when both sides have the same
unconstrained subtype in this case; it is replaced by an explicit test
that the common subtype is constrained.

gcc/ada/ChangeLog:

* checks.adb (Apply_Discriminant_Check): Remove undocumented test
on Is_Aliased_View applied to the left-hand side to skip the check
in the case where the subtypes are the same, and replace it with a
test that the subtypes are constrained.

7 weeks agoada: Fix crash on iterator of type with Constant_Indexing aspect
Eric Botcazou [Fri, 29 Aug 2025 07:24:33 +0000 (09:24 +0200)] 
ada: Fix crash on iterator of type with Constant_Indexing aspect

This happens when the type returned by the indexing function is a private
type whose completion is derived from another private type, because the
Finalize_Address routine cannot correctly fetch the actual root type.

gcc/ada/ChangeLog:

* exp_util.adb (Finalize_Address): In an untagged derivation, call
Root_Type on the full view of the base type if the partial view is
itself not a derived type.
(Is_Untagged_Derivation): Minor formatting tweak.

7 weeks agoaarch64: PR target/121749: Use dg-assemble in testcase
Kyrylo Tkachov [Wed, 3 Sep 2025 15:43:40 +0000 (08:43 -0700)] 
aarch64: PR target/121749: Use dg-assemble in testcase

Committing as obvious.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/testsuite/

PR target/121749
* gcc.target/aarch64/simd/pr121749.c: Use dg-assemble directive.

(cherry picked from commit 2b8256d0ce18ed4d00868c78f5128d32884ccfa1)

7 weeks agoaarch64: PR target/121749: Use correct predicate for narrowing shift amounts
Kyrylo Tkachov [Tue, 2 Sep 2025 07:43:14 +0000 (00:43 -0700)] 
aarch64: PR target/121749: Use correct predicate for narrowing shift amounts

With g:d20b2ad845876eec0ee80a3933ad49f9f6c4ee30 the narrowing shift instructions
are now represented with standard RTL and more merging optimisations occur.
This exposed a wrong predicate for the shift amount operand.
The shift amount is the number of bits of the narrow destination, not the input
sources.
Correct this by using the vn_mode attribute when specifying the predicate, which
exists for this purpose.

I've spotted a few more narrowing shift patterns that need the restriction, so
they are updated as well.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/

PR target/121749
* config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn_n<mode>):
Use aarch64_simd_shift_imm_offset_<vn_mode> instead of
aarch64_simd_shift_imm_offset_<ve_mode> predicate.
(aarch64_<shrn_op>shrn_n<mode> VQN define_expand): Likewise.
(*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
(aarch64_<shrn_op>rshrn_n<mode>): Likewise.
(aarch64_<shrn_op>rshrn_n<mode> VQN define_expand): Likewise.
(aarch64_sqshrun_n<mode>_insn): Likewise.
(aarch64_sqshrun_n<mode>): Likewise.
(aarch64_sqshrun_n<mode> VQN define_expand): Likewise.
(aarch64_sqrshrun_n<mode>_insn): Likewise.
(aarch64_sqrshrun_n<mode>): Likewise.
(aarch64_sqrshrun_n<mode>): Likewise.
* config/aarch64/iterators.md (vn_mode): Handle DI, SI, HI modes.

gcc/testsuite/

PR target/121749
* gcc.target/aarch64/simd/pr121749.c: New test.

(cherry picked from commit cb508e54140687a50790059fac548d87515df6be)

7 weeks agoAVR: Support AVR32EB14/20/28/32.
Georg-Johann Lay [Mon, 15 Sep 2025 12:20:59 +0000 (14:20 +0200)] 
AVR: Support AVR32EB14/20/28/32.

Add support for some recent AVR devices.

gcc/
* config/avr/avr-mcus.def: Add avr32eb14, avr32eb20,
avr32eb28, avr32eb32.
* doc/avr-mmcu.texi: Rebuild.

(cherry picked from commit 45f605a74fd7e96294477db064cc58033c3fba49)

7 weeks agoLoongArch: Fix wrong code from bstrpick split
Xi Ruoyao [Fri, 12 Sep 2025 07:57:08 +0000 (15:57 +0800)] 
LoongArch: Fix wrong code from bstrpick split

After late-combine is added, split1 can see an input like

    (insn 56 55 169 5
      (set (reg/v:DI 87 [ n ])
        (ior:DI (and:DI (reg/v:DI 87 [ n ])
                        (const_int 281474976710655 [0xffffffffffff]))
                (and:DI (reg:DI 131 [ _45 ])
                        (const_int -281474976710656 [0xffff000000000000]))))
      "pr121906.c":22:8 108 {*bstrins_di_for_ior_mask}
      (nil))

And the splitter ends up emitting

    (insn 184 55 185 5
      (set (reg/v:DI 87 [ n ])
           (reg:DI 131 [ _45 ]))
      "pr121906.c":22:8 -1
      (nil))
    (insn 185 184 169 5
      (set (zero_extract:DI (reg/v:DI 87 [ n ])
                            (const_int 48 [0x30])
                            (const_int 0 [0]))
           (reg/v:DI 87 [ n ]))
      "pr121906.c":22:8 -1
      (nil))

which obviously lost everything in r87, instead of retaining its lower
bits as we expect.  It's because the splitter didn't anticipate the
output register may be one of the input registers.

PR target/121906

gcc/

* config/loongarch/loongarch.md (*bstrins_<mode>_for_ior_mask):
Always create a new pseudo for the input register of the bstrins
instruction.

gcc/testsuite/

* gcc.target/loongarch/pr121906.c: New test.

(cherry picked from commit 290851e63a5b99c99eb196f2823ea3051c0f0214)

7 weeks agoc++: Fix mangling of _Float16 template args [PR121801]
Matthias Kretz [Fri, 5 Sep 2025 10:16:34 +0000 (12:16 +0200)] 
c++: Fix mangling of _Float16 template args [PR121801]

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
gcc/testsuite/ChangeLog:

PR c++/121801
* g++.dg/abi/pr121801.C: New test.

gcc/cp/ChangeLog:

PR c++/121801
* mangle.cc (write_real_cst): Handle 16-bit real and assert
that reals have 16 bits or a multiple of 32 bits.

(cherry picked from commit 19d1c7c28f4fd0557dd868a7a4041b00ceada890)

7 weeks agoDaily bump.
GCC Administrator [Mon, 15 Sep 2025 00:24:05 +0000 (00:24 +0000)] 
Daily bump.

7 weeks agoDaily bump.
GCC Administrator [Sun, 14 Sep 2025 00:25:41 +0000 (00:25 +0000)] 
Daily bump.

8 weeks agoDaily bump.
GCC Administrator [Sat, 13 Sep 2025 00:25:04 +0000 (00:25 +0000)] 
Daily bump.

8 weeks agolibstdc++: Fix memory leak in PSTL TBB backend [PR117276]
Jonathan Wakely [Fri, 12 Sep 2025 11:49:39 +0000 (12:49 +0100)] 
libstdc++: Fix memory leak in PSTL TBB backend [PR117276]

Backport of upstream patch:
https://github.com/uxlfoundation/oneDPL/pull/1589

libstdc++-v3/ChangeLog:

PR libstdc++/117276
* include/pstl/parallel_backend_tbb.h (__func_task::finalize):
Make deallocation unconditional.

(cherry picked from commit d8f1655a781a76f5c86b3545b181b2005e585d29)

8 weeks agoc++: pack indexing is a non-deduced context [PR121795]
Patrick Palka [Fri, 12 Sep 2025 18:21:25 +0000 (14:21 -0400)] 
c++: pack indexing is a non-deduced context [PR121795]

We weren't explicitly treating a pack index specifier as a non-deduced
context (as per [temp.deduct.type]/5), leading to an ICE for the first
testcase below.

PR c++/121795

gcc/cp/ChangeLog:

* pt.cc (unify) <case PACK_INDEX_TYPE>: New non-deduced context
case.

gcc/testsuite/ChangeLog:

* g++.dg/cpp26/pack-indexing17.C: New test.
* g++.dg/cpp26/pack-indexing17a.C: New test.

Reviewed-by: Marek Polacek <polacek@redhat.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 8e3230f4fed0d41e790d68c2534c057911bab35c)

8 weeks agoDaily bump.
GCC Administrator [Fri, 12 Sep 2025 00:26:03 +0000 (00:26 +0000)] 
Daily bump.

8 weeks agoc++: constant non-dep init folding vs FIELD_DECL access [PR97740]
Patrick Palka [Wed, 3 Sep 2025 14:10:00 +0000 (10:10 -0400)] 
c++: constant non-dep init folding vs FIELD_DECL access [PR97740]

Here although the local templated variables x and y have the same
reduced constant value, only x's initializer {a.get()} is well-formed
as written since A::m has private access.  We correctly reject y's
initializer {&a.m} (at instantiation time), but we also reject x's
initializer because we happen to constant fold it ahead of time, which
means at instantiation time it's already represented as a COMPONENT_REF
to a FIELD_DECL, and so when substituting this COMPONENT_REF we naively
double check that the given FIELD_DECL is accessible, which fails.

This patch sidesteps around this particular issue by not checking access
when substituting a COMPONENT_REF to a FIELD_DECL.  If the target of a
COMPONENT_REF is already a FIELD_DECL (i.e. before substitution), then I
think we can assume access has been already checked appropriately.

PR c++/97740

gcc/cp/ChangeLog:

* pt.cc (tsubst_expr) <case COMPONENT_REF>: Don't check access
when the given member is already a FIELD_DECL.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/constexpr-97740a.C: New test.
* g++.dg/cpp0x/constexpr-97740b.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 3e2077d8c7a0acba2d54bd0666ae578fe114cd72)

8 weeks agortl-ssa: Maintain clobber_group invariant [PR121757]
Richard Sandiford [Thu, 11 Sep 2025 16:32:38 +0000 (17:32 +0100)] 
rtl-ssa: Maintain clobber_group invariant [PR121757]

In order to reduce time complexity, rtl-ssa groups consecutive
clobbers together.  Each group of clobbers has a splay tree for
lookup and manipulation purposes.

This arrangement means that we might need to split a group (when
inserting a new non-clobber definition between two clobbers) or
to join consecutive groups together (when deleting an intervening
non-clobber definition).  To reduce the time complexity of these updates,
the back pointer from a clobber to its group is only updated lazily.
The invariant is supposed to be that the first clobber, last clobber,
and splay tree root have the right group at all times, whereas other
members of the group can have identifiably stale group pointers.

However, a lack of abstraction meant that only some splay tree lookups
correctly maintained this invariant.  Others did not update the group
pointer after installing a new root.

This patch adds a helper that maintains the invariant and uses it in
three places, one that was already correct and two that were wrong.
The original lookup_clobber is still used in other code that
manipulates groups as a whole.

gcc/
PR rtl-optimization/121757
* rtl-ssa/accesses.h (clobber_group::lookup_clobber): New member
function.
* rtl-ssa/accesses.cc (clobber_group::lookup_clobber): Likewise.
(clobber_group::prev_clobber, clobber_group::next_clobber)
(function_info::add_clobber): Use it.

gcc/testsuite/
PR rtl-optimization/121757
* g++.dg/pr121757.C: New test.

8 weeks agoada: Compiler crash on container aggregate association with nonstatic key choice
Gary Dismukes [Thu, 21 Aug 2025 18:48:12 +0000 (18:48 +0000)] 
ada: Compiler crash on container aggregate association with nonstatic key choice

The compiler blows up on a container aggregate with a container element
association that has a key_choice given by a nonstatic key expression.
This happens in the size computation for the aggregate due to calling
Update_Choices with the nonstatic expression.  The fix is simply to
condition the call to Update_Choices on whether the choice expression
is static.

gcc/ada/ChangeLog:

* exp_aggr.adb (Build_Container_Aggr_Code.Build_Size_Expr): In the case
of an association with a single choice, only call Update_Choices when
the choice expression is nonstatic.

8 weeks agoada: Spurious error on generalized prefix notation
Javier Miranda [Thu, 7 Aug 2025 09:42:15 +0000 (09:42 +0000)] 
ada: Spurious error on generalized prefix notation

The compiler reports a spurious error when a primitive function of
an untagged type that returns an array type is invoked using the
prefix notation, and the sources are compiled with language
extensions enabled.

gcc/ada/ChangeLog:

* sem_util.adb (Needs_One_Actual): Add support for untagged record
types when the sources are compiled with Core Extensions allowed.

8 weeks agoada: Create a pragma to emit a misplaced Storage_Size aspect error
Viljar Indus [Tue, 5 Aug 2025 09:04:18 +0000 (12:04 +0300)] 
ada: Create a pragma to emit a misplaced Storage_Size aspect error

We do not emit an error on misplaced Strorage_Size error when
the aspect is not applied to a task (or an access type). We
instead create an attribute definition which is ignored most of the
time. Create a temporary pragma for the aspect specification to
emit the same misplaced aspect error as we do for pragmas.

gcc/ada/ChangeLog:

* sem_ch13.adb (Analyze_Aspect_Definitions): Create a temporary
pragma for the non-task and access type cases.

8 weeks agoada: Typo fix in comment
Marc Poulhiès [Fri, 1 Aug 2025 14:46:10 +0000 (16:46 +0200)] 
ada: Typo fix in comment

gcc/ada/ChangeLog:

* s-pack.adb.tmpl: Typo fix in comment.

8 weeks agoada: Reject pragma Attach_Handler on procedures in protected bodies
Piotr Trojanek [Thu, 31 Jul 2025 15:07:48 +0000 (17:07 +0200)] 
ada: Reject pragma Attach_Handler on procedures in protected bodies

Pragma Attach_Handler and Interrupt_Handler are only legal for procedures
declared in protected definition. When given for procedures declared in
protected body, they were wrongly accepted and triggered an odd error message
from expansion.

gcc/ada/ChangeLog:

* sem_prag.adb (Check_Interrupt_Or_Attach_Handler): Refine test for
protected procedures; fix typo in comment.

8 weeks agoada: Fix crash with global No_Tasking and async delays
Denis Mazzucato [Tue, 8 Jul 2025 11:00:08 +0000 (13:00 +0200)] 
ada: Fix crash with global No_Tasking and async delays

When optimizations are enabled, the runtime for delays is inlined and expanded.
If No_Tasking is set globally, for instance via a configuration file, then the
initialization of _Master, _Chain, and _Task_Name formals is skipped for task
entities. Later during expansion, these identifiers are expected but won't be
found, crashing the compiler. This patch fixes Init_Formals by removing the
check on Global_No_Tasking. If a No_Tasking restriction applies, then a
violation error will be raised when analyzing the task type.

gcc/ada/ChangeLog:

* exp_ch3.adb (Init_Formals): Remove the check on Global_No_Tasking.
* sem.adb: Fix typo.

8 weeks agoada: Compiler crash on container aggregate with constant element choice
Gary Dismukes [Fri, 25 Jul 2025 20:56:32 +0000 (20:56 +0000)] 
ada: Compiler crash on container aggregate with constant element choice

The compiler fails when compiling a container aggregate with
an element association with a key choice that denotes a constant
object.  The code for getting the value of the choice was only
accounting for the possibility of integer and enumeration literals,
and is corrected to handle static expressions generally.

gcc/ada/ChangeLog:

* exp_aggr.adb (Build_Container_Aggr_Code.To_Int): Replace existing
conditional expression with call to Expr_Value.

8 weeks agoada: Avoid generating incorrect warning
Steve Baird [Mon, 21 Jul 2025 23:23:20 +0000 (16:23 -0700)] 
ada: Avoid generating incorrect warning

Do not generate a warning stating that the size of a formal parameter
is 8 bits unless the size of the formal parameter is 8 bits.

gcc/ada/ChangeLog:

* freeze.adb (Freeze_Profile): Do not emit a warning stating that
a formal parameter's size is 8 if the parameter's size is not 8.

8 weeks agoada: Minor typo fix in comment
Marc Poulhiès [Thu, 17 Jul 2025 13:00:25 +0000 (15:00 +0200)] 
ada: Minor typo fix in comment

gcc/ada/ChangeLog:

* gcc-interface/trans.cc (gnat_to_gnu): Fix typo in comment.

8 weeks agoDaily bump.
GCC Administrator [Thu, 11 Sep 2025 00:29:51 +0000 (00:29 +0000)] 
Daily bump.

8 weeks agolibstdc++: Remove blank line from bits/unique_ptr.h
Jonathan Wakely [Mon, 8 Sep 2025 11:55:03 +0000 (12:55 +0100)] 
libstdc++: Remove blank line from bits/unique_ptr.h

libstdc++-v3/ChangeLog:

* include/bits/unique_ptr.h: Remove blank line.

(cherry picked from commit 15327920854653887e8715bb1592121cafec5c3b)

8 weeks agoAVR: Disable tree-switch-conversion per default.
Georg-Johann Lay [Sat, 6 Sep 2025 11:38:48 +0000 (13:38 +0200)] 
AVR: Disable tree-switch-conversion per default.

There are at least two cases where tree-switch-conversion leads
to unpleasant resource allocation:

PR49857
    The lookup table lives in RAM.  This is the case for all
    devices that locate .rodata in RAM, which is for almost
    all AVR devices.

PR81540
    Code is bloated for 64-bit inputs.

As far as PR49857 is concerned, a target hook that may add an
address-space qualifier to the lookup table is the obvious
solution, though a respective patch has always been rejected by
global maintainers for non-technical reasons.

gcc/
PR target/81540
PR target/49857
* common/config/avr/avr-common.cc: Disable -ftree-switch-conversion.

(cherry picked from commit 912159d2b5429c3126756b56723dd4f32dd56bdd)

8 weeks agoDaily bump.
GCC Administrator [Wed, 10 Sep 2025 00:29:54 +0000 (00:29 +0000)] 
Daily bump.

8 weeks agoFortran: fix TRANSFER with rank 1 unlimited polymorphic SOURCE [PR121263]
Harald Anlauf [Wed, 3 Sep 2025 18:41:20 +0000 (20:41 +0200)] 
Fortran: fix TRANSFER with rank 1 unlimited polymorphic SOURCE [PR121263]

PR fortran/121263

gcc/fortran/ChangeLog:

* trans-intrinsic.cc (gfc_conv_intrinsic_transfer): For an
unlimited polymorphic SOURCE to TRANSFER use saved descriptor
if possible.

gcc/testsuite/ChangeLog:

* gfortran.dg/transfer_class_5.f90: New test.

(cherry picked from commit 692281a38773a70ae795b3b594f0c0f8fd83e5ef)

8 weeks agolibstdc++: Document remaining C++17 implementation-defined behavior.
Tomasz Kamiński [Fri, 5 Sep 2025 14:08:12 +0000 (16:08 +0200)] 
libstdc++: Document remaining C++17 implementation-defined behavior.

This also covers bad_function_call::what from C++11.

libstdc++-v3/ChangeLog:

* doc/html/manual/status.html: Regenerate.
* doc/xml/manual/status_cxx2011.xml: Add entry for bad_function_call.
* doc/xml/manual/status_cxx2017.xml: Add entries for bad_any_cast
and nullptr_t output. Update entry for sf.cmath. Fix stable name for
mem.res.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit 39d7c4d42a764a86644198a517f58a94f467cdbd)

8 weeks agolibstdc++: Document missing implementation defined behavior for std::filesystem.
Tomasz Kamiński [Fri, 5 Sep 2025 11:16:40 +0000 (13:16 +0200)] 
libstdc++: Document missing implementation defined behavior for std::filesystem.

libstdc++-v3/ChangeLog:

* doc/html/manual/status.html: Regenerate the file.
* doc/xml/manual/status_cxx2017.xml: Addd more entires.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit d6c370b8e96d43448537276d91c2b33fedb9754a)

8 weeks agoDaily bump.
GCC Administrator [Tue, 9 Sep 2025 00:32:16 +0000 (00:32 +0000)] 
Daily bump.

8 weeks agolibstdc++: Fix docs for --enable-vtable-verify [PR120698]
Jonathan Wakely [Wed, 18 Jun 2025 14:46:24 +0000 (15:46 +0100)] 
libstdc++: Fix docs for --enable-vtable-verify [PR120698]

libstdc++-v3/ChangeLog:

PR libstdc++/120698
* doc/xml/manual/configure.xml: Do not claim that vtv is enabled
by default.
* doc/html/manual/configure.html: Regenerate.

(cherry picked from commit d199a9c7c5034d0eddb3380a58342a5bcbe6febd)

8 weeks agoRISC-V: Check if we can vec_extract [PR121510].
Robin Dapp [Fri, 5 Sep 2025 07:35:46 +0000 (09:35 +0200)] 
RISC-V: Check if we can vec_extract [PR121510].

For Zvfhmin a vector mode exists but the corresponding vec_extract does
not.  This patch checks that a vec_extract is available and otherwise
falls back to standard handling.

PR target/121510

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_legitimize_move): Check if we can
vec_extract.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr121510.c: New test.

(cherry picked from commit a6bf07653cd272add46a2218ec141c95d7f02427)

2 months agoDaily bump.
GCC Administrator [Mon, 8 Sep 2025 00:27:38 +0000 (00:27 +0000)] 
Daily bump.

2 months agolibphobos: enable for more hppa tuples
Sam James [Mon, 24 Mar 2025 04:34:06 +0000 (04:34 +0000)] 
libphobos: enable for more hppa tuples

Gentoo uses hppa1.1*-*-linux* and hppa2.0*-*-linux* instead of Debian's
hppa-*-linux*.

libphobos/ChangeLog:

* configure.tgt: Add hppa[12]*-*-linux* as a supported target.

(cherry picked from commit 35cf8d85841a6301eeb12668085e326ddd115f6e)

2 months agolibphobos: enable for sparc64-unknown-linux-gnu
Sam James [Sun, 20 Apr 2025 00:43:39 +0000 (01:43 +0100)] 
libphobos: enable for sparc64-unknown-linux-gnu

This bootstraps with some test failures but works well enough to build
11..15.

libphobos/ChangeLog:

* configure.tgt: Add sparc64-unknown-linux-gnu as a supported target.

(cherry picked from commit 2572d46f0d1e426c1091f9b84861ee5213b84b5a)

2 months agoAVR: ad target/121794 - Invoke zero_reg less.
Georg-Johann Lay [Sun, 7 Sep 2025 10:19:26 +0000 (12:19 +0200)] 
AVR: ad target/121794 - Invoke zero_reg less.

gcc/
PR target/121794
* config/avr/avr.md (cmpqi3): Use cpi R,0 if possible.

(cherry picked from commit 93af5f69d15934edda4ff6a6eb63bde9ae7b8e45)

2 months agolibphobos: enable for powerpc64le-linux-gnu
Matthias Klose [Sun, 7 Sep 2025 08:49:14 +0000 (10:49 +0200)] 
libphobos: enable for powerpc64le-linux-gnu

libphobos/ChangeLog:

* configure.tgt: Add powerpc64le--linux-gnu as a supported target
when configured with --with-long-double-format=ieee.

2 months agoDaily bump.
GCC Administrator [Sun, 7 Sep 2025 00:26:09 +0000 (00:26 +0000)] 
Daily bump.

2 months agoDaily bump.
GCC Administrator [Sat, 6 Sep 2025 00:27:33 +0000 (00:27 +0000)] 
Daily bump.

2 months agoAVR: target/121794 - Invoke zero_reg less.
Georg-Johann Lay [Thu, 4 Sep 2025 20:03:31 +0000 (22:03 +0200)] 
AVR: target/121794 - Invoke zero_reg less.

There are some cases where involing zero_reg is not needed and
where there are other sequences with the same efficiency.
An example is to use SBCI R,0 instead of SBC R,__zero_reg__
when R >= R16.  This may turn out to be better for small ISRs.

PR target/121794
gcc/
* config/avr/avr.cc (avr_out_compare): Only use zero_reg
when there is no other sequence of the same length.
(avr_out_plus_ext): Same.
(avr_out_plus_1): Same.

(cherry picked from commit e3d14112b266479da9f8fd9c304e0ae15bf0ad25)

2 months agoDaily bump.
GCC Administrator [Fri, 5 Sep 2025 00:24:37 +0000 (00:24 +0000)] 
Daily bump.

2 months agoc++/modules: Mark implicit inline namespaces as purview [PR121724]
Nathaniel Shead [Mon, 1 Sep 2025 11:28:03 +0000 (21:28 +1000)] 
c++/modules: Mark implicit inline namespaces as purview [PR121724]

When we push an existing namespace within the module purview for the
first time, we also need to mark any parent inline namespaces as purview
to not confuse the streaming logic.

PR c++/121724

gcc/cp/ChangeLog:

* name-lookup.cc (push_namespace): Mark inline namespace
contexts as purview if needed.

gcc/testsuite/ChangeLog:

* g++.dg/modules/namespace-12_a.C: New test.
* g++.dg/modules/namespace-12_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
(cherry picked from commit 03505e5b93e635907ed5ef7edac11da4026655e2)

2 months agolibstdc++: Implement LWG4222 'expected' constructor from a single value missing a...
Yihan Wang [Sat, 16 Aug 2025 08:43:05 +0000 (16:43 +0800)] 
libstdc++: Implement LWG4222 'expected' constructor from a single value missing a constraint

libstdc++-v3/ChangeLog:

* include/std/expected (expected(U&&)): Add missing constraint
as per LWG 4222.
* testsuite/20_util/expected/lwg4222.cc: New test.

Signed-off-by: Yihan Wang <yronglin777@gmail.com>
(cherry picked from commit 589f3cd1831446485a6c602578177f5d9794d936)

2 months agolibstdc++: Make CTAD ignore pair(const T1&, const T2&) constructor [PR110853]
Jonathan Wakely [Tue, 2 Sep 2025 21:30:46 +0000 (22:30 +0100)] 
libstdc++: Make CTAD ignore pair(const T1&, const T2&) constructor [PR110853]

For the pair(T1, T2) explicit deduction type to decay its arguments as
intended, we need the pair(const T1&, const T2&) constructor to not be
used for CTAD. Otherwise we try to instantiate pair<T1, T2> without
decaying, which is ill-formed for function lvalues.

Use std::type_identity_t<T1> to make the constructor unusable for an
implicit deduction guide.

libstdc++-v3/ChangeLog:

PR libstdc++/110853
* include/bits/stl_pair.h [C++20] (pair(const T1&, const T2&)):
Use std::type_identity_t<T1> for first parameter.
* testsuite/20_util/pair/cons/110853.cc: New test.

Reviewed-by: Patrick Palka <ppalka@redhat.com>
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit 0bb0d1d2880d562298eeec8eee4ab4e8ba943260)

2 months agolibstdc++: Fix std::get<T> for std::pair with reference members [PR121745]
Jonathan Wakely [Mon, 1 Sep 2025 17:12:27 +0000 (18:12 +0100)] 
libstdc++: Fix std::get<T> for std::pair with reference members [PR121745]

Make the std::get<T> overloads for rvalues use std::forward<T>(p.first)
not std::move(p.first), so that lvalue reference members are not
incorrectly converted to rvalues.

It might appear that std::move(p).first would also work, but the
language rules say that for std::pair<T&&, U> that would produce T&
rather than the expected T&& (see the discussion in P2445R1 §8.2).

Additional tests are added to verify all combinations of reference
members, value categories, and const-qualification.

libstdc++-v3/ChangeLog:

PR libstdc++/121745
* include/bits/stl_pair.h (get): Use forward instead of move in
std::get<T> overloads for rvalue pairs.
* testsuite/20_util/pair/astuple/get_by_type.cc: Check all value
categories and cv-qualification.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit c8a24f60b6874fca4fb3adb153f8d5f1dd72b951)

2 months agoDaily bump.
GCC Administrator [Thu, 4 Sep 2025 00:25:56 +0000 (00:25 +0000)] 
Daily bump.

2 months agoDaily bump.
GCC Administrator [Wed, 3 Sep 2025 00:26:54 +0000 (00:26 +0000)] 
Daily bump.

2 months ago[RISC-V][PR target/121548] Avoid bogus index into recog operand cache
Jeff Law [Fri, 29 Aug 2025 17:43:30 +0000 (11:43 -0600)] 
[RISC-V][PR target/121548] Avoid bogus index into recog operand cache

So the RISC-V port has attributes which indicate the index within the
recog_data where certain operands will be found.

For this BZ the default value for the merge_op_idx attribute on the given insn
is "2".  But the insn only has operands 0 & 1.  So we do an out of bounds array
access and boom the ICE/valgrind failure.

As we discussed in the patchwork meeting, this is all a bit clunky and has been
fairly error prone.  This doesn't add any massive checking, but does introduce
some asserts to help catch problems a bit earlier and clearer.

In particular in cases where we're already asserting that the returned index is
valid (!= INVALID_ATTRIBUTE) we also assert that the index is less than the
total number of operands.

In the get_vlmax_ta_preferred_avl routine it appears like we need to handle
these two cases more gracefully as we apparently legitimately query for the
merge_op_idx on a fairly arbitrary insn.  We just have to make sure to not
*use* the result if it's INVALID_ATTRIBUTE.  So for that code we assert that
merge_op_idx is either INVALID_ATTRIBUTE or smaller than the number of
operands.

This patch also adds overrides for 3 patterns to return INVALID_ATTRIBUTE for
merge_op_idx, similar to how they already do for mode_idx and avl_type_idx.

This has been bootstrapped and regression tested on the bpi & pioneer systems
and regression tested for riscv32-elf and riscv64-elf.  Waiting on CI before
pushing.

PR target/121548
gcc/
* config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): Assert
MODE_IDX is smaller than the number of operands.
(simplify_replace_vlmax_avl): Similarly.
(pass_avlprop::get_vlmax_ta_preferred_avl): Similarly.
* config/riscv/vector.md: Override merge_op_idx computation
for simple moves, just like is done for avl_type_idx and mode_idx.

(cherry picked from commit 25bbc0f20a25a1db59baaf36d119ce274968747f)

2 months agoDaily bump.
GCC Administrator [Tue, 2 Sep 2025 00:26:23 +0000 (00:26 +0000)] 
Daily bump.

2 months agoFix assertion when trying to represent Ada arrays in CodeView
Mark Harmstone [Fri, 29 Aug 2025 19:43:57 +0000 (20:43 +0100)] 
Fix assertion when trying to represent Ada arrays in CodeView

The LF_ARRAY CodeView type represents a C- or C++-style array, which a
length known at compile time. We were crashing when using -gcodeview
with Ada (bug #121157), as the DW_AT_upper_bound value is not an
unsigned integer but something more complicated:

0x00000123:   DW_TAG_array_type
                DW_AT_type      (0x0000014d "character")
                DW_AT_sibling   (0x00000142)

0x0000012c:     DW_TAG_subrange_type
                  DW_AT_type    (0x00000142 "integer")
                  DW_AT_lower_bound     (DW_OP_push_object_address, DW_OP_plus_uconst 0x8, DW_OP_deref, DW_OP_deref_size 0x4)
                  DW_AT_upper_bound     (DW_OP_push_object_address, DW_OP_plus_uconst 0x8, DW_OP_deref, DW_OP_plus_uconst 0x4, DW_OP_deref_size 0x4)

It doesn't look like we can represent Ada arrays in CodeView, so return
0 in get_type_num_array_type so that they come through as an unknown
type.

gcc/
* dwarf2codeview.cc (get_type_num_array_type): Don't try to
encode non-C-style arrays.

2 months agoDaily bump.
GCC Administrator [Mon, 1 Sep 2025 00:25:55 +0000 (00:25 +0000)] 
Daily bump.

2 months agofixincludes: Skip pthread_incomplete_struct_argument for modern glibc [PR118009]
Jonathan Wakely [Tue, 19 Aug 2025 16:08:07 +0000 (17:08 +0100)] 
fixincludes: Skip pthread_incomplete_struct_argument for modern glibc [PR118009]

The pthread_incomplete_struct_argument fix was intended for ancient
versions of Glibc (only 2.3.3 and 2.3.4, I believe). From Glibc 2.3.5
the pthread.h header already included the change to use a pointer
instead of an array, so the fixinclude was no longer used.

However, the https://sourceware.org/bugzilla/show_bug.cgi?id=26647 fix
changed the __setjmpbuf declaration to use struct __jmp_buf_tag __env[1]
again, which caused this fixinclude to start matching again. This means
that GCC now installs a "fixed" pthread.h with a change to a declaration
that guarded by #if ! __GNUC_PREREQ (11, 0), i.e. it's not even relevant
for modern versions of GCC. The "fixed" pthread.h causes problems for
users because of changes to internal implementation details of the
pthread_cond_t type, which require the "fixed" pthread.h to be updated
with mkheaders if Glibc is updated.

This change adds a bypass to the fixinclude, so that it no longer
matches modern Glibc versions, and only applies to glibc versions 2.3.3
and 2.3.4 as originally intended.

Also remove outdated reference to svn in the comment at the top of the
generated file.

fixincludes/ChangeLog:

PR bootstrap/118009
PR bootstrap/119089
* inclhack.def (pthread_incomplete_struct_argument): Add bypass.
* fixincl.tpl: Remove reference to svn in comment.
* fixincl.x: Regenerate.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 59db4ce2df1db33ad361eca06a7aec99b24d0d2f)

2 months agolibstdc++: Fix std::numeric_limits<__float128>::max_digits10 [PR121374]
Jonathan Wakely [Tue, 19 Aug 2025 16:29:12 +0000 (17:29 +0100)] 
libstdc++: Fix std::numeric_limits<__float128>::max_digits10 [PR121374]

When I added this explicit specialization in r14-1433-gf150a084e25eaa I
used the wrong value for the number of mantissa digits (I used 112
instead of 113). Then when I refactored it in r14-1582-g6261d10521f9fd I
used the value calculated from the incorrect value (35 instead of 36).

libstdc++-v3/ChangeLog:

PR libstdc++/121374
* include/std/limits (numeric_limits<__float128>::max_digits10):
Fix value.
* testsuite/18_support/numeric_limits/128bit.cc: Check value.

(cherry picked from commit cf88ed5bf20c86ca38da19358ff79a34adb4d0b5)

2 months agolibstdc++: Check _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK with #if [PR121496]
Jonathan Wakely [Tue, 19 Aug 2025 17:02:53 +0000 (18:02 +0100)] 
libstdc++: Check _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK with #if [PR121496]

The change in r14-905-g3b7cb33033fbe6 to disable the use of
pthread_mutex_clocklock when TSan is active assumed that the
_GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK macro was always checked with #if
rather than #ifdef, which was not true.

This makes the checks use #if consistently.

libstdc++-v3/ChangeLog:

PR libstdc++/121496
* include/std/mutex (__timed_mutex_impl::_M_try_wait_until):
Change preprocessor condition to use #if instead of #ifdef.
(recursive_timed_mutex::_M_clocklock): Likewise.
* testsuite/30_threads/timed_mutex/121496.cc: New test.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit d1dec304453fa4874d16daaa15e6f477435edda4)

2 months agolibstdc++: Use __promote_3 for std::hypot [PR121097]
Jonathan Wakely [Tue, 15 Jul 2025 20:29:33 +0000 (21:29 +0100)] 
libstdc++: Use __promote_3 for std::hypot [PR121097]

The __promoted_t alias is only defined when __cpp_fold_expressions is
defined, which might not be the case for some hypothetical C++17
compilers.

Change the 3-arg std::hypot to just use __gnu_cxx::__promote_3 which is
always available.

libstdc++-v3/ChangeLog:

PR libstdc++/121097
* include/c_global/cmath (hypot): Use __promote_3 instead of
__promoted.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit f4932c59df387a505de69a5a1015a03caa4ccf08)

2 months agomiddle-end: Fix typo in gimple.h
Benjamin Wu [Sun, 13 Jul 2025 16:25:02 +0000 (17:25 +0100)] 
middle-end: Fix typo in gimple.h

gcc/ChangeLog:

* gimple.h (GTMA_DOES_GO_IRREVOCABLE): Fix typo.

(cherry picked from commit 356250630abd876ae592bc3d2b4cc171bc834b79)

2 months agolibstdc++: Improve diagnostics for ill-formed std::_Destroy and std::_Destroy_n ...
Jonathan Wakely [Wed, 21 May 2025 22:48:34 +0000 (23:48 +0100)] 
libstdc++: Improve diagnostics for ill-formed std::_Destroy and std::_Destroy_n [PR120390]

By using std::is_trivially_destructible instead of the old
__has_trivial_destructor built-in we no longer need the static_assert to
deal with types with deleted destructors. All non-destructible types,
including those with deleted destructors, will now give user-friendly
diagnostics that clearly explain the problem.

Also combine the _Destroy_aux and _Destroy_n_aux class templates used
for C++98 into one, so that we perform fewer expensive class template
instantiations.

libstdc++-v3/ChangeLog:

PR libstdc++/120390
* include/bits/stl_construct.h (_Destroy_aux::__destroy_n): New
static member function.
(_Destroy_aux<true>::__destroy_n): Likewise.
(_Destroy_n_aux): Remove.
(_Destroy(ForwardIterator, ForwardIterator)): Remove
static_assert. Use is_trivially_destructible instead of
__has_trivial_destructor.
(_Destroy_n): Likewise. Use _Destroy_aux::__destroy_n instead of
_Destroy_n_aux::__destroy_n.
* testsuite/20_util/specialized_algorithms/memory_management_tools/destroy_neg.cc:
Adjust dg-error strings. Move destroy_n tests to ...
* testsuite/20_util/specialized_algorithms/memory_management_tools/destroy_n_neg.cc:
New test.
* testsuite/23_containers/vector/cons/destructible_debug_neg.cc:
Adjust dg-error strings.
* testsuite/23_containers/vector/cons/destructible_neg.cc:
Likewise.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit 01789efaea25a48ac45dae8facb6db8abd8ebb14)

2 months agoDaily bump.
GCC Administrator [Sun, 31 Aug 2025 00:27:54 +0000 (00:27 +0000)] 
Daily bump.

2 months agoRevert "Fix _Decimal128 arithmetic error under FE_UPWARD."
liuhongt [Sat, 30 Aug 2025 02:23:13 +0000 (19:23 -0700)] 
Revert "Fix _Decimal128 arithmetic error under FE_UPWARD."

This reverts commit 287f00d1177ebec6729667f7e0608b461d4466a4.

2 months agoDaily bump.
GCC Administrator [Sat, 30 Aug 2025 00:27:02 +0000 (00:27 +0000)] 
Daily bump.

2 months agoFix _Decimal128 arithmetic error under FE_UPWARD.
liuhongt [Thu, 28 Aug 2025 01:20:09 +0000 (18:20 -0700)] 
Fix _Decimal128 arithmetic error under FE_UPWARD.

libgcc/config/libbid/ChangeLog:

PR target/120691
* bid128_div.c: Fix _Decimal128 arithmetic error under
FE_UPWARD.
* bid128_rem.c: Ditto.
* bid128_sqrt.c: Ditto.
* bid64_div.c (bid64_div): Ditto.
* bid64_sqrt.c (bid64_sqrt): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr120691.c: New test.

(cherry picked from commit 50064b2898edfb83bc37f2597a35cbd3c1c853e3)

2 months agoDaily bump.
GCC Administrator [Fri, 29 Aug 2025 00:27:21 +0000 (00:27 +0000)] 
Daily bump.

2 months agoDaily bump.
GCC Administrator [Thu, 28 Aug 2025 00:28:06 +0000 (00:28 +0000)] 
Daily bump.

2 months agoc++/modules: Provide definitions of synthesized methods outside their defining module...
Nathaniel Shead [Fri, 22 Aug 2025 05:15:01 +0000 (15:15 +1000)] 
c++/modules: Provide definitions of synthesized methods outside their defining module [PR120499]

In the PR, we're getting a linker error from _Vector_impl's destructor
never getting emitted.  This is because of a combination of factors:

1. in imp-member-4_a, the destructor is not used and so there is no
   definition generated.

2. in imp-member-4_b, the destructor gets synthesized (as part of the
   synthesis for Coll's destructor) but is not ODR-used and so does not
   get emitted.  Despite there being a definition provided in this TU,
   the destructor is still considered imported and so isn't streamed
   into the module body.

3. in imp-member-4_c, we need to ODR-use the destructor but we only got
   a forward declaration from imp-member-4_b, so we cannot emit a body.

The point of failure here is step 2; this function has effectively been
declared in the imp-member-4_b module, and so we shouldn't treat it as
imported.  This way we'll properly stream the body so that importers can
emit it.

PR c++/120499

gcc/cp/ChangeLog:

* method.cc (synthesize_method): Set the instantiating module.

gcc/testsuite/ChangeLog:

* g++.dg/modules/imp-member-4_a.C: New test.
* g++.dg/modules/imp-member-4_b.C: New test.
* g++.dg/modules/imp-member-4_c.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
(cherry picked from commit 5b85364a6dd0bbfd3e26d3346b075a0819be7cd4)

2 months agoDaily bump.
GCC Administrator [Wed, 27 Aug 2025 00:27:05 +0000 (00:27 +0000)] 
Daily bump.

2 months agotestsuite: arm: Disable sched2 and sched3 in unsigned-extend-2.c
Torbjörn SVENSSON [Tue, 8 Jul 2025 13:33:16 +0000 (15:33 +0200)] 
testsuite: arm: Disable sched2 and sched3 in unsigned-extend-2.c

Disable sched2 and sched3 to only have one order of instructions to
consider.

gcc/testsuite/ChangeLog:

* gcc.target/arm/unsigned-extend-2.c: Disable sched2 and sched3
and update function body to match.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 4b4ee2fa4a555c63869475bb340bb58d5d29ae74)

2 months agotestsuite: arm: Fix unsigned-extend-2.c [PR116445]
Christophe Lyon [Tue, 8 Apr 2025 16:24:18 +0000 (16:24 +0000)] 
testsuite: arm: Fix unsigned-extend-2.c [PR116445]

The test was designed to pass with thumb2, but code generation changed
with the introduction of Low Overhead Loops, so the test can fail if
one overrides the flags when running the testsuite.

In addition, useless subtract / extension instructions require -O2 to
remove them (-O is not sufficient), so replace -O with -O2 in
dg-options.

arm_thumb2_ok_no_arm_v8_1m_lob does not do what the test needs (it can
fail because some flags conflict, rather than because lob are
supported, and we do not need to check runtime support in this test
anyway), so the patch reverts back to arm_thumb2_ok.

Finally, replace the scan-assembler directives with
check-function-bodies, checking both types of code generation (with
and without LOL).  Depending on architecture version, the two insns
    and     r0, r1, r0, lsr #1
    ands    r3, r3, #255
can be swapped, so accept both orders.

gcc/testsuite/ChangeLog:

PR target/116445
* gcc.target/arm/unsigned-extend-2.c: Fix dg directives.

(cherry picked from commit 20c25919132b497c3a46a4bc4044f65b6459b99e)

2 months agoc++: constrained corresponding using from partial spec [PR121351]
Patrick Palka [Tue, 19 Aug 2025 15:07:14 +0000 (11:07 -0400)] 
c++: constrained corresponding using from partial spec [PR121351]

When comparing constraints during correspondence checking for a using
from a partial specialization, we need to substitute the partial
specialization arguments into the constraints rather than the primary
template arguments.  Otherwise we incorrectly reject e.g. the below
testcase as ambiguous since we substitute T=int* instead of T=int
into #1's constraints and don't notice the correspondence.

This patch corrects the recent r16-2771-gb9f1cc4e119da9 fix by using
outer_template_args instead of TI_ARGS of the DECL_CONTEXT, which
should always give the correct outer arguments for substitution.

PR c++/121351

gcc/cp/ChangeLog:

* class.cc (add_method): Use outer_template_args when
substituting outer template arguments into constraints.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-using7.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 0ab1e31807a19d699c462937ca639718360eac0c)

2 months agoDaily bump.
GCC Administrator [Tue, 26 Aug 2025 00:27:07 +0000 (00:27 +0000)] 
Daily bump.

2 months agoLoongArch: Fix ICE in highway-1.3.0 testsuite [PR121634]
Xi Ruoyao [Fri, 22 Aug 2025 13:00:53 +0000 (21:00 +0800)] 
LoongArch: Fix ICE in highway-1.3.0 testsuite [PR121634]

I can't believe I made such a stupid pasto and the regression test
didn't detect anything wrong.

PR target/121634

gcc/

* config/loongarch/simd.md (simd_maddw_evod_<mode>_<su>): Use
WVEC_HALF instead of WVEC for the mode of the sign_extend for
the rhs of multiplication.

gcc/testsuite/

* gcc.target/loongarch/pr121634.c: New test.

(cherry picked from commit 64932714a0786c6ba164cff3468f633cc67b23f5)

2 months agoDaily bump.
GCC Administrator [Mon, 25 Aug 2025 00:26:32 +0000 (00:26 +0000)] 
Daily bump.

2 months agoUpdate gcc de.po
Joseph Myers [Sun, 24 Aug 2025 16:48:07 +0000 (16:48 +0000)] 
Update gcc de.po

* de.po: Update.

2 months agoDaily bump.
GCC Administrator [Sun, 24 Aug 2025 00:26:59 +0000 (00:26 +0000)] 
Daily bump.

2 months agoDaily bump.
GCC Administrator [Sat, 23 Aug 2025 00:26:24 +0000 (00:26 +0000)] 
Daily bump.

2 months agoRTEMS: Add riscv multilibs
Sebastian Huber [Mon, 30 Jun 2025 07:40:10 +0000 (09:40 +0200)] 
RTEMS: Add riscv multilibs

gcc/ChangeLog:

* config/riscv/t-rtems: Add -mstrict-align multilibs for
targets without support for misaligned access in hardware.

(cherry picked from commit 73a2a9d6c2eab34b2a1f83a1c4286c87a9586b84)

2 months agoDaily bump.
GCC Administrator [Fri, 22 Aug 2025 00:26:48 +0000 (00:26 +0000)] 
Daily bump.

2 months agoDaily bump.
GCC Administrator [Thu, 21 Aug 2025 00:27:22 +0000 (00:27 +0000)] 
Daily bump.

2 months agoAVR: target/121608 - Don't add --relax when linking with -r.
Georg-Johann Lay [Wed, 20 Aug 2025 08:53:37 +0000 (10:53 +0200)] 
AVR: target/121608 - Don't add --relax when linking with -r.

The linker rejects --relax in relocatable links (-r), hence only
add --relax when -r is not specified.

gcc/
PR target/121608
* config/avr/specs.h (LINK_RELAX_SPEC): Wrap in %{!r...}.

(cherry picked from commit 0f15ff7b511493e9197e6153b794081c1557ba02)

2 months agoRISC-V: fix __builtin_round clobbering FP exceptions flags [PR121534]
Vineet Gupta [Thu, 14 Aug 2025 03:20:34 +0000 (20:20 -0700)] 
RISC-V: fix __builtin_round clobbering FP exceptions flags [PR121534]

__builtin_round() fails to save/restore FP exception flags around the FP
compare insn which can potentially clobber the same.

Worth noting that the fflags restore bracketing is slightly different
than the glibc implementation. Both FLT and FCVT can potentially clobber
fflags. gcc generates below where even if branch is not taken and FCVT
is not executed, FLT still executed. Thus FSFLAGS is placed AFTER the
label 'L3'. glibc implementation FLT can't clobber due to early NaN check,
so FSFLAGS can be moved under the branch, before the label.

| convert_float_to_float_round
| ...
|   frflags a5
|   fabs.s fa5,fa0
|   flt.s a4,fa5,fa4    <--- can clobber fflags
|   beq a4,zero,.L3
|     fcvt.w.s a4,fa0,rmm     <--- also
|     fcvt.s.w fa5,a4
|     fsgnj.s fa0,fa5,fa0
| .L3:
|    fsflags a5            <-- both code paths

Fixes: f652a35877e3 ("This is almost exclusively Jivan's work....")
PR target/121534

gcc/ChangeLog:

* config/riscv/riscv.md (round_pattern): save/restore fflags.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c: Adjust
scan pattern for additional instances of frflags/fsrflags.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
2 months agoDaily bump.
GCC Administrator [Wed, 20 Aug 2025 00:26:35 +0000 (00:26 +0000)] 
Daily bump.

2 months agolibstdc++: Fix-self element self-assigments when inserting an empty range [PR121313]
Tomasz Kamiński [Thu, 14 Aug 2025 13:20:36 +0000 (15:20 +0200)] 
libstdc++: Fix-self element self-assigments when inserting an empty range [PR121313]

For __n == 0, the elements were self move-assigned by
std::move_backward(__ins, __old_finish - __n, __old_finish).

PR libstdc++/121313

libstdc++-v3/ChangeLog:

* include/bits/vector.tcc (vector::insert_range): Add check for
empty size.
* testsuite/23_containers/vector/modifiers/insert/insert_range.cc:
New tests.

(cherry picked from commit cc54f2f47e63c9d404a44f618cf114ae63e81b40)