Jan Hoffmann [Tue, 23 Dec 2025 19:40:52 +0000 (20:40 +0100)]
realtek: enable MDI swapping for RTL8226 where needed
The RTL8226 PHYs in Zyxel XGS1010-10 and XGS1210-10 rev A1 have swapped
MDI lanes. Specify this in the device tree, so the driver can configure
it. With this change, the PHYs no longer require initialization by the
bootloader.
Jan Hoffmann [Tue, 23 Dec 2025 19:38:31 +0000 (20:38 +0100)]
realtek: support MDI swapping for RTL8226 PHY
The PHY supports swapping the MDI pairs (ABCD->DCBA) to simplify board
layout. On devices making use of this, it needs to be configured in the
driver, otherwise the PHY won't work properly.
Doug Freed (1):
wg-quick@.service: add deps on wg-quick.target
Jason A. Donenfeld (8):
wg-quick: linux: use smallest mtu, not largest
syncconf: account for psks removed from config file
wg-quick: linux: deal with resolvconf migration more gracefully
wg-quick: use addconf instead of setconf
wg-quick: linux: do not unnecessarily set sysctl
config: preserve const correctness
syncconf: account for persistent keepalive removed from config file
version: bump
Robyn Kosching (1):
wg-quick: pass on # comments to {Pre,Post}{Up,Down}
The dsa irq handler works always in the same way for all SoCs.
- Read register ISR_PORT_LINK_STS_CHG to determine the ports that
triggered the irq.
- Write the read value back to the register to confirm the irq
- Read link status via MAC_LINK_STS
- Trigger dsa_port_phylink_mac_change() for each changed port
Currently each SoC has its own implementation. Drop that in
favour of a generic implementation that makes use of the existing
bit register read/write helpers.
Jan Kantert [Sat, 28 Feb 2026 23:09:19 +0000 (00:09 +0100)]
realtek: use 50kHz I2C for SFPs on Xikestor SKS8300-8X
Some 10G optics showed random "module transmit fault indicated" due to I2C
read errors on ONTi ONT-S508CL-8S/XikeStor SKS8300-8X switches. The same
modules work with the original firmware and on other Linux based devices.
There seems to be some differences in how we talk to those modules using
I2C in OpenWRT. To fix this this patch adds support for 50kHz I2C speed on
SFPs and enables that for XikeStor/Onti devices. Since SFPs only transmit
very few bytes this should not have any real downsides.
This patch configures I2C to use 50kHz clock in the DTS for the affected
devices. For it to work it requires a change in the RTL9300 I2C driver.
This can be safely merged without the kernel change (but will not work
in that case as it will fall back to 100kHz).
qualcommax: ipq60xx: unify common make rules for eap6xx
The main difference between EAP610, 623, and 625 is the device name,
support string, and the BDF package. Move the others to a common
Device/tplink_eap6xx-common in order to highlight the common aspects.
The EAP625 and EAP623 are extremely similar. The only difference in
the vendor's device tree is that EAP625 also enables USB and UART2.
Use the eap6xx dtsi instead of writing out a full devicetree.
The EAP623 uses the same RTL8211F as the 625 and 610. Since this is
a gigabit PHY, it is okay to change the ess mac mode from SGMII_PLUS
to SGMII. This is now consistent across all three devices.
Move the 'realtek,clkout-disable' and 'realtek,aldps-enable' PHY
properties to the common dtsi, as they work well on all three devices.
Reflect the remaining differences in the eap625 dts.
qualcommax: ipq60xx: eap6xx-outdoor: use yellow for LED color
As I was looking at the differences between EAP610, 623, and 625
Outdoor, I realized that the quick-start guide of all of the devices
mentions a yellow and green LED. Thus rename the "amber" led to
"yellow", and adjust its color ID accordingly.
qualcommax: ipq60xx: rename TP-Link EAP623-Outdoor HD v1 compatible
Originally, the .compatible string for EAP623-Outdoor HD tried to
shorten the "-outdoor" to "od". However, this naming was inconsistent
with the existing "eap610-outdoor". As "od" is not a common shorthand,
spell out the complete word: "eap623-outdoor-hd-v1".
Fixes: 5dbf93c8c5 ("ipq60xx: add support for TP-Link EAP623-Outdoor HD v1") Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Link: https://github.com/openwrt/openwrt/pull/18804 Signed-off-by: Robert Marko <robimarko@gmail.com>
- Fix RTL8261N 10GbE PHY `reset-deassert-us` from 100ms to 221ms to meet datasheet minimum SMI-ready timing (t7 >= 150ms), fixing intermittent boot stalls caused by MDIO bus instability
- Add missing WLAN toggle button (GPIO 34) present in stock firmware but absent from OpenWrt DTS
- Fix memory size from 1 GB to the actual 512 MB
Fix 1: The RTL8261N 10GbE PHY's `reset-deassert-us` was set to 100ms (100000us), but the **RTL8261N datasheet (Table 108, parameter t7)** specifies a minimum **SMI-ready time of 150ms** after nRESET release before the MDIO (SMI) bus can be used.
With only 100ms, the kernel attempts MDIO bus access before the RTL8261N's SMI interface is stable. Since the RTL8261N (mdio-bus:00) and the internal MT7988 2.5GbE PHY (mdio-bus:0f) share the same MDIO bus, a not-yet-ready RTL8261N disrupts all MDIO traffic, causing the 2.5GbE PHY firmware loading (`mt798x_2p5ge_phy_config_init`) to stall.
Observed symptoms on warm reboot:
- Sometimes `mt798x_2p5ge_phy_config_init` hangs for 5+ minutes or indefinitely
- RCU CPU stalls (`rcu: INFO: rcu_sched detected stalls on CPUs`)
- mt7996e WiFi chip message timeouts cascading to `chip full reset failed`
- System appears hung with only power LED blinking slowly
UART serial log evidence (warm reboot with 100ms):
```
[ 73.041756] rcu: INFO: rcu_sched self-detected stall on CPU
[ 73.048341] rcu: 2-....: (8 ticks this GP)
[ 73.061641] pc : mt798x_2p5ge_phy_config_init+0x258/0xbb0
[ 73.061653] lr : mt798x_2p5ge_phy_config_init+0x238/0xbb0
...
[ 334.771280] MediaTek MT7988 2.5GbE PHY mdio-bus:0f: Firmware date code: 2024/10/30
```
The 2.5GbE PHY firmware loading, which normally takes ~3 seconds, took **325 seconds** due to MDIO bus instability. In the worst case, the system never recovers.
GPL DTS uses 221ms (`reset-deassert-us = <221000>`), providing 71ms of margin above the 150ms datasheet minimum. All MediaTek MT7988 reference board DTS files in the GPL use this same 221ms value.
Fix 2: Missing WLAN button (GPIO 34)
The BE450 has a physical WLAN toggle button on GPIO 34, defined in the stock TP-Link GPL DTS but missing from the OpenWrt DTS. Without this definition, the button is non-functional under OpenWrt.
The pin name for GPIO 34 in the MT7988 pinctrl is `SPI2_MISO`, confirmed by the kernel pinctrl driver (`pinctrl-mt7988.c`: `MT7988_PIN(34, "SPI2_MISO")`) and the official devicetree binding (`mediatek,mt7988-pinctrl.yaml`).
Note: GPIO 34 is also used by the BE450's First U-Boot as a recovery button (web recovery 192.168.1.1). Registering it in the DTS ensures the kernel claims the pin.
Fix 3: Incorrect memory size in DTS
The OpenWrt DTS declares 1 GB (`0x40000000`) of RAM, but the BE450 has 512 MB (`0x20000000`).
Fabrice Fontaine [Fri, 13 Mar 2026 19:57:11 +0000 (20:57 +0100)]
tools/expat: fix PKG_CPE_ID
cpe:/a:libexpat_project:libexpat is the correct CPE ID for expat:
https://nvd.nist.gov/products/cpe/search/results?keyword=cpe:2.3:a:libexpat_project:libexpat
Jonas Jelonek [Fri, 27 Feb 2026 08:59:00 +0000 (08:59 +0000)]
realtek: pcs: rtl931x: use generic CMU configuration
The current CMU setup was just copied and slightly adjusted from the
SDK, lacks functionality and logic and doesn't cover all cases we need
(same in the SDK due to multiple reasons). The existing implementation
for RTL930x covers all that and can be reused for RTL931x. Previous
patches made this generic and now we can add the remaining missing
pieces to actually use it for RTL931x. This only includes
implementations for the few variant-specific actions within the
implementation, linking them properly and calling the CMU configuration.
Drop the old CMU code for RTL931x then since it's not needed anymore.
Jonas Jelonek [Tue, 24 Feb 2026 22:00:43 +0000 (22:00 +0000)]
realtek: pcs: rtl931x: improve CMU page mapping
Improve the RTL931x mapper to infer the CMU page from the hardware mode
by replace unneeded with useful comments, returning a better error code
and dropping irrelevant parts.
Jonas Jelonek [Tue, 24 Feb 2026 21:22:05 +0000 (21:22 +0000)]
realtek: pcs: make rtl930x CMU config generic
Generalize the RTL930x CMU configuration to support RTL931x as well.
Both implementations differ only in minor details, allowing them to
share common code and avoid duplication.
Affected functions are moved up in the code to the 93xx common area and
slightly renamed. Existing variant-specific functions are adjusted too
and assigned to the previously added SerDes operation hooks.
Jonas Jelonek [Tue, 24 Feb 2026 18:22:45 +0000 (18:22 +0000)]
realtek: pcs: add CMU management SerDes ops
Add new SerDes ops for CMU management to be able to share common
behavior of CMU configuration for RTL930x and RTL931x while still
covering variant specifics.
Jonas Jelonek [Tue, 24 Feb 2026 17:05:28 +0000 (17:05 +0000)]
realtek: pcs: rtl930x: fix naming and error handling
Fix naming of several functions to better reflect what they are doing.
While at it, also improve the error handling a lot, changing the return
type from void to int and actually returning errors.
Jonas Jelonek [Tue, 24 Feb 2026 12:11:18 +0000 (12:11 +0000)]
realtek: pcs: rtl930x: move CMU reset into PLL config
Move resetting the CMU into the PLL configuration itself where the speed
is set. Since this operation is not dependent of the target SerDes and
only needs to be called if the speed changed, it fits better there.
Though the call was guarded with a 'speed_changed' before, this also
applies to actually changing the speed. This was done before anyway,
even if the speed value hasn't really changed.
Add a mapper function to infer the to-be-selected PLL speed from the
desired SerDes hardware mode. This avoids having similar logic in each
CMU implementation.
Jonas Jelonek [Tue, 24 Feb 2026 00:14:12 +0000 (00:14 +0000)]
realtek: pcs: rtl930x: split pll config
Split up PLL configuration of RTL930x in the two distinct actions of
configuring the PLL itself (aka setting its speed, etc.) and selecting
which PLL is used by a SerDes.
It was found that for both RTL930x and RTL931x, PLL configuration can be
combined while selecting the PLL a SerDes uses differs and needs to be
implemented variant-specific.
Jonas Jelonek [Mon, 23 Feb 2026 22:10:45 +0000 (22:10 +0000)]
realtek: pcs: rtl930x: use generic PLL type definition
Make use of the generic PLL type definition in the current CMU/PLL
configuration code for RTL930x. Assign explicit values to the fields of
the PLL type enum to tie these fields to the values that are used in
the register fields. This allows to simplify the code a bit.
Selecting the PLL to use for a SerDes shares some similarities between
RTL930x and RTL931x. While the location of the selector in the registers
is placed different, similar underlying bit semantics are used. This
allows to reuse the same plain values for both. RTL930x uses a force bit
and a selector bit, RTL931x at least uses the selector bit with the same
values for ring and LC PLL.
Jonas Jelonek [Mon, 23 Feb 2026 21:44:37 +0000 (21:44 +0000)]
realtek: pcs: rtl930x: use generic PLL speed definition
Make use of the generic PLL speed definition in the current CMU/PLL
configuration code for RTL930x. Assign explicit values to the field of
the PLL speed enum to tie these fields to the values that are used in
the register fields. This allows to simplify the code a bit.
Setting the actual speed selector for RTL930x was found to be similar to
RTL931x despite of different values being used since the LSB is always 1.
According to the SDK this seems to be a force bit while the other bits
are the actual value/selector that is being forced. For RTL930x,
separate the speed selection to be able to use that as common behavior
for both variants later.
Jonas Jelonek [Mon, 23 Feb 2026 21:17:51 +0000 (21:17 +0000)]
realtek: pcs: bring PLL definitions into shape
Bring the PLL definitions into a proper shape. While there was already a
definition for the PLL type, a generic PLL speed definition was missing.
Introduce such a definition and adjust the naming of the existing PLL
type definition to have a better distinction and avoid conflicts. The
definitions can and should be used to make the CMU/PLL configuration
more generic and reduce the need for variant-specific definitions.
The ethernet driver configures the SoC internal network card
on its own. There are no special serdes or other layers in
between. So there is no need for pcs handling in the driver.
Drop that.
These devices contain a single MAC address in the U-Boot environment.
Set it as eth0 and label MAC in device tree. To maintain the current
state, the 02_network script still sets individual port MAC addresses
and the bridge MAC address.
Jakub Vaněk [Tue, 3 Mar 2026 21:41:28 +0000 (22:41 +0100)]
mediatek: filogic: rename Cudy M3000 v1 to v1/v2
The Cudy M3000 v1/v2 seem to have mostly identical hardware.
The M3000 v1 OpenWrt images work on the M3000 v2 (excluding
the v2 parts with a different PHY). Cudy also distributes one
firmware image that supports both routers.
Rename the human-readable device variant to "v1/v2" to match this.
Don't change the compatible property as that hooks into the
attended sysupgrade process.
The recent flash and PHY changes don't seem to be related to the v1/v2
split. There exist M3000 v2 with the Realtek PHY, see e.g.
https://github.com/openwrt/openwrt/pull/21584#issuecomment-3864992555
Jakub Vaněk [Mon, 2 Mar 2026 20:14:28 +0000 (21:14 +0100)]
mediatek: filogic: add support for Cudy M3000 w/ YT8821 PHY
The hardware is very close the the Cudy M3000 v1 (see commit 20e4a18feb3f). However, the Motorcomm YT8821 PHY is tricky
to support because of a MDIO address collision within the router.
Specification:
- MT7981BA CPU: dual-core ARM Cortex-A53 @ 1.3 GHz
- 256 MiB RAM
- 128 MiB SPI NAND
- Ethernet:
- 1x 1GbE LAN port driven by the internal MT7981 PHY
- 1x 2.5GbE WAN port driven by the Motorcomm YT8821
- WiFi:
- MT7981BA 2.4 GHz WiFi with 2x2:2 MIMO
- MT7981BA 5 GHz WiFi with 2x3:2 MIMO
- Buttons: Reset, WPS
- LED: 1x combined red/white
How to know if you have the a router with the YT8821 PHY:
- Boot the router into the vendor's firmware. Go to Diagnostic Tools
-> System Log. Try searching for "rtl8221b".
- If there are some matches, you have the Cudy M3000 router with
the Realtek PHY and you should NOT use the device defined in this
commit. Instead, you should use the device defined in
mt7981b-cudy-m3000-v1.dts.
- If there are no matches, try searching for "yt8821". If that
matches something, you have the Cudy M3000 with the Motorcomm PHY
and you should use this device tree
(mt7981b-cudy-m3000-v2-yt8821.dts).
- If even the yt8821 string did not match anything, then something
is wrong. Rebooting the router might help (the system log would
be refreshed).
Installation via the Cudy web UI:
- Download the signed intermediary firmware from
https://drive.google.com/drive/folders/1BKVarlwlNxf7uJUtRhuMGUqeCa5KpMnj
- Flash the intermediary firmware using the Cudy web UI
- Connect a PC/laptop to the "1Gbps LAN" port
- Open http://192.168.1.1 in your browser, log in
(the password should be empty)
- Flash your desired OpenWrt firmware via LuCI
- The router should reboot into the desired firmware
How to access UART (citing from 20e4a18feb3f):
- remove rubber ring on the bottom
- remove screws
- pull up the cylinder, maybe help by push on an ethernet socket
with a screwdriver
- remove the (3) screws holding the board in the frame
- remove the board from the frame to get to the screws for the
silver, flat heat shield
- remove the (3) screws holding the heat shield
- solder UART pins to the back of the board
- make sure to have the pins point out on side with the black,
finned heat spread
- the markings for the pins are going to be below the silver heat
shield
- Vcc is not needed
- the UART parameters are 115200 baud, 8n1
Installation via UART (citing from 20e4a18feb3f):
- attach an Ethernet cable to the "1Gbps LAN" port on the router
- hold the reset button while powering the router
- press CTRL-C or wait for the timeout to get to the U-Boot prompt
- prepare a TFTP server on the network to supply ..-initramfs-kernel.bin
- use 'tftpboot 0x46000000 ..-initramfs-kernel.bin' in the U-Boot
shell to pull the image (change the file name accordingly)
- boot the image using 'bootm 0x46000000'
- push the ..-sysupgrade to the router using your preferred method
- perform the upgrade with 'sysupgrade -n'
Jakub Vaněk [Mon, 2 Mar 2026 19:36:29 +0000 (20:36 +0100)]
kernel: add patch for YT8821 address collision
This minimalistic patch should ensure that the Cudy M3000 with the
Motorcomm PHY works reliably. The patch is not upstreamable into the
mainline kernel. However, it could be sufficient as a simple stop-gap
measure until some other solution is found.
Tim Harvey [Fri, 20 Feb 2026 01:01:48 +0000 (17:01 -0800)]
imx: cortexa53: remove KSZ9477 static driver
The KSZ9477 driver was added to the cortexa53 kernel to support the
Gateworks Venice product family which has a board with this switch. Now
that the kmod-dsa-ksz9477 driver is available as a package remove the
static configuration ad add the package.
This resolves an issue caused by having the switch driver static and the
PHY driver as a module such that the PHY driver was not registered early
enough to be used causing some errata to not be worked around.
Tim Harvey [Fri, 20 Feb 2026 00:57:29 +0000 (16:57 -0800)]
kernel: netdevices: add KSZ9477 DSA switch support
This adds kernel packages for the Microchip KSZ9477 switch family.
The core package has a target specific dependency as the ksz9477
driver enables DCB which grows the kernel size and can negatively
impact other targets.
Matt Merhar [Fri, 6 Mar 2026 03:05:40 +0000 (22:05 -0500)]
mac80211: ath12k: backport thermal sensor support
This is nearly identical to what landed in ath-next for v7.1, aside from
resolving a couple conflicts. A separate patch has been added to replace
CONFIG_THERMAL with CPTCFG_ATH12K_THERMAL so the setting may be enabled
via menuconfig (as is done with ath10k and ath11k).
Note that at this stage, throttling has not been implemented upstream,
hence the slight change in wording versus existing options.
Jonas Gorski [Thu, 12 Mar 2026 19:27:17 +0000 (20:27 +0100)]
umdns: update to Git HEAD (2026-02-06)
a52cdb354d13 dns: validate IPv4 record addresses b798c24205b5 dns: validate IPv6 record addresses a3dcb4adc635 dns: validate reverse dns query name lengths
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Eric Fahlgren [Wed, 11 Mar 2026 20:16:34 +0000 (13:16 -0700)]
build: reject non-matching artifacts
Check for malformed artifact names before dereferencing them.
Fixes: https://github.com/openwrt/openwrt/commit/5816d883ff3884ae96c3293b316f6d56c099eee0 Signed-off-by: Eric Fahlgren <ericfahlgren@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22385 Signed-off-by: Robert Marko <robimarko@gmail.com>
Rosen Penev [Wed, 11 Mar 2026 00:05:16 +0000 (17:05 -0700)]
bcm53xx: mr26: fix nvmem MAC override
I wrongly added the wifi devices to the pcie nodes and not the bridge
nodes as they were not present at the time.
Fixes: 58056df ("bcm53xx: backport nvmem mac for meraki mr26") Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22369 Signed-off-by: Robert Marko <robimarko@gmail.com>
This device is pretty useless with the stock firmware as it requires an
account to completely set it up. Additionally, the vendor bootloader is
signed and uses Airoha/Mediatek's BBT/BMT for bad block management on
the flash. It does not support UBI, thus kernel updates are subject to
BMT/BBT which OpenWrt does not support. In turn, if a kernel update
happens and a block is marked bad in the process, the device will fail
to boot and will need to be recovered via serial.
The workaround is to chainload U-Boot in place of the kernel, as it
should not need frequent updates and thus should not cause BBT/BMT to
misbehave and soft-brick the device. Upstream U-Boot supports loading
a FIT image from UBI, so we create a UBI partition for the new u-boot
env, FIT image and factory data. This way, bad blocks are managed by UBI
instead, which will not soft-brick the device should a block be marked
bad during a normal OpenWrt update. Users wishing to update U-Boot can
do so, but should be prepared to recover if a block goes bad.
Because the device is not useful with stock firmware, this is a one-way
ticket for most users and reverting will not be documented.
The following steps can be used to install OpenWrt on the W1700K.
Connect to serial console. There is a Torx T10 screw underneath the QR
code printed onto the label. Then, pry between the gray and white
plastic, starting by the ports on the back. There are clips arount the
entire device. Starting closest to the screw next to the UART header,
TX - GND - VCC - N/A - RX. The bootloader can be interrupted by
pressing any key.
Configuring Vendor Bootloader and Installing U-Boot Chainloader:
The bootloader's default bootcmd will only run a signed image. However,
we can still bootm our own image from flash.
NOTE: The vendor's ethernet drivers are flaky. You may have to reboot
and try the tftpboot part several times for it to work.
The device will now reboot into the U-Boot chainloader.
Loading the W1700K UBI Installer:
The installer can be downloaded at
https://github.com/hurrian/w1700k-ubi-installer/releases
- Boot the installer via the TFTP option in the U-Boot menu. This
process is automatic, though you may be prompted to answer some
questions.
- Once it is done, you may upgrade to your preferred build.
- For more information: https://github.com/hurrian/w1700k-ubi-installer
For those wishing to explore the stock firmware:
Rooting Stock FW (for making backups, recommended):
- Boot the router and watch serial console until presented with failsafe
mode. Enter it (f + enter).
- mount_root
- Change the root password (passwd).
- Open /etc/config/axon_platform_manager and set sshServerEnable,
localAccessEnable and remoteAccessEnable to 1.
- Search for "SSH". You'll find a long string with 3 matches such as
Enabled%25252c1%25252cSSH%Drop. Change any instances of "Disabled"
preceding SSH to "Enabled" and any instances of "Drop" to "Accept"
that follow SSH. Same for "Local SSH" and "Remote SSH".
- Set /etc/config/dropbear to:
RTL838x devices cannot reboot if the flash controller is driven in
4 byte mode. Unitl fdc3776 ("realtek: pcs: fix PLL_CML_CTRL for
serdes 0/1") this bit was luckily cleared by a coding error. Since
then the device cannot be rebooted anymore.
Looking at the SDK one can see that this bit is reset short before
the reboot happens. But we might need that in critical situations
where there is no chance to do it right in time. As the RTL838x
always ran with the bit disabled restore the old behaviour. This
time implement it as a documented quirk so it does not get lost.
Fixes: fdc3776 ("realtek: pcs: fix PLL_CML_CTRL for serdes 0/1") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22334 Signed-off-by: Robert Marko <robimarko@gmail.com>
Eric Fahlgren [Sun, 8 Mar 2026 20:45:42 +0000 (13:45 -0700)]
build: segregate build artifacts by host architecture
Add structured data to each of the build artifacts listed in
profiles.json, in order to accomodate future inclusion of different
build host architectures.
Hauke Mehrtens [Sun, 1 Mar 2026 18:41:50 +0000 (19:41 +0100)]
wifi-scripts: fix handling spaces in wifi client config
Escape identity anonymous_identity password ca_cert and ca_cert2 in a wifi
client configuration. This fixes the handling of configuration options
containing spaces and other strings which need escaping.
Eric Fahlgren [Sun, 8 Mar 2026 16:57:57 +0000 (09:57 -0700)]
firewall4: prefer over firewall as dependency
When the virtual package "uci-firewall" is installed, the choice
between "firewall" and "firewall4" is arbitrary, sometimes resulting
in one, sometimes the other.
Set the default variant on "firewall4" to make it the preferred
package when installed as a dependency.
The Realtek DSA driver accesses the DTS at two locations.
- rtldsa_ethernet_loaded(): to check if ethernet driver is active
- rtl83xx_mdio_probe(): to create ports and link to pcs/phy
The first function does not directly search for the ethernet driver
but looks it up through the switch port nodes. Avoid future issues
and simply search all nodes that have a "ethernet" link to the
network driver.
While we are here add a missing put_device() to keep reference
counters clean.
realtek: eth: provide shared tx_header() for RTL93xx
rteth_930x_create_tx_header() and rteth_931x_create_tx_header() do
basically the same. Only exception is, that one function can handle
ports beyond 32 and the other not. Merge them into one.
MAC setting uses hard to read duplicated code. Additionally it
evaluates the unwanted family_id attribute. Provide the list
of MAC address registers in the configuration structure and use
a loop to fill those.
There is a workaround in the transmit path for the RTL838x SoCs. This
is basically an open coded read_poll_timeout() and makes the code hard
to read. Additionally the magic trigger calculation is not easy to
understand.
Simplify things by using kernel standards and a better macro.
Jan Kantert [Sat, 28 Feb 2026 23:14:10 +0000 (00:14 +0100)]
realtek: pending upstream rtl9300 i2c speed patch
Some 10G optics showed random "module transmit fault indicated" due to I2C
read errors on ONTi ONT-S508CL-8S/XikeStor SKS8300-8X switches. The same
modules work with the original firmware and on other Linux based devices.
There seems to be some differences in how we talk to those modules using
I2C in OpenWRT. To fix this this patch adds support for 50kHz I2C speed on
SFPs and enables that for XikeStor/Onti devices. Since SFPs only transmit
very few bytes this should not have any real downsides.
This patch adds support in the i2c driver for 50kHz and 2.5MHz. In a
second PR I will configure 50kHz in the DTS for the affected devices.
Harshal Gohel [Tue, 27 Jan 2026 11:35:16 +0000 (11:35 +0000)]
rtl93xx: dsa: Handle lag_change properly
LACP frequently changes active/backup links. driver must also handle
dp->lag_tx_enabled.
This should only affect egress LAG table, ingress should not be touched.
To test, connect a known working 802.3ad compatible switch (Mikrotik).
Configure bond with 802.3ad on openwrt as well as mikrotik.
Observer active/backup links on openwrt with
```
for iface in <list of bond participants>; do
ip -d link show $iface
done
```
This should show ACTIVE/BACKUP status which must be synchronized with
the partner's ACTIVE/BACKUP status if LACP is working correctly.
Backup interface must not be chosen by the distribution algorithm to
transmit egress packet
At the moment, we have two parties involved in the selection of active LAG TX
ports:
- the bonding/DSA code which informs about activated/deactivated ports using
.port_lag_change
- the HW which is deactivating ports based on the link state see
RTL93XX_TRK_CTRL_LINK_DOWN_AVOID
In our case, the software is supposed to manage everything
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Harshal Gohel <hg@simonwunderlich.de> Link: https://github.com/openwrt/openwrt/pull/21740 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Harshal Gohel [Tue, 27 Jan 2026 11:33:07 +0000 (11:33 +0000)]
realtek: dsa: rtl93xx: Add link aggregation support
With this commit it is possible to create 802.3ad compatible bond
interface that is interoperable with other 802.3ad compatible switches.
Each trunk group can have maximum of 8 ports as members.
Hardware also supports trunking with stacked switches, however it is not
handled here and the driver only configures the local trunk.
rtl930x and rtl931x has minimal differences in trunk/lag
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Harshal Gohel <hg@simonwunderlich.de> Link: https://github.com/openwrt/openwrt/pull/21740 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Harshal Gohel [Tue, 27 Jan 2026 09:41:39 +0000 (09:41 +0000)]
realtek: dsa: rtl93xx: Initialize trunk on probe
rtl93xx has two distribution algorithm slots that are shared among
multiple trunks.
Each of this slot can be configured to handle L2 and/or L3 packets
Hardware can also be configured to support layer3+4 but that is not
802.3ad compliant. With this commmit I want to focus on getting
layer2 and layer2+3 initialized in two slots.
When a new LAG group is created, depending on the xmit_hash_policy
configuration a slot will be configured in LAG table entry
SPA and VLAN bits made the switch to always choose same link for all
connections which completely dismisses point of Link aggregation.
So avoid these and stick to SMAC + DMAC for L2 packets and
SMAC + DMAC + SIP + DIP for L3 packets
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Jan Fuchs <jf@simonwunderlich.de> Signed-off-by: Harshal Gohel <hg@simonwunderlich.de> Link: https://github.com/openwrt/openwrt/pull/21740 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Harshal Gohel [Mon, 2 Mar 2026 09:16:10 +0000 (09:16 +0000)]
realtek: dsa: Reelect primary port for a LAG
rtl93xx hardware supports trunk fdb entries. That requires driver to
translate port-fdb entry to trunk fdb entry if the port is part of a
LAG.
There is no standard way of indicating fdb entries for bond interfaces.
One can use debugfs interface l2_table to dump all the entries stored in
the hardware. Trunk FDB entries are now displayed properly with trunk ID
and participating ports
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Harshal Gohel <hg@simonwunderlich.de> Link: https://github.com/openwrt/openwrt/pull/21740 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Harshal Gohel [Tue, 27 Jan 2026 17:19:46 +0000 (17:19 +0000)]
realtek: dsa: rtl93xx: Deduplicate distribution algo setup
rtl9310 and rtl9300 have two slots for configuration of packet distribution
algorithm that can be assigned to multiple LAG groups. They also have the
same field descriptions
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Sven Eckelmann <se@simonwunderlich.de> Signed-off-by: Harshal Gohel <hg@simonwunderlich.de> Link: https://github.com/openwrt/openwrt/pull/21740 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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