danglin [Sun, 26 Oct 2014 14:46:14 +0000 (14:46 +0000)]
* config/pa/linux-unwind.h (pa32_read_access_ok): New function.
(pa32_fallback_frame_state): Use pa32_read_access_ok to check if
memory read accesses are ok.
rsandifo [Sun, 26 Oct 2014 10:41:36 +0000 (10:41 +0000)]
gcc/
* config/mips/mips.c (r10k_needs_protection_p_call): Take a const_rtx
and return a bool. Iterate over all subrtxes here.
(r10k_needs_protection_p): Update accordingly.
rsandifo [Sun, 26 Oct 2014 10:41:29 +0000 (10:41 +0000)]
gcc/
* config/mips/mips.c (r10k_needs_protection_p_1): Take an rtx
rather than an rtx pointer. Change type of insn from "void *"
to its real type. Return bool rather than int. Iterate over
all subrtxes here.
(r10k_needs_protection_p_store): Update accordingly.
(r10k_needs_protection_p): Likewise.
rsandifo [Sun, 26 Oct 2014 10:41:22 +0000 (10:41 +0000)]
gcc/
* config/mips/mips.c (mips16_rewrite_pool_refs_info): Delete.
(mips16_rewrite_pool_refs): Take the insn and constant pool as
parameters. Iterate over the instruction's pattern and return void.
(mips16_lay_out_constants): Update accordingly.
rsandifo [Sun, 26 Oct 2014 10:41:06 +0000 (10:41 +0000)]
gcc/
* config/mips/mips.c (mips_rewrite_small_data_1): Take the context
as a parameter instead of the containing MEM. Iterate over all
subrtxes. Don't return a value.
(mips_rewrite_small_data): Update call accordingly.
rsandifo [Sun, 26 Oct 2014 10:40:59 +0000 (10:40 +0000)]
gcc/
* config/mips/mips.c: Include rtl-iter.h.
(mips_small_data_pattern_1): Take an rtx rather than an rtx pointer.
Take the context as a parameter instead of the containing MEM.
Iterate over all subrtxes.
(mips_small_data_pattern_p): Update call accordingly.
rsandifo [Sun, 26 Oct 2014 10:40:44 +0000 (10:40 +0000)]
gcc/
* config/mep/mep.c (mep_store_find_set): Take a const_rtx and
return a bool. Replace "void *" with specific type. Iterate
over all subrtxes.
(mep_store_data_bypass_1): Update calls accordingly.
rsandifo [Sun, 26 Oct 2014 10:40:37 +0000 (10:40 +0000)]
gcc/
* config/mep/mep.c: Include rtl-iter.h.
(global_reg_mentioned_p_1): Take a const_rtx and return a bool.
(xtensa_tls_referenced_p): Return a bool. Use FOR_EACH_SUBRTX.
rsandifo [Sun, 26 Oct 2014 10:40:15 +0000 (10:40 +0000)]
gcc/
* config/sh/sh-protos.h (shmedia_cleanup_truncate): Take an
rtx as argument and return the number of changes.
* config/sh/sh.c: Include rtl-iter.h.
(shmedia_cleanup_truncate): Take an rtx as argument and iterate
over all subrtxes. Return the number of changes made.
* config/sh/sh.md: Update caller accordingly.
amodra [Sat, 25 Oct 2014 06:45:52 +0000 (06:45 +0000)]
PR rtl-optimization/63615
* simplify-rtx.c (simplify_plus_minus): Set "canonicalized" on
decomposing PLUS or MINUS if operands are not placed adjacent
in the "ops" array.
jsm28 [Sat, 25 Oct 2014 00:23:17 +0000 (00:23 +0000)]
Only allow e500 double in SPE_SIMD_REGNO_P registers.
rs6000_hard_regno_nregs_internal allows SPE vectors in single
registers satisfying SPE_SIMD_REGNO_P (i.e. register numbers 0 to
31). However, the corresponding test for e500 double treats all
registers as being able to store a 64-bit value, rather than just
those GPRs.
Logically this inconsistency is wrong; in addition, it causes problems
unwinding from signal handlers. linux-unwind.h uses
ARG_POINTER_REGNUM as a place to store the return address from a
signal handler, but this logic in rs6000_hard_regno_nregs_internal
results in that being considered an 8-byte register, resulting in
assertion failures.
(<https://gcc.gnu.org/ml/gcc-patches/2014-09/msg02625.html> first
needs to be applied for unwinding to work in general on e500.) This
patch makes rs6000_hard_regno_nregs_internal handle the e500 double
case consistently with SPE vectors.
Tested with no regressions with cross to powerpc-linux-gnuspe (given
the aforementioned patch applied). Failures of signal handling
unwinding tests such as gcc.dg/cleanup-{8,9,10,11}.c are fixed by this
patch.
* config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Do
not allow e500 double in registers not satisyfing
SPE_SIMD_REGNO_P.
Continuing the cleanups of libgcc soft-fp configuration for
powerpc*-*-linux* in preparation for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch
optimizes the choice of which functions to build for the 32-bit
classic hard-float and soft-float cases. (e500 will be dealt with in
a separate patch which will need to add new features to t-hardfp and
t-softfp; this patch keeps the status quo for e500.)
For hard-float, while the functions in question are part of the libgcc
ABI there is no need for them to contain software floating point code:
no newly built code should use them, and if anything does use them
it's most efficient (space and speed) for them to pass straight
through to floating-point hardware instructions; this case is made to
use t-hardfp to achieve that. For soft-float, direct use of soft-fp
functions for operations involving DImode or unsigned integers is more
efficient than using the libgcc2.c versions of those operations to
convert to operations on other types (which then end up calling
soft-fp functions for those other types, possibly more than once);
this case is thus stopped from using t-softfp-excl. (A future patch
will stop the e500 cases from using t-softfp-excl as well.)
Tested with no regressions for crosses to powerpc-linux-gnu (soft
float and classic hard float); also checked that the same set of
symbols and versions is exported from shared libgcc before and after
the patch.
* configure.ac (ppc_fp_type): Set variable on powerpc*-*-linux*.
* configure: Regenerate.
* config.host (powerpc*-*-linux*): Use $ppc_fp_type to determine
additions to tmake_file. Use t-hardfp-sfdf and t-hardfp instead
of soft-fp for 32-bit classic hard float. Do not use
t-softfp-excl for soft float.
cbaylis [Fri, 24 Oct 2014 15:00:20 +0000 (15:00 +0000)]
[PATCH 2/2] [AARCH64,NEON] Convert arm_neon.h to use new builtins for vld[234](q?)_lane_*
2014-10-24 Charles Baylis <charles.baylis@linaro.org>
* config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rewrite using builtins,
update uses to use new macro arguments.
(__LD3_LANE_FUNC): Likewise.
(__LD4_LANE_FUNC): Likewise.
paolo [Fri, 24 Oct 2014 12:54:43 +0000 (12:54 +0000)]
2014-10-24 Paolo Carlini <paolo.carlini@oracle.com>
* include/bits/atomic_base.h: Avoid including <stdbool.h>.
* include/std/atomic: When __cplusplus < 201103L skip the rest of
the header.
* testsuite/29_atomics/headers/atomic/std_c++0x_neg.cc: Adjust.
ktkachov [Fri, 24 Oct 2014 11:30:42 +0000 (11:30 +0000)]
[AArch64] Cleanup logic around aarch64_final_prescan
* config/aarch64/aarch64.h (ADJUST_INSN_LENGTH): Wrap definition in
do while (0).
* config/aarch64/aarch64.c (is_mem_p): Delete.
(is_memory_op): Rename to...
(has_memory_op): ... This. Use FOR_EACH_SUBRTX.
(dep_between_memop_and_curr): Assert that the input is a SET.
(aarch64_madd_needs_nop): Add comment. Do not call
dep_between_memop_and_curr on NULL body.
(aarch64_final_prescan_insn): Add comment.
Include rtl-iter.h.
rguenth [Fri, 24 Oct 2014 11:00:08 +0000 (11:00 +0000)]
2014-10-24 Richard Biener <rguenther@suse.de>
* genmatch.c (expr::gen_transform): Use fold_buildN_loc
and build_call_expr_loc.
(dt_simplify::gen): Drop non_lvalue for GIMPLE, use
non_lvalue_loc to build it for GENERIC.
(decision_tree::gen_generic): Add location argument to
generic_simplify prototype.
(capture_info): New class.
(capture_info::capture_info): New constructor.
(capture_info::walk_match): New method.
(capture_info::walk_result): New method.
(capture_info::walk_c_expr): New method.
(dt_simplify::gen): Handle preserving side-effects for
GENERIC code generation.
(decision_tree::gen_generic): Do not reject operands
with TREE_SIDE_EFFECTS.
* generic-match.h: New file.
* generic-match-head.c: Include generic-match.h, not gimple-match.h.
* match.pd: Add some constant folding patterns from fold-const.c.
* fold-const.c: Include generic-match.h.
(fold_unary_loc): Dispatch to generic_simplify.
(fold_ternary_loc): Likewise.
(fold_binary_loc): Likewise. Remove patterns now implemented
by generic_simplify.
* gimple-fold.c (replace_stmt_with_simplification): New function.
(fold_stmt_1): Add valueize parameter, dispatch to gimple_simplify.
(no_follow_ssa_edges): New function.
(fold_stmt): New overload with valueization hook. Use
no_follow_ssa_edges for the overload without hook.
(fold_stmt_inplace): Likewise.
* gimple-fold.h (no_follow_ssa_edges): Declare.
mkuvyrkov [Fri, 24 Oct 2014 08:22:24 +0000 (08:22 +0000)]
Improve scheduler dumps of ready list
* sched-int.h (struct _haifa_insn_data:last_rfs_win): New field.
* haifa-sched.c (INSN_LAST_RFS_WIN): New access macro.
(rfs_result): Set INSN_LAST_RFS_WIN. Update signature.
(rank_for_schedule): Update calls to rfs_result to pass new parameters.
(print_rank_for_schedule_stats): Print out elements of ready list that
ended up on their respective places due to each of the sorting
heuristics.
(ready_sort): Update.
(debug_ready_list_1): Improve printout for SCHED_PRESSURE_MODEL.
(schedule_block): Update.
mkuvyrkov [Fri, 24 Oct 2014 08:22:12 +0000 (08:22 +0000)]
Account for prologue spills in reg_pressure scheduling
* haifa-sched.c (sched_class_regs_num, call_used_regs_num): New static
arrays. Use sched_class_regs_num instead of ira_class_hard_regs_num.
(print_curr_reg_pressure, setup_insn_reg_pressure_info,)
(model_update_pressure, model_spill_cost): Use sched_class_regs_num.
(model_start_schedule): Update.
(sched_pressure_start_bb): New static function. Calculate
sched_class_regs_num.
(schedule_block): Use it.
(alloc_global_sched_pressure_data): Calculate call_used_regs_num.
trippels [Fri, 24 Oct 2014 06:39:24 +0000 (06:39 +0000)]
Fix bootstrap/PR63632
r216566 (r216568 for 4.9 branch) added %{fno-lto} to LINK_COMMAND_SPEC.
However the linker doesn't understand -fno-lto and errors out.
This causes an LTO/PGO bootstrap failure, because -fno-lto is used
during STAGEprofile.
Fixed by filtering out -fno-lto in collect2.c.
fdumont [Thu, 23 Oct 2014 22:03:49 +0000 (22:03 +0000)]
2014-10-23 François Dumont <fdumont@gcc.gnu.org>
* testsuite/25_algorithms/make_heap/complexity.cc: Add missing test
variable.
* testsuite/25_algorithms/sort_heap/complexity.cc: Likewise and use
log2. Now require cmath support.
* testsuite/25_algorithms/pop_heap/complexity.cc: Likewise and require
normal mode.
* testsuite/25_algorithms/push_heap/complexity.cc: Likewise.
jakub [Thu, 23 Oct 2014 21:58:41 +0000 (21:58 +0000)]
PR debug/63623
* var-tracking.c (stack_adjust_offset_pre_post_cb): New function.
(stack_adjust_offset_pre_post): Use it through for_each_inc_dec,
instead of only handling autoinc in dest if it is a MEM.
(vt_stack_adjustments): Fix up formatting.
iverbin [Thu, 23 Oct 2014 16:52:11 +0000 (16:52 +0000)]
PR target/63534
PR target/63618
gcc/
* cse.c (delete_trivially_dead_insns): Consider PIC register is used
while it is pseudo.
* dse.c (deletable_insn_p): Likewise.
gcc/testsuite/
* gcc.target/i386/pr63618.c: New test.