Flag status register polling is required for micron 512Mb flash
devices onwards, for performing erase/program operations.
Like polling for WIP(Write-In-Progress) bit n read status register,
spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control)
bit in flag status register.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
There is no other call other than spi_flash_cmd_wait_ready(),
hence removed spi_flash_cmd_poll_bit and use the poll status code
spi_flash_cmd_wait_ready() itself.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
spi: zynq: Use divide by 8 baud rate for qspi dual stacked connection
Currently the qspi dual stacked support is available on afx boards,
there is a board hardware bug, that the controller will works on
divide by 8. hence changed the master mode baud rate divisor to /8
incase of dual stacked mode qspi.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
sf: Update the qspi dual stacked flash access logic
Updated the xilinx qspi dual stacked flash access.
Now the two memories were linearly accessable without
need a user interaction for selecting chip select.
Below are the changes for dual stacked to work:
- mtd layer -> nr_sectors/nr_blocks*2, update the U_PAGE flag
when memory change happen.
- driver -> on LQSPI_CFG, Enable TWO_MEM[BIT:30] on LQSPI_CFG
Enable U_PAGE[BIT:28] if U_PAGE flag set - upper memory
Disable U_PAGE[BIT:28] if U_PAGE flag unset - lower memory
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
sf: Update the qspi dual parallel flash access logic
Updated the xilinx qspi dual parallel flash access support
to use 3-byte addressing instead of 4-byte addressing used
from the mtd flash layer.
Instead of sending 4-byte addressing from mtd layer and
then the controller will again divide the offset addr by 2 and
convert the 4-byte address into 3-byte address, With this
new logic the mtd will serve the offset as offset by 2 and
send the 3-byte addressing to controller driver, as the
driver is configured as separate bus with two mem the
controller internal hardware algorithm will take care the
dual parallel functionality.
Below are the changes for dual parallel to work:
- mtd layer -> addr/2, page_size*2, nr_sectors/nr_blocks*2
- driver -> enable SEP_BUS[BIT:29],TWO_MEM[BIT:30] on LQSPI_CFG
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
zynq_qspips:Break infinite loop after 1000 status read after trying to set qbit
Currently, u-boot end up in infinite loop when the status reg of the SPI flash
is not 0 after it tries to set the quad bit. If quad bit setting fails, u-boot
hangs because of this infinite loop.
We introduce a counter. If the status register value is still not 0 after 1000
runs, it break the loop.
Michal Simek [Mon, 6 May 2013 04:11:58 +0000 (04:11 +0000)]
patman: Do not hardcode python path
Patman requires python 2.7.4 to run but it doesn't
need to be placed in /usr/bin/python.
Use env to ensure that the interpreter used is
the first one on environment's $PATH on system
with several versions of Python installed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
Michal Simek [Fri, 26 Apr 2013 11:12:07 +0000 (13:12 +0200)]
cmd: fpga: Move fpga_loadbitstream to fpga.c
In bitstream decoding you can directly check device
which you want to load and in fpga.c are fpga_validate
and fpga_dev_info functions which should be used for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
which fix enabling gem driver when baseaddr is specified.
Address of the first gem must be hardcoded because
include hardware.h is not possible because contains
C code.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
petalinux-arm-auto.h assignment is useless.
Do not assing XILINX_PS7_QSPI_FLASH_BASEADDR to XILINX_SPI_FLASH_BASEADDR
because below it is check by if defined().
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove ARM eabi exception handling tables (for frame unwinding).
AFAICT, u-boot stubs away the frame unwiding routines, so the tables will
more or less just consume space. It should be OK to remove them.
Comment from Albert:
By default the *exidx* sections are between rodata and data, so
removing them causes many apparent changes at the binary level.
However, builds of zynq based on ARM master with the patch above vs
master with a patch mapping *exidx* sections after BSS gives identical
binaries. Thus the RFC has no functional effect.
Also, ARM EHABI states that [exception] Tables are not required for ABI
compliance at the C/Assembler level but are required for C++.
So as long as we don't put any C++ code in U-Boot (a prospect that I
don't see happening any time soon), this RFC is safe and either is a
no-op or removes useless bytes from the binary.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 24 Apr 2013 08:01:20 +0000 (10:01 +0200)]
gpio: Add support for microblaze xilinx GPIO
Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.
Add gpio driver and change Microblaze reset logic to be done
via gpio subsystem.
There are various configurations which Microblaze can have
that's why gpio_alloc/gpio_alloc_dual(for dual channel)
function has been introduced and gpio can be allocated
dynamically.
Adding several gpios IP is also possible and supported.
For listing gpio configuration please use "gpio status" command
This patch also remove one compilation warning:
microblaze-generic.c: In function 'do_reset':
microblaze-generic.c:38:47: warning: operation on '*1073741824u'
may be undefined [-Wsequence-point]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is not required as max_write_size is initalized to 0
in spi_alloc_slave().
This change is not required as equivalent functionality was
introduced by below commit.
"spi: zynq: Use spi_alloc_slave() in each SPI driver"
(sha1: 00e98f66ab2dd60738b657ff645cbcb9477f2037)
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Michal Simek [Wed, 1 May 2013 09:31:07 +0000 (11:31 +0200)]
fpga: zynq: Add support for loading bitstream
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
sf: Update the qspi dual parallel flash access logic
Updated the xilinx qspi dual parallel flash access support
to use 3-byte addressing instead of 4-byte addressing used
from the mtd flash layer.
Instead of sending 4-byte addressing from mtd layer and
then the controller will again divide the offset addr by 2 and
convert the 4-byte address into 3-byte address, With this
new logic the mtd will serve the offset as offset by 2 and
send the 3-byte addressing to controller driver, as the
driver is configured as separate bus with two mem the
controller internal hardware algorithm will take care the
dual parallel functionality.
Below are the changes for dual parallel to work:
- mtd layer -> addr/2, page_size*2, nr_sectors/nr_blocks*2
- driver -> enable SEP_BUS[BIT:29],TWO_MEM[BIT:30] on LQSPI_CFG
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
sf: Update spi_flash framework to handle all sizes of flashes
Updated the spi_flash framework to handle all sizes of flashes.
As most of the flashes introduces a bank/extended address registers
for accessing the flashes in 16Mbytes of banks if the flash size
is > 16Mbytes, this new scheme will add the bank selection feature
for performaing write/read/erase operations on all flashes.
u-boot.bin size:
- before 262192bytes
- after 262080bytes
sf speed(65536 bytes wr):
- before 1.528s, speed 43890 B/s
- after 1.533s, speed 43776 B/s
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 25 Apr 2013 14:14:18 +0000 (16:14 +0200)]
petalinux: Use directly xilinx platforms
Currently all of these platforms are symlinks to xilinx
boards which is breaking out of tree compilation.
Keep symlinks but setup board files directly to proper
folder solves this problem.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Jason Wu [Fri, 12 Apr 2013 00:54:45 +0000 (10:54 +1000)]
template:/petalinux-auto-board.h: Remove 0x in front of ${filesize}
The 0x is not required tread as hex value. However, this is required
for Zynq sd_update_boot because the filesize return by fat load is
in hex size but with 0x prefix. This will cause sf error due to
the file size is 0x0xABCD not 0xABCD.
Simon Glass [Thu, 18 Apr 2013 10:25:51 +0000 (10:25 +0000)]
crc32: Correct endianness of crc32 result
When crc32 is handled by the hash library, it requires the data to be in
big-endian format, since it reads it byte-wise. Thus at present the 'crc32'
command reports incorrect data. For example, previously we might see:
Andreas Bießmann [Mon, 15 Apr 2013 23:52:18 +0000 (23:52 +0000)]
patman: fix gitutil for decorations
The git config parameter log.decorate is quite useful when working with git.
Patman, however can not handle the decorated output when parsing the commit.
To prevent this use the '--no-decorate' switch for git-log.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:30:27 +0000 (06:30 +0000)]
fdt: Ensure that libfdt_env.h comes from U-Boot
When building host utilities, we include libfdt.h from the host, not from
U-Boot. This in turn brings in libfdt_env.h from the host, which can mess
up the types and cause a build failure, depending on the host environment.
To fix this, force inclusion of U-Boot's libfdt_env.h so that the types
are correct.
Another way to fix this is to use -nostdinc and -idirafter to ensure that
system includes are included after U-Boot ones. Unfortunately this means
that U-Boot's errno.h gets included instead of the system one. This in
turn requires a hack to errno.h to redirect things, so all in all the
solution in this patch is probably cleaner.
Jaehoon Chung [Tue, 29 Jan 2013 19:31:16 +0000 (19:31 +0000)]
mmc: support the correct card version for eMMC
eMMC vesrion is supported up to v4.5.
But bootloader isn't saw the exact eMMC version.
After applied this patch,
if use the mmcinfo command, then can see the exactly mmc version.
Maxime Larocque [Fri, 28 Sep 2012 05:00:13 +0000 (05:00 +0000)]
printenv: Correct out-of-memory condition check.
In common/cmd_nvedit.c, en env_print(), the wrong type is used for len.
hexport_r() returns -1 on error (like OOM), which is converted to
0xffffffff when put in an unsigned. Said value is obviously bigger then
0, and as a result an uninitialized string is then displayed. Other
usages of hexport_r() in the code correctly uses ssize_t to keep its
return value.
Signed-off-by: Maxime Larocque <maxmtl2002@yahoo.ca>
zynq_qspips:Break infinite loop after 1000 status read after trying to set qbit
Currently, u-boot end up in infinite loop when the status reg of the SPI flash
is not 0 after it tries to set the quad bit. If quad bit setting fails, u-boot
hangs because of this infinite loop.
We introduce a counter. If the status register value is still not 0 after 1000
runs, it break the loop.
Simon Glass [Sat, 13 Apr 2013 04:26:41 +0000 (04:26 +0000)]
exynos: Correct use of 64-bit division
The current code is causing errors like this on my toolchains:
/usr/x86_64-pc-linux-gnu/armv7a-cros-linux-gnueabi/binutils-bin/2.22/
ld.bfd.real: failed to merge target specific data of file /usr/lib/gcc/
armv7a-cros-linux-gnueabi/4.7.x-google/libgcc.a(_divdi3.o)
Use do_div() to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Vivek Gautam [Mon, 28 Jan 2013 00:39:59 +0000 (00:39 +0000)]
Exynos5: Add support for USB download boot mode
Exynos5250 supports secondary USB device boot mode. If the iROM fails
to download u-boot from the primary boot device (such as SD or eMMC),
it will try to retrieve from the secondary boot device (such as USB).
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Mon, 15 Apr 2013 11:25:20 +0000 (11:25 +0000)]
x86: Allow setup code to manage its own global data
Currently x86 has its own means of managing the global data and board data
(bd_t), and this code resides in start.S. With generic board, we need to
ensure that we leave this alone - i.e. don't clear it as we do on other
archs.
This fixes a problem where the memory init data is cleared which causes
the video driver to operate very slowly.
Simon Glass [Mon, 15 Apr 2013 11:22:49 +0000 (11:22 +0000)]
x86: Fix DRAM bank size init with generic board
The intention of the memory init code is that it should work the same with
CONFIG_SYS_GENERIC_BOARD and without. This is tricky because dram_init()
is called prior to relocation with generic board (matching other archs)
and after relocation without generic board.
Adjust the init sequence so that dram_init() is not called in the generic
board case, which seems like the easiest fix for now. Also ensure that
relocation addresses are still calculated.
Tom Warren [Wed, 10 Apr 2013 17:32:32 +0000 (10:32 -0700)]
Tegra: Split tegra_get_chip_type() into soc & sku funcs
As suggested by Stephen Warren, use tegra_get_chip() to return
the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for
Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true
function, i.e. tegra_get_chip_sku(), which returns an ID like
TEGRA_SOC_T25, TEGRA_SOC_T33, etc.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Wed, 3 Apr 2013 21:39:30 +0000 (14:39 -0700)]
Tegra: Fix MSELECT clock divisors for T30/T114.
A comparison of registers between our internal NV U-Boot and
u-boot-tegra/next showed some discrepancies in the MSELECT
clock divisor programming. T20 doesn't have a MSELECT clk src reg.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>