arasan: nfc: Add initial nand driver support for Xilinx ZynqMP
Added initial nand driver support for arasan nand flash
controller. This supports nand erase, nand read, nand write
This uses the hardware ECC for read and write operations
ZynqMP uses this driver.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Disable all level shifters before enabling
the PS-to-PL level shifters as it would
be good to disable all level shifters before
enabling the PS-to-PL in order to ensure that
it is in proper state
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: nand: Send address cycles as per onfi parameter page
Send address cycles as per value read from onfi parameter
page for Read and write commands instead of using a
hard coded value. This may vary for different parts and
hence use it from onfi parameter page value.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 25 Feb 2015 13:32:29 +0000 (14:32 +0100)]
zynqmp: Fix compilation warning around missing sata header
Warning:
board/xilinx/zynqmp/zynqmp.c: In function ‘scsi_init’:
board/xilinx/zynqmp/zynqmp.c:57:2: warning: implicit declaration of
function ‘ahci_init’ [-Wimplicit-function-declaration]
ahci_init(ZYNQMP_SATA_BASEADDR);
^
board/xilinx/zynqmp/zynqmp.c:58:2: warning: implicit declaration of
function ‘scsi_scan’ [-Wimplicit-function-declaration]
scsi_scan(1);
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 25 Feb 2015 12:56:13 +0000 (13:56 +0100)]
qspi: Move zynqmp QSPI driver to separate file
This driver comes from zynq_qspi.c driver but
this zynqmp_qspi.c driver will be replaced by different
one that's why this patch is just preparation for easier
merge.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Compilation warning:
In file included from include/common.h:26:0,
from drivers/spi/zynq_qspi.c:9:
drivers/spi/zynq_qspi.c: In function 'spi_setup_slave':
include/linux/kernel.h:155:17: warning: comparison of distinct pointer
types lacks a cast [enabled by default]
(void) (&_min1 == &_min2); \
^
drivers/spi/zynq_qspi.c:822:28: note: in expansion of macro 'min'
qspi->qspi.max_speed_hz = min(max_hz, lqspi_frequency);
^
In file included from include/common.h:26:0,
from drivers/spi/zynq_qspi.c:9:
drivers/spi/zynq_qspi.c: In function 'spi_setup_slave':
include/linux/kernel.h:155:17: warning: comparison of distinct pointer
types lacks a cast [enabled by default]
(void) (&_min1 == &_min2); \
^
drivers/spi/zynq_qspi.c:822:28: note: in expansion of macro 'min'
qspi->qspi.max_speed_hz = min(max_hz, lqspi_frequency);
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 13 Jan 2015 09:59:52 +0000 (10:59 +0100)]
mtd: spi: Return 0 instead of NULL
This patch remove warning:
drivers/mtd/spi/sf_probe.c: In function 'spi_flash_validate_params':
drivers/mtd/spi/sf_probe.c:215:4: warning: return makes integer from
pointer without a cast [enabled by default]
return NULL;
^
drivers/mtd/spi/sf_probe.c:223:5: warning: return makes integer from
pointer without a cast [enabled by default]
return NULL;
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 13 Jan 2015 09:27:31 +0000 (10:27 +0100)]
fpga: Remove BIT_COMPRESSED from fpga.h
Compressed bitstreams are full or partial and current
fpga command is able to handle compressed bitstreams
by default that's why no enum value is needed for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 13 Jan 2015 09:19:59 +0000 (10:19 +0100)]
Merge tag 'v2015.01' into master
Add AFX/CSE board support - Kconfig entry, defconfigs
Add RSA Kconfig entry and targets for it
Add zc770-xm011 and zynq-cc108 DTBs from the Linux kernel
Sync zynq-7000.dtsi with the Linux kernel.
Use spl_load_image_fat for bitstream loading in SPL.
Disable CONFIG_OF_CONTROL for all zynq boards.
Nand:
- Fix zynq_nand_read_subpage_raw parameters.
- Remove nand.h from sys_proto.h and move it zynq_nand.c
- Do not call nand_release(). Removed by:
"mtd, ubi, ubifs: resync with Linux-3.14"
(sha1: ff94bc40af3481d47546595ba73c136de6af6929)
QSPI:
- spi_flash_params has been moved from spi_flash.h
to sf_internal.h - fix zynq_qspi.c driver to reflect this.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 13 Jan 2015 09:59:52 +0000 (10:59 +0100)]
mtd: spi: Return 0 instead of NULL
This patch remove warning:
drivers/mtd/spi/sf_probe.c: In function 'spi_flash_validate_params':
drivers/mtd/spi/sf_probe.c:215:4: warning: return makes integer from
pointer without a cast [enabled by default]
return NULL;
^
drivers/mtd/spi/sf_probe.c:223:5: warning: return makes integer from
pointer without a cast [enabled by default]
return NULL;
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Always disable dcache after the flush operation
The following sequence is advisable while disabling d-cache:
1. disable_dcache() - flushes and disables d-cache
2. invalidate_dcache_all() - invalid any entry that came to the cache
in the short period after the cache was flushed but before the
cache got disabled
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Pali Rohár [Thu, 8 Jan 2015 09:11:40 +0000 (10:11 +0100)]
Nokia RX-51: Do not call secure PPA routine on non secure devices
Since commit 41623c91b09a0c865fab41acdaff30f060f29ad6 u-boot running in qemu is
crashing in function do_omap3_emu_romcode_call(). RX-51 board uses this function
for Cortex-A8 errata 430973 workaround (Set IBE bit in ACR) which is needed only
on real secure device and not in qemu.
This board patch just disable calling secure PPA routine on non secure devices.
Qemu implements GP device and with this patch u-boot is working in qemu again.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Acked-by: Pavel Machek <pavel@ucw.cz>
Masahiro Yamada [Fri, 19 Dec 2014 05:27:13 +0000 (14:27 +0900)]
ARM: remove redudant information from Kconfig files
- "string" type for SYS_* is defined in arch/Kconfig
- SYS_CPU "armv7" has been replaced with "select CPU_V7"
- SYS_SOC "tegra124" is already defined in tegra124/Kconfig
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Bo Shen <voice.shen@atmel.com>
Kevin Hilman [Mon, 15 Dec 2014 20:07:52 +0000 (12:07 -0800)]
common/board_f.c: fix compile error when tracing disabled
When CONFIG_TRACE is disabled, linking fails with:
common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to `trace_early_init'
To fix, wrap trace init calls with #ifdef CONFIG_TRACE.
While at it, remove the static inline version of the init call from
trace.h as suggested by Simon Glass, since it doesnt work.
Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Signed-off-by: Kevin Hilman <khilman@linaro.org> Acked-by: Simon Glass <sjg@chromium.org>
Łukasz Majewski [Fri, 21 Nov 2014 08:22:43 +0000 (09:22 +0100)]
fix: tools: kwbimage.c: Initialize headersz to suppress warning
When building with my toolchain (4.8.2):
CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013.12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12-sanitized/bin/arm-v7a-linux-gnueabi-
I see following WARNING:
tools/kwbimage.c: In function "kwbimage_set_header":
tools/kwbimage.c:803:8: warning: "headersz" may be used uninitialized in this function [-Wmaybe-uninitialized]
memcpy(ptr, image, headersz);
^
This fix aims to suppress it.
Alexey Brodkin [Mon, 29 Dec 2014 12:42:57 +0000 (15:42 +0300)]
arc: introduce "mdbtrick" target
MetaWare debugger (MDB) is still used as a primary tool for interaction
with target via JTAG. Moreover some very advanced features are not yet
implemented in GDB for ARC (and not sure if they will be implemnted
sometime soon given complexity and rare need for those features for
common user).
So if we're talking about development process when U-Boot is loaded in
target memory not by low-level boot-loader but manually through JTAG
chances are high developer uses MDB for it.
But MDB doesn't support PIE (position-independent executable) - it will
refuse to even start - that means no chance to load elf contents on
target.
Then the only way to load U-Boot in MDB is to fake it by:
1. Reset PIE flag in ELF header
This is simpe - on attempt to open elf MDB checks header and if it
doesn't match its expectation refuces to use provided elf.
2. Strip all debug information from elf
If (1) is done then MDB will open elf but on parsing of elf's debug
info it will refuse to process due to debug info it cannot understand
(symbols with PIE relocation).
Even though it could be done manually (I got it documented quite a while
ago here http://www.denx.de/wiki/U-Boot/ARCNotes) having this automated
way is very convenient. User may build U-Boot that will be loaded on
target via MDB saying "make mdbtrick".
Then if we now apply the manipulation MDB will happily start and will
load all required sections into the target.
Indeed there will be no source-level debug info available. But still MDB
will do its work on showing disassembly, global symbols, registers,
accessing low-level debug facilities etc.
As a summary - this is a pretty dirty hack but it simplifies life a lot
for us ARc developers.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de>
Masahiro Yamada [Fri, 26 Dec 2014 13:20:58 +0000 (22:20 +0900)]
mtd: nand: do not scan BBT after scrub
Currently, "nand scrub" runs chip->scan_bbt at the end of
nand_erase_opts() even if NAND_SKIP_BBTSCAN flag is set.
It violates the intention of NAND_SKIP_BBTSCAN.
Move NAND_SKIP_BBTSCAN flag check to nand_block_checkbad() so that
chip->scan_bbt() is never run if NAND_SKIP_BBTSCAN is set.
Also, unset NAND_BBT_SCANNED flag instead of running chip->scan_bbt()
right after scrub. We can be lazier here because the BBT is scanned
at the next call of nand_block_checkbad().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com>
Its git-log claimed that it reinstated the change as by commit fb49454b1b6c ("nand: reinstate lazy bad block scanning"), but it moved
"chip->options |= NAND_BBT_SCANNED" below "chip->scan_bbt(mtd);".
It causes recursion if scan_bbt does not find a flash based BBT
and tries to write one, and the attempt to erase the BBT area
causes a bad block check.
Reinstate commit ff49ea8977b5 (NAND: Mark the BBT as scanned prior to
calling scan_bbt.).
Stefan Agner [Thu, 8 Jan 2015 17:18:25 +0000 (18:18 +0100)]
arm: vf610: fix boot from SD-card
Boot from SD-card (and probably also from NAND) was broken since
commit d6d07a9bec ("arm: vf610: add NAND support for vf610twr").
It looks like the increased size of U-Boot lead to a situation
where the boot ROM overwrote its own stack/heap while loading
U-Boot from the SD-card to the SRAM. However, U-Boot worked fine
when loaded through USB serial loader directly into SRAM. It
looks like loading from SD-card uses other stack/heap location
then the serial loader (or maybe no stack or heap at all).
This fix moves U-Boot to gfxRAM, which is 512kB in size and is not
used by the boot ROM nor the SD-card loader of it.
Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Stefan Agner [Thu, 18 Dec 2014 17:10:33 +0000 (18:10 +0100)]
arm: build arch memset/memcpy in Thumb2 mode
Resynchronize memcpy/memset with kernel 3.17 and build them in
Thumb2 mode (unified syntax). Those assembler files can be built
and linked in ARM mode too, however when calling them from Thumb2
built code, the stack got corrupted and the copy did not succeed
(the exact details have not been traced back). However, the Linux
kernel builds those files in Thumb2 mode. Hence U-Boot should
build them in Thumb2 mode too when CONFIG_SYS_THUMB_BUILD is set.
To build the files without warning, some assembler instructions
had to be replaced with their UAL compliant variant (thanks
Jeroen for this input).
To build the file in Thumb2 mode the implicit-it=always option need
to be set to generate Thumb2 compliant IT instructions where needed.
We add this option to the general AFLAGS when building for Thumb2.
Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Agner <stefan@agner.ch>
Mike Looijmans [Fri, 19 Dec 2014 14:20:11 +0000 (15:20 +0100)]
zynq_qspi.c: Set correct frequency regardless of hardware setting
The QSPI frequency set by the ROM may not be using the 1/2 clock divider,
examining the E000D000 register at boot reveils it's usually set to 1/4.
The driver always assumes it is set at 1/2 at boot, so it does not program
the clock rate if the requested frequency happens to match that.
This results in the QSPI clock running at 50MHz when 100MHz was requested.
To fix, set the current rate of the master (speed_hz) to "0" at startup, so
that the driver always programs the clock divider the first time the
zynq_qspi_setup_transfer method is called. This assures that the QSPI is
actually running at the requested clock rate.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Mike Looijmans <mike.looijmans@topic.nl>
Add a specific relocate_vectors macro that skips the vector relocation, as the
i.MX25 SoC does not provide RAM at the high vectors address (0xFFFF0000), and
(0x00000000) maps to ROM.
This allows mx25 to boot again.
Acked-By: Bill Pringlemeir <bpringlemeir@nbsps.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Peng Fan [Thu, 8 Jan 2015 02:40:21 +0000 (10:40 +0800)]
imx:mx6sxsabresd support qspi AHB read
Add CONFIG_SYS_FSL_QSPI_AHB in header file to enable AHB in driver.
In order to count the time, add CONFIG_CMD_TIME.
Using AHB read can improve the the read speed about 30%.
AHB read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.174 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.174 seconds
IP read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.227 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.227 seconds
Note:
Quad read is not supported in driver, now. In my side, using AHB and Quad read
can achieve about 16MB/s. Anyway, I have plan to reimplement the driver using
DTB and DM, then make the code cleaner and more feature can be added.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
projects / thirdparty / u-boot.git / log
