]> git.ipfire.org Git - thirdparty/u-boot.git/log
thirdparty/u-boot.git
5 days agorockchip: Ensure env in SPI Flash can work correctly
Jonas Karlman [Sat, 12 Jul 2025 21:27:07 +0000 (21:27 +0000)] 
rockchip: Ensure env in SPI Flash can work correctly

Ensure that the spi/sfc node for SPI flash is aviliable during pre-reloc
phase so that env can successfully be loaded from SPI Flash.

No boards with these SoCs seem to be affected as there is no default use
of ENV_IS_IN_SPI_FLASH=y.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: spl-boot-order: Defer probe of boot device
Jonas Karlman [Sat, 12 Jul 2025 21:12:29 +0000 (21:12 +0000)] 
rockchip: spl-boot-order: Defer probe of boot device

Boot devices are being probed when SPL boot order is determined. This
may delay boot slightly and can prevent booting from SPI Flash on boards
that use same pins for SPI Flash and eMMC due to pinctrl being applied
prior to booting.

Instead defer probe of the boot device until SPL try to load image from
the boot device by using uclass_find_device_by_of_offset() instead of
the get variant.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
5 days agoboard: rockchip: Add support for rk3588 MNT Reform2
Peter Robinson [Fri, 26 Sep 2025 16:29:56 +0000 (17:29 +0100)] 
board: rockchip: Add support for rk3588 MNT Reform2

Add support for MNT Reform2, it works as a carrier board
with a Firefly iCore-3588Q SoM.

Specification:
- Rockchip RK3588
- LPDDR5X 16/32 GB
- eMMC 128/256 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- DSI to eDP panel
- 1Gb Ethernet w/ Microchip KSZ9310 PHY

Tested using Fedora boot on USB stick and eMMC.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoboard: rockchip: add Lunzn FastRhino R66S
Tianling Shen [Mon, 8 Sep 2025 11:32:18 +0000 (19:32 +0800)] 
board: rockchip: add Lunzn FastRhino R66S

Lunzn Fastrhino R66S is a high-performance mini router.

Specification:
- Rockchip RK3568
- 1/2GB LPDDR4 RAM
- SD card slot
- 2x USB 3.0 Port
- 2x 2500 Base-T (PCIe, r8125b)
- 12v DC Jack

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoboard: rockchip: Fix RG353M model renaming
David Barbion [Wed, 10 Sep 2025 21:18:55 +0000 (23:18 +0200)] 
board: rockchip: Fix RG353M model renaming

Anbernic RG353M is hardware compatible with RG353P. Only the form-factor
differs. So only one DTS is created for both machines with
"Anbernic RG353P" as default model. If a RG353M is detected, the model
should be overwritten with the correct name.
Actually, it's overwritten with "Anbernic" only making the process of
machine detection a little harder.
However, to determine the size of the string "Anbernic RG353M", it is
sizeof() which is used resulting in obtaining the size of the pointer
(which is 8 bytes on ARM64) not the size of the pointed string.
strlen() should be used instead.

Signed-off-by: David Barbion <davidb@230ruedubac.fr>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: imply most symbols for ARCH_ROCKCHIP
Quentin Schulz [Wed, 29 Oct 2025 11:34:25 +0000 (12:34 +0100)] 
rockchip: imply most symbols for ARCH_ROCKCHIP

Forcing all those symbols on means we cannot make the binary smaller or
with unnecessary features or drivers disabled. This is especially useful
for security, auditing and certification where less code built means
less to look at (and less surface attack) and less to patch, but also
for making binary images smaller which typically means faster boot.

It is possible to have boards without MMC, NAND or SPI flashes, without
anything on SPI or I2C buses, nothing to control over PWM or GPIO or for
which we have no interest in regulator control or serial output so make
it possible to remove all that if desired.

No intended change in default selected symbols.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agobinman: btool: mkimage: fix Bintoolmkimage.run() method docstring
Quentin Schulz [Wed, 29 Oct 2025 11:30:36 +0000 (12:30 +0100)] 
binman: btool: mkimage: fix Bintoolmkimage.run() method docstring

Commit 65e2c14d5a5a ("binman: btool: mkimage: use Bintool.version")
removed the version argument from the run method but forgot to remove it
from the method docstring, so let's fix this oversight.

Fixes: 65e2c14d5a5a ("binman: btool: mkimage: use Bintool.version")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: spl_common: fix TIMER_FMODE constant
Quentin Schulz [Tue, 28 Oct 2025 16:57:37 +0000 (17:57 +0100)] 
rockchip: spl_common: fix TIMER_FMODE constant

The free running mode is 0 at bit offset 1. User mode is 1 at bit offset
1. Currently, free running mode is 1 at offset 0, which is already the
case thanks to TIME_EN.

So, this essentially does not change the actual value written to the
register as it is TIME_EN | TIMER_FMODE which currently is 0x1 | BIT(0)
= 0b1, and will become 0x1 | (0 << 1) = 0b1.

I checked PX30, RK3128, RK3188, RK3228, RK3288, RK3308, RK3328, RK3368
RK3506, RK3562 and RK3568 TRMs.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: rk3399: fix TIMER_FMODE constant
Quentin Schulz [Tue, 28 Oct 2025 16:57:36 +0000 (17:57 +0100)] 
rockchip: rk3399: fix TIMER_FMODE constant

The free running mode is 0 at bit offset 1. User mode is 1 at bit offset
1. Currently, free running mode is 1 at offset 0, which is already the
case thanks to TIME_EN.

So, this essentially does not change the actual value written to the
register as it is TIME_EN | TIMER_FMODE which currently is 0x1 | BIT(0)
= 0b1, and will become 0x1 | (0 << 1) = 0b1.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: rk3036: use rockchip_stimer_init from spl_common.o
Quentin Schulz [Tue, 28 Oct 2025 16:57:35 +0000 (17:57 +0100)] 
rockchip: rk3036: use rockchip_stimer_init from spl_common.o

The only difference with the implementation in spl_common.c is that we
check whether the timer has already been enabled. Considering this is
running in SPL, the first stage on RK3036, I feel like it's guaranteed
to not be enabled by default. No public TRM though and I don't have
access to an RK3036 device so take this as a guess.

Size of SPL binary increases by 8B for evb-rk3036.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: px30: use rockchip_stimer_init from spl_common.o for TPL
Quentin Schulz [Tue, 28 Oct 2025 16:57:34 +0000 (17:57 +0100)] 
rockchip: px30: use rockchip_stimer_init from spl_common.o for TPL

Instead of redefining what is essentially the same code in
secure_timer_init, let's simply use rockchip_stimer_init from
spl_common.o instead.

This increases the size of the TPL by 16B, due to the added check of
STIMER already being enabled. Experimentally, STIMER is not already
enabled when in TPL.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoboard: rockchip: Add ArmSoM Sige1
Jonas Karlman [Sun, 19 Oct 2025 20:58:39 +0000 (20:58 +0000)] 
board: rockchip: Add ArmSoM Sige1

The Sige1 is a single board computer developed by ArmSoM, based on the
Rockchip RK3528A SoC.

Add support for the ArmSoM Sige1 board.

Features tested on a ArmSoM Sige1 v1.1:
- SD-card boot
- eMMC boot
- Ethernet
- USB host (with pending DT changes)

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoarm64: dts: rockchip: Add ArmSoM Sige1
Jonas Karlman [Sun, 19 Oct 2025 20:58:38 +0000 (20:58 +0000)] 
arm64: dts: rockchip: Add ArmSoM Sige1

The Sige1 is a single board computer developed by ArmSoM, based on the
Rockchip RK3528A SoC.

Add initial device tree for the ArmSoM Sige1 board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250717103720.2853031-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 1c6b12ef9575bc18dad2393e50ca1ebf96f0a0c8 ]

(cherry picked from commit 3ba04aa78ba71faab4a339f5ab15bc81a3e0a51b)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoboard: rockchip: Add Radxa ROCK 2A/2F
Jonas Karlman [Sun, 19 Oct 2025 20:58:37 +0000 (20:58 +0000)] 
board: rockchip: Add Radxa ROCK 2A/2F

The ROCK 2 Family is a high-performance SBC (Single Board Computer)
developed by Radxa, based on the Rockchip RK3528A.

The Radxa E20C shares some board characteristics with the ROCK 2 family
boards.

Add support for the ROCK 2A and 2F boards. The radxa-e20c-rk3528 target
is also extended to support booting ROCK 2 boards.

Features tested on a ROCK 2A v1.202:
- SD-card boot
- Ethernet
- USB host (with pending DT changes)

Features tested on a ROCK 2F v1.016:
- SD-card boot
- eMMC boot
- USB host (with pending DT changes)

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoarm64: dts: rockchip: Add Radxa ROCK 2A/2F
Jonas Karlman [Sun, 19 Oct 2025 20:58:36 +0000 (20:58 +0000)] 
arm64: dts: rockchip: Add Radxa ROCK 2A/2F

The ROCK 2A and ROCK 2F is a high-performance single board computer
developed by Radxa, based on the Rockchip RK3528A SoC.

Add initial device tree for the Radxa ROCK 2A and ROCK 2F boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250717103720.2853031-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 5b71b3d9aa61626d6a93ed2f761a748aa2ecfa95 ]

(cherry picked from commit d272bc0c747a5af49cf98140ebd25a702f84ab52)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoboard: rockchip: Add FriendlyElec NanoPi M5
Jonas Karlman [Sun, 19 Oct 2025 16:50:51 +0000 (16:50 +0000)] 
board: rockchip: Add FriendlyElec NanoPi M5

FriendlyElec NanoPi M5 with Rockchip RK3576 SoC (4x Cortex-A72,
4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU).

Features tested on a NanoPi M5 2411:
- SD-card boot
- SPI flash boot
- Ethernet
- LEDs
- PCIe/NVMe
- USB HOST/OTG
- USER button

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoboard: rockchip: Add Luckfox Omni3576
Jonas Karlman [Sun, 19 Oct 2025 16:50:50 +0000 (16:50 +0000)] 
board: rockchip: Add Luckfox Omni3576

Luckfox Omni3576 Carrier Board with Core3576 Module, powered by the
Rockchip RK3576 SoC with four Cortex-A72 cores, four Cortex-A53 cores,
and a Mali-G52 MC3 GPU.

Features tested with a Core3576 Rev1.1 on a Omni3576 carrier board:
- SD-card boot
- eMMC boot
- LED
- PCIe/NVMe
- USB2.0 HOST

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoboard: rockchip: Add Radxa ROCK 4D
Jonas Karlman [Sun, 19 Oct 2025 15:47:19 +0000 (15:47 +0000)] 
board: rockchip: Add Radxa ROCK 4D

The Radxa ROCK 4D is a compact single-board computer (SBC) featuring
numerous top-tier functions, features, and expansion options.

Equipped with the Rockchip RK3576 or RK3576J SoC, the ROCK 4D boasts an
octa-core CPU (4x Cortex-A72 + 4x Cortex-A53), Mali-G52 GPU, and a
powerful 6 TOPS NPU, making it ideal for AI and multimedia tasks.

Features tested on a Radxa ROCK 4D v1.112:
- SPI Flash boot
- Ethernet
- PCIe/NVMe
- USB host

ROCK 4D boards with SPI Flash is configured to boot from FSPI0->UFS->USB,
or directly from USB when the MASKROM button is pressed, booting
directly from SD-card is not possible on these boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: rk3576: Add SPI Flash boot support
Jonas Karlman [Sun, 19 Oct 2025 15:47:18 +0000 (15:47 +0000)] 
rockchip: rk3576: Add SPI Flash boot support

The bootsource ids reported by BootROM of RK3576 for SPI NOR and USB
differs slightly compared to prior SoCs:

- Booting from sfc0 (ROCK 4D) report the normal bootsource id 0x3.
- Booting from sfc1 M1 (NanoPi M5) report a new bootsource id 0x23.
- Booting from sfc1 M0 has not been tested (no board using this config).
- Booting from USB report a new bootsource id 0x81.

Add a RK3576 specific read_brom_bootsource_id() function to help decode
the new bootsource id values and the required boot_devices mapping of
sfc0 and sfc1 to help support booting from SPI flash on RK3576.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: rk3528: Implement read_brom_bootsource_id()
Jonas Karlman [Sun, 19 Oct 2025 15:47:17 +0000 (15:47 +0000)] 
rockchip: rk3528: Implement read_brom_bootsource_id()

The bootsource ids reported by BootROM of RK3528 for e.g. USB differs
compared to prior SoCs:

- Booting from USB report a new bootsource id 0x81.

Add a RK3528 specific read_brom_bootsource_id() function to help decode
this new bootsource id value to help support booting from USB on RK3528.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: spl: Add a read_brom_bootsource_id() helper
Jonas Karlman [Sun, 19 Oct 2025 15:47:16 +0000 (15:47 +0000)] 
rockchip: spl: Add a read_brom_bootsource_id() helper

The bootsource ids reported by BootROM of RK3528 and RK3576 for e.g.
SPI NOR and USB differs slightly compared to prior SoCs:

- Booting from sfc0 (ROCK 4D) report the normal bootsource id 0x3.
- Booting from sfc1 M1 (NanoPi M5) report a new bootsource id 0x23.
- Booting from sfc1 M0 has not been tested (no board using this config).
- Booting from USB report a new bootsource id 0x81 on RK3528 and RK3576.

Add a helper function to read the bootsource id. This helper function
will be used to translate the new values to the common BROM_BOOTSOURCE
enum values on RK3528 and RK3576.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agospi: rockchip_sfc: Support sclk_x2 version
Jon Lin [Sun, 19 Oct 2025 15:47:15 +0000 (15:47 +0000)] 
spi: rockchip_sfc: Support sclk_x2 version

SFC after version 8 supports dtr mode, so the IO is the binary output of
the controller clock.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: rk3528-radxa-e20c: Drop eMMC HS200 prop from board u-boot.dtsi
Jonas Karlman [Sun, 19 Oct 2025 11:13:54 +0000 (11:13 +0000)] 
rockchip: rk3528-radxa-e20c: Drop eMMC HS200 prop from board u-boot.dtsi

The commit f8cb3fde935e ("arm: dts: rockchip: Fix eMMC write on RK3528")
added a missing mmc-hs200-1_8v prop to boart u-boot.dtsi.

Remove this boart u-boot.dtsi mmc-hs200-1_8v prop now that the board dt
from dts/upstream after the v6.17-dts sync includes this prop.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agoarm: dts: rockchip: Include OTP in U-Boot pre-reloc phase for RK3326
Jonas Karlman [Sun, 31 Aug 2025 16:49:35 +0000 (16:49 +0000)] 
arm: dts: rockchip: Include OTP in U-Boot pre-reloc phase for RK3326

Update rk3326-u-boot.dtsi to include OTP in U-Boot pre-reloc phase for
checkboard() to be able to read information about the running SoC model
and variant from OTP and print it during boot:

  U-Boot 2025.07 (Jul 13 2025 - 10:07:16 +0000)

  Model: ODROID-GO Super
  SoC:   RK3326
  DRAM:  1 GiB (total 1022 MiB)

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: odroid-go2: Add myself as a reviewer
Jonas Karlman [Sun, 31 Aug 2025 16:49:34 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Add myself as a reviewer

I have the ORDOID-GO Super variant of this board. Add myself as a
reviewer to help review future patches targeting this device.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: odroid-go2: Enable more commands
Jonas Karlman [Sun, 31 Aug 2025 16:49:33 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Enable more commands

Enable the default commands and some more useful commands that can be
useful to determin the state of the board from U-Boot CLI.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: odroid-go2: Turn on the blue LED at boot
Jonas Karlman [Sun, 31 Aug 2025 16:49:32 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Turn on the blue LED at boot

Use default-state prop to ensure that the blue heartbeat LED turns on
at boot to inticate that U-Boot proper has been reached.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: odroid-go2: Enable RockUSB, button, LED and RNG support
Jonas Karlman [Sun, 31 Aug 2025 16:49:31 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Enable RockUSB, button, LED and RNG support

Enable Kconfig options to support RockUSB, buttons, LEDs and RNG
featured on the board or SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: odroid-go2: Use env from same storage FIT was loaded from
Jonas Karlman [Sun, 31 Aug 2025 16:49:30 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Use env from same storage FIT was loaded from

Change to dynamically select what storage media to use for the U-Boot
environment depending on from what storage media the FIT images was
loaded from, fall back to use env from nowhere.

  U-Boot SPL 2025.07 (Jul 13 2025 - 10:07:16 +0000)
  Trying to boot from MMC1
  ...
  Loading Environment from MMC... Reading from MMC(0)...

or

  U-Boot SPL 2025.07 (Jul 13 2025 - 10:07:16 +0000)
  Trying to boot from SPI
  ...
  Loading Environment from SPIFlash...

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
5 days agorockchip: odroid-go2: Select board FDT from FIT in SPL
Jonas Karlman [Sun, 31 Aug 2025 16:49:29 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Select board FDT from FIT in SPL

Include FDTs for all three board variants in the FIT image and adjust
the board selection code to use correct FDT in U-Boot proper.

E.g. use the odroid-go3 DT for a ODROID-GO Super device:

  U-Boot 2025.07 (Jul 13 2025 - 10:07:16 +0000)

  Model: ODROID-GO Super
  DRAM:  1 GiB (total 1022 MiB)
  PMIC:  RK817 (on=0x80, off=0x08)

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Add support for SPI flash boot
Jonas Karlman [Sun, 31 Aug 2025 16:49:28 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Add support for SPI flash boot

The ODROID GO2 devices come with onboard SPI flash, add support for
using the SPI flash.

The BootROM seem to expect the IDBlock at 64 KiB offset compared to the
typical 32 KiB offset from start of SPI flash used by other SoCs.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Use power off at power plug-in event
Jonas Karlman [Sun, 31 Aug 2025 16:49:27 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Use power off at power plug-in event

Include the RK817 PMIC in SPL and enable Kconfig options to power off
the handheld gaming device when it was powered on due to a power cable
plug-in event:

  DDR3, 333MHz
  BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB
  out
  Power Off due to plug-in event

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Include pinctrl for sdmmc, sfc and uart in SPL
Jonas Karlman [Sun, 31 Aug 2025 16:49:26 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Include pinctrl for sdmmc, sfc and uart in SPL

Include pinctrl nodes and props for sdmmc, sfc and uart in SPL to ensure
pins are configured according to the device tree.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Update Kconfig options for SPL
Jonas Karlman [Sun, 31 Aug 2025 16:49:25 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Update Kconfig options for SPL

Drop SPL_DRIVERS_MISC, it is not needed/used on these devices.

Enable SPL_FIT_SIGNATURE to ensure the integrity of the FIT images
that are loaded into memory.

Change SPL_MAX_SIZE to 256 KiB, similar to other SoCs where TF-A is
loaded at 0x40000 offset from start of DRAM.

Enable SPL_DM_SEQ_ALIAS to ensure device aliases are applied in SPL.

Drop use of SPL_TINY_MEMSET, there is plenty room for the normal memset.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Remove unsupported Kconfig options
Jonas Karlman [Sun, 31 Aug 2025 16:49:24 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Remove unsupported Kconfig options

The handheld gaming devices that this defconfig tagets does not contain
an Ethernet port, remove Ethernet related Kconfig options.

They also do not contain any pwm-regulator in their DTs, remove the
PWM regulator related Kconfig option.

Display/video is not supported in U-Boot, remove all display/video
related Kconfig options.

There is no real functional change expected with these options removed.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Move SoC common overrides into a SoC u-boot.dtsi
Jonas Karlman [Sun, 31 Aug 2025 16:49:23 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Move SoC common overrides into a SoC u-boot.dtsi

Add a new common rk3326-u-boot.dtsi and move the SoC common overrides
into it.

This should not contain any changes other than a possible reorder of
nodes and props.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Use appropriate bootph props
Jonas Karlman [Sun, 31 Aug 2025 16:49:22 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Use appropriate bootph props

GPIO devices are needed in U-Boot proper phase, sdmmc and sfc devices
are needed in SPL and pre-reloc phase.

Update bootph- props to match what boot phase devices are needed at.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Remove u-boot.dtsi props already defined
Jonas Karlman [Sun, 31 Aug 2025 16:49:21 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Remove u-boot.dtsi props already defined

DTs from dts/upstream already contain aliases for i2c, mmc and serial.

Remove the aliases and status=okay that are already defined in upstream
board or SoC DT.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Remove incorrect re-defined spi0 alias
Jonas Karlman [Sun, 31 Aug 2025 16:49:20 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Remove incorrect re-defined spi0 alias

The alias spi0 is incorrectly being re-defined in board u-boot.dtsi to
the SPI flash controller instead of the actual spi0 controller.

SPI flash support is currently not working on odroid-go2 due to missing
Kconfig options and other required device tree changes.

Remove the re-defined alias for spi0 to allow use of the real spi0,
proper SPI flash support is introduced in a later patch.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agorockchip: odroid-go2: Remove cru assigned-clocks override
Jonas Karlman [Sun, 31 Aug 2025 16:49:19 +0000 (16:49 +0000)] 
rockchip: odroid-go2: Remove cru assigned-clocks override

Remove the cru assigned-clocks override now that SCLK_GPU is supported
by the clock driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 days agoclk: px30: Allow use of GPU and WIFI_PMU in assigned-clocks
Jonas Karlman [Sun, 31 Aug 2025 16:49:18 +0000 (16:49 +0000)] 
clk: px30: Allow use of GPU and WIFI_PMU in assigned-clocks

Add dummy implementation of set_rate for SCLK_GPU and SCLK_WIFI_PMU to
allow use of dts/upstream assigned-clocks in cru and pmucru nodes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 days agoMerge tag 'u-boot-ufs-20251029' of https://source.denx.de/u-boot/custodians/u-boot-ufs
Tom Rini [Wed, 29 Oct 2025 13:41:43 +0000 (07:41 -0600)] 
Merge tag 'u-boot-ufs-20251029' of https://source.denx.de/u-boot/custodians/u-boot-ufs

- ti-j721e: Correct error detection
- Fix wrong bitfield usage for Data Direction in Transfer Request
- Add support for sending UFS attribute requests
- Add bRefClkFreq attribute setting
- Add ufshcd_dme_enable() and ufshcd_dme_reset()
- unipro: Add PA_SCRAMBLING property
- Cleanups:
 - Keep Makefile and Kconfig list sorted
 - Fold ufs-uclass into ufs and rename to ufs-uclass
 - amd-versal2: Fix indent
 - Call ufs_scsi_bind() from uclass .post_bind
 - renesas: Update Kconfig entry help text
- New plaforms:
 - Rockchip UFS
 - Mediatek UFS
 - Renesas R-Car X5H UFS

9 days agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Wed, 29 Oct 2025 13:40:40 +0000 (07:40 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv

CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/28051

- riscv: dts: starfive: cherry-pick jh7110 updates from v6.18-rc1-dts
- riscv: Add upstream boards Milk-V Mars CM and Mars CM Lite
- timer: sifive_clint: Add GHRTv2 compaible string

9 days agoMerge branch 'master' of git://source.denx.de/u-boot-usb
Tom Rini [Wed, 29 Oct 2025 01:43:19 +0000 (19:43 -0600)] 
Merge branch 'master' of git://source.denx.de/u-boot-usb

- Fix assorted issues found by Smatch

9 days agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Wed, 29 Oct 2025 01:43:02 +0000 (19:43 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

9 days agoMAINTAINERS: update my email address
Raymond Mao [Tue, 28 Oct 2025 20:26:17 +0000 (13:26 -0700)] 
MAINTAINERS: update my email address

Update my email address in the maintainers list.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
10 days agoRevert "clk: Return value calculated by ERR_PTR"
Tom Rini [Tue, 28 Oct 2025 19:24:44 +0000 (13:24 -0600)] 
Revert "clk: Return value calculated by ERR_PTR"

This reverts commit 644b4650ee57c429bede77f44752cc867dac0e00.

While the intention of the above commit is correct, it leads to test
failures in CI that need to be addressed at the same time.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agospi: altera_spi: Add missing <time.h> to altera_spi.c
Tom Rini [Mon, 4 Aug 2025 21:57:18 +0000 (15:57 -0600)] 
spi: altera_spi: Add missing <time.h> to altera_spi.c

This driver references the get_timer macro while relying on an
indirection inclusion of <time.h>. Add the missing include directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agospi: Tighten some spi driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:57:17 +0000 (15:57 -0600)] 
spi: Tighten some spi driver dependencies

A few spi drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agoclk: Tighten some clock driver dependencies
Tom Rini [Fri, 18 Jul 2025 01:14:18 +0000 (19:14 -0600)] 
clk: Tighten some clock driver dependencies

A few clock drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agox86: Rename arch/x86/include/asm/pnp_def.h to include/pnp_def.h
Tom Rini [Fri, 11 Jul 2025 15:20:19 +0000 (09:20 -0600)] 
x86: Rename arch/x86/include/asm/pnp_def.h to include/pnp_def.h

There is nothing x86-centric in this include file, and moving it will
allow for some drivers to be compile-tested on sandbox.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agomtd: nvmxip: Make use of LBAF for printing lbaint_t
Tom Rini [Fri, 11 Jul 2025 15:16:01 +0000 (09:16 -0600)] 
mtd: nvmxip: Make use of LBAF for printing lbaint_t

When printing the contents of an lbaint_t variable we need to use LBAF
to print it in order to get the correct format type depending on 32 or
64bit-ness.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agomtd: spi: sf_dataflash.c: Make use of 'z' for printing size_t
Tom Rini [Fri, 11 Jul 2025 15:15:57 +0000 (09:15 -0600)] 
mtd: spi: sf_dataflash.c: Make use of 'z' for printing size_t

When printing the contents of an size_t variable we need to use z prefix
to the format character in order to get the correct format type
depending on 32 or 64bit-ness.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agomtd: Correct dependency on SYS_FLASH_CHECKSUM
Tom Rini [Fri, 4 Jul 2025 21:45:56 +0000 (15:45 -0600)] 
mtd: Correct dependency on SYS_FLASH_CHECKSUM

This feature requires that CFG_SYS_FLASH_BASE is defined and this in
turn is only done in the case of FLASH_CFI_DRIVER && !CFI_FLASH or in
other words, when DM_MTD is not enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agomtd: Add function prototype for mtd_read_oob_bf(...)
Tom Rini [Wed, 2 Jul 2025 01:06:09 +0000 (19:06 -0600)] 
mtd: Add function prototype for mtd_read_oob_bf(...)

The function mtd_read_oob_bf is called by cmd/nand.c but does not have a
prototype in any header. Add this to include/linux/mtd/mtd.h as that is
the most logical place currently.

Fixes: 1fac57720719 ("nand: Add a watch command")
Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agoclk: Add missing <dm/device.h> to include/clk.h
Tom Rini [Wed, 2 Jul 2025 01:05:33 +0000 (19:05 -0600)] 
clk: Add missing <dm/device.h> to include/clk.h

In this header we make direct references to some dm/device.h functions
while not including the header directly. Add the missing include.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agomtd: nand: Prevent dereference of NULL pointer
Andrew Goodbody [Tue, 1 Jul 2025 16:12:44 +0000 (17:12 +0100)] 
mtd: nand: Prevent dereference of NULL pointer

In nand_wait_ready there is a loop that includes a NULL check for
chip->dev_ready before it is dereferenced. Use a NULL check once the
loop is exited as well to cover the case where it exits due to a timeout
and it is therefore not known if chip->dev_ready is NULL or not.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
10 days agocmd: mtd: Prevent use of uninitialised variable
Andrew Goodbody [Thu, 26 Jun 2025 10:49:32 +0000 (11:49 +0100)] 
cmd: mtd: Prevent use of uninitialised variable

ret maybe used uninitialised in some cases so instead
initialise it first to prevent this.

This issue was found by Smatch.

Fixes: 9671243e8d10 (cmd: mtd: Use the subcmd infrastructure to declare mtd sub-commands)
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
10 days agoARM: renesas: Drop 'imply MULTI_DTB_FIT_USER_DEFINED_AREA' lines
Tom Rini [Sat, 15 Mar 2025 01:29:11 +0000 (19:29 -0600)] 
ARM: renesas: Drop 'imply MULTI_DTB_FIT_USER_DEFINED_AREA' lines

As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. This is why for all of the boards
which had an 'imply MULTI_DTB_FIT_USER_DEFINED_AREA' they then also had
to set the option in the defconfig. Drop the imply lines here.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 days agoufs: Add UFS driver for Renesas R-Car X5H
Tuyen Dang [Tue, 28 Oct 2025 14:22:27 +0000 (15:22 +0100)] 
ufs: Add UFS driver for Renesas R-Car X5H

Add UFS driver for UFS controller present on Renesas R-Car X5H R8A78000.
The controller uses different initialization code compared to previous
generation UFS controller present in Renesas R-Car S4 R8A779F0, and the
majority of the driver is the initialization, hence a new driver.

[Marek: Clean driver up, add SCMI reset handling, use read_poll_timeout(),
        pass error values out of ufs_renesas_pre_init(), change the
compatible string to "renesas,r8a78000-ufs" to align with
previous generation "renesas,r8a779f0-ufs"]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Tuyen Dang <tuyen.dang.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251028142335.18125-7-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: renesas: Update Kconfig entry help text
Marek Vasut [Tue, 28 Oct 2025 14:22:26 +0000 (15:22 +0100)] 
ufs: renesas: Update Kconfig entry help text

The current Renesas UFS driver contains initialization code
that is specific to R-Car S4 R8A779F0. The upcoming R-Car X5H
initialization code is different and contained in a separate
driver. Update the Kconfig entry help text for the current
driver to help discern it from the X5H driver. No functional
change.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-6-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: Call ufs_scsi_bind() from uclass .post_bind
Marek Vasut [Tue, 28 Oct 2025 14:22:25 +0000 (15:22 +0100)] 
ufs: Call ufs_scsi_bind() from uclass .post_bind

Instead of duplicating the ufs_scsi_bind() call in every driver,
call it from UFS uclass .post_bind callback for every driver in
one place. While doing so, inline ufs_scsi_bind() directly into
ufs_post_bind() as trivial device_bind_driver() call.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-5-marek.vasut+renesas@mailbox.org
[narmstrong: also updated the rockchip and mediatek drivers]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agospi: spi-uclass: Use unwind goto
Andrew Goodbody [Mon, 6 Oct 2025 15:09:25 +0000 (16:09 +0100)] 
spi: spi-uclass: Use unwind goto

In _spi_get_bus_and_cs the check for stacked parallel support needing
multiple chip select support does a direct return on error. Instead it
should set the error code in ret and then use the unwind goto.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agospi: fspi: Logical or used instead of logical and
Andrew Goodbody [Tue, 12 Aug 2025 16:42:59 +0000 (17:42 +0100)] 
spi: fspi: Logical or used instead of logical and

In erratum_err050568 the test for apllicability uses logical or to check
multiple chip IDs but this means the test will always evaluate to true
as at least 1 term will always be true. Logical and should have been
used so that the expression evaluates to true if all terms are true
which would mean that no chip ID of interest was in use.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agospi: npcm-fiu: Remove repeated test
Andrew Goodbody [Tue, 12 Aug 2025 16:29:07 +0000 (17:29 +0100)] 
spi: npcm-fiu: Remove repeated test

In npcm_fiu_uma_operation to enter a code block nbytes must be non-zero.
So testing for nbytes inside the code block is redundant and can be
removed.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agospi: ich: Do not use uninitialised value
Andrew Goodbody [Tue, 12 Aug 2025 13:31:16 +0000 (14:31 +0100)] 
spi: ich: Do not use uninitialised value

In ich_spi_exec_op_swseq the variable with_address is only assigned a
value in the case of op->addr.nbytes being non-zero.
Initialise with_address to zero. so that it is always valid.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agoMerge patch series "spi: cadence_qspi: Fix Smatch reported issues"
Tom Rini [Tue, 28 Oct 2025 16:32:26 +0000 (10:32 -0600)] 
Merge patch series "spi: cadence_qspi: Fix Smatch reported issues"

Andrew Goodbody <andrew.goodbody@linaro.org> says:

Smatch reported issues with an off by 1 error in a test for a timeout
and also an error exit that did not set an error code.

Link: https://lore.kernel.org/r/20250812-cadence_qspi-v1-0-0d693d810145@linaro.org
10 days agoclk: Return value calculated by ERR_PTR
Andrew Goodbody [Thu, 3 Jul 2025 14:40:46 +0000 (15:40 +0100)] 
clk: Return value calculated by ERR_PTR

In clk_set_default_get_by_id ret is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
10 days agoMerge patch series "clk: versaclock: Fix two issues found by Smatch"
Tom Rini [Tue, 28 Oct 2025 15:59:55 +0000 (09:59 -0600)] 
Merge patch series "clk: versaclock: Fix two issues found by Smatch"

Andrew Goodbody <andrew.goodbody@linaro.org> says:

Should return value calculated by ERR_PTR as calling code attempts to
check for it.
Also do not dereference a pointer that could be an error pointer before
checking it with IS_ERR.

Link: https://lore.kernel.org/r/20250723-clk_versaclock-v1-0-9d70f2530871@linaro.org
10 days agommc: owl_mmc: Do not dereference data before NULL check
Andrew Goodbody [Thu, 31 Jul 2025 11:11:47 +0000 (12:11 +0100)] 
mmc: owl_mmc: Do not dereference data before NULL check

In owl_mmc_prepare_data there is a NULL check for the pointer data but
it happens after data has already been dereferenced. Refactor the code
so that the NULL check happens before any code dereferences data.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agogpio: intel_gpio: Initialise or0 and or1
Andrew Goodbody [Fri, 25 Jul 2025 12:04:26 +0000 (13:04 +0100)] 
gpio: intel_gpio: Initialise or0 and or1

In intel_gpio_set_flags the two variables or0 and or1 may be used
uninitialised. Correct this by setting initial values in the
declaration.
Also there is no need to use '|=' when the initial value is 0 and there
is only one assignment performed to each variable so just use '='
instead.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agoufs: amd-versal2: Fix indent
Marek Vasut [Tue, 28 Oct 2025 14:22:24 +0000 (15:22 +0100)] 
ufs: amd-versal2: Fix indent

Fix indent, use tabs. No functional change.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-4-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: core: Rename ufs.c to ufs-uclass.c
Marek Vasut [Tue, 28 Oct 2025 14:22:23 +0000 (15:22 +0100)] 
ufs: core: Rename ufs.c to ufs-uclass.c

Previous commit folded existing ufs-uclass.c into ufs.c ,
which produced a nice and reviewable change , but also broke
the UCLASS should be in *-uclass.c pattern. Fix it. Keep the
change separate from the previous one to make this reviewable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: core: Fold ufs-uclass into ufs
Marek Vasut [Tue, 28 Oct 2025 14:22:22 +0000 (15:22 +0100)] 
ufs: core: Fold ufs-uclass into ufs

Move the few lines of ufs-uclass.c into ufs.c and remove the
ufs-uclass.c . No functional change.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: core: Keep Makefile and Kconfig list sorted
Marek Vasut [Tue, 28 Oct 2025 14:22:21 +0000 (15:22 +0100)] 
ufs: core: Keep Makefile and Kconfig list sorted

Sort the Makefile and Kconfig lists alphabetically. No functional change.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agospi: cadence_qspi: Do not return unset error code
Andrew Goodbody [Tue, 12 Aug 2025 11:34:39 +0000 (12:34 +0100)] 
spi: cadence_qspi: Do not return unset error code

In spi_calibration if the low range fails to calibrate then the code
attempted to return the variable err but this has not been set in this
case. Instead just return -EIO.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agospi: cadence_qspi: Off by 1 in test for timeout
Andrew Goodbody [Tue, 12 Aug 2025 11:34:38 +0000 (12:34 +0100)] 
spi: cadence_qspi: Off by 1 in test for timeout

In cadence_qspi_apb_exec_flash_cmd the test for a timeout uses a
post-decrement on the variable retry which will result in a value of -1
after the loop exit, or it would if the variable were signed.
To fix this make retry a signed variable and test its value for being
equal to -1.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agoMAINTAINERS: Add UFS to MediaTek section
Igor Belwon [Sat, 11 Oct 2025 19:10:07 +0000 (21:10 +0200)] 
MAINTAINERS: Add UFS to MediaTek section

Add the UFS driver files to the ARM MediaTek section in MAINTAINERS.
Add myself as its maintainer.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://patch.msgid.link/20251011-mtk-ufs-uboot-v1-4-a05f991ee150@mentallysanemainliners.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: Add MediaTek UFS driver
Igor Belwon [Sat, 11 Oct 2025 19:10:06 +0000 (21:10 +0200)] 
ufs: Add MediaTek UFS driver

Add the UFS driver for MediaTek platforms.

Loosely based on the Linux driver, this UFS driver can successfully get a
link and R/W access to the UFS chip on the MediaTek MT6878 mobile SoC,
when U-Boot is running as lk, or as the kernel (Secure world access is
not tested)

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://patch.msgid.link/20251011-mtk-ufs-uboot-v1-3-a05f991ee150@mentallysanemainliners.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: unipro: Add PA_SCRAMBLING property
Igor Belwon [Sat, 11 Oct 2025 19:10:05 +0000 (21:10 +0200)] 
ufs: unipro: Add PA_SCRAMBLING property

This property is required for proper I/O access on the MediaTek MT6878
UFS controller, and is part of UniPro specifications.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://patch.msgid.link/20251011-mtk-ufs-uboot-v1-2-a05f991ee150@mentallysanemainliners.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: rockchip: Add initial support
Shawn Lin [Mon, 20 Oct 2025 08:16:22 +0000 (16:16 +0800)] 
ufs: rockchip: Add initial support

This patch adds initial support for UFS controller on Rockchip
platforms.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1760948182-128561-2-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: core: Add ufshcd_dme_enable() and ufshcd_dme_reset()
Shawn Lin [Mon, 20 Oct 2025 08:16:21 +0000 (16:16 +0800)] 
ufs: core: Add ufshcd_dme_enable() and ufshcd_dme_reset()

In order for host drivers to use.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1760948182-128561-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: Add bRefClkFreq attribute setting
Jared McArthur [Fri, 10 Oct 2025 19:55:56 +0000 (14:55 -0500)] 
ufs: Add bRefClkFreq attribute setting

A UFS device needs its bRefClkFreq attribute set to the correct value
before switching to high speed. If bRefClkFreq is set to the wrong
value, all transactions after the power mode change will fail.

The bRefClkFreq depends on the host controller and the device.
Query the device's current bRefClkFreq and compare with the ref_clk
specified in the device-tree. If the two differ, set the bRefClkFreq
to the device-tree's ref_clk frequency.

Taken from Linux kernel v6.17 (drivers/ufs/core/ufshcd.c and
include/ufs/ufs.h) and ported to U-Boot.

Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://patch.msgid.link/20251010195556.1772611-3-j-mcarthur@ti.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: Add support for sending UFS attribute requests
Jared McArthur [Fri, 10 Oct 2025 19:55:55 +0000 (14:55 -0500)] 
ufs: Add support for sending UFS attribute requests

Some UFS attributes must be set before a UFS device is initialized.
Add ufshcd_query_attr and ufshcd_query_attr_retry to send UFS
attribute requests.

Taken from Linux Kernel v6.17 (drivers/ufs/core/ufshcd.c) and ported
to U-Boot.

Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://patch.msgid.link/20251010195556.1772611-2-j-mcarthur@ti.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: Fix wrong bitfield usage for Data Direction in Transfer Request
Kunihiko Hayashi [Fri, 10 Oct 2025 02:45:57 +0000 (11:45 +0900)] 
ufs: Fix wrong bitfield usage for Data Direction in Transfer Request

Commit d232d7fdbf6f ("ufs: core: sync ufshci.h with Linux v6.12") updated
the Data Direction values from bitmask values to simple enumerations.

Before:
    enum {
        UTP_NO_DATA_TRANSFER    = 0x00000000,
        UTP_HOST_TO_DEVICE      = 0x02000000,
        UTP_DEVICE_TO_HOST      = 0x04000000,
    };

Updated:
    enum utp_data_direction {
        UTP_NO_DATA_TRANSFER    = 0,
        UTP_HOST_TO_DEVICE      = 1,
        UTP_DEVICE_TO_HOST      = 2,
    };

However, the U-Boot code still uses these values directly without shifting,
and resulting in wrong bitfield placement in the Transfer Request
Descriptor.

This fixes the issue by applying the necessary shift to align the value.

Fixes: d232d7fdbf6f ("ufs: core: sync ufshci.h with Linux v6.12")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251010024557.673787-1-hayashi.kunihiko@socionext.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoufs: ti-j721e: Correct error detection
Andrew Goodbody [Tue, 7 Oct 2025 11:42:12 +0000 (12:42 +0100)] 
ufs: ti-j721e: Correct error detection

In ti_j721e_ufs_probe there is a call to clk_get_rate but the code after
that attempts to detect an error from that call incorrectly uses
IS_ERR_VALUE.  Instead the test should just be for regular error codes.
The call returns an unsigned long so that needs to be cast to a signed type
first of all.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Link: https://patch.msgid.link/20251007-ufs_ti-v2-1-501f575b6947@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 days agoclk: versaclock: Use IS_ERR check before dereference
Andrew Goodbody [Wed, 23 Jul 2025 15:54:08 +0000 (16:54 +0100)] 
clk: versaclock: Use IS_ERR check before dereference

In versaclock_probe vc5->pin_xin may be an error pointer so need to
check with IS_ERR before attempting to dereference it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agoclk: versaclock: return value calculated by ERR_PTR
Andrew Goodbody [Wed, 23 Jul 2025 15:54:07 +0000 (16:54 +0100)] 
clk: versaclock: return value calculated by ERR_PTR

In versaclock_get_name -ENOMEM is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agousb: musb-new: Cannot test unsigned member to be negative
Andrew Goodbody [Tue, 30 Sep 2025 15:52:24 +0000 (16:52 +0100)] 
usb: musb-new: Cannot test unsigned member to be negative

You cannot test an unsigned member of a struct for being negative, the
test will always fail. Instead assign the return value of
fdtdec_get_int, which returns an int, to a temporary variable declared
as an int, so that it can be tested for being negative before being
assigned to the unsigned struct member.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agousb: musb-new: Limit check array index before use
Andrew Goodbody [Tue, 30 Sep 2025 15:52:23 +0000 (16:52 +0100)] 
usb: musb-new: Limit check array index before use

epnum is used as an index into an array. The limit check for this index
should be performed before using it to access an element in the array to
prevent possible bounds overrun.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
10 days agousb: musb-new: Null check before dereference
Andrew Goodbody [Tue, 30 Sep 2025 15:52:22 +0000 (16:52 +0100)] 
usb: musb-new: Null check before dereference

A null check for the variable 'data' was introduced before dereferencing
it for set_phy_power but other uses were not so protected. Add the null
check for other dereferences of 'data'.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agousb: xhci: exynos: variable node should be signed
Andrew Goodbody [Tue, 30 Sep 2025 10:34:44 +0000 (11:34 +0100)] 
usb: xhci: exynos: variable node should be signed

The variable node is assigned to the return value of a function that
returns an int. It is tested for being negative and then passed as an
argument to a function that takes an int. So 'node' should not be
declared as unsigned. Correct it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agousb: ulpi: Incorrect operator used
Andrew Goodbody [Tue, 30 Sep 2025 16:06:44 +0000 (17:06 +0100)] 
usb: ulpi: Incorrect operator used

Combining two bits into a mask to be used so that the same write code
can be used to set or reset bits in a register clearly needs to use the
binary 'or' operator, not the binary 'and'. Fix it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agousb: ohci-hcd: Null check lurb_priv before dereference
Andrew Goodbody [Tue, 30 Sep 2025 09:56:02 +0000 (10:56 +0100)] 
usb: ohci-hcd: Null check lurb_priv before dereference

When a variable needs a null check before it is dreferenced ensure that
this is done even in the case of assignment on declaration. This was not
happening for lurb_priv so correct it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agousb: fsl-dt-fixup: Return an error code on error
Andrew Goodbody [Thu, 25 Sep 2025 11:56:44 +0000 (12:56 +0100)] 
usb: fsl-dt-fixup: Return an error code on error

fsl_fdt_fixup_usb_erratum uses strcmp to detect an error but then
returns 'err' without it being set to an error. Calling code may not
detect that an error occurred leading to a silent failure. Instead just
return -EINVAL.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
10 days agousb: ehci: exynos: variable node should be signed
Andrew Goodbody [Mon, 29 Sep 2025 16:53:11 +0000 (17:53 +0100)] 
usb: ehci: exynos: variable node should be signed

THe variable node is assigned to the return value of a function that
returns an int. It is tested for being negative and then passed as an
argument to a function that takes an int. So 'node' should not be
declared as unsigned. Correct it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
10 days agoboard: starfive: Add initial Milk-V Mars CM and Mars CM Lite user documentation
E Shattow [Tue, 21 Oct 2025 23:10:00 +0000 (16:10 -0700)] 
board: starfive: Add initial Milk-V Mars CM and Mars CM Lite user documentation

Add initial board docs for Milk-V Mars CM (eMMC) and Milk-V Mars CM Lite
(SD Card) to the visionfive2 board target.

Signed-off-by: E Shattow <e@freeshell.de>
10 days agoconfigs: starfive: Add Milk-V Mars CM and Mars CM Lite to visionfive2
E Shattow [Tue, 21 Oct 2025 23:09:59 +0000 (16:09 -0700)] 
configs: starfive: Add Milk-V Mars CM and Mars CM Lite to visionfive2

Add Milk-V Mars CM and Mars CM Lite to visionfive2.

These boards were previously supported and then removed in the transition
to OF_UPSTREAM. The dts have landed in the for-next queue so let's add the
boards again.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
10 days agoboard: starfive: visionfive2: Add Milk-V Mars CM and Mars CM Lite selection by product_id
E Shattow [Tue, 21 Oct 2025 23:09:58 +0000 (16:09 -0700)] 
board: starfive: visionfive2: Add Milk-V Mars CM and Mars CM Lite selection by product_id

Add identifier for Milk-V Mars CM to dts selection callback in SPL, and
to fdtfile environment variable default value selection in payload.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
10 days agoriscv: dts: starfive: prune redundant jh7110 overrides
E Shattow [Tue, 21 Oct 2025 20:54:00 +0000 (13:54 -0700)] 
riscv: dts: starfive: prune redundant jh7110 overrides

Prune overrides of upstream jh7110.dtsi now that the required nodes are
available through the devicetree-rebasing subtree.

Signed-off-by: E Shattow <e@freeshell.de>