Michal Simek [Tue, 9 Sep 2014 07:43:50 +0000 (09:43 +0200)]
zynqmp: Do not run Linux SMP on more then 2 cpus on QEMU
Limit number of cpus in the kernel running on QEMU
to 2 to ensure that stalls are not reported by the kernel.
ZynqMP QEMU is single-threaded and it runs the VCPUs
in round-robin. It takes longer between the CPUs get
to run when more VCPUs are used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 9 Sep 2014 12:51:15 +0000 (14:51 +0200)]
mmc: zynq: Use proper size
Error log:
aarch64: + xilinx_zynqmp
+/home/monstr/data/disk/zynqmp/master/.bm-work/00/drivers/mmc/zynq_sdhci.c:
In function ‘zynq_sdhci_init’:
+/home/monstr/data/disk/zynqmp/master/.bm-work/00/drivers/mmc/zynq_sdhci.c:28:17:
warning: cast to pointer from integer of different size
[-Wint-to-pointer-cast]
+ host->ioaddr = (void *)regbase;
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
sf: Set QUAD enable of upper flash in Dual Stacked
Sets the QUAD enable bit for upper flash incase of
dual stacked mode.
This fixes the issue of where the quad enable bit
of the upperflash was not set and hence not able
to access the upperflash using quad commands in
Dual stacked mode.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
sf: Fix the remain_len calculation in Dual stacked
The bank_sel should be increased by total banks in first
chip, if accessing the second chip in Dual stacked mode.
This fixes the wrong remain_len calculation if two 16MB
chips connected in Dual stacked and accessing the second
chip.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Correct the bank selection issue incase of Dual stacked mode.
This fix corrects the wrong bank selection if banks are accessed
as below.
1. Access the bank2 in upper flash.
2. Access the bank1 in lower flash.
3. Now access the bank1 in upper flash.
But here in the step3, the present code was accessing the bank2 in
upper flash not bank1. This was because the code thinks the bank1
was already selected as part of step2 but it was not taking care of
upper or lower flash.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 5 Sep 2014 11:04:48 +0000 (13:04 +0200)]
zynqmp: Setup proper frequence for ep108
When u-boot runs standalone proper frequency to cntfrq_el0
in EL3 has to be setup. When u-boot runs from EL2/EL1
(from ATF) cntfrq_el0 is already setup by ATF or different
firmware.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 21 Jul 2014 11:28:12 +0000 (13:28 +0200)]
zynqmp: Use Image format instead of image.ub
Using Image instead of image.ub is better for now
because handling around image.ub is not 100% fixed
in mainline u-boot and also it takes ages to
boot it on ep108.
Moving netboot internals to jtagboot for experimental use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Mon, 5 May 2014 15:26:19 +0000 (11:26 -0400)]
cmd_bootm.c: Add 'booti' for ARM64 Linux kernel Images
The default format for arm64 Linux kernels is the "Image" format,
described in Documentation/arm64/booting.txt. This, along with an
optional gzip compression on top is all that is generated by default.
The Image format has a magic number within the header for verification,
a text_offset where the Image must be run from and reserved fields.
This does not support automatic detection of a gzip compressed image.
Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynqmp: gem: GEM changes to make it work on ep108 RTL 3.1
Following changes made to make it work on Remus A53
-Set the data bus width to 64-bit AMBA Databus width
in config register
-Set Tx and Rx Enable bits before sending packet out.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Changes to bring up on ep108 A53.
ARM global timer is not working that's why TTC timer
is used instead.
Fixing GIC address and GIC version to fit RTL 3.1.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Pavel Machek [Sun, 13 Jul 2014 11:10:45 +0000 (13:10 +0200)]
socfpga: timer actually counts down
Timer on cyclone5 actually counts down. It took me a while to figure
out, as timer counting in wrong direction actually _can_ be used, it
just appears to tick at extremely high frequency in u-boot.
boards.cfg: keep it sorted filling the board field
The boards.cfg file has allowed to use "-" for the board (= 6th) field
if the board name is the same as the 7th field.
But I notice one problem.
Because tools/reformat.py sorts the lines in the simple alphabetical
order (= the order of character code), some entries for the same board
are not lined up together.
For example, "bf527-ezkit" and "bf527-ezkit-v2" share the same board.
But they are located separately because "bf527-ezkit" fills the board
field with "-" whereas "bf527-ezkit-v2" specifies it explicitely.
The similar things can be seen:
- between "trizepsive" and "polaris"
- between "RRvision" and "RRvision_LCD"
- between "korat" and "korat_perm"
- between "lwmon5" and "lcd4_lwmon5"
This commit was generated by the following command:
Eric Nelson [Wed, 9 Jul 2014 19:27:29 +0000 (12:27 -0700)]
i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10
The pad settings for DISP0_DATA02 and DISP0_DAT10 were not
set in the same way as DISP0_DAT00-23, causing much flicker
in parallel RGB displays on Dual-Lite and Solo processors.
These settings now match the i.MX6 Dual and Quad core versions.
Note that this fixes a regression in commit b47abc3 and that
this is the second time we've had a regression on these two
pads (See commit e654ddf).
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Michal Simek [Wed, 9 Jul 2014 14:10:49 +0000 (16:10 +0200)]
doc: Add zynq fragment to git-mailrc file
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Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fabio Estevam [Fri, 13 Jun 2014 04:42:37 +0000 (01:42 -0300)]
mx6: soc: Update the comments of set_ldo_voltage()
Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces
set_ldo_voltage() function that can be used to set the voltages
of any of the three LDO regulators controlled by the PMU_REG_CORE register.
Prior to this commit there was a single set_vddsoc() which only configured the
VDDSOC regulator.
Update the comments to align with the new set_ldo_voltage() implementation.
Marek Vasut [Thu, 26 Jun 2014 09:01:30 +0000 (11:01 +0200)]
ARM: m53evk: add needed commands and options
- "env ask", "env grep" and "setexpr" are needed for commissioning
- add support for ext4 file systems
- adjust default environment to use ext4 commands
- add write support for (V)FAT and EXT4
- add bitmap and splashscreen support
- print timestamp information for images
Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Thu, 26 Jun 2014 09:01:27 +0000 (11:01 +0200)]
ARM: m28evk: add needed commands and options
- "env ask", "env grep" and "setexpr" are needed for commissioning
- add support for ext4 file systems
- adjust default environment to use ext4 commands
- add write support for (V)FAT and EXT4
- add bitmap and splashscreen support
- print timestamp information for images
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Tyler Baker [Mon, 23 Jun 2014 18:11:29 +0000 (11:11 -0700)]
TI:omap3: enable CONFIG_CMD_DHCP for omap3_beagle
The following patch re-enables the dhcp functionality on omap3_beagle.
It was removed with df4dbb5df6ab1c1d27b3fd4acbaad69b47095daf when
omap3_beagle was converted to use ti_omap3_common.h. I have tested
beagleboard and beagleboard-xm with this patch and confirmed dhcp is
working.
Commit "2842c1c fit: add sha256 support" badly increased
memory footprint, so some of our boards did not build anymore.
Since monitor base must not be changed I removed some commands
to save memory.
Maybe making sha256 optional for fit would be an option for
the future since it really has some beefy footprint.
Vasili Galka [Mon, 30 Jun 2014 10:00:12 +0000 (13:00 +0300)]
blackfin: Add more dcache functions
Add invalidate_dcache_range() and flush_dcache_range() for the blackfin
architecture. Such functions already exist on this arch with different
names, so just forward the call.
This fixes the build of bf609-ezkit board as it uses
drivers/net/designware.c which requires the above functions.
Vasili Galka [Mon, 30 Jun 2014 09:59:41 +0000 (12:59 +0300)]
m68k: Fix incorrect memory access on M5235
The csarX and cscrX registers in the fbcs_t struct are 16-bit for
CONFIG_M5235 and 32-bit wide otherwise. The code in cpu_init.c
accessed them always as 32-bit, effectively creating a wrong memory
access on M5235. Fixed that by choosing out_be16/out_be32 depending
on whether CONFIG_M5235 is defined or not.
Cc: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
The option can be used to save the environment in spi flash.
Implementation code is already exist in command/env_sf.c. But
the documentation is missing.
This patch add the details for this option to the README file.
Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Wu, Josh [Tue, 24 Jun 2014 09:31:02 +0000 (17:31 +0800)]
env_fat: use get_device_and_partition() during env save and load
Use get_device_and_partition() is better since:
1. It will call the device initialize function internally. So we can
remove the mmc intialization code to save many lines.
2. It is used by fatls/fatload/fatwrite. So saveenv & load env should
use it too.
3. It can parse the "D:P", "D", "D:", "D:auto" string to get correct
device and partition information by run-time.
Also we remove the FAT_ENV_DEVICE and FAT_ENV_PART. We use a string:
FAT_ENV_DEVICE_AND_PART.
For at91sam9m10g45ek, it is "0". That means use device 0 and if:
a)device 0 has no partition table, use the whole device as a FAT file
system.
b)device 0 has partittion table, use the partition #1.
Refer to the commit: 10a37fd7a4 for details of device & partition string.
Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
am43xx: Update EMIF DDR3 Configuration for AM43x GP
* Boot failures have been discovered due to a combination of routing issues and
non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
different timings are required for alpha, beta and production boards.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
Felipe Balbi [Thu, 26 Jun 2014 21:38:05 +0000 (16:38 -0500)]
board: ti: dra7xx: add mux data for UART3
J6 EVM can be built with UART3 as console, but currently
there's nothing muxing UART3 correctly. Likely this only
works because, based on commit log, author was only testing
with UART3 boot and - I assume - ROM code leave UART3 correctly
muxed in that case.
If we want to boot from MMC and still use UART3 as console,
then we need to mux those signals correctly.
Masahiro Yamada [Tue, 24 Jun 2014 13:10:52 +0000 (22:10 +0900)]
build: define CPU only when arch/${ARCH}/cpu/${CPU} exists
The directory arch/${ARCH}/cpu/${CPU} does not exist
in avr32, blackfin, microblaze, nios2, openrisc, sandbox, x86.
These architectures have only one CPU type.
Defining CPU should not be required for such architectures.
This commit allows cpu field (= the 3rd field of boards.cfg)
to be kept blank.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sonic Zhang <sonic.zhang@analog.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Jeroen Hofstee [Wed, 18 Jun 2014 19:22:35 +0000 (21:22 +0200)]
ARM: emif4: wait for CM_DLL_READYST to be set
The code intends for the CM_DLL_READYST to be set, but
actually polls till any bit is set since the logical
AND is used instead of the bitwise one is used. Fix it.