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thirdparty/u-boot.git
8 years agozynq: cse_qspi: Move config SYS_NO_FLASH to defconfig
Siva Durga Prasad Paladugu [Thu, 8 Jun 2017 06:03:37 +0000 (11:33 +0530)] 
zynq: cse_qspi: Move config SYS_NO_FLASH to defconfig

Define CONFIG_SYS_NO_FLASH through defconfig as it was
done same for all other zynq targets.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynq: zynq_cse: Dont define SDRAM base and size in .h
Siva Durga Prasad Paladugu [Thu, 8 Jun 2017 06:03:36 +0000 (11:33 +0530)] 
zynq: zynq_cse: Dont define SDRAM base and size in .h

Dont define SDRAM base address and size in .h file as it
can get same from dts

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agolib: fdtdec: Fill initial ram top with DDR start value from dt
Siva Durga Prasad Paladugu [Thu, 8 Jun 2017 06:03:35 +0000 (11:33 +0530)] 
lib: fdtdec: Fill initial ram top with DDR start value from dt

Fill initial ram top with DDR base addr value from DT as not filling
it here always assumes it as zero while calculating relocation
offset and hence lead to failures in somecases. This will assumed
as zero if CONFIG_SYS_SDRAM_BASE is not defined.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agofpga: zynqmp: Add support to use devicekey for encrypted bitstreams
Siva Durga Prasad Paladugu [Sat, 17 Jun 2017 06:32:48 +0000 (12:02 +0530)] 
fpga: zynqmp: Add support to use devicekey for encrypted bitstreams

Add support to use devicekey for loading encrypted bitstreams.
Getting keyaddr and size values of 0xFFFFFFFF determines it to
use devicekey(like efuse) and there by update appropriate flag
before invoking smc.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agocmd: fpga: Update loads command help to handle devicekey support
Siva Durga Prasad Paladugu [Sat, 17 Jun 2017 06:32:47 +0000 (12:02 +0530)] 
cmd: fpga: Update loads command help to handle devicekey support

This patch updates the fpga loads command help to handle a case
where user wants to use devicekey for loading encrypted bitstreams
instead of userkey. The key address and size should be sent as
0xFFFFFFFF to let fpga driver to use devicekey.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: zynq_gem: Fix misleading indentation warning
Siva Durga Prasad Paladugu [Sat, 17 Jun 2017 06:50:23 +0000 (12:20 +0530)] 
net: zynq_gem: Fix misleading indentation warning

Fixes the below warning
drivers/net/zynq_gem.c: In function ‘zynq_gem_init’:
drivers/net/zynq_gem.c:463:2: warning: this ‘if’ clause
does not guard... [-Wmisleading-indentation]
  if (!priv->emio)
  ^~
drivers/net/zynq_gem.c:469:3: note: ...this statement,
but the latter is misleadingly indented as if it
is guarded by the ‘if’
   if (IS_ERR_VALUE(ret))

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: pytest: Add pytest support for Nand
Siva Durga Prasad Paladugu [Tue, 30 May 2017 14:49:53 +0000 (20:19 +0530)] 
test: pytest: Add pytest support for Nand

This adds support for nand test cases,ss of now
it adds support for some commands such as info,
bad, erase, read and write.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Enable poweroff command for zcu100_revB
Michal Simek [Fri, 2 Jun 2017 06:29:35 +0000 (08:29 +0200)] 
arm64: zynqmp: Enable poweroff command for zcu100_revB

zcu100 can be powered off that's why enabling this command in u-boot to
have this functionality in place.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARMv8: Add support for poweroff via PSCI
Michal Simek [Mon, 29 May 2017 07:11:32 +0000 (09:11 +0200)] 
ARMv8: Add support for poweroff via PSCI

Add support for calling poweroff in case of psci is wired.
Based on the same solution as is used for reset.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Move all logic in to fwcall.c as other ARMs implement poweroff
via PMIC]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoKconfig: Add description for CMD_POWEROFF
Michal Simek [Mon, 5 Jun 2017 06:28:17 +0000 (08:28 +0200)] 
Kconfig: Add description for CMD_POWEROFF

Add poweroff description to Kconfig to make it selectable
via menuconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoarm64: zynqmp: Add comment about level shifter mode v1
Michal Simek [Thu, 2 Mar 2017 10:02:55 +0000 (11:02 +0100)] 
arm64: zynqmp: Add comment about level shifter mode v1

Silicon v1 didn't support SD boot mode with level shifter.
Because system can't boot any error message is not shown
that's why comment is just a record if someone tries to debug it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodts: zynqmp: Add maximum-speed property to dwc3 node
Siva Durga Prasad Paladugu [Mon, 15 May 2017 11:52:40 +0000 (17:22 +0530)] 
dts: zynqmp: Add maximum-speed property to dwc3 node

Add maximum-speed property to dwc3 node of zcu102 dts
This property needs to defined as per latest USB DM
patches. This fixes the issue of usb on zcu102
board.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: Add NOLOAD attribute NOLOAD to .bss sections
Michal Simek [Mon, 22 May 2017 07:15:33 +0000 (09:15 +0200)] 
arm64: Add NOLOAD attribute NOLOAD to .bss sections

Mark explicitly bss sections to not be loaded at
run time.
The similar patch was done in past by:
"Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections"
(sha1: 64134f011254123618798ff77c42ba196b2ec485)

The problem is related to latest toolchain added to Xilinx
v2017.1 design tools where jtag loader is trying to access
ununitialized memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoRevert "ARM: zynq: Remove unused cse targets"
Siva Durga Prasad Paladugu [Fri, 12 May 2017 09:34:10 +0000 (15:04 +0530)] 
Revert "ARM: zynq: Remove unused cse targets"

This partially reverts commit 0090de0b06ee35bfc7485fb0d45dca22c54b9fac.

This needs to be reverted as we still have to support these
targets for supporting zynq mini u-boot which will be used
for vivado programming.
Removed untested targets cse nand and cse nor.
Along with this below changes are required for cse qspi to
work properly.

1. Use DCC for zynq cse qspi target as this will
be used for programming purpose which may not
have serial hence DCC by default.
2. Remove unnecessary configs for QSPI as defining them
increases size for u-boot to run from OCM.
3. Define init stack pointer for cse qspi to avoid memory
corruption while relocating in OCM.
4. Add missing chosen node for cse qspi.
5. Enable SPL for cse_qspi target
 Changes to get SPL working for cse_qspi target
 a. BSS needs to be moved to OCM as DDR may not be
    present for cse_qspi targets.
 b. Provide sym link to ps7_init of zc706.

6. Disable bootdelay via Kconfig

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Setup MIO34 to be routed to PMUFW
Michal Simek [Tue, 23 May 2017 06:17:38 +0000 (08:17 +0200)] 
arm64: zynqmp: Setup MIO34 to be routed to PMUFW

MIO34 is connected to kill signal which shutdown the board.
This change enables calling poweroff from u-boot.
poweroff worked from Linux because pinmuxing driver was changing it
but this change is necessary to be done in psu_init phase too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: py: hush: Add echo dependency
Michal Simek [Thu, 18 May 2017 07:20:02 +0000 (09:20 +0200)] 
test: py: hush: Add echo dependency

Some tests depends on echo command to be present.

Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add empty sleep.h file for psu_init* compilation
Michal Simek [Thu, 25 May 2017 14:08:43 +0000 (16:08 +0200)] 
arm64: zynqmp: Add empty sleep.h file for psu_init* compilation

psu_init* contain sleep.h header which is not present in u-boot.
Instead of keep comment sleep.h in psu_init* it is easier to add empty
file which is included.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: py: Use global pytestmark for hush tests
Michal Simek [Wed, 17 May 2017 09:15:18 +0000 (11:15 +0200)] 
test: py: Use global pytestmark for hush tests

All tests in test_hush_if_test depends on hush parser to be
present. This patch simplify test dependencies by using global
pytestmark.

Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agotest: py: Add cmd_echo dependency
Michal Simek [Tue, 9 May 2017 14:46:03 +0000 (16:46 +0200)] 
test: py: Add cmd_echo dependency

There is missing dependency on echo command. Mark tests which requires
echo.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agozynq: Kconfig: Add Kconfig option for any DDR specific initialization
Siva Durga Prasad Paladugu [Fri, 12 May 2017 09:34:11 +0000 (15:04 +0530)] 
zynq: Kconfig: Add Kconfig option for any DDR specific initialization

Add Kconfig option for ddr init as this might be required
in cases like ddr less systems where we want to skip ddrc
init and this option is useful for it.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynq: Kconfig: Move CONFIG_SYS_TEXT_BASE to Kconfig
Siva Durga Prasad Paladugu [Fri, 12 May 2017 09:34:09 +0000 (15:04 +0530)] 
zynq: Kconfig: Move CONFIG_SYS_TEXT_BASE to Kconfig

Move CONFIG_SYS_TEXT_BASE to Kconfig for Zynq
architecture and define them for all Zynq boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynqmp: Make SYS_VENDOR configurable
Mike Looijmans [Tue, 3 Jan 2017 08:47:52 +0000 (09:47 +0100)] 
ARM: zynqmp: Make SYS_VENDOR configurable

Add a string description for SYS_VENDOR to allow configuring boards from
other vendors than just "xilinx".

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Fix typo in Kconfig
Michal Simek [Fri, 12 May 2017 07:11:20 +0000 (09:11 +0200)] 
arm64: zynqmp: Fix typo in Kconfig

Trivial fix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Do not use dot in platform defconfig
Michal Simek [Thu, 11 May 2017 12:52:57 +0000 (14:52 +0200)] 
arm64: zynqmp: Do not use dot in platform defconfig

Python testing framework is not able to handle dot in name.
Different modules needs to be used.
That's why better change name to be aligned without dot in name.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: py: Disable sleep test for qemu targets
Michal Simek [Thu, 11 May 2017 11:53:45 +0000 (13:53 +0200)] 
test: py: Disable sleep test for qemu targets

Qemu for arm32/arm64 has a problem with time setup.
That's why sleep test is failing. Add boardidentity marker to remove
specific boards from running that test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: py: Also support detect capacity which is only one digit
Michal Simek [Thu, 11 May 2017 11:40:28 +0000 (13:40 +0200)] 
test: py: Also support detect capacity which is only one digit

If capacity is without dot "Capacity: 4 GiB" then current algorithm
was not able to detect it. Add or to regular expression to detect
capacity without dot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add missing alias for gem0 for ep108
Michal Simek [Thu, 11 May 2017 08:15:15 +0000 (10:15 +0200)] 
arm64: zynqmp: Add missing alias for gem0 for ep108

Add missing alias for gem0 for ep108 to have proper sequence number.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: py: qspi: Resort qspi detection algorithm
Michal Simek [Tue, 9 May 2017 14:45:55 +0000 (16:45 +0200)] 
test: py: qspi: Resort qspi detection algorithm

Check if qspi is detected only at one place.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: py: qspi: Add dependency on bdinfo command
Michal Simek [Tue, 9 May 2017 13:36:13 +0000 (15:36 +0200)] 
test: py: qspi: Add dependency on bdinfo command

There is another dependency on looking for ram base
from bdinfo command. This should be probably fixed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Remove CPU_RELEASE_ADDR macro
Michal Simek [Wed, 3 May 2017 14:22:30 +0000 (16:22 +0200)] 
arm64: zynqmp: Remove CPU_RELEASE_ADDR macro

CPU_RELEASE_ADDR is used only when CONFIG_ARMV8_MULTIENTRY
is enabled. ZynqMP is running ATF which takes care about this
that's why no need to have this macro.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonand: zynq: Add support for 16-bit buswidth
Siva Durga Prasad Paladugu [Thu, 25 May 2017 08:55:55 +0000 (14:25 +0530)] 
nand: zynq: Add support for 16-bit buswidth

This patch adds support for 16-but buswidth by determining
the bus width based on mio configuration.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonand: zynq: Send address cycles as per onfi parameter page
Siva Durga Prasad Paladugu [Thu, 25 May 2017 06:45:24 +0000 (12:15 +0530)] 
nand: zynq: Send address cycles as per onfi parameter page

Send address cycles as per value read from onfi parameter
page for Read and write commands instead of using a
hard coded value. This may vary for different parts and
hence use it from onfi parameter page value.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonand: zynq: Correct mtd initialization
Siva Durga Prasad Paladugu [Thu, 25 May 2017 06:45:23 +0000 (12:15 +0530)] 
nand: zynq: Correct mtd initialization

This patch corrects the mtd initialization. With out this, it
results in wrong zynq_nand_info and nand_chip extraction and
hence failed nand operations. This patch fixes the issue of
nand on zynq boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoFix for : Seeing multiple 'INIT: Id "X0" respawning too fast: disabled for 5 minutes...
Bhargava Sreekantappa Gayathri [Wed, 10 May 2017 00:20:02 +0000 (17:20 -0700)] 
Fix for : Seeing multiple 'INIT: Id "X0" respawning too fast: disabled for 5 minutes' messages and changing dom0_mem.

Some consoles mentioned in inittab are not present on the device. We get
the above message when inittab keeps respawning such a console.

Added SERIAL_CONSOLES_CHECK to meta-xilinx layer, which will check
for available consoles by reading /proc/consoles and remove non
existent consoles. This check removes hvc0 when booted via tftp
since /proc/consoles has xen0 and not hvc0. This patch fixes this
issue by renaming xen0 to hvc0 in /proc/consoles.

Renaming dom0-bootargs console to hvc0 and changing dom0_mem to be
consistant with petalinux configuration for tftp boot.

Signed-off-by: Bhargava Sreekantappa Gayathri <bhargava.sreekantappa-gayathri@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonand: arasan_nfc: Add support for ondie ecc
Siva Durga Prasad Paladugu [Mon, 15 May 2017 07:33:48 +0000 (13:03 +0530)] 
nand: arasan_nfc: Add support for ondie ecc

This patch adds support for ondie ecc. As of now
this adds support for micron parts which supports
ondie ecc.
Didnt found any better way to detect ondie ecc
support by a device except sorting out with
manufacture and device id's.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonand: arasan_nfc: Move common ecc struct initialization init routine
Siva Durga Prasad Paladugu [Mon, 15 May 2017 07:33:47 +0000 (13:03 +0530)] 
nand: arasan_nfc: Move common ecc struct initialization init routine

Move common part of ecc structure initialization to
arasan_nand_init() routine.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynq: Kconfig: Dont enable unnecessary configs by default
Siva Durga Prasad Paladugu [Fri, 28 Apr 2017 10:44:40 +0000 (16:14 +0530)] 
zynq: Kconfig: Dont enable unnecessary configs by default

Dont enable unnecessary configs by default, instead enable
the required ones through defconfig. This patch moves configs
DM_ETH, DM_MMC, DM_MMC_OPS, BLK, GPIO to defconfigs. This saves
memory for memory constrained boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Remove unused macros/variable in clk_zynqmp.c
Michal Simek [Mon, 24 Apr 2017 12:06:27 +0000 (14:06 +0200)] 
arm64: zynqmp: Remove unused macros/variable in clk_zynqmp.c

These macros and one variable is not used anywhere that's why
it should be removed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoclk: zynqmp: Dont panic incase of mmio write/read failures
Siva Durga Prasad Paladugu [Thu, 13 Apr 2017 11:29:38 +0000 (16:59 +0530)] 
clk: zynqmp: Dont panic incase of mmio write/read failures

Dont panic incase of mmio write/read failures instead return
error and let the peripheral driver take care of clock get
and set failures.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: zynq_sdhci: improve debug print
Jean-Francois Dagenais [Mon, 3 Apr 2017 01:44:36 +0000 (21:44 -0400)] 
mmc: zynq_sdhci: improve debug print

When debugging dual SDHCI controller setup, printing strings and bank info
is very helpful.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: spl: use given boot_device instead of fetching it again
Jean-Francois Dagenais [Mon, 3 Apr 2017 01:44:35 +0000 (21:44 -0400)] 
arm64: zynqmp: spl: use given boot_device instead of fetching it again

The boot_device argument to spl_boot_mode was massively added without
actually modifying the existing functions.

This commit actually makes use of the handed value, which is the same.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: spl: fix dual SD controller support
Jean-Francois Dagenais [Mon, 3 Apr 2017 01:44:34 +0000 (21:44 -0400)] 
arm64: zynqmp: spl: fix dual SD controller support

When enabling both SDHCI controllers, spl_mmc.c would actually choose
device sdhci0 even if booted from sdhci1 (boot_device). This is because
spl_mmc_get_device_index(boot_device) expects BOOT_DEVICE_MMC2[_2] in
order to return index 1 instead of 0.

The #if defined(...) statement is copied from board/xilinx/zynqmp/zynqmp.c

So the key to properly enabling both controllers as boot sources is
defining both CONFIG_ZYNQ_SDHCI0 and CONFIG_ZYNQ_SDHCI1 in your board's
include/configs/*.h.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotools: zynqmpimage: adjust ug1085 reference to v1.4 of the document
Jean-Francois Dagenais [Thu, 23 Mar 2017 11:39:14 +0000 (07:39 -0400)] 
tools: zynqmpimage: adjust ug1085 reference to v1.4 of the document

The chapter in which the table explaining the image format changed
chapter as the document evolved. This should help people track the
info down faster.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: py: Generate value in 02x format for i2c cases
Michal Simek [Thu, 23 Mar 2017 13:55:04 +0000 (14:55 +0100)] 
test: py: Generate value in 02x format for i2c cases

If single digit random value was generated then it didn't match with
reading value because of fixed two digit format returning back from i2c md
command. Generate value in two digit format to fix this issue.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotest: py: Setup only specific i2c mux line for zc70x
Michal Simek [Thu, 23 Mar 2017 12:25:45 +0000 (13:25 +0100)] 
test: py: Setup only specific i2c mux line for zc70x

On zcu106 there is an issue if all i2c mux lines are enabled
at the same time. Select only one is needed for eeprom.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agospi: spi_flash: Set 4byte mode in upper flash device
Siva Durga Prasad Paladugu [Thu, 6 Apr 2017 09:49:59 +0000 (15:19 +0530)] 
spi: spi_flash: Set 4byte mode in upper flash device

Set 4-byte mode in upper flash device as well incase of
dual stacked mode. This fixes the issue of read/write
failure to upper flash memory incase of dual stacked.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agospi: spi_flash: Update spi flags incase of dual stacked mode
Siva Durga Prasad Paladugu [Thu, 6 Apr 2017 09:49:58 +0000 (15:19 +0530)] 
spi: spi_flash: Update spi flags incase of dual stacked mode

Update spi flags in case of dual stacked mode. Set upper page
access bit if accessing upper flash otherwise just clear it.
This will be used by driver to access upper flash.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: zynq_gem: Dont flush dummy descriptors
Siva Durga Prasad Paladugu [Thu, 23 Mar 2017 06:20:38 +0000 (11:50 +0530)] 
net: zynq_gem: Dont flush dummy descriptors

Dont flush dummy descriptors as they are already
allocated from a region with dcache off. Tested
this on Zynq(zc702) and ZynqMP(zcu102) boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: sdhci: Use ACMD12 only for multiple block read/write
Siva Durga Prasad Paladugu [Sun, 19 Mar 2017 05:16:37 +0000 (10:46 +0530)] 
mmc: sdhci: Use ACMD12 only for multiple block read/write

Use ACMD12 only for multiple block read/write as single
block read and write need not to have stop command.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: zynq_sdhci: Add quirk for using ACM12
Siva Durga Prasad Paladugu [Thu, 16 Mar 2017 11:02:09 +0000 (16:32 +0530)] 
mmc: zynq_sdhci: Add quirk for using ACM12

Add quirk for using ACMD12 as host controller is
capabale of it.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: sdhci: Add support for sending ACMD12 if host supports it
Siva Durga Prasad Paladugu [Thu, 16 Mar 2017 11:02:08 +0000 (16:32 +0530)] 
mmc: sdhci: Add support for sending ACMD12 if host supports it

Use auto transmission of stop command feature(ACMD12) if host
can support it by getting this info in the form of quirk from host
controller driver. This patch fixes the issue with specific
card(Sony SDHC class4 4GB) but however this can be applicable
to all if host controller has feature to support ACMD12.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm: zynq: Add device-type property for zynq ethernet phy nodes
Sai Pavan Boddu [Mon, 6 Mar 2017 12:47:19 +0000 (18:17 +0530)] 
arm: zynq: Add device-type property for zynq ethernet phy nodes

Mention device-type = "ethernet-phy", as qemu will need this in absence
of compatible.

Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodevicetree: dwc3: Uncomment snps,quirk-frame-length-adjustment flag
Anurag Kumar Vulisha [Fri, 10 Mar 2017 13:48:17 +0000 (19:18 +0530)] 
devicetree: dwc3: Uncomment snps,quirk-frame-length-adjustment flag

This patch uncomments snps,quirk-frame-length-adjustment which has
the value to adjust the SOF/ITP generated from the controller.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: disable smmu
Naga Sureshkumar Relli [Thu, 9 Mar 2017 14:30:13 +0000 (20:00 +0530)] 
arm64: zynqmp: disable smmu

This patch disables the smmu and also removes the mmu-masters

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodevicetree: dwc3: Add support reading SoC revision using nvmem driver
Anurag Kumar Vulisha [Thu, 2 Mar 2017 09:10:51 +0000 (14:40 +0530)] 
devicetree: dwc3: Add support reading SoC revision using nvmem driver

This patch adds support for reading silicon revision using zynqmp nvmem
driver.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynqmp-zcu106.dts: Remove si570 from Xilinx_drm node
Madhurkiran Harikrishnan [Fri, 10 Mar 2017 18:05:08 +0000 (10:05 -0800)] 
zynqmp-zcu106.dts: Remove si570 from Xilinx_drm node

This patch will remove the si570 clock for xilinx
drm for zcu106 as CCF already takes care of it.

Signed-off-by: Madhurkiran Harikrishnan <madhurki@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodevicetree: gem: Correct phy address for ZCU106
Harini Katakam [Fri, 3 Mar 2017 12:22:05 +0000 (17:52 +0530)] 
devicetree: gem: Correct phy address for ZCU106

Phy address on ZCU106 is 0xC.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodevicetree: Correct typo in zcu102 revA dts TI PHY workaround flag
Harini Katakam [Fri, 10 Mar 2017 11:12:22 +0000 (16:42 +0530)] 
devicetree: Correct typo in zcu102 revA dts TI PHY workaround flag

ti,rxctrl-strap-wrka -> ti,rxctrl-strap-worka

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Enable AMS for zcu100-revB
Michal Simek [Thu, 2 Mar 2017 13:01:30 +0000 (14:01 +0100)] 
arm64: zynqmp: Enable AMS for zcu100-revB

Enable AMS for iio chip monitoring features.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Remove incorrect comment about tps6586x
Michal Simek [Fri, 3 Mar 2017 09:12:30 +0000 (10:12 +0100)] 
arm64: zynqmp: Remove incorrect comment about tps6586x

zcu100s have tps65086 not tps6586 that's why comments are
wrong.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodevicetree: Add workaround flag in TI DP83867 phy node
Harini Katakam [Tue, 7 Mar 2017 10:50:17 +0000 (16:20 +0530)] 
devicetree: Add workaround flag in TI DP83867 phy node

RX_CTRL must be strapped to MODE 3 or 4 but this is not the case
in all these boards with TI phy. Add DT flag to use the SW
workaround instead.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add the fclk node
Shubhrajyoti Datta [Wed, 8 Mar 2017 04:20:48 +0000 (09:50 +0530)] 
arm64: zynqmp: Add the fclk node

Add fclk node to be simply enabled if needed.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add missing maximum-speed property to usb nodes
Michal Simek [Wed, 8 Mar 2017 08:26:02 +0000 (09:26 +0100)] 
arm64: zynqmp: Add missing maximum-speed property to usb nodes

Add missing properties to dt node.

Error log:
ERROR: usb maximum-speed not found

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodwc3: generic: Add mode detection from DT
Michal Simek [Wed, 8 Mar 2017 08:41:15 +0000 (09:41 +0100)] 
dwc3: generic: Add mode detection from DT

Call generic function for reading dr_mode.
Error out if dr_mode property is not found.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodwc3: generic: Fix max speed detection error path
Michal Simek [Wed, 8 Mar 2017 08:40:11 +0000 (09:40 +0100)] 
dwc3: generic: Fix max speed detection error path

- Check against enum value
- Return -ENODEV if speed is not found

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agousb: common: Fix return value in usb_get_maximum_speed()
Michal Simek [Wed, 8 Mar 2017 08:39:06 +0000 (09:39 +0100)] 
usb: common: Fix return value in usb_get_maximum_speed()

Do not use dr_mode unknown value in speed function.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: zynq: Do not probe driver if pwrseq is present
Michal Simek [Thu, 9 Mar 2017 13:59:49 +0000 (19:29 +0530)] 
mmc: zynq: Do not probe driver if pwrseq is present

mmc-pwrseq property describes that device requires to run specific power
sequence to get device to work.
Detect this property and don't let driver to probe.

mmc-pwrseq require specific driver to be present.
This is the case on zcu100 which has sdio wifi chip which requires power
sequence.

Error log before:
MMC:   Card did not respond to voltage select!
Card did not respond to voltage select!
sdhci@ff170000 - probe failed: -95
sdhci@ff160000: 0 (SD)Card did not respond to voltage select!

After:
MMC:   sdhci@ff160000: 0 (SD), sdhci@ff170000: 1

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
8 years agozynqmp: zcu100: Fix SD xin_clk to be 200MHz
Siva Durga Prasad Paladugu [Thu, 9 Mar 2017 12:19:28 +0000 (17:49 +0530)] 
zynqmp: zcu100: Fix SD xin_clk to be 200MHz

Fix SD xin_clk to be 200 MHz instead of 199Mhz.
Earlier, it was 199MHz as u-boot/Linux is not programming
tap delays, now it needs to be changed both u-boot and Linux
are programming tap delays.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Fixing calling zynqmp_mmio_write in SPL
Michal Simek [Tue, 7 Mar 2017 09:46:09 +0000 (10:46 +0100)] 
arm64: zynqmp: Fixing calling zynqmp_mmio_write in SPL

The bug was introduced by:
"mmc: sdhci: Invoke set_delay() in more generic way"
(sha1: 43f5b9729b7bc2ffdd3bcaf886324435538580e0)
which is calling tap delay programming which contains zynqmp_mmio_write.
By implementing zynqmp_mmio_write for SPL this problem is fixed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agobootstage: Dont print reset entry separately
Siva Durga Prasad Paladugu [Tue, 7 Mar 2017 06:21:44 +0000 (11:51 +0530)] 
bootstage: Dont print reset entry separately

Printing the first entry reset separately is no longer
needed as it now prints the entries with valid name and
timestamp zero. This removes duplicate printing of the reset
record.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agobootstage: print all entries even if recorded time is zero
Siva Durga Prasad Paladugu [Tue, 7 Mar 2017 06:21:43 +0000 (11:51 +0530)] 
bootstage: print all entries even if recorded time is zero

Print all entries in boot stage report even if the recorded
time stamp is zero. This lets the user to know all the recorded
entries that are made into. This helps user to know if something
went wrong with timestamp for that entry.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoboard_f: Move mark_bootstage() to after timer_init()
Siva Durga Prasad Paladugu [Tue, 7 Mar 2017 06:21:42 +0000 (11:51 +0530)] 
board_f: Move mark_bootstage() to after timer_init()

Move mark_bootstage to after timer_init as timer will not be
intialized in case if CONFIG_TIMER is not defined and hence
invoke it in present place if CONFIG_TIMER is defined else
invoke it after timer_init.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agobootstage: Modify routine timer_get_boot_us()
Siva Durga Prasad Paladugu [Tue, 7 Mar 2017 06:21:41 +0000 (11:51 +0530)] 
bootstage: Modify routine timer_get_boot_us()

Modify routine timer_get_boot_us(), as the base_time
will be stored in bss if initialized to zero(observed for
arm compilers, arm and arm64) and for most of the boards
bss was not initialized to zero before relocation and hence
causing a junk timestamp value in boot record if there is an
entry record before relocation(example would be board_init_f
entry). Also, as it is in bss which will be intialized to zero
after relocation, it causes the first entry after relocation
to be missed while printing bootstage report as the
timer_get_boot_us() returns zero if bss_time is zero.
This patch fixes the same by initialzing bss_time to 1 and also
returning current timestamp if bss_time is 1. Intializing it to
1 causes it to be placed in data section and hence no issues.

Before this patch:
ZynqMP> bootstage report
Timer summary in microseconds:
       Mark    Elapsed  Stage
          0          0  reset
    491,000    491,000  id=64
    516,000     25,000  id=65
    522,000      6,000  main_loop
112,092,989,575,347,436,48112,092,989,575,342,216,48  board_init_f

After this patch:
ZynqMP> bootstage report
Timer summary in microseconds:
       Mark    Elapsed  Stage
          0          0  reset
      9,969      9,969  board_init_f
  1,227,000  1,217,031  board_init_r
  1,713,000    486,000  id=64
  1,733,000     20,000  id=65
  1,735,000      2,000  main_loop

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: zynq_gem: Use wait_for_bit with non breakable
Siva Durga Prasad Paladugu [Tue, 7 Mar 2017 09:28:23 +0000 (14:58 +0530)] 
net: zynq_gem: Use wait_for_bit with non breakable

Use wait_for_bit to be non breakable as using it with
breakable causes issue of un interruptible auto negotiation.
This is due to the ctrlc pressed will taken for wait_for_bit()
abort during phy_read() and hence not coming out of
auto negotiation.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Enable QSPI for DC4 board
Siva Durga Prasad Paladugu [Sat, 4 Mar 2017 06:46:48 +0000 (12:16 +0530)] 
arm64: zynqmp: Enable QSPI for DC4 board

Enable QSPI support for DC4 board

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Define and enable qspi node for DC4 board
Siva Durga Prasad Paladugu [Sat, 4 Mar 2017 06:46:47 +0000 (12:16 +0530)] 
arm64: zynqmp: Define and enable qspi node for DC4 board

DC4 board has qspi on it hence define and enable
qspi node for it.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: zynq_sdhci: Initialize mmc immediately after probe
Siva Durga Prasad Paladugu [Sat, 4 Mar 2017 09:37:57 +0000 (15:07 +0530)] 
mmc: zynq_sdhci: Initialize mmc immediately after probe

Initialize mmc immediately after probe as everything
required for mmc initialization was already setup and
intializing here shouldnt be a problem. In some cases
it is really required that mmc need to be intialized during
probe itself as boot process may access mmc/SD for reading
environment while booting.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: sdhci: Invoke set_delay() in more generic way
Siva Durga Prasad Paladugu [Sat, 4 Mar 2017 09:37:56 +0000 (15:07 +0530)] 
mmc: sdhci: Invoke set_delay() in more generic way

Invoke set_delay() in more generic way, this lets the driver
code take care of setting required delays for different
speed modes.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: zynq_sdhci: Modify arasan_sdhci_set_tapdelay()
Siva Durga Prasad Paladugu [Sat, 4 Mar 2017 09:37:55 +0000 (15:07 +0530)] 
mmc: zynq_sdhci: Modify arasan_sdhci_set_tapdelay()

Modify tapdelay setting routine to set required tapdelay
based on timing mode. Get the timing mode from mmc
structure, not as an argument.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add support for verifying authenticated images
Siva Durga Prasad Paladugu [Thu, 2 Mar 2017 13:17:06 +0000 (18:47 +0530)] 
arm64: zynqmp: Add support for verifying authenticated images

This patch adds supports for verifying authenticated images
using rsa hw engine.
The example sequence for verifying authenticated images is
as follows.

tftpb 0x7000000 system.dtb 0x8f17
tftpb 0x3000000 signature_dtb.bin 0x200
tftpb 0x3000200 pubkey-key.pem.bin 0x204
rsa 0x3000000 0x7000000 0x8f17 hw

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agocmd: rsa: Add support for authenticationg images using rsa
Siva Durga Prasad Paladugu [Thu, 2 Mar 2017 13:17:05 +0000 (18:47 +0530)] 
cmd: rsa: Add support for authenticationg images using rsa

This patch adds support to authenticate images using its
signature and public key. The signature will be generated
at host for the images using private key. u-boot uses this
signature and public key to authenticate the given image.
As of now, this patch supports only platform specific
verification using hw option.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agofpga: xilinx: Avoid using local intermediate buffer
Siva Durga Prasad Paladugu [Thu, 2 Mar 2017 13:20:11 +0000 (18:50 +0530)] 
fpga: xilinx: Avoid using local intermediate buffer

Dont use local temporary buffer for printing out the
info instead use directly from memroy. This fixes the
issue of stack corruprion due to local buffer overflow.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Enable aes support for zcu102 rev1.0
Michal Simek [Thu, 2 Mar 2017 13:58:58 +0000 (14:58 +0100)] 
arm64: zynqmp: Enable aes support for zcu102 rev1.0

This should be the part of:
"zynqmp: Enable aes support for zynqmp"
(sha1: 664287e3bea3aff38de76c455b32ff1c096e533a)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm: zynq: Sync dts file with Linux
Michal Simek [Tue, 28 Feb 2017 10:56:28 +0000 (11:56 +0100)] 
arm: zynq: Sync dts file with Linux

Location of compatible string property is different that's why it should
be synchronized.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: dts: zynq: Add ULPI phys instead of NOP transceivers
Subbaraya Sundeep Bhatta [Mon, 21 Sep 2015 08:18:06 +0000 (13:48 +0530)] 
ARM: dts: zynq: Add ULPI phys instead of NOP transceivers

Zynq USB controller needs explicit access to ULPI PHY registers
so ULPI PHY node is used instead of NOP node.

Also fix for DTC 1.4 which wasn't the part of origin patch.

Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm: zynq: Add SCL & SDA GPIO entries for recovery
Chirag Parekh [Tue, 27 Dec 2016 16:37:58 +0000 (22:07 +0530)] 
arm: zynq: Add SCL & SDA GPIO entries for recovery

Wire i2c pinmuxing gpio recovery for zc702.

Signed-off-by: Chirag Parekh <chiragp@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm: zynq: Add efuse node for Zynq-7000S devices
Michal Simek [Tue, 28 Feb 2017 10:46:37 +0000 (11:46 +0100)] 
arm: zynq: Add efuse node for Zynq-7000S devices

Add access to efuse for Zynq-7000S device detection.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm: zynq: Label whole PL part as fpga_full region
Michal Simek [Tue, 14 Feb 2017 16:40:21 +0000 (17:40 +0100)] 
arm: zynq: Label whole PL part as fpga_full region

This will simplify dt overlay structure for the whole PL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodts: xilinx: zynqmp.dtsi: Add clock name for GPU
Madhurkiran Harikrishnan [Fri, 17 Feb 2017 12:14:45 +0000 (04:14 -0800)] 
dts: xilinx: zynqmp.dtsi: Add clock name for GPU

This patch will add names to the clocks used by GPU.

Signed-off-by: Madhurkiran Harikrishnan <madhurki@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodts: zynqmp: Update the OPPs for cpu freq
Shubhrajyoti Datta [Mon, 13 Feb 2017 10:28:55 +0000 (15:58 +0530)] 
dts: zynqmp: Update the OPPs for cpu freq

Update the points to operating-points-v2.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Use only earlycon bootargs instead of full one
Michal Simek [Mon, 27 Feb 2017 07:11:38 +0000 (08:11 +0100)] 
arm64: zynqmp: Use only earlycon bootargs instead of full one

This is the same patch as was done earlier.
Please look at Linux patch:
"arm64: zynqmp: Use only earlycon bootargs instead of full one"
(sha1: f3609c8d4af28b9cc22ca49bf8e529b582ec188c)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add status property to pinctrl node
Michal Simek [Mon, 27 Feb 2017 15:19:59 +0000 (16:19 +0100)] 
arm64: zynqmp: Add status property to pinctrl node

Adding standard status = "disabled"; property to dtsi and enable it for
boards which have pinctrl description.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Fix voltage setting for pins
Michal Simek [Wed, 22 Feb 2017 10:34:07 +0000 (11:34 +0100)] 
arm64: zynqmp: Fix voltage setting for pins

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add pmu pinctrl setup for zcu100-revB
Michal Simek [Fri, 24 Feb 2017 11:05:40 +0000 (12:05 +0100)] 
arm64: zynqmp: Add pmu pinctrl setup for zcu100-revB

MIO34 should be routed to PMU to handle poweroff from PMUFW.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add pinctrl support for uarts on zcu100 revB
Michal Simek [Wed, 22 Feb 2017 08:27:20 +0000 (09:27 +0100)] 
arm64: zynqmp: Add pinctrl support for uarts on zcu100 revB

Wire both uarts interfaces with pinmuxing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add pinctrl support for usbs on zcu100 revB
Michal Simek [Wed, 22 Feb 2017 08:12:19 +0000 (09:12 +0100)] 
arm64: zynqmp: Add pinctrl support for usbs on zcu100 revB

Wire both usbs interfaces with pinmuxing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add pinctrl support for spi on zcu100 revB
Michal Simek [Wed, 22 Feb 2017 07:44:24 +0000 (08:44 +0100)] 
arm64: zynqmp: Add pinctrl support for spi on zcu100 revB

Wire both spi interfaces with pinmuxing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add i2c pinctrl description for zcu100
Michal Simek [Mon, 13 Feb 2017 15:22:36 +0000 (16:22 +0100)] 
arm64: zynqmp: Add i2c pinctrl description for zcu100

Also add recovery mode via gpio. I2C1 is at MIO4/5.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Enable usb phy driver on zcu100
Michal Simek [Mon, 13 Feb 2017 11:48:13 +0000 (12:48 +0100)] 
arm64: zynqmp: Enable usb phy driver on zcu100

Use usb phy driver which should be configured properly now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm64: zynqmp: Add pinctrl description for SD0/SD1 for zcu100
Michal Simek [Mon, 13 Feb 2017 11:48:50 +0000 (12:48 +0100)] 
arm64: zynqmp: Add pinctrl description for SD0/SD1 for zcu100

SD0 is used for MMC card with CD and without WP.
SD1 is connected to wifi chip without CD and WP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>