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2 months agoarm64: dts: socionext: Drop "linux,spdif-dit" port node unit-address
Rob Herring (Arm) [Wed, 10 Sep 2025 23:39:23 +0000 (18:39 -0500)] 
arm64: dts: socionext: Drop "linux,spdif-dit" port node unit-address

A single graph port node without an address (i.e. "reg") should not have
a unit-address, drop it from the "linux,spdif-dit" port node.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250910233923.778992-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoarm64: dts: apm: Clean-up clock bindings
Rob Herring (Arm) [Wed, 10 Sep 2025 22:30:19 +0000 (17:30 -0500)] 
arm64: dts: apm: Clean-up clock bindings

Clean-up a couple of clock binding related issues in the the X-Gene DTS.

CPU and I2C nodes aren't clock providers and shouldn't have
"#clock-cells" properties.

A fixed-clock only provides 1 clock, so "#clock-cells" must be 0. The
preferred node name is "clock-<freq>" as well.

The "type" property is undocumented and unused, so drop it.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250910223020.612244-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoarm64: dts: apm: Move slimpro nodes out of "simple-bus" node
Rob Herring (Arm) [Wed, 10 Sep 2025 21:48:23 +0000 (16:48 -0500)] 
arm64: dts: apm: Move slimpro nodes out of "simple-bus" node

The slimpro nodes are not MMIO devices, so they don't belong under a
"simple-bus" node. Move them to the top level.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250910214822.508317-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'arm-soc/for-6.18/devicetree' of https://github.com/Broadcom/stblinux into...
Arnd Bergmann [Mon, 15 Sep 2025 13:16:40 +0000 (15:16 +0200)] 
Merge tag 'arm-soc/for-6.18/devicetree' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM SoC Device Tree changes for
6.18, please pull the following:

- Taishi-san adds support for the Buffalo WXR-1750DHP using a BCM4708
  SoC

* tag 'arm-soc/for-6.18/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: BCM5301X: Add support for Buffalo WXR-1750DHP
  dt-bindings: arm: bcm: Add support for Buffalo WXR-1750DHP

Link: https://lore.kernel.org/r/20250910171910.666401-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'arm-soc/for-6.18/devicetree-arm64' of https://github.com/Broadcom/stblinux...
Arnd Bergmann [Mon, 15 Sep 2025 13:14:59 +0000 (15:14 +0200)] 
Merge tag 'arm-soc/for-6.18/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 6.18, please pull the following:

- Krzysztof fixes a DTC warning for the ARM GIC in bcm2712.dtsi

- Ivan adds the pin controller node(s), an additional GPIO controller,
  the second SDHCI controller node for SDIO Wi-Fi, and the UARTA for
  Bluetooth to the BCM2712 DTS (Raspberry Pi 5)

- Stanimir adds the Ethernet DT node and enables it for the RP1 sister
  chip

- Andrea deletes a number of redundant PCIe DT node enablement, updates
  a comment to describe the relationship between bcm2712 and RP1 and
  finally enables the USB controllers with RP1

* tag 'arm-soc/for-6.18/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: Enable USB devicetree entries for Rpi5
  arm64: dts: broadcom: rp1: Add USB nodes
  arm64: dts: broadcom: amend the comment about the role of BCM2712 board DTS
  arm64: dts: broadcom: delete redundant pcie enablement nodes
  arm64: dts: broadcom: Enable RP1 ethernet for Raspberry Pi 5
  arm64: dts: rp1: Add ethernet DT node
  dt-bindings: mmc: Add support for capabilities to Broadcom SDHCI controller
  arm64: dts: broadcom: bcm2712: Add UARTA controller node
  arm64: dts: broadcom: bcm2712: Add second SDHCI controller node
  arm64: dts: broadcom: bcm2712: Add one more GPIO node
  arm64: dts: broadcom: bcm2712: Add pin controller nodes
  arm64: dts: broadcom: bcm2712: Add default GIC address cells

Link: https://lore.kernel.org/r/20250910171910.666401-3-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'v6.17-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/media...
Arnd Bergmann [Mon, 15 Sep 2025 13:12:54 +0000 (15:12 +0200)] 
Merge tag 'v6.17-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

mt7988 (bpi r4):
* enable network

mt7986:
* add dedicated sram node
* add interrupts for RSS to ethernet

mt7981:
* add thermal sensor and auxadc nodes

mt8395 (NIO 12L):
* enable UFS
* add gpio keys to the PMIC

mt8195:
* drop reset for PCIe device

* tag 'v6.17-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  dt-bindings: arm: mediatek: Add grinn,genio-510-sbc
  dt-bindings: arm: mediatek: Add grinn,genio-700-sbc
  arm64: dts: mediatek: mt7988a-bpi-r4: configure switch phys and leds
  arm64: dts: mediatek: mt7988a-bpi-r4: add sfp cages and link to gmac
  arm64: dts: mediatek: mt7988a-bpi-r4: add aliases for ethernet
  arm64: dts: mediatek: mt7988: add switch node
  arm64: dts: mediatek: mt7988: add basic ethernet-nodes
  arm64: dts: mediatek: mt7986: add interrupts for RSS and interrupt names
  arm64: dts: mediatek: mt7986: add sram node
  arm64: dts: mediatek: add thermal sensor support on mt7981
  arm64: dts: mediatek: mt8395-nio-12l: add PMIC and GPIO keys support
  arm64: dts: mediatek: mt8395-nio-12l: Enable UFS
  arm64: dts: mediatek: mt8183: Fix out of range pull values
  arm64: dts: mediatek: mt8195: Remove suspend-breaking reset from pcie0

Link: https://lore.kernel.org/r/46756067-ca2f-4053-b9e9-bc6e66170b21@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'samsung-dt-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Mon, 15 Sep 2025 13:11:37 +0000 (15:11 +0200)] 
Merge tag 'samsung-dt-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM changes for v6.18

1. Drop S3C2416 SoC from bindings, because it was removed from kernel
   in 2023.

2. Add Ethernet attached via SROM controller (memory bus) on SMDK5250.
   This wasn't tested, but code should work just like it is working on
   Exynos5410-based boards.

* tag 'samsung-dt-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: samsung: smdk5250: add sromc node
  ARM: dts: samsung: exynos5250: describe sromc bank memory map
  ARM: dts: samsung: exynos5410: use multiple tuples for sromc ranges
  dt-bindings: arm: samsung: Drop S3C2416

Link: https://lore.kernel.org/r/20250909184559.105777-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'dt64-cleanup-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 15 Sep 2025 13:10:11 +0000 (15:10 +0200)] 
Merge tag 'dt64-cleanup-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

Minor improvements in ARM64 DTS for v6.18

Add default address cells for interrupt controllers to fix dtc W=1
warnings on Amazon, APM, Socionext and Toshiba boards.

* tag 'dt64-cleanup-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  arm64: dts: toshiba: tmpv7708: Add default GIC address cells
  arm64: dts: amazon: alpine-v3: Add default GIC address cells
  arm64: dts: amazon: alpine-v2: Add default GIC address cells
  arm64: dts: apm: storm: Add default GIC address cells
  arm64: dts: socionext: uniphier-pxs3: Add default PCI interrup controller address cells
  arm64: dts: socionext: uniphier-ld20: Add default PCI interrup controller address cells

Link: https://lore.kernel.org/r/20250909182256.102840-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'i2c-gpio-fixes-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 15 Sep 2025 13:08:19 +0000 (15:08 +0200)] 
Merge tag 'i2c-gpio-fixes-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into soc/dt

i2c-gpio-fixes-for-6.18

We have dedictaded bindings for scl/sda nowadays. Switch away from the
deprecated plain 'gpios' property.

* tag 'i2c-gpio-fixes-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  ARM: dts: stm32: use recent scl/sda gpio bindings
  ARM: dts: cirrus: ep7211: use recent scl/sda gpio bindings

Link: https://lore.kernel.org/r/aLlgGdrFEjh26knK@shikoro
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'samsung-dt64-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 15 Sep 2025 13:04:43 +0000 (15:04 +0200)] 
Merge tag 'samsung-dt64-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.18

1. Exynos850 e850 board: Enable Ethernet.

2. Exynos990: Enable watchdog and USB, add more clock controllers.

3. Exynos2200: Switch to 32-bit address space for blocks, because all
   peripherals fit there.  Add remaining serial engine (USI) nodes
   (serial, I2C).

4. New Artpec ARTPEC-8 SoC with board. That's a design from Samsung,
   sharing all basic blocks with other Samsung SoCs (busses, clock
   controllers, pin controllers, PCIe, USB) and having media/video
   related blocks from Axis.

   Only basic support is added here: few clock controllers, pin
   controller and UART.

5. Several cleanups.

* tag 'samsung-dt64-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos990: Enable PERIC0 and PERIC1 clock controllers
  arm64: dts: axis: Add ARTPEC-8 Grizzly dts support
  arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support
  dt-bindings: arm: axis: Add ARTPEC-8 grizzly board
  arm64: dts: exynos8895: Minor whitespace cleanup
  dt-bindings: arm: Convert Axis board/soc bindings to json-schema
  arm64: dts: exynos2200: Add default GIC address cells
  arm64: dts: fsd: Add default GIC address cells
  arm64: dts: google: gs101: Add default GIC address cells
  arm64: dts: exynos5433: Add default GIC address cells
  arm64: dts: exynos2200: define all usi nodes
  arm64: dts: exynos2200: increase the size of all syscons
  arm64: dts: exynos2200: use 32-bit address space for /soc
  arm64: dts: exynos2200: fix typo in hsi2c23 bus pins label
  arm64: dts: exynos990-r8s: Enable USB
  arm64: dts: exynos990-c1s: Enable USB
  arm64: dts: exynos990-x1s-common: Enable USB
  arm64: dts: exynos990: Add USB nodes
  arm64: dts: exynos990: Enable watchdog timer
  arm64: dts: exynos: Add Ethernet node for E850-96 board

Link: https://lore.kernel.org/r/20250909180127.99783-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'socfpga_dts_updates_for_v6.18' of git://git.kernel.org/pub/scm/linux/kerne...
Arnd Bergmann [Mon, 15 Sep 2025 13:02:06 +0000 (15:02 +0200)] 
Merge tag 'socfpga_dts_updates_for_v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.18
- Add and enable gmac for Agilex5

* tag 'socfpga_dts_updates_for_v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: socfpga: agilex5: enable gmac2 on the Agilex5 dev kit
  arm64: dts: Agilex5 Add gmac nodes to DTSI for Agilex5

Link: https://lore.kernel.org/r/20250908040718.187857-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'v6.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 15 Sep 2025 12:57:53 +0000 (14:57 +0200)] 
Merge tag 'v6.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

HDMI-CEC and -audio on RK3288-Miqi

* tag 'v6.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add HDMI audio to rk3288-miqi
  ARM: dts: rockchip: add CEC pinctrl to rk3288-miqi

Link: https://lore.kernel.org/r/12138356.VV5PYv0bhD@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'v6.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 15 Sep 2025 12:55:25 +0000 (14:55 +0200)] 
Merge tag 'v6.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

New boards: FriendlyElec NanoPi Zero2, ArmSoM Sige1, Radxa ROCK 2A/2F,
HINLINK H66K / H68K .

Interesting new peripherals: I guess the most interesting one is likely
the NPU on RK3588. The rocket driver has been merged into both the DRM
tree as well as mainline Mesa.
Other stll interesting ones are DW-Displayport on RK3588, DSI on RK3576
(missing soc pwm-support to be useful on most boards), thermal support
and watchdog on RK3576.

The rest peripheral additions on a number of boards (Beelink A1,
Pine{phone,book}, rk3576-evb1-v10, Rock 5*, ...)

* tag 'v6.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (46 commits)
  arm64: dts: rockchip: Enable DP2HDMI for ROCK 5 ITX
  arm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B
  arm64: dts: rockchip: Add DP1 for rk3588
  arm64: dts: rockchip: Add DP0 for rk3588
  arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2
  dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2
  arm64: dts: rockchip: Add ArmSoM Sige1
  dt-bindings: arm: rockchip: Add ArmSoM Sige1
  arm64: dts: rockchip: Add Radxa ROCK 2A/2F
  dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F
  dt-bindings: soc: rockchip: add missing clock reference for rk3576-dcphy syscon
  arm64: dts: rockchip: add USB3 on Beelink A1
  arm64: dts: rockchip: add SPDIF audio to Beelink A1
  arm64: dts: rockchip: add IR receiver to rk3328-roc
  arm64: dts: rockchip: Further describe the WiFi for the Pinephone Pro
  arm64: dts: rockchip: Further describe the WiFi for the Pinebook Pro
  arm64: dts: rockchip: Enable the NPU on NanoPi R6C/R6S
  arm64: dts: rockchip: enable NPU on OPI5/5B
  arm64: dts: rockchip: Add Bluetooth on rk3576-evb1-v10
  arm64: dts: rockchip: Add WiFi on rk3576-evb1-v10
  ...

Link: https://lore.kernel.org/r/5241735.C4sosBPzcN@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'thead-dt-for-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/fusti...
Arnd Bergmann [Mon, 15 Sep 2025 12:52:25 +0000 (14:52 +0200)] 
Merge tag 'thead-dt-for-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt

T-HEAD Devicetrees for v6.18

Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD
TH1520 SoC used by the Lichee Pi 4A board. This node enables support for
the GPU using the drm/imagination driver.

By adding this node, the kernel can recognize and initialize the GPU,
providing graphics acceleration capabilities on the Lichee Pi 4A and
other boards based on the TH1520 SoC. The display controller and HDMI
output are still a work in progress.

Also included is a MAINTAINERS patch that adds an entry for the T-Head
SoC patchwork.

Signed-off-by: Drew Fustini <fustini@kernel.org>
* tag 'thead-dt-for-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux:
  MAINTAINERS: Add RISC-V T-HEAD SoC patchwork
  riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node

Link: https://lore.kernel.org/r/aLyIXR1G9DUzwGWc@x1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agodt-bindings: arm: mediatek: Add grinn,genio-510-sbc
Mateusz Koza [Mon, 8 Sep 2025 13:05:37 +0000 (15:05 +0200)] 
dt-bindings: arm: mediatek: Add grinn,genio-510-sbc

Add device tree bindings support for the Grinn GenioSBC-510, a
single-board computer based on the MediaTek Genio 510 SoC.

More details about the hardware:
- https://grinn-global.com/products/grinn-geniosom-510
- https://grinn-global.com/products/grinn-genioboard-edge-ai-sbc

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Mateusz Koza <mateusz.koza@grinn-global.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250908130620.2309399-5-mateusz.koza@grinn-global.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agodt-bindings: arm: mediatek: Add grinn,genio-700-sbc
Mateusz Koza [Mon, 8 Sep 2025 13:05:35 +0000 (15:05 +0200)] 
dt-bindings: arm: mediatek: Add grinn,genio-700-sbc

Add device tree bindings support for the Grinn GenioSBC-700, a
single-board computer based on the MediaTek Genio 700 SoC.

More details about the hardware:
- https://grinn-global.com/products/grinn-geniosom-700
- https://grinn-global.com/products/grinn-genioboard-edge-ai-sbc

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Mateusz Koza <mateusz.koza@grinn-global.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250908130620.2309399-3-mateusz.koza@grinn-global.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: broadcom: Enable USB devicetree entries for Rpi5
Andrea della Porta [Fri, 5 Sep 2025 09:42:40 +0000 (11:42 +0200)] 
arm64: dts: broadcom: Enable USB devicetree entries for Rpi5

RaspberryPi 5 presents two USB 2.0 and two USB 3.0 ports.

Configure and enable the USB nodes in the devicetree.

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/c6b17f0f896b5cdd790fc10aeb2b76b71df9b58d.1757065053.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: broadcom: rp1: Add USB nodes
Andrea della Porta [Fri, 5 Sep 2025 09:42:39 +0000 (11:42 +0200)] 
arm64: dts: broadcom: rp1: Add USB nodes

The RaspberryPi 5 has RP1 chipset containing two USB host controller,
while presenting two USB 2.0 and two USB 3.0 ports to the outside.

Add the relevant USB nodes to the devicetree.

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/16d753cb4bf37beb5e9c6f0e03576cf13708f27d.1757065053.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: mediatek: mt7988a-bpi-r4: configure switch phys and leds
Frank Wunderlich [Wed, 9 Jul 2025 11:09:49 +0000 (13:09 +0200)] 
arm64: dts: mediatek: mt7988a-bpi-r4: configure switch phys and leds

Assign pinctrl to switch phys and leds.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250709111147.11843-14-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt7988a-bpi-r4: add sfp cages and link to gmac
Frank Wunderlich [Wed, 9 Jul 2025 11:09:48 +0000 (13:09 +0200)] 
arm64: dts: mediatek: mt7988a-bpi-r4: add sfp cages and link to gmac

Add SFP cages to Bananapi-R4 board. The 2.5g phy variant only contains the
wan-SFP, so add this to common dtsi and the lan-sfp only to the dual-SFP
variant.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250709111147.11843-13-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt7988a-bpi-r4: add aliases for ethernet
Frank Wunderlich [Wed, 9 Jul 2025 11:09:47 +0000 (13:09 +0200)] 
arm64: dts: mediatek: mt7988a-bpi-r4: add aliases for ethernet

Add aliases for gmacs to allow bootloader setting mac-adresses.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250709111147.11843-12-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt7988: add switch node
Frank Wunderlich [Wed, 9 Jul 2025 11:09:46 +0000 (13:09 +0200)] 
arm64: dts: mediatek: mt7988: add switch node

Add mt7988 builtin mt753x switch nodes.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250709111147.11843-11-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt7988: add basic ethernet-nodes
Frank Wunderlich [Wed, 9 Jul 2025 11:09:45 +0000 (13:09 +0200)] 
arm64: dts: mediatek: mt7988: add basic ethernet-nodes

Add basic ethernet related nodes.

Mac1+2 needs pcs (sgmii+usxgmii) to work correctly which will be linked
later when driver is merged.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250709111147.11843-10-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt7986: add interrupts for RSS and interrupt names
Frank Wunderlich [Wed, 9 Jul 2025 11:09:44 +0000 (13:09 +0200)] 
arm64: dts: mediatek: mt7986: add interrupts for RSS and interrupt names

Add interrupts for RSS/LRO and names to access them via name instead of
index.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250709111147.11843-9-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt7986: add sram node
Frank Wunderlich [Wed, 9 Jul 2025 11:09:43 +0000 (13:09 +0200)] 
arm64: dts: mediatek: mt7986: add sram node

Currently sram is allocated in driver via offset from reg of ethernet
node. Change it to use a dedicated sram node like mt7988.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250709111147.11843-8-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: add thermal sensor support on mt7981
Aleksander Jan Bajkowski [Sun, 7 Sep 2025 11:15:09 +0000 (13:15 +0200)] 
arm64: dts: mediatek: add thermal sensor support on mt7981

The temperature sensor in the MT7981 is same as in the MT7986.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250907111742.23195-2-olek2@wp.pl
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt8395-nio-12l: add PMIC and GPIO keys support
Julien Massot [Fri, 5 Sep 2025 11:51:59 +0000 (13:51 +0200)] 
arm64: dts: mediatek: mt8395-nio-12l: add PMIC and GPIO keys support

Add support for PMIC and GPIO keys on the Radxa NIO 12L board:
Declare a gpio-keys node for the Volume Up button using GPIO106.
Add the corresponding pin configuration in the pinctrl node.
Add a mediatek,mt6359-keys subnode under the PMIC to handle the
power and home buttons exposed by the MT6359.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Link: https://lore.kernel.org/r/20250905-radxa-nio-12-l-gpio-v3-2-40f11377fb55@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt8395-nio-12l: Enable UFS
Julien Massot [Fri, 5 Sep 2025 13:21:19 +0000 (15:21 +0200)] 
arm64: dts: mediatek: mt8395-nio-12l: Enable UFS

UFS is the primary storage for the Radxa NIO 12L. Enable it
now that the ufshci and ufsphy nodes are available in the
common mt8195 dtsi.

Signed-off-by: Julien Massot <julien.massot@collabora.com>
Link: https://lore.kernel.org/r/20250905-radxa-nio-12l-ufs-v1-1-e2468bfd2c69@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt8183: Fix out of range pull values
Rob Herring (Arm) [Tue, 22 Jul 2025 17:11:52 +0000 (12:11 -0500)] 
arm64: dts: mediatek: mt8183: Fix out of range pull values

A value of 10 is not valid for "mediatek,pull-down-adv" and
"mediatek,pull-up-adv" properties which have defined values of 0-3. It
appears the "10" was written as a binary value. The driver only looks at
the lowest 2 bits, so the value "10" decimal works out the same as if
"2" was used.

Fixes: cd894e274b74 ("arm64: dts: mt8183: Add krane-sku176 board")
Fixes: 19b6403f1e2a ("arm64: dts: mt8183: add mt8183 pumpkin board")
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250722171152.58923-2-robh@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoarm64: dts: mediatek: mt8195: Remove suspend-breaking reset from pcie0
Guoqing Jiang [Mon, 21 Jul 2025 09:59:59 +0000 (17:59 +0800)] 
arm64: dts: mediatek: mt8195: Remove suspend-breaking reset from pcie0

When test suspend resume with 6.8 based kernel, system can't resume
and I got below error which can be also reproduced with 6.16 rc6+
kernel.

mtk-pcie-gen3 112f0000.pcie: PCIe link down, current LTSSM state: detect.quiet (0x0)
mtk-pcie-gen3 112f0000.pcie: PM: dpm_run_callback(): genpd_resume_noirq returns -110
mtk-pcie-gen3 112f0000.pcie: PM: failed to resume noirq: error -110

After investigation, looks pcie0 has the same problem as pcie1 as
decribed in commit 3d7fdd8e38aa ("arm64: dts: mediatek: mt8195:
Remove suspend-breaking reset from pcie1").

Fixes: ecc0af6a3fe6 ("arm64: dts: mt8195: Add pcie and pcie phy nodes")
Signed-off-by: Guoqing Jiang <guoqing.jiang@canonical.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://lore.kernel.org/r/20250721095959.57703-1-guoqing.jiang@canonical.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2 months agoARM: dts: samsung: smdk5250: add sromc node
Henrik Grimler [Mon, 8 Sep 2025 07:26:57 +0000 (09:26 +0200)] 
ARM: dts: samsung: smdk5250: add sromc node

The smdk5250 board has an ethernet port which is connected to bank 1
of the SROM controller. Describe it.

Signed-off-by: Henrik Grimler <henrik@grimler.se>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoARM: dts: samsung: exynos5250: describe sromc bank memory map
Henrik Grimler [Mon, 8 Sep 2025 07:26:56 +0000 (09:26 +0200)] 
ARM: dts: samsung: exynos5250: describe sromc bank memory map

According to public user manual for Exynos 5250 [1], the SROM
controller has 4 banks, at same addresses as for example Exynos
5410. Describe the bank memory map of the SoC.

[1] https://web.archive.org/web/20130921194458/http://www.samsung.com/global/business/semiconductor/file/product/Exynos_5_Dual_User_Manaul_Public_REV100-0.pdf

Signed-off-by: Henrik Grimler <henrik@grimler.se>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoARM: dts: samsung: exynos5410: use multiple tuples for sromc ranges
Henrik Grimler [Mon, 8 Sep 2025 07:26:55 +0000 (09:26 +0200)] 
ARM: dts: samsung: exynos5410: use multiple tuples for sromc ranges

Preferred style is to have comma separated tuples when multiple
addresses and sizes are defined in ranges. Therefore, change the
format to clarify the node.

Signed-off-by: Henrik Grimler <henrik@grimler.se>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoarm64: dts: exynos990: Enable PERIC0 and PERIC1 clock controllers
Denzeel Oliva [Thu, 4 Sep 2025 14:07:14 +0000 (14:07 +0000)] 
arm64: dts: exynos990: Enable PERIC0 and PERIC1 clock controllers

Add clock controller nodes for PERIC0 and PERIC1 blocks for USI nodes.

Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoMAINTAINERS: Add RISC-V T-HEAD SoC patchwork
Drew Fustini [Thu, 4 Sep 2025 19:42:48 +0000 (12:42 -0700)] 
MAINTAINERS: Add RISC-V T-HEAD SoC patchwork

Add patchwork entry for RISC-V T-HEAD SoC support.

Signed-off-by: Drew Fustini <fustini@kernel.org>
2 months agoarm64: dts: broadcom: amend the comment about the role of BCM2712 board DTS
Andrea della Porta [Mon, 11 Aug 2025 14:12:35 +0000 (16:12 +0200)] 
arm64: dts: broadcom: amend the comment about the role of BCM2712 board DTS

Current board DTS for Raspberry Pi5 states that bcm2712-rpi-5-b.dts
should not be modified and all declarations should go in the overlay
board DTS instead (bcm2712-rpi-5-b-ovl-rp1.dts).

There's a caveat though: there's currently no infrastructure to reliably
reference nodes that have not been declared yet, as is the case when
loading those nodes from a runtime overlay. For more details about
these limitations see [1] and follow-ups.

Change the comment to make it clear which DTS file will host specific
nodes, especially the RP1 related nodes which should be customized
outside the overlay DTS.

Link
[1] - https://lore.kernel.org/all/CAMEGJJ3=W8_R0xBvm8r+Q7iExZx8xPBHEWWGAT9ngpGWDSKCaQ@mail.gmail.com/

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/47f6368a77d6bd846c02942d20c07dd48e0ae7df.1754914766.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: broadcom: delete redundant pcie enablement nodes
Andrea della Porta [Mon, 11 Aug 2025 14:12:34 +0000 (16:12 +0200)] 
arm64: dts: broadcom: delete redundant pcie enablement nodes

The pcie1 and pcie2 override nodes to enable the respective peripherals are
declared both in bcm2712-rpi-5-b.dts and bcm2712-rpi-5-b-ovl-rp1.dts, which
makes those declared in the former file redundant.

Drop those redundant nodes from the board devicetree.

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/2865b787d893fd1dcf816e1c96856711754d612d.1754914766.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: broadcom: Enable RP1 ethernet for Raspberry Pi 5
Stanimir Varbanov [Fri, 22 Aug 2025 09:34:40 +0000 (12:34 +0300)] 
arm64: dts: broadcom: Enable RP1 ethernet for Raspberry Pi 5

Enable RP1 ethernet DT node for Raspberry Pi 5.

Signed-off-by: Stanimir Varbanov <svarbanov@suse.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250822093440.53941-6-svarbanov@suse.de
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: rp1: Add ethernet DT node
Stanimir Varbanov [Fri, 22 Aug 2025 09:34:39 +0000 (12:34 +0300)] 
arm64: dts: rp1: Add ethernet DT node

Add macb GEM ethernet DT node.

Signed-off-by: Stanimir Varbanov <svarbanov@suse.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250822093440.53941-5-svarbanov@suse.de
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agodt-bindings: mmc: Add support for capabilities to Broadcom SDHCI controller
Andrea della Porta [Thu, 28 Aug 2025 13:17:10 +0000 (15:17 +0200)] 
dt-bindings: mmc: Add support for capabilities to Broadcom SDHCI controller

The Broadcom BRCMSTB SDHCI Controller device supports Common
properties in terms of Capabilities.

Reference sdhci-common schema instead of mmc-controller in order
for capabilities to be specified in DT nodes avoiding warnings
from the DT compiler.

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/181cc905566f2d9b2e5076295cd285230f81ed07.1756386531.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: broadcom: bcm2712: Add UARTA controller node
Ivan T. Ivanov [Thu, 28 Aug 2025 13:17:14 +0000 (15:17 +0200)] 
arm64: dts: broadcom: bcm2712: Add UARTA controller node

On RPi5 device Bluetooth chips is connected to UARTA
port. Add Bluetooth chips and related pin definitions.

With this and firmware already provided by distributions,
at least on openSUSE Tumbleweed, this is sufficient to make
Bluetooth operational on RPi5 \o/.

Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/35c0da6a741019efefc3c8e405e210a3a8156830.1756386531.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: broadcom: bcm2712: Add second SDHCI controller node
Ivan T. Ivanov [Thu, 28 Aug 2025 13:17:13 +0000 (15:17 +0200)] 
arm64: dts: broadcom: bcm2712: Add second SDHCI controller node

Add SDIO2 node. On RPi5 it is connected to WiFi chip.
Add related pin, gpio and regulator definitions and
add WiFi node. With this and firmware already provided by
distributions, at least on openSUSE Tumbleweed, this is
sufficient to make WiFi operational on RPi5 \o/.

Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/4ff3a58e98d90a43deb2448b23754808afc7153b.1756386531.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: broadcom: bcm2712: Add one more GPIO node
Ivan T. Ivanov [Thu, 28 Aug 2025 13:17:12 +0000 (15:17 +0200)] 
arm64: dts: broadcom: bcm2712: Add one more GPIO node

Add GPIO and related interrupt controller nodes and wire one
of the lines to power button.

Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/6d311b2f629bbc0e1dd9821e4aa8e5af9f8e5362.1756386531.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: broadcom: bcm2712: Add pin controller nodes
Ivan T. Ivanov [Thu, 28 Aug 2025 13:17:11 +0000 (15:17 +0200)] 
arm64: dts: broadcom: bcm2712: Add pin controller nodes

Add pin-control devicetree nodes and used them to
explicitly define uSD card interface pin configuration.

Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/5ceba8558e0007a9685f19b51d681d0ce79e7634.1756386531.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: axis: Add ARTPEC-8 Grizzly dts support
SeonGu Kang [Mon, 1 Sep 2025 05:19:25 +0000 (10:49 +0530)] 
arm64: dts: axis: Add ARTPEC-8 Grizzly dts support

Add initial devcie tree for the ARTPEC-8 Grizzly board.
The ARTPEC-8 Grizzly is a small board developed by Axis,
based on the Axis ARTPEC-8 SoC.

Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Link: https://lore.kernel.org/r/20250901051926.59970-6-ravi.patel@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoarm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support
SungMin Park [Mon, 1 Sep 2025 05:19:24 +0000 (10:49 +0530)] 
arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support

Add initial device tree support for Axis ARTPEC-8 SoC.

This SoC contains 4 Cortex-A53 CPUs and several other peripheral IPs.

Signed-off-by: SungMin Park <smn1196@coasia.com>
Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Link: https://lore.kernel.org/r/20250901051926.59970-5-ravi.patel@samsung.com
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoarm64: dts: toshiba: tmpv7708: Add default GIC address cells
Krzysztof Kozlowski [Fri, 22 Aug 2025 13:33:41 +0000 (15:33 +0200)] 
arm64: dts: toshiba: tmpv7708: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  tmpv7708.dtsi:503.4-507.28: Warning (interrupt_map): /soc/pcie@28400000:interrupt-map:
    Missing property '#address-cells' in node /soc/interrupt-controller@24001000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0)

Reviewed-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>
Link: https://lore.kernel.org/r/20250822133340.312380-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoarm64: dts: amazon: alpine-v3: Add default GIC address cells
Krzysztof Kozlowski [Fri, 22 Aug 2025 13:34:25 +0000 (15:34 +0200)] 
arm64: dts: amazon: alpine-v3: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  alpine-v3.dtsi:342.4-349.33: Warning (interrupt_map): /soc/pcie@fbd00000:interrupt-map:
    Missing property '#address-cells' in node /soc/interrupt-controller@f0800000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0)

Link: https://lore.kernel.org/r/20250822133423.312621-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoarm64: dts: amazon: alpine-v2: Add default GIC address cells
Krzysztof Kozlowski [Fri, 22 Aug 2025 13:34:24 +0000 (15:34 +0200)] 
arm64: dts: amazon: alpine-v2: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  alpine-v2.dtsi:138.4-139.33: Warning (interrupt_map): /soc/pci@fbc00000:interrupt-map:
    Missing property '#address-cells' in node /soc/interrupt-controller@f0200000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0)

Link: https://lore.kernel.org/r/20250822133423.312621-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoarm64: dts: apm: storm: Add default GIC address cells
Krzysztof Kozlowski [Fri, 22 Aug 2025 13:34:17 +0000 (15:34 +0200)] 
arm64: dts: apm: storm: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  apm-storm.dtsi:636.4-639.42: Warning (interrupt_map): /soc/pcie@1f2b0000:interrupt-map:
    Missing property '#address-cells' in node /interrupt-controller@78010000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0)

Link: https://lore.kernel.org/r/20250822133416.312544-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agodt-bindings: arm: axis: Add ARTPEC-8 grizzly board
SungMin Park [Mon, 1 Sep 2025 05:19:23 +0000 (10:49 +0530)] 
dt-bindings: arm: axis: Add ARTPEC-8 grizzly board

Document the Axis ARTPEC-8 SoC binding and the grizzly board
which uses ARTPEC-8 SoC.

Signed-off-by: SungMin Park <smn1196@coasia.com>
Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250901051926.59970-4-ravi.patel@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoARM: dts: BCM5301X: Add support for Buffalo WXR-1750DHP
Taishi Shimizu [Sun, 13 Jul 2025 07:18:25 +0000 (16:18 +0900)] 
ARM: dts: BCM5301X: Add support for Buffalo WXR-1750DHP

Add initial device tree support for the Buffalo WXR-1750DHP, a consumer Wi-Fi
router based on the Broadcom BCM4708A0 SoC.

Hardware specifications:
* Processor: Broadcom BCM4708A0 dual-core @ 800 MHz
* RAM: DDR3 256 MB
* Ethernet Switch: Broadcom BCM53011 integrated via SRAB
* NAND Flash: 128 MB (8-bit ECC)
* SPI Flash: None
* Ports: 4 LAN Ports, 1 WAN Port
* USB: 1x USB 3.0 Type-A port

Signed-off-by: Taishi Shimizu <s.taishi14142@gmail.com>
Link: https://lore.kernel.org/r/20250713071826.726682-3-s.taishi14142@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agodt-bindings: arm: bcm: Add support for Buffalo WXR-1750DHP
Taishi Shimizu [Sun, 13 Jul 2025 07:18:24 +0000 (16:18 +0900)] 
dt-bindings: arm: bcm: Add support for Buffalo WXR-1750DHP

Add Buffalo WXR-1750DHP under BCM4708 based boards.

Signed-off-by: Taishi Shimizu <s.taishi14142@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250713071826.726682-2-s.taishi14142@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: broadcom: bcm2712: Add default GIC address cells
Krzysztof Kozlowski [Fri, 22 Aug 2025 13:34:08 +0000 (15:34 +0200)] 
arm64: dts: broadcom: bcm2712: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  bcm2712.dtsi:494.4-497.31: Warning (interrupt_map): /axi/pcie@1000110000:interrupt-map:
    Missing property '#address-cells' in node /soc@107c000000/interrupt-controller@7fff9000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822133407.312505-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2 months agoarm64: dts: exynos8895: Minor whitespace cleanup
Krzysztof Kozlowski [Tue, 19 Aug 2025 13:16:42 +0000 (15:16 +0200)] 
arm64: dts: exynos8895: Minor whitespace cleanup

The DTS code coding style expects exactly one space around '='
character.

Link: https://lore.kernel.org/r/20250819131641.86520-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agodt-bindings: arm: samsung: Drop S3C2416
Krzysztof Kozlowski [Sat, 30 Aug 2025 11:32:54 +0000 (13:32 +0200)] 
dt-bindings: arm: samsung: Drop S3C2416

Samsung S3C24xx family of SoCs was removed from the Linux kernel in the
commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January
2023.  There are no in-kernel users of remaining S3C24xx compatibles.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250830113253.131974-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 months agoarm64: dts: rockchip: Enable DP2HDMI for ROCK 5 ITX
Andy Yan [Fri, 22 Aug 2025 06:39:54 +0000 (14:39 +0800)] 
arm64: dts: rockchip: Enable DP2HDMI for ROCK 5 ITX

The HDMI0(Port next to Headphone Jack) is driven by DP1 on rk3588
via RA620(a dp2hdmi converter).

Add related dt nodes to enable it.

Note: ROCKCHIP_VOP2_EP_DP1 is defined as 11 in dt-binding header,
but it will trigger a dtc warning like "graph node unit address
error, expected "b"" if we use it directly after endpoint, so we
use "b" instead here.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250822063959.692098-11-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agoarm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B
Andy Yan [Fri, 22 Aug 2025 06:39:53 +0000 (14:39 +0800)] 
arm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B

Enable the Mini DisplayPort on this board.
Note that ROCKCHIP_VOP2_EP_DP0 is defined as 10 in dt-binding header,
but it will trigger a dtc warning like "graph node unit address error,
expected "a"" if we use it directly after endpoint, so we use "a"
instead here.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250822063959.692098-10-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agoarm64: dts: rockchip: Add DP1 for rk3588
Andy Yan [Fri, 22 Aug 2025 06:39:52 +0000 (14:39 +0800)] 
arm64: dts: rockchip: Add DP1 for rk3588

The DP1 is compliant with the DisplayPort Specification
Version 1.4, and share the USBDP combo PHY1 with USB 3.1
HOST1 controller.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250822063959.692098-9-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agoarm64: dts: rockchip: Add DP0 for rk3588
Andy Yan [Fri, 22 Aug 2025 06:39:51 +0000 (14:39 +0800)] 
arm64: dts: rockchip: Add DP0 for rk3588

The DP0 is compliant with the DisplayPort Specification
Version 1.4, and share the USBDP combo PHY0 with USB 3.1
HOST0 controller.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250822063959.692098-8-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agoarm64: dts: rockchip: Add FriendlyElec NanoPi Zero2
Jonas Karlman [Thu, 17 Jul 2025 10:37:08 +0000 (10:37 +0000)] 
arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2

The NanoPi Zero2 is a small single board computer developed by
FriendlyElec, based on the Rockchip RK3528A SoC.

Add initial device tree for the FriendlyElec NanoPi Zero2 board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250717103720.2853031-7-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agodt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2
Jonas Karlman [Thu, 17 Jul 2025 10:37:07 +0000 (10:37 +0000)] 
dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2

The NanoPi Zero2 is small single board computer developed by
FriendlyElec, based on the Rockchip RK3528A SoC.

Add devicetree binding documentation for the FriendlyElec NanoPi Zero2
board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250717103720.2853031-6-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agoarm64: dts: rockchip: Add ArmSoM Sige1
Jonas Karlman [Thu, 17 Jul 2025 10:37:06 +0000 (10:37 +0000)] 
arm64: dts: rockchip: Add ArmSoM Sige1

The Sige1 is a single board computer developed by ArmSoM, based on the
Rockchip RK3528A SoC.

Add initial device tree for the ArmSoM Sige1 board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250717103720.2853031-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agodt-bindings: arm: rockchip: Add ArmSoM Sige1
Jonas Karlman [Thu, 17 Jul 2025 10:37:05 +0000 (10:37 +0000)] 
dt-bindings: arm: rockchip: Add ArmSoM Sige1

The Sige1 is a single board computer developed by ArmSoM, based on the
Rockchip RK3528A SoC.

Add devicetree binding documentation for the ArmSoM Sige1 board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250717103720.2853031-4-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agoarm64: dts: rockchip: Add Radxa ROCK 2A/2F
Jonas Karlman [Thu, 17 Jul 2025 10:37:04 +0000 (10:37 +0000)] 
arm64: dts: rockchip: Add Radxa ROCK 2A/2F

The ROCK 2A and ROCK 2F is a high-performance single board computer
developed by Radxa, based on the Rockchip RK3528A SoC.

Add initial device tree for the Radxa ROCK 2A and ROCK 2F boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250717103720.2853031-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agodt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F
Jonas Karlman [Thu, 17 Jul 2025 10:37:03 +0000 (10:37 +0000)] 
dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F

The ROCK 2A and ROCK 2F is a high-performance single board computer
developed by Radxa, based on the Rockchip RK3528A SoC.

Add devicetree binding documentation for the Radxa ROCK 2A and ROCK 2F
boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250717103720.2853031-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agodt-bindings: soc: rockchip: add missing clock reference for rk3576-dcphy syscon
Heiko Stuebner [Thu, 28 Aug 2025 13:11:07 +0000 (15:11 +0200)] 
dt-bindings: soc: rockchip: add missing clock reference for rk3576-dcphy syscon

The rk3576 mipi dcphy syscon controls a clock, so needs to allow the
clock property. Add the missing entry in the list for it.

Fixes: 0e3f3d7c7ae3 ("dt-bindings: soc: rockchip: add rk3576 mipi dcphy syscon")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202508271156.z3wDB6bX-lkp@intel.com/
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250828131107.3531769-1-heiko@sntech.de
2 months agoarm64: dts: rockchip: add USB3 on Beelink A1
Alex Bee [Thu, 28 Aug 2025 17:16:45 +0000 (17:16 +0000)] 
arm64: dts: rockchip: add USB3 on Beelink A1

Enable USB3 for the Beelink A1 set-top box.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20250828171645.3830437-1-christianshewitt@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2 months agoarm64: dts: rockchip: add SPDIF audio to Beelink A1
Alex Bee [Thu, 28 Aug 2025 16:43:00 +0000 (16:43 +0000)] 
arm64: dts: rockchip: add SPDIF audio to Beelink A1

Add the required nodes to enable SPDIF audio output on
the Beelink A1 set-top-box.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20250828164300.3829488-1-christianshewitt@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
3 months agoMerge tag 'sti-dt-for-v6.18-round1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 1 Sep 2025 10:02:02 +0000 (12:02 +0200)] 
Merge tag 'sti-dt-for-v6.18-round1' of https://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into soc/dt

STi dt fixes:
 - Drop STiH407/10-B2120 DT boards and bindings.
 - Remove remaining STiH415/6 reference from STi machine.
 - Fix phy-names value for stih407-family.dtsi.

* tag 'sti-dt-for-v6.18-round1' of https://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: sti: drop B2120 board support
  ARM: sti: removal of stih415/stih416 related entries
  dt-bindings: arm: sti: drop B2120 board support
  ARM: dts: sti: rename SATA phy-names

Link: https://lore.kernel.org/r/e4703e99-e44e-41d2-b744-a12ed4cb6692@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoMerge tag 'renesas-dts-for-v6.18-tag1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 1 Sep 2025 10:00:46 +0000 (12:00 +0200)] 
Merge tag 'renesas-dts-for-v6.18-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.18

  - Add initial support for the RZ/T2H (R9A09G077) and RZ/N2H
    (R9A09G087) SoCs and their evaluation boards,
  - Add SPI support for the RZ/V2H SoC,
  - Add DMAC and I3C support for the RZ/G3E SoC,
  - Add I3C support for the RZ/G3S SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.18-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (31 commits)
  arm64: dts: renesas: Minor whitespace cleanup
  arm64: dts: renesas: sparrow-hawk: Set VDDQ18_25_AVB voltage on EVTB1
  arm64: dts: renesas: sparrow-hawk: Invert microSD voltage selector on EVTB1
  arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Enable I2C0 and I2C1 support
  arm64: dts: renesas: r9a09g077: Add pinctrl node
  arm64: dts: renesas: r9a09g087: Add DT nodes for SCI channels 1-5
  arm64: dts: renesas: r9a09g077: Add DT nodes for SCI channels 1-5
  arm64: dts: renesas: r9a09g047: Add I3C node
  arm64: dts: renesas: r9a08g045: Add I3C node
  arm64: dts: renesas: sparrow-hawk: Update thermal trip points
  arm64: dts: renesas: rzg2: Increase CANFD clock rates
  arm64: dts: renesas: rcar-gen3: Increase CANFD clock rates
  ARM: dts: renesas: porter: Fix CAN pin group
  ARM: dts: renesas: r7s72100: Add boot phase tags
  arm64: dts: renesas: sparrow-hawk: Describe generic SPI NOR support
  arm64: dts: renesas: rzg2lc-smarc: Disable CAN-FD channel0
  arm64: dts: renesas: r9a09g047: Add DMAC nodes
  arm64: dts: renesas: r9a09g057h48-kakip: Fix misplaced article
  arm64: dts: renesas: r9a09g087: Add SDHI nodes
  arm64: dts: renesas: r9a09g077: Add SDHI nodes
  ...

Link: https://lore.kernel.org/r/cover.1756468048.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoMerge tag 'ixp4xx-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linus...
Arnd Bergmann [Mon, 1 Sep 2025 09:57:26 +0000 (11:57 +0200)] 
Merge tag 'ixp4xx-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into soc/dt

IXP4xx DTS updates for v6.18:

Add the Actiontec router MI424WR A/C and D device trees.

Prerequisite DT bindings have been merged in networking and
GPIO git trees:
https://lore.kernel.org/netdev/175106401649.2079310.16035106613106076029.git-patchwork-notify@kernel.org/
https://lore.kernel.org/linux-gpio/175614780274.8817.4717113656972710108.b4-ty@linaro.org/

* tag 'ixp4xx-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: dts: Add ixp4xx Actiontec MI424WR device trees
  dt-bindings: arm: ixp4xx: List actiontec devices
  dt-bindings: Add Actiontec vendor prefix

Link: https://lore.kernel.org/r/CACRpkdZoDCXgsTGzUUWABbp_r1Xjv7vp7_NjEnEWzMmDQG+UJQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoMerge tag 'ux500-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw...
Arnd Bergmann [Mon, 1 Sep 2025 09:56:43 +0000 (11:56 +0200)] 
Merge tag 'ux500-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt

Ux500 DTS changes for v6.18

- Fix a GPIO hog name.

- Move custom wakeup GPIO to a proper GPIO IRQ
  line rising edge wakeup.

* tag 'ux500-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: ste-ux500-samsung: dts bluetooth wakeup interrupt
  ARM: dts: st: ste-nomadik: Align GPIO hog name with bindings

Link: https://lore.kernel.org/r/CACRpkdaGWVe7TNVz_L=gFh3AfzqnEq4rrOLo8x6gXUORA+MMpw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoMerge tag 'nuvoton-arm64-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Mon, 1 Sep 2025 09:55:13 +0000 (11:55 +0200)] 
Merge tag 'nuvoton-arm64-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt

Early Nuvoton arm64 devicetree updates for 6.18

Integrate changes from Tomer reworking devicetree pinctrl, reset, and clk nodes
for NPCM845-based platforms.

* tag 'nuvoton-arm64-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
  arm64: dts: nuvoton: add refclk and update peripheral clocks for NPCM845
  arm64: dts: nuvoton: combine NPCM845 reset and clk nodes
  arm64: dts: nuvoton: npcm845: Add pinctrl groups

Link: https://lore.kernel.org/r/bf3734aab62a5fcc8959261551bb4b1fa636efbd.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoMerge tag 'nuvoton-arm-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Mon, 1 Sep 2025 09:53:41 +0000 (11:53 +0200)] 
Merge tag 'nuvoton-arm-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt

Early Nuvoton ARM devicetree updates for 6.18

So far we have just the one fix from Krzysztof that switches some nodes to use
generic names, as recommended by the spec.

* tag 'nuvoton-arm-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
  ARM: dts: nuvoton: Use generic "ethernet" as node name

Link: https://lore.kernel.org/r/5e7e5d2cedb3bb232420ad720c857b95d8c02f21.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoMerge tag 'aspeed-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 1 Sep 2025 09:52:06 +0000 (11:52 +0200)] 
Merge tag 'aspeed-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt

Early ASPEED devicetree updates for 6.18

Notable changes:

- Meta's Wedge400 and Fuji boards have had parallel devicetrees added for a
  transition to a new static flash layout. The original layout is deprecated and
  I anticipate removing related devicetrees in future releases.

New platforms:

- Darwin (Meta)

  Darwin is Meta's rack switch platform with an AST2600 BMC integrated for
  health monitoring purpose.

Updates and fixes:

- GB200NVL (Nvidia): Networking, I2C, regulators, GPIOs
- Wedge400, Fuji (Meta): Fix warnings from devicetree bindings
- Use fixed-layout for NVMEM on Asrock platforms
- Various: minor fixes for warnings from FSI devicetree bindings

* tag 'aspeed-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (24 commits)
  ARM: dts: aspeed: x570d4u: convert NVMEM content to layout syntax
  ARM: dts: aspeed: romed8hm3: convert NVMEM content to layout syntax
  ARM: dts: aspeed: e3c256d4i: convert NVMEM content to layout syntax
  ARM: dts: aspeed: e3c246d4i: convert NVMEM content to layout syntax
  ARM: dts: aspeed: Add missing "ibm,spi-fsi" compatibles
  ARM: dts: aspeed: Drop "fsi-master" compatibles
  ARM: dts: aspeed: Drop "no-gpio-delays"
  ARM: dts: aspeed: Add Facebook Darwin (AST2600) BMC
  dt-bindings: arm: aspeed: add Facebook Darwin board
  ARM: dts: aspeed: facebook-fuji: Include facebook-fuji-data64.dts
  ARM: dts: aspeed: Add Facebook Fuji-data64 (AST2600) Board
  dt-bindings: arm: aspeed: add Facebook Fuji-data64 board
  ARM: dts: aspeed: wedge400: Include wedge400-data64.dts
  ARM: dts: aspeed: Add Facebook Wedge400-data64 (AST2500) BMC
  dt-bindings: arm: aspeed: add Facebook Wedge400-data64 board
  ARM: dts: aspeed: Add facebook-bmc-flash-layout-128-data64.dtsi
  ARM: dts: aspeed: Move eMMC out of ast2600-facebook-netbmc-common.dtsi
  ARM: dts: aspeed: Fix DTB warnings in ast2600-facebook-netbmc-common.dtsi
  ARM: dts: aspeed: fuji: Fix DTB warnings
  ARM: dts: aspeed: wedge400: Fix DTB warnings
  ...

Link: https://lore.kernel.org/r/cb634cffaf0db9d25fb3062f0eee41e03955321f.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoMerge tag 'apple-soc-dt-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 1 Sep 2025 09:51:07 +0000 (11:51 +0200)] 
Merge tag 'apple-soc-dt-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/dt

Apple SoC device tree changes for v6.18, part 1

- Added SMC nodes for M1 and M2 including the PMU GPIO controller and
  reboot sub-nodes. This now allows to reboot these systems and is
  required to later enable the power GPIO line for the WiFi board.
- Added i2c nodes for A7 - A11 SoCs

Signed-off-by: Sven Peter <sven@kernel.org>
* tag 'apple-soc-dt-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux:
  arm64: dts: apple: t600x: Add SMC node
  arm64: dts: apple: t8112: Add SMC node
  arm64: dts: apple: t8103: Add SMC node
  arm64: dts: apple: t8015: Add I2C nodes
  arm64: dts: apple: t8011: Add I2C nodes
  arm64: dts: apple: t8010: Add I2C nodes
  arm64: dts: apple: s8001: Add I2C nodes
  arm64: dts: apple: s800-0-3: Add I2C nodes
  arm64: dts: apple: t7001: Add I2C nodes
  arm64: dts: apple: t7000: Add I2C nodes
  arm64: dts: apple: s5l8960x: Add I2C nodes

Link: https://lore.kernel.org/r/20250816171501.31944-1-sven@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoDocumentation/process: maintainer-soc: Use "DTS" instead of "devicetree"
Krzysztof Kozlowski [Tue, 12 Aug 2025 10:41:55 +0000 (12:41 +0200)] 
Documentation/process: maintainer-soc: Use "DTS" instead of "devicetree"

Devicetree is a data structure and it is a bit generic term, because
some treat Devicetree bindings as Devicetree.  What the SoC maintainers
profile is mentioning in ABI stability are the Devicetree sources, so
DTS files.  It is also more common during reviews to refer to these as
per "DTS" instead "devicetree".

Clarify that by using "DTS" name in few more places.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250812104154.42289-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 months agoLinux 6.17-rc4 v6.17-rc4
Linus Torvalds [Sun, 31 Aug 2025 22:33:07 +0000 (15:33 -0700)] 
Linux 6.17-rc4

3 months agoMerge tag 'x86_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 31 Aug 2025 16:20:17 +0000 (09:20 -0700)] 
Merge tag 'x86_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Borislav Petkov:

 - Convert the SSB mitigation to the attack vector controls which got
   forgotten at the time

 - Prevent the CPUID topology hierarchy detection on AMD from
   overwriting the correct initial APIC ID

 - Fix the case of a machine shipping without microcode in the BIOS, in
   the AMD microcode loader

 - Correct the Pentium 4 model range which has a constant TSC

* tag 'x86_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/bugs: Add attack vector controls for SSB
  x86/cpu/topology: Use initial APIC ID from XTOPOLOGY leaf on AMD/HYGON
  x86/microcode/AMD: Handle the case of no BIOS microcode
  x86/cpu/intel: Fix the constant_tsc model check for Pentium 4

3 months agoMerge tag 'sched_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 31 Aug 2025 16:13:00 +0000 (09:13 -0700)] 
Merge tag 'sched_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull scheduler fixes from Borislav Petkov:

 - Fix a stall on the CPU offline path due to mis-counting a deadline
   server task twice as part of the runqueue's running tasks count

 - Fix a realtime tasks starvation case where failure to enqueue a timer
   whose expiration time is already in the past would cause repeated
   attempts to re-enqueue a deadline server task which leads to starving
   the former, realtime one

 - Prevent a delayed deadline server task stop from breaking the
   per-runqueue bandwidth tracking

 - Have a function checking whether the deadline server task has
   stopped, return the correct value

* tag 'sched_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched/deadline: Don't count nr_running for dl_server proxy tasks
  sched/deadline: Fix RT task potential starvation when expiry time passed
  sched/deadline: Always stop dl-server before changing parameters
  sched/deadline: Fix dl_server_stopped()

3 months agoMerge tag 'irq_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 31 Aug 2025 16:07:37 +0000 (09:07 -0700)] 
Merge tag 'irq_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Borislav Petkov:

 - Remove unnecessary and noisy WARN_ONs in gic-v5's init path

 - Avoid a kmemleak false positive for the gic-v5's L2 IST table entries

 - Fix a retval check in mvebu-gicp's probe function

 - Fix a wrong conversion to guards in atmel-aic[5] irqchip

* tag 'irq_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/gic-v5: Remove undue WARN_ON()s in the IRS affinity parsing
  irqchip/gic-v5: Fix kmemleak L2 IST table entries false positives
  irqchip/mvebu-gicp: Fix an IS_ERR() vs NULL check in probe()
  irqchip/atmel-aic[5]: Fix incorrect lock guard conversion

3 months agoMerge tag 'hardening-v6.17-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 31 Aug 2025 15:56:45 +0000 (08:56 -0700)] 
Merge tag 'hardening-v6.17-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux

Pull hardening fixes from Kees Cook:

 - ARM: stacktrace: include asm/sections.h in asm/stacktrace.h (Arnd
   Bergmann)

 - ubsan: Fix incorrect hand-side used in handle (Junhui Pei)

 - hardening: Require clang 20.1.0 for __counted_by (Nathan Chancellor)

* tag 'hardening-v6.17-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
  hardening: Require clang 20.1.0 for __counted_by
  ARM: stacktrace: include asm/sections.h in asm/stacktrace.h
  ubsan: Fix incorrect hand-side used in handle

3 months agoMerge tag 'gpio-fixes-for-v6.17-rc4' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 31 Aug 2025 15:49:55 +0000 (08:49 -0700)] 
Merge tag 'gpio-fixes-for-v6.17-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio fixes from Bartosz Golaszewski:

 - fix an off-by-one bug in interrupt handling in gpio-timberdale

 - update MAINTAINERS

* tag 'gpio-fixes-for-v6.17-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  MAINTAINERS: Change Altera-PIO driver maintainer
  gpio: timberdale: fix off-by-one in IRQ type boundary check

3 months agodt-bindings: arm: Convert Axis board/soc bindings to json-schema
Ravi Patel [Mon, 25 Aug 2025 11:44:32 +0000 (17:14 +0530)] 
dt-bindings: arm: Convert Axis board/soc bindings to json-schema

Convert Axis SoC bindings to DT schema format using json-schema.
Existing bindings supports ARTPEC-6 SoC and board.

Signed-off-by: SungMin Park <smn1196@coasia.com>
Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Link: https://lore.kernel.org/r/20250825114436.46882-7-ravi.patel@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
3 months agoarm64: dts: socionext: uniphier-pxs3: Add default PCI interrup controller address...
Krzysztof Kozlowski [Fri, 22 Aug 2025 13:33:20 +0000 (15:33 +0200)] 
arm64: dts: socionext: uniphier-pxs3: Add default PCI interrup controller address cells

Add missing address-cells 0 to the PCI interrupt node to silence W=1
warning:

  uniphier-pxs3.dtsi:915.4-918.29: Warning (interrupt_map): /soc@0/pcie@66000000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/pcie@66000000/legacy-interrupt-controller, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0)

Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20250822133318.312232-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
3 months agoarm64: dts: socionext: uniphier-ld20: Add default PCI interrup controller address...
Krzysztof Kozlowski [Fri, 22 Aug 2025 13:33:19 +0000 (15:33 +0200)] 
arm64: dts: socionext: uniphier-ld20: Add default PCI interrup controller address cells

Add missing address-cells 0 to the PCI interrupt node to silence W=1
warning:

  uniphier-ld20.dtsi:941.4-944.29: Warning (interrupt_map): /soc@0/pcie@66000000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/pcie@66000000/legacy-interrupt-controller, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0)

Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20250822133318.312232-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
3 months agoarm64: dts: exynos2200: Add default GIC address cells
Krzysztof Kozlowski [Sat, 30 Aug 2025 09:39:19 +0000 (11:39 +0200)] 
arm64: dts: exynos2200: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
because GIC interrupt controller does not have children.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250830093918.24619-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
3 months agoarm64: dts: socfpga: agilex5: enable gmac2 on the Agilex5 dev kit
Matthew Gerlach [Mon, 18 Aug 2025 16:39:33 +0000 (09:39 -0700)] 
arm64: dts: socfpga: agilex5: enable gmac2 on the Agilex5 dev kit

Enable gmac2 on the Agilex5 SOCFGPA Development Kit. The MAC is connected
to a RGMII PHY on a daughter card. There are no RGMII clock delays
implemented the on PCB.

Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
3 months agoarm64: dts: Agilex5 Add gmac nodes to DTSI for Agilex5
Mun Yew Tham [Mon, 18 Aug 2025 16:39:32 +0000 (09:39 -0700)] 
arm64: dts: Agilex5 Add gmac nodes to DTSI for Agilex5

Add the base device tree nodes for gmac0, gmac1, and gmac2 to the DTSI
for the Agilex5 SOCFPGA.  Agilex5 has three Ethernet controllers based on
Synopsys DWC XGMAC IP version 2.10.

Signed-off-by: Mun Yew Tham <mun.yew.tham@altera.com>
Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
3 months agoMerge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Linus Torvalds [Sat, 30 Aug 2025 17:43:53 +0000 (10:43 -0700)] 
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

 - CFI failure due to kpti_ng_pgd_alloc() signature mismatch

 - Underallocation bug in the SVE ptrace kselftest

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  kselftest/arm64: Don't open code SVE_PT_SIZE() in fp-ptrace
  arm64: mm: Fix CFI failure due to kpti_ng_pgd_alloc function signature

3 months agoARM: dts: rockchip: add HDMI audio to rk3288-miqi
Alex Bee [Thu, 28 Aug 2025 16:35:01 +0000 (16:35 +0000)] 
ARM: dts: rockchip: add HDMI audio to rk3288-miqi

Add the sound and i2s nodes to enable HDMI audio output on
the MiQi board.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20250828163501.3829226-1-christianshewitt@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
3 months agoARM: dts: rockchip: add CEC pinctrl to rk3288-miqi
Alex Bee [Thu, 28 Aug 2025 16:54:21 +0000 (16:54 +0000)] 
ARM: dts: rockchip: add CEC pinctrl to rk3288-miqi

Enable CEC control on the HDMI port for MiQi.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20250828165421.3829740-1-christianshewitt@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
3 months agoarm64: dts: rockchip: add IR receiver to rk3328-roc
Alex Bee [Fri, 29 Aug 2025 05:45:47 +0000 (05:45 +0000)] 
arm64: dts: rockchip: add IR receiver to rk3328-roc

Add the ir-receiver and ir pinctrl nodes to enable the IR receiver
on the ROC-RK3328-CC board.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20250829054547.4053558-1-christianshewitt@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
3 months agoarm64: dts: rockchip: Further describe the WiFi for the Pinephone Pro
Peter Robinson [Fri, 29 Aug 2025 11:38:24 +0000 (12:38 +0100)] 
arm64: dts: rockchip: Further describe the WiFi for the Pinephone Pro

Update the wake-up pin and associated interupt details for the
Pinephone Pro WiFi module. Details obtained from the published
PinephonePro-Schematic-V1.0-20211127.pdf page 19.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Link: https://lore.kernel.org/r/20250829113826.2029755-1-pbrobinson@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
3 months agokselftest/arm64: Don't open code SVE_PT_SIZE() in fp-ptrace
Mark Brown [Tue, 12 Aug 2025 14:49:27 +0000 (15:49 +0100)] 
kselftest/arm64: Don't open code SVE_PT_SIZE() in fp-ptrace

In fp-trace when allocating a buffer to write SVE register data we open
code the addition of the header size to the VL depeendent register data
size, which lead to an underallocation bug when we cut'n'pasted the code
for FPSIMD format writes. Use the SVE_PT_SIZE() macro that the kernel
UAPI provides for this.

Fixes: b84d2b27954f ("kselftest/arm64: Test FPSIMD format data writes via NT_ARM_SVE in fp-ptrace")
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20250812-arm64-fp-trace-macro-v1-1-317cfff986a5@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
3 months agoarm64: mm: Fix CFI failure due to kpti_ng_pgd_alloc function signature
Kees Cook [Fri, 29 Aug 2025 19:07:25 +0000 (12:07 -0700)] 
arm64: mm: Fix CFI failure due to kpti_ng_pgd_alloc function signature

Seen during KPTI initialization:

  CFI failure at create_kpti_ng_temp_pgd+0x124/0xce8 (target: kpti_ng_pgd_alloc+0x0/0x14; expected type: 0xd61b88b6)

The call site is alloc_init_pud() at arch/arm64/mm/mmu.c:

  pud_phys = pgtable_alloc(TABLE_PUD);

alloc_init_pud() has the prototype:

  static void alloc_init_pud(p4d_t *p4dp, unsigned long addr, unsigned long end,
                             phys_addr_t phys, pgprot_t prot,
                             phys_addr_t (*pgtable_alloc)(enum pgtable_type),
                             int flags)

where the pgtable_alloc() prototype is declared.

The target (kpti_ng_pgd_alloc) is used in arch/arm64/kernel/cpufeature.c:

  create_kpti_ng_temp_pgd(kpti_ng_temp_pgd, __pa(alloc), KPTI_NG_TEMP_VA,
                          PAGE_SIZE, PAGE_KERNEL, kpti_ng_pgd_alloc, 0);

which is an alias for __create_pgd_mapping_locked() with prototype:

  extern __alias(__create_pgd_mapping_locked)
  void create_kpti_ng_temp_pgd(pgd_t *pgdir, phys_addr_t phys,
                               unsigned long virt,
                               phys_addr_t size, pgprot_t prot,
                               phys_addr_t (*pgtable_alloc)(enum pgtable_type),
                               int flags);

__create_pgd_mapping_locked() passes the function pointer down:

  __create_pgd_mapping_locked() -> alloc_init_p4d() -> alloc_init_pud()

But the target function (kpti_ng_pgd_alloc) has the wrong signature:

  static phys_addr_t __init kpti_ng_pgd_alloc(int shift);

The "int" should be "enum pgtable_type".

To make "enum pgtable_type" available to cpufeature.c, move
enum pgtable_type definition from arch/arm64/mm/mmu.c to
arch/arm64/include/asm/mmu.h.

Adjust kpti_ng_pgd_alloc to use "enum pgtable_type" instead of "int".
The function behavior remains identical (parameter is unused).

Fixes: c64f46ee1377 ("arm64: mm: use enum to identify pgtable level instead of *_SHIFT")
Cc: <stable@vger.kernel.org> # 6.16.x
Signed-off-by: Kees Cook <kees@kernel.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20250829190721.it.373-kees@kernel.org
Reviewed-by: Ryan Roberts <ryan.roberts@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
3 months agoarm64: dts: fsd: Add default GIC address cells
Krzysztof Kozlowski [Fri, 22 Aug 2025 12:14:26 +0000 (14:14 +0200)] 
arm64: dts: fsd: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
because GIC interrupt controller does not have children.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250822121423.228500-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
3 months agoarm64: dts: google: gs101: Add default GIC address cells
Krzysztof Kozlowski [Fri, 22 Aug 2025 12:14:25 +0000 (14:14 +0200)] 
arm64: dts: google: gs101: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
because GIC interrupt controller does not have children.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250822121423.228500-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
3 months agoarm64: dts: exynos5433: Add default GIC address cells
Krzysztof Kozlowski [Fri, 22 Aug 2025 12:14:24 +0000 (14:14 +0200)] 
arm64: dts: exynos5433: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  exynos5433-tm2-common.dtsi:1000.2-41: Warning (interrupt_map): /soc@0/pcie@15700000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@11001000, using 0 as fallbac

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250822121423.228500-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>