qspi: zynqmp: Restrict baud rate value to max value
Restrict baud rate disvisor value to max possible
baud rate value. This fixes the baud rate value overflow
condition which results in programming the incorrect baud
rate divisor value.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: xilinx_spi: Correct the fifo-depth calculation
Correctly fill the fifo depth by passing correct node in getting
it from device tree. This fixes the issue of hanging in a loop while
reading environment from spi flash during boot up which is caused by
commit "spi: xilinx_spi: Modify transfer logic for quad mode"
(sha1: c638e0e80e5ddfac2999692f4aa824021bf3f196)
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
nand: arasan_nfc: Clear ecc on bit while sending read command
Clear ecc ON bit while sending read command as all types
of read command(like reading spare) doesnt need ECC to be
enabled. It has been anyway taken care in other places
whereever required using arasan_nand_enable_ecc().
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: xilinx_spi: Modify transfer logic for quad mode
Modify the transfer logic to get it working for both single
and quad modes. The controller expects 4 dummy bytes for
quad read and also expects the txfifo filled with full command
and required args before starting the transfer. This fixes
an issue in reading from device using quad read command.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 8 Aug 2016 08:26:49 +0000 (10:26 +0200)]
ARM64: Add early support for zcu100
DTS file contains a lot of FIXMEs which need to be validated prior board
bring-up.
Board has 1GB memory
Uart over extension connector MIO 8/9.
DP - used fixed clock for LG monitor.
Enable SPL: (Generated May 25th)
/group/siv2/work/ronaldo/kevant/alto/vnc/vnc1_0/hw/hwflow_local/clk/
Vivado:
/proj/xbuilds/2016.3_0513_1/installs/lin64/Vivado/2016.3/settings64.sh
Disabled DDR init from psu_init - broken.
Also with disabled internal pull-ups on pin 76 and 77.
GT description for USBs and DP.
Reference input clock for USB is commit from CLK lane 0
and for DP from lane 1 that's why LANE_NUM reflects that.
Lane 0 - PS_MGTREFCLK0, Lane 1 - PS_MGTREFCLK1.
USB GTs are disabled because ULPI PHY reset in Linux also causing reset
for spi/wifi/bt chips.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 15 Aug 2016 07:41:36 +0000 (09:41 +0200)]
ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
Mode pins can be used as output for reset. Xilinx boards are using
this feature as additional way how to reset USB phys and also others
chips on the boards.
Mode1 is used on all these boards for this feature.
Let SPL toggle reset on this pin by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---8<---
In file included from tools/common/image-fit.c:1:
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: warning: use of logical '||' with constant operand [-Wconstant-logical-operand]
os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
^ ~~~~~~~~~~~~
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: note: use '|' for a bitwise operation
os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
^~
|
1 warning generated.
--->8---
Signed-off-by: Andreas Bießmann <andreas@biessmann.org> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 07:06:41 +0000 (09:06 +0200)]
libfdt: Introduce new ARCH_FIXUP_FDT option
Add new Kconfig option to disable arch_fixup_fdt() calls for cases where
U-Boot shouldn't update memory setup in DTB file.
One example of usage of this option is to boot OS with different memory
setup than U-Boot use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
Mike Looijmans [Fri, 29 Jul 2016 08:07:57 +0000 (10:07 +0200)]
xilinx_zynqmp_zcu102: Set QSPI clock divisor to "9"
The zynqmp_qspi driver assumes that the QSPI clock runs at 166666666 Hz,
set the divisor such that this is true. The IOPLL runs at 1500, so a
divisor of 0x0c would results in 125MHz.
The optimal divisor for the zcu102 would be "7", which would run the
clock at 214MHz and could thus generate almost 108MHz which is the max
clock rate for the flash chips on the board.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 05:58:50 +0000 (07:58 +0200)]
ARM: zynq: Remove untested RSA configuration
It is getting hard and hard to keep all defconfigs
up2date that's why remove all RSA defconfigs which are not regularly
tested. Keep only zc702 with RSA support.
Any board can support it by enabling
CONFIG_CMD_ZYNQ_AES=y
CONFIG_CMD_ZYNQ_RSA=y
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 27 Jul 2016 12:45:25 +0000 (14:45 +0200)]
ARM64: zynqmp: Remove undef from mini configuration
The patch:
"ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP"
(sha1: a8b6a156c0f7fb99502229e454bc9c3b38645280)
removed symbol that's why there is no need to have undef
in mini configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Thu, 21 Jul 2016 13:55:02 +0000 (15:55 +0200)]
ARM64: zynqmp: Make booting from SD possible without uEnv.txt
When booting from SD card, the kernel cannot find any rootfs.
It only works if you provide a "uEnv.txt" file on the SD card that
patches the bootargs.
If uEnv.txt does not exist, assume that the rootfs is on the second
partition of the SD card (or mmc device). To make this work, rename
"sdroot" to "sdroot0" so a simple script can switch between sd0 and sd1.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 14 Jul 2016 11:11:37 +0000 (13:11 +0200)]
dm: clk: Remove simple version of clk_get_by_index/name()
Simple version of clk_get_by_index() added by:
"dm: clk: Add a simple version of clk_get_by_index()"
(sha1: a4b10c088c4f6ef2e2bba33e8cfea369bcbbce44)
is only working for #clock-cells=<1> but not for
any other values. Fixed clocks is using #clock-cells=<0>
which requires full implementation.
Remove simplified versions of clk_get_by_index() and use full version.
Also remove empty clk_get_by_name() which is failing when it is called
which is useless.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 9 May 2016 12:45:54 +0000 (14:45 +0200)]
test/py: Add experimental code for mmc testing
More partitions are handled.
Save information about saved file to structure.
Also use fs_generic commands to handle files.
Support fat, ext2 and ext4 filesystems.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 16 Mar 2016 22:05:39 +0000 (23:05 +0100)]
test/py: Add basic QSPI testing
This is the first attempt how to test qspi.
Detect SPI size. Read it all, random size, erase every block,
write random data with random size and read it back,
erase the whole qspi and at the end load kernel image via tftp
and save it to memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 9 Jun 2016 14:00:30 +0000 (16:00 +0200)]
libfdt: Add option to disable arch_fixup_fdt() calls
Disable arch_fixup_fdt() calls for cases where U-Boot shouldn't update
memory setup in DTB file.
One example of usage of this option is to boot OS with different memory
setup than U-Boot use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 14 Jul 2016 09:13:04 +0000 (11:13 +0200)]
ARM64: zynqmp: Ignore warnings from autogenerated files
Autogenerated files contain casting issues and missing function
declaration and even usleep implementation. Suppress them for now
till these files are fixed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 12 Jul 2016 12:25:45 +0000 (14:25 +0200)]
ARM64: zynqmp: Add prog_reg to xil_io.h
Vivado is not putting this function to psu_init.c
file that's why this function is missing is some versions.
Make this function as weak to make sure that compilation is fine.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 27 Apr 2016 14:07:20 +0000 (16:07 +0200)]
spl: Fix compilation warnings for arm64
Make code 64bit aware.
Warnings:
+../arch/arm/lib/spl.c: In function ‘jump_to_image_linux’:
+../arch/arm/lib/spl.c:63:3: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
+../common/spl/spl_fat.c: In function ‘spl_load_image_fat’:
+../common/spl/spl_fat.c:91:33: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 6 Jun 2016 08:58:40 +0000 (10:58 +0200)]
api: Disable api_net when DM is used
When CONFIG_API is selected with DM_ETH this
error is present:
api/api_net.c: In function 'dev_enum_net':
api/api_net.c:61:35: warning: initialization from incompatible pointer
type
struct eth_device *eth_current = eth_get_dev();
^
api/api_net.c:68:39: error: dereferencing pointer to incomplete type
memcpy(di->di_net.hwaddr, eth_current->enetaddr, 6);
^
Disable api_net functions when ETH_DM is selected.
Signed-off-by: Chris Johns <chrisj@rtems.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Andre Przywara [Fri, 8 Jul 2016 14:25:23 +0000 (15:25 +0100)]
doc: ARMv8: add README.pine64
Since we lack information about the DRAM initialization for the
Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit
involved at the moment.
Add a README file to explain the process.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Move to board/sunxi/ from doc/] Signed-off-by: Tom Rini <trini@konsulko.com>
Mingkai Hu [Thu, 7 Jul 2016 04:22:12 +0000 (12:22 +0800)]
armv8: Enable CPUECTLR.SMPEN for coherency
For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is
set. The SMPEN bit should be set before enabling the data cache.
If not enabled, the cache is not coherent with other cores and
data corruption could occur.
For A57/A72, SMPEN bit enables the processor to receive instruction
cache and TLB maintenance operations broadcast from other processors
in the cluster. This bit should be set before enabling the caches and
MMU, or performing any cache and TLB maintenance operations.
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
test/py: support 'memstart =' in u_boot_utils.find_ram_base()
Some archs like MIPS or PPC have a different 'bdinfo' output
than ARM regarding the memory configuration. Also support
'memstart = 0x*' in u_boot_utils.find_ram_base() to make
all tests requiring the RAM base working on those archs.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Wed, 6 Jul 2016 16:34:30 +0000 (10:34 -0600)]
test/py: strip VT100 codes from match buffer
Prior to this patch, any VT100 codes emitted by U-Boot are considered part
of a command's output, which often causes tests to fail. For example,
test_env_echo_exists executes printenv, and then considers any text on a
line before an = sign as a valid U-Boot environment variable name. This
includes any VT100 codes emitted. When the test later attempts to use that
variable, the name would be invalid since it includes the VT100 codes.
Solve this by stripping VT100 codes from the match buffer, so they are
never seen by higher level test code.
The codes are still logged unmodified, so that users can expect U-Boot's
exact output without interference. This does clutter the log file a bit.
However, it allows users to see exactly what U-Boot emitted rather than a
modified version, which hopefully is better for debugging. It's also much
simpler to implement, since logging happens as soon as text is received,
and so stripping the VT100 codes from the log would require handling
reception and stripping of partial VT100 codes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Alexander Graf [Tue, 5 Jul 2016 18:37:17 +0000 (20:37 +0200)]
arm: Fix setjmp (again)
Commit e677724 (arm: Fix setjmp) added code to fix compilation of the setjmp
code path with thumv1. Unfortunately it missed a constraint that the adr
instruction can only refer to 4 byte aligned offsets.
So this patch adds the required alignment hooks to make compilation
work again even when setjmp doesn't happen to be 4 byte aligned.
Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Tom Rini <trini@konsulko.com>
Andre Przywara [Fri, 8 Jul 2016 14:18:35 +0000 (15:18 +0100)]
SPL: tiny-printf: avoid any BSS usage
As printf calls may be executed quite early, we should avoid using any
BSS stored variables, since some boards put BSS in DRAM, which may not
have been initialised yet.
Explicitly mark those "static global" variables as belonging to the
.data section, to keep tiny-printf clear of any BSS usage.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Stephen Warren [Wed, 6 Jul 2016 15:04:08 +0000 (09:04 -0600)]
test/py: fix CONFIG_ tests
Some CONFIG_ variables were recently renamed, but test/py wasn't updated
to match. This causes some tests to be skipped. Fix test/py so the tests
are run.
Fixes: 11636258981a ("Rename reset to sysreset") Fixes: f1f9d4fac527 ("hush: complete renaming CONFIG_SYS_HUSH_PARSER to CONFIG_HUSH_PARSER") Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
York Sun [Wed, 6 Jul 2016 23:39:51 +0000 (16:39 -0700)]
powerpc: mpc85xx: kmp204x: Fix compiling error for usb errata
Commit 9262367 moves USB errata workaround into a C file. This
causes compiling error for kmcoge4 and kmlion1. To enable the
errata workaround, define CONFIG_USB_EHCI_FSL in common header.
Signed-off-by: York Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Ed Swarthout <Ed.Swarthout@nxp.com> Cc: Sriram Dash <sriram.dash@nxp.com> Fixes: 92623672f9d3 ("fsl: usb: make errata function common for PPC and ARM")
net: rtl8169: Fix return value for rtl_send_common
Return value of rtl_send_common propogates unmodified all the way
up to eth_send and further to API consumer if CONFIG_API is enabled.
Previously rtl_send_common returned number of bytes sent on success
which was erroneouly detected as error condition by API consumers
that checked for operation success by comparing return value with 0.
Switch rtl_send_common to use common convention: return 0 on success
and negative value for failure.
Cc: Stephen Warren <swarren@nvidia.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alexey Brodkin [Mon, 27 Jun 2016 10:17:51 +0000 (13:17 +0300)]
net: designware: Make driver independent from DM_GPIO again
Commit 90b7fc924adf "net: designware: support phy reset device-tree
bindings" made DW GMAC driver dependent on DM_GPIO by unconditional
usage of purely DM_GPIO stuff like:
* dm_gpio_XXX()
* gpio_request_by_name()
But since that driver as of today might be easily used without
DM_GPIO (that's the case for Synopsys AXS10x boards) we're
shielding all DM_GPIO things by ifdefs.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Sonic Zhang <sonic.zhang@analog.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Sun, 8 May 2016 22:55:22 +0000 (16:55 -0600)]
fdt: Drop some unused compatible strings
We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Sun, 8 May 2016 22:55:20 +0000 (16:55 -0600)]
video: tegra: Move to using simple-panel and pwm-backlight
We have standard drivers for panels and backlights which can do most of the
work for us. Move the tegra20 LCD driver over to use those instead of custom
code.
This patch includes device tree changes for the nvidia boards. I have only
been able to test seaboard. If this patch is applied, these boards will
also need to be synced with the kernel, and updated to use display-timings:
- colibri
- medcom-wide
- paz00
- tec
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Sun, 8 May 2016 22:55:19 +0000 (16:55 -0600)]
tegra: dts: Sync tegra20 device tree files with Linux
Sync everything except the display panel, which will come in a future patch.
One USB port is left disabled since we don't want to support it in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Sun, 8 May 2016 22:55:18 +0000 (16:55 -0600)]
errno: Allow errno_str() to be used without CONFIG_ERRNO_STR
The pmic framework uses errno_str() and this requires board that use it to
enable CONFIG_ERRNO_STR to avoid a build error. Update the header to provide
a NULL error message when CONFIG_ERRNO_STR is not defined, and fix the build
error.
This will show as "(null)" when U-Boot prints it.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Sun, 8 May 2016 22:55:17 +0000 (16:55 -0600)]
errno: Add copyright header and header guard
Bring in a copyright for this file from cmd/pmic.c since this file was
submitted by the same author at around the same time. Also fix the missing
header guard.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
projects / thirdparty / u-boot.git / log
