Michal Simek [Thu, 10 Dec 2015 15:31:38 +0000 (16:31 +0100)]
net: emaclite: Use indirect access in emaclite_recv
When IP is configured with pong buffers, IP is receiving packets to ping
and then to pong buffer and than ping again.
The original logic in the driver remains there that when ping buffer is
free, pong buffer is checked too and return if both are free.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 10 Dec 2015 15:01:50 +0000 (16:01 +0100)]
net: emaclite: Use indirect reg access in send
The original logic in the driver was exchanging buffers which are used for
sending packet and tx_ping and tx_pong buffers were exchanged all the
time to ensure that IP has enough time to send the packet out.
Based on this "feature" send function was using nextbuffertouse variable
to save which buffer should be used.
Before this algorithm was called driver checked that there is free
buffer available.
This checking remains in the driver but driver tries to use tx_ping
first if available. If not, tx_pong buffer is used instead.
To reach this code the original condition is met that at least one of the
buffer should be available.
Testing doesn't show any performance drop when this patch is applied.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Thu, 10 Dec 2015 14:42:01 +0000 (15:42 +0100)]
net: emaclite: Fix logic around available TX buffers
Simplify logic how to find out if there is free TX buffer.
Both buffers are checked all the time that's why logic around order
can be removed.
Also add check when only one buffer is available.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Wed, 9 Dec 2015 13:39:42 +0000 (14:39 +0100)]
net: axi_emac: Put iobase to private structure
Saving iobase directly to private structure helps with moving to DM.
There is an option to load iobase from pdata but it is additional load.
Pointer to private structure is available all the time.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Thu, 14 Jan 2016 09:03:55 +0000 (10:03 +0100)]
ARM: zynq: Sync SPL support with mainline
BSS section is placed in DDR which is already up and running that's why
FAT buffers can stay there and don't need to be place to ddr section
because it is already there.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: zynqmp: Add PL bitstream dowload support for ZynqMP
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to arm trusted
firmware, it will takecare of loading it to PL
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 Jan 2016 14:12:50 +0000 (15:12 +0100)]
fpga: xilinx: Fix fpga code compilation for arm64
Compilation warning:
w-../drivers/fpga/xilinx.c: In function ‘fpga_loadbitstream’:
w-../drivers/fpga/xilinx.c:78:7: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
common: zynq_rsa: Add support to load PL bitstream using zynqrsa
Added support to load authenticated and encrypted PL bitstream
using zynqrsa command if partition owner is specified as uboot
while preparing boot image.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
mmc: zynq_sdhci: Added qurik to disable high speed
Add quirk to disable high speed incase the high
speed was broken.This solves the issue where the
the controller is used in High Speed Mode and the
the hold time requirement for the JEDEC/MMC 4.41
specification is NOT met.
This timing issue is not on all boards and hence
provided config option to enable it when required.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Nathan Rossi [Thu, 7 Jan 2016 17:00:47 +0000 (03:00 +1000)]
arm: mvebu: Select SPL_DM_SEQ_ALIAS
Select SPL_DM_SEQ_ALIAS which is required for certain uclasses,
specifically SPI Flash.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 Jan 2016 12:25:03 +0000 (13:25 +0100)]
Merge tag 'v2016.01' into xilinx/master
Prepare v2016.01
Various QSPI fixes from Siva were applied:
spi_flash: Add support for device with Quad IO support
zynq_qspi: Update parent priv data during pre probe of qspi
zynq-common: Add missing dual flash support in zynq
spi: spi_flash: Add support for generic qspi
zynqmp_qspi: Update parent priv data during pre probe of qspi
spi: spi_flash: Add 4-byte support for spi flash
spi: spi_flash: Correct flash size calculation
spi: spi_flash: Add support for Dual stacked mode
Add ifdef around CONFIG_FEC_MXC to remove compilation warnings.
Remove qspi flash enabling via defconfig. Do it later.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fabio Estevam [Mon, 4 Jan 2016 23:38:08 +0000 (21:38 -0200)]
mx6cuboxi: Fix the reset delay for the AR8035 PHY
Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional:
Booting from net ...
FEC Waiting for PHY auto negotiation to complete......... TIMEOUT !
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.
As per the AR8035 datasheet:
"For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset
1ms requirement is satisfied."
So do as suggested and keep the reset low for 10ms.
Also add a 100us delay after deasserting the reset line
to guarantee that the PHY ID can be read correctly and the Atheros
PHY can be loaded as per Troy Kisky's suggestion.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Tom Rini <trini@konsulko.com>
Bin Meng [Fri, 8 Jan 2016 09:03:21 +0000 (01:03 -0800)]
pci: layerscape: Adjust the return value when ls_pcie_addr_valid() fails
When trying to access non-existent/unsupported PCI devices in
ls_pcie_read_config(), when ls_pcie_addr_valid() fails it returns
error code and fills in the result with 0xffffffff manually. But it
really should return zero to upper layer codes.
Bin Meng [Fri, 8 Jan 2016 09:03:20 +0000 (01:03 -0800)]
pci: imx: Adjust the return value when imx_pcie_addr_valid() fails
When trying to access non-existent/unsupported PCI devices in
imx_pcie_read_config(), when imx_pcie_addr_valid() fails it returns
error code and fills in the result with 0xffffffff manually. But it
really should return zero to upper layer codes.
Since 51209b1f42cb ("Use common mtest iteration counting"),
do_mem_mtest has always reported 0 errors and hence returned 0, even
if errors were detected. Fix the helpers mem_test_alt() and
mem_test_quick() to return the number of errors found.
Tom Rini [Tue, 5 Jan 2016 17:17:15 +0000 (12:17 -0500)]
am33xx/am43xx: Add platform data for GPIOs
On these platforms we have many cases of boards that enable device model
and GPIO support but do not enable OF_CONTROL and pass in a device tree
with the binary. We need to bring in the platform data here as well.
Tested on Beaglebone Black.
Reported-by: Robert Nelson <robertcnelson@gmail.com> Reported-by: Francisco Aguerre <franciscoaguerre@gmail.com> Reported-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Michal Simek [Tue, 5 Jan 2016 11:49:21 +0000 (12:49 +0100)]
serial: zynq: Use static inline for _debug_uart_init()
Mark _debug_uart_init() as static to avoid sparse warning and
inline it to debug_uart_init().
Reported-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Mon, 4 Jan 2016 15:48:22 +0000 (15:48 +0000)]
net: remove scary warning about EEPROM provided MAC address
In many parts of the computing world having a unique MAC address
sitting in some on-NIC storage is considered the normal case.
Remove the warning to not scare the user unnecessarily.
This applies to Highbank/Midway and ARM's Juno, for instance.
Besides that this fixes the formatting on Midway, for instance,
which currently looks like:
...
Net: xgmac0
Warning: xgmac0 using MAC address from net device
, xgmac1
Warning: xgmac1 using MAC address from net device
...
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Mon, 4 Jan 2016 15:43:36 +0000 (15:43 +0000)]
arm64: Juno/FVP: adjust kernel load address
The default kernel load offset for an arm64 kernel is 0x80000, so
U-Boot takes cares of moving the loaded kernel to a matching memory
location just before booting it.
Since we run with caches off, this takes a while for any decently
sized kernel - with no output explaining the reason for the delay
(unless one uses a DEBUG build).
By adjusting the default load offset for Juno and VFP to be 512K
aligned in the first place we can skip this copying and boot much
faster.
Tested on Juno.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Aneesh Bansal [Wed, 23 Dec 2015 08:46:23 +0000 (14:16 +0530)]
arm, Makefile: correct compilation flag for u-boot-dtb
The compilation of u-boot-dtb.img should be controlled by
CONFIG_OF_CONTROL and not CONFIG_DM.
CONFIG_DM may be defined even without Device Tree requirement.
Robert P. J. Day [Sat, 19 Dec 2015 12:16:10 +0000 (07:16 -0500)]
doc: Tidy up first part of top-level README file
First (small) pass at tidying up the README file, including:
* remove references to obsolete CREDITS file
* remove (some) references to obsolete boards.cfg file
* remove at least one reference to a "scrapped" board
* cut down unnecessarily detailed directory hierarchy
* bunch of grammar and spelling tweaks
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>