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3 weeks agoDaily bump.
GCC Administrator [Mon, 13 Oct 2025 00:24:32 +0000 (00:24 +0000)] 
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3 weeks agoDaily bump.
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3 weeks ago[PATCH] RISC-V: Detect wrap in shuffle_series_pattern [PR121845].
Robin Dapp [Tue, 7 Oct 2025 13:18:27 +0000 (07:18 -0600)] 
[PATCH] RISC-V: Detect wrap in shuffle_series_pattern [PR121845].

Hi,

In shuffle_series_pattern we use series_p to determine if the permute
mask is a simple series.  This didn't take into account that series_p
also returns true for e.g. {0, 3, 2, 1} where the step is 3 and the
indices form a series modulo 4.

We emit
 vid + vmul
in order to synthesize a series.  In order to be always correct we would
need a vrem afterwards still which does not seem worth it.

This patch adds the modulo for VLA permutes and punts if we wrap around
for VLS permutes.  I'm not really certain whether we'll really see a wrapping
VLA series (certainly we haven't so far in the test suite) but as we observed
a VLS one here now it appears conservatively correct to module the indices.

Regtested on rv64gcv_zvl512b.

Regards
 Robin

PR target/121845

gcc/ChangeLog:

* config/riscv/riscv-v.cc (shuffle_series_patterns):
Modulo indices for VLA and punt when wrapping for VLS.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr121845.c: New test.

(cherry picked from commit 62631c39a788161ff2f686adf355d10443e0d899)

3 weeks agoDaily bump.
GCC Administrator [Sat, 11 Oct 2025 00:26:18 +0000 (00:26 +0000)] 
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4 weeks agoDaily bump.
GCC Administrator [Fri, 10 Oct 2025 00:28:00 +0000 (00:28 +0000)] 
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4 weeks agoAVR: target/122222 - Add modules for __floatsidf, __floatunsidf.
Georg-Johann Lay [Thu, 9 Oct 2025 16:35:34 +0000 (18:35 +0200)] 
AVR: target/122222 - Add modules for __floatsidf, __floatunsidf.

PR target/122222
libgcc/config/avr/libf7/
* libf7-asm.sx (D_floatsidf, D_floatunsidf): New modules.
* libf7-common.mk (F7_ASM_PARTS): Add D_floatsidf, D_floatunsidf.
(F7F, g_dx): Remove floatunsidf, floatsidf.
* libf7.c (f7_set_s32): Don't alias to f7_floatsidf.
(f7_set_u32): Don't alias to f7_floatunsidf.
* f7-renames.h: Rebuild
* f7-wraps.h: Rebuild.

gcc/testsuite/
* gcc.target/avr/pr122222-sitod.c: New test.

(cherry picked from commit 078208cf15bb373dc7931d6b373689cdff70cdc5)

4 weeks agoAVR: target/122220 - Let (int32_t) -0x1p31L return INT32_MIN.
Georg-Johann Lay [Thu, 9 Oct 2025 13:27:16 +0000 (15:27 +0200)] 
AVR: target/122220 - Let (int32_t) -0x1p31L return INT32_MIN.

PR target/122220
libgcc/config/avr/libf7/
* libf7-asm.sx (to_integer): Return 0x80... on negative overflow.

gcc/testsuite/
* gcc.target/avr/pr122220.c: New test.

(cherry picked from commit 3ea09e4d43278aa8d7b088a5f5438d921c48c411)

4 weeks agoAVR: target/122210 - Add double -> fixed-point conversions.
Georg-Johann Lay [Wed, 8 Oct 2025 18:02:53 +0000 (20:02 +0200)] 
AVR: target/122210 - Add double -> fixed-point conversions.

PR target/122210
libgcc/config/avr/libf7/
* libf7-common.mk (F7_ASM_PARTS): Add D2<fx> modules.
* libf7-asm.sx: Implement the D2<fx> modules.

gcc/testsuite/
* gcc.target/avr/dtofx.c: New test.

(cherry picked from commit b0bc615d9374ca6293996cf3afca8cabaca0defd)

4 weeks agoAVR: target/122210 - Add fixed-point -> double conversions.
Georg-Johann Lay [Wed, 8 Oct 2025 18:02:53 +0000 (20:02 +0200)] 
AVR: target/122210 - Add fixed-point -> double conversions.

PR target/122210
libgcc/config/avr/libf7/
* libf7-common.mk (F7_ASM_PARTS): Add <fx>2D modules.
* libf7-asm.sx: Implement the <fx>2D modules.

gcc/testsuite/
* gcc.target/avr/fxtod.c: New test.

(cherry picked from commit 7304e83f1f29c39df7a9de888d9c6d40b58c512a)

4 weeks agoDaily bump.
GCC Administrator [Thu, 9 Oct 2025 00:28:11 +0000 (00:28 +0000)] 
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4 weeks ago[PATCH v2] RISC-V: fix __builtin_round NaN handling [PR target/121652]
Aurelien Jarno [Thu, 2 Oct 2025 15:05:34 +0000 (09:05 -0600)] 
[PATCH v2] RISC-V: fix __builtin_round NaN handling [PR target/121652]

__builtin_round() fails to correctly generate invalid exceptions for NaN
inputs when -ftrapping-math is used (which is the default). According to
the specification, an invalid exception should be raised for sNaN, but
not for qNaN.

Commit f12a27216952 ("RISC-V: fix __builtin_round clobbering FP...")
attempted to avoid raising an invalid exception for qNaN by saving and
restoring the FP exception flags. However this inadvertently suppressed
the invalid exception for sNaN as well.

Instead of saving/restoring fflags, this patch uses the same approach
than the well tested GLIBC round implementation. When flag_trapping_math
is enabled, it first checks whether the input is a NaN using feq.s/d. In
that case it adds the input value with itself to possibly convert sNaN
into qNaN. With this change, the glibc testsuite passes again.

The generated code with -ftrapping-math now looks like:

convert_float_to_float_round
  feq.s       a5,fa0,fa0
  beqz        a5,.L6
  auipc       a5,0x0
  flw         fa4,42(a5)
  fabs.s      fa5,fa0
  flt.s       a5,fa5,fa4
  beqz        a5,.L5
  fcvt.w.s    a5,fa0,rmm
  fcvt.s.w    fa5,a5
  fsgnj.s     fa0,fa5,fa0
  ret
.L6:
  fadd.s      fa0,fa0,fa0
.L5:
  ret

With -fno-trapping-math, the additional checks are omitted so the
resulting code is unchanged.

In addition this fixes the following failures:
FAIL: gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c -O3 -ftree-vectorize -mrvv-vector-bits=scalable  scan-assembler-times frflags\\s+[atx][0-9]+ 32
FAIL: gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c -O3 -ftree-vectorize -mrvv-vector-bits=scalable  scan-assembler-times fsflags\\s+[atx][0-9]+ 32

Fixes: f652a35877e3 ("This is almost exclusively Jivan's work....")
Fixes: f12a27216952 ("RISC-V: fix __builtin_round clobbering FP...")
PR target/121652

gcc/ChangeLog:

* config/riscv/riscv.md (round_pattern): special case NaN input
instead of saving/restoring fflags.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c: Adjust
scan pattern for fewer instances of frflags/fsrflags.

(cherry picked from commit 60c6f92fb192352d784ab3153a9e11c19a3216a0)

4 weeks agoDaily bump.
GCC Administrator [Wed, 8 Oct 2025 00:27:03 +0000 (00:27 +0000)] 
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4 weeks agoAVR: target/122187 - Don't clobber recog_data.operand[] in insn out.
Georg-Johann Lay [Tue, 7 Oct 2025 15:50:34 +0000 (17:50 +0200)] 
AVR: target/122187 - Don't clobber recog_data.operand[] in insn out.

avr.cc::avr_out_extr() and avr.cc::avr_out_extr_not()
changed xop for output, which spoiled the operand for
the next invokation, running into an assertion.

This patch makes a local copy of the operands.

PR target/122187
gcc/
* config/avr/avr.cc (avr_out_extr, avr_out_extr_not):
Make a local copy of the passed rtx[] operands.

gcc/testsuite/
* gcc.target/avr/torture/pr122187.c: New test.

(cherry picked from commit 3cbd43d640d6384df85c171a0245488f0adc3145)

4 weeks agoDaily bump.
GCC Administrator [Tue, 7 Oct 2025 00:27:45 +0000 (00:27 +0000)] 
Daily bump.

4 weeks agoAVR/LibF7: Implement sincos.
Georg-Johann Lay [Mon, 6 Oct 2025 19:31:46 +0000 (21:31 +0200)] 
AVR/LibF7: Implement sincos.

libgcc/config/avr/libf7/
* libf7-common.mk (F7_ASM_PARTS): Add D_sincos.
* libf7-asm.sx: (D_sincos): New module implements sincos / sincosl.

gcc/testsuite/
* gcc.target/avr/sincos-1.c: New test.

(cherry picked from commit e3a05e050226aaaa4e2a2e7aee1e5651212a68f6)

4 weeks agoAVR/LibF7: target/122177 - fix fmin / fmax return value for one NaN arg.
Georg-Johann Lay [Sun, 5 Oct 2025 18:56:56 +0000 (20:56 +0200)] 
AVR/LibF7: target/122177 - fix fmin / fmax return value for one NaN arg.

fmin and fmax should return the non-NaN argument in the case where
exactly one argument is a NaN.

Moreover, IEEE double fmin and fmax can be performed without
first converting the args to the internal representation and
then converting back again.

PR target/122177
libgcc/config/avr/libf7/
* libf7-common.mk (m_ddd): Remove: fmin, fmax.
(F7_ASM_PARTS): Add: D_fminfmax.
* libf7-asm.sx (D_fmanfmax): New module.
* f7-wraps.h: Rebuild.

gcc/testsuite/
* gcc.target/avr/fminfmax-1.c: New test.

(cherry picked from commit efb3cd64fdefab88c7787b16ad33be33f4c4a2a4)

4 weeks agoAVR: Speed up IEEE double comparisons.
Georg-Johann Lay [Sun, 5 Oct 2025 18:56:56 +0000 (20:56 +0200)] 
AVR: Speed up IEEE double comparisons.

IEEE double can be compared without first converting them to
the internal representation.

libgcc/config/avr/libf7/
* libf7-common.mk (g_xdd_cmp): Remove le, lt, ge, gt, ne, eq, unord.
(F7_ASM_PARTS): Add D_cmp, D_eq, D_ne, D_ge, D_gt, D_le, D_lt, D_unord.
* libf7-asm.sx (D_cmp, D_eq, D_ne, D_ge, D_gt, D_le, D_lt, D_unord):
New modules.
* f7-wraps.h: Rebuild.

gcc/testsuite/
* gcc.target/avr/cmpdi-1.c: New test.

(cherry picked from commit e5731a4bc50e95245cb628505142e0adff0bb79e)

4 weeks agoDaily bump.
GCC Administrator [Mon, 6 Oct 2025 00:23:58 +0000 (00:23 +0000)] 
Daily bump.

4 weeks agoDaily bump.
GCC Administrator [Sun, 5 Oct 2025 16:56:15 +0000 (16:56 +0000)] 
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4 weeks agoAdd testcase for PR ada/113536
Eric Botcazou [Sun, 5 Oct 2025 08:42:25 +0000 (10:42 +0200)] 
Add testcase for PR ada/113536

gcc/testsuite/
PR ada/113536
* gnat.dg/reduce2.adb: New test.

4 weeks agoAda: Remove useless Makefile variable
Eric Botcazou [Sun, 5 Oct 2025 08:25:14 +0000 (10:25 +0200)] 
Ada: Remove useless Makefile variable

gcc/ada
PR ada/118343
* Makefile.rtl (LLVM_BUILD): Delete.

5 weeks agoRISC-V: Use correct target in expand_vec_perm [PR121780].
Robin Dapp [Thu, 4 Sep 2025 08:16:21 +0000 (10:16 +0200)] 
RISC-V: Use correct target in expand_vec_perm [PR121780].

This fixes a glaring mistake in yesterday's change to the expansion of
vec_perm.  We should of course move tmp_target into the real target
and not the other way around.  I wonder why my testing hasn't
caught this...

PR target/121742
PR target/121780
PR target/121781

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_vec_perm): Swap target and
tmp_target.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr121780.c: New test.
* gcc.target/riscv/rvv/autovec/pr121781.c: New test.

(cherry picked from commit e3d5e9f0c8c6f27bf59d321d5082be7b3bb39f8a)

5 weeks agoRISC-V: Handle overlap in expand_vec_perm PR121742.
Robin Dapp [Mon, 1 Sep 2025 09:41:34 +0000 (11:41 +0200)] 
RISC-V: Handle overlap in expand_vec_perm PR121742.

In a two-source gather we unconditionally overwrite target with the
first gather's result already.  If op1 == target this clobbers the
source operand for the second gather.  This patch uses a temporary in
that case.

PR target/121742

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_vec_perm): Use temporary if
op1 and target overlap.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr121742.c: New test.

(cherry picked from commit f957d352bd6f240829226405e9be7960071d1b9c)

5 weeks agoRISC-V: Always register vector built-in functions during LTO [PR110812]
Kito Cheng [Thu, 10 Jul 2025 07:28:30 +0000 (15:28 +0800)] 
RISC-V: Always register vector built-in functions during LTO [PR110812]

Previously, vector built-in functions were not properly registered during
the LTO pipeline, causing link failures when vector intrinsics were used
in LTO builds with mixed architecture options.  This patch ensures all
vector built-in functions are always registered during LTO compilation.

The key changes include:
- Moving pragma intrinsic flag manipulation from riscv-c.cc to
  riscv-vector-builtins.cc for better encapsulation
- Registering all vector built-in functions regardless of current ISA
  extensions, deferring the actual extension checking to expansion time
- Adding proper support for built-in type registration during LTO

This approach is safe because we already perform extension requirement
checking at expansion time.  The trade-off is a slight increase in
bootstrap time for LTO builds due to registering more built-in functions.

PR target/110812

gcc/ChangeLog:

* config/riscv/riscv-c.cc (pragma_intrinsic_flags): Remove struct.
(riscv_pragma_intrinsic_flags_pollute): Remove function.
(riscv_pragma_intrinsic_flags_restore): Remove function.
(riscv_pragma_intrinsic): Simplify to only call handle_pragma_vector.
* config/riscv/riscv-vector-builtins.cc (pragma_intrinsic_flags):
Move struct definition here from riscv-c.cc.
(riscv_pragma_intrinsic_flags_pollute): Move and adapt from
riscv-c.cc, add zvfbfmin, zvfhmin and vector_elen_bf_16 support.
(riscv_pragma_intrinsic_flags_restore): Move from riscv-c.cc.
(rvv_switcher::rvv_switcher): Add pollute_flags parameter to
control flag manipulation.
(rvv_switcher::~rvv_switcher): Restore flags conditionally.
(register_builtin_types): Use rvv_switcher without polluting flags.
(get_required_extensions): Remove function.
(check_required_extensions): Simplify to only check type validity.
(function_instance::function_returns_void_p): Move implementation
from header.
(function_builder::add_function): Register placeholder for LTO.
(init_builtins): Simplify and handle LTO case.
(reinit_builtins): Remove function.
(handle_pragma_vector): Remove extension checking.
* config/riscv/riscv-vector-builtins.h
(function_instance::function_returns_void_p): Add declaration.
(function_call_info::function_returns_void_p): Remove inline
implementation.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/lto/pr110812_0.c: New test.
* gcc.target/riscv/lto/pr110812_1.c: New test.
* gcc.target/riscv/lto/riscv-lto.exp: New test driver.
* gcc.target/riscv/lto/riscv_vector.h: New header wrapper.

5 weeks agoDaily bump.
GCC Administrator [Thu, 2 Oct 2025 00:26:28 +0000 (00:26 +0000)] 
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5 weeks agoDaily bump.
GCC Administrator [Wed, 1 Oct 2025 00:27:56 +0000 (00:27 +0000)] 
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5 weeks agoAda: Fix internal error on ill-formed Reduce attribute in Ada 2022
Eric Botcazou [Tue, 30 Sep 2025 09:55:18 +0000 (11:55 +0200)] 
Ada: Fix internal error on ill-formed Reduce attribute in Ada 2022

This is an internal error on the new Reduce attribute of Ada 2022 when the
programmer swaps its arguments(!)  The change makes it so that the compiler
gives an error message instead.

gcc/ada/
PR ada/117517
* sem_attr.adb (Resolve_Attribute) <Attribute_Reduce>: Try to
resolve the reducer first.  Fix casing of error message.

gcc/testsuite/
* gnat.dg/reduce1.adb: New test.

5 weeks agoDaily bump.
GCC Administrator [Tue, 30 Sep 2025 00:27:22 +0000 (00:27 +0000)] 
Daily bump.

5 weeks agoDaily bump.
GCC Administrator [Mon, 29 Sep 2025 00:25:02 +0000 (00:25 +0000)] 
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5 weeks agoFortran: fix assignment to allocatable scalar polymorphic component [PR121616]
Harald Anlauf [Thu, 11 Sep 2025 18:17:31 +0000 (20:17 +0200)] 
Fortran: fix assignment to allocatable scalar polymorphic component [PR121616]

PR fortran/121616

gcc/fortran/ChangeLog:

* primary.cc (gfc_variable_attr): Properly set dimension attribute
from a component ref.

gcc/testsuite/ChangeLog:

* gfortran.dg/alloc_comp_assign_17.f90: New test.

(cherry picked from commit 0899b826f7196f609fc8991456eb728802061318)

5 weeks agoFortran: ICE in character(kind=4) deferred-length array reference [PR121939]
Harald Anlauf [Wed, 24 Sep 2025 18:57:21 +0000 (20:57 +0200)] 
Fortran: ICE in character(kind=4) deferred-length array reference [PR121939]

PR fortran/121939

gcc/fortran/ChangeLog:

* trans-types.cc (gfc_init_types): Set string flag for all
character types.

gcc/testsuite/ChangeLog:

* gfortran.dg/deferred_character_39.f90: Disable temporary
workaround for character(kind=4) deferred-length bug.

(cherry picked from commit 43508d358b9e53abfc3be4e28accbd4a07154dfc)

5 weeks agoFortran: fix issues with rank-2 deferred-length character arrays [PR108581]
Harald Anlauf [Sat, 20 Sep 2025 20:20:25 +0000 (22:20 +0200)] 
Fortran: fix issues with rank-2 deferred-length character arrays [PR108581]

PR fortran/108581

gcc/fortran/ChangeLog:

* trans-array.cc (gfc_conv_expr_descriptor): Take the dynamic
string length into account when deriving the dataptr offset for
a deferred-length character array.

gcc/testsuite/ChangeLog:

* gfortran.dg/deferred_character_39.f90: New test.

(cherry picked from commit 749af11149623dbf9ba026fd98bd7f31409fdaed)

5 weeks agoDaily bump.
GCC Administrator [Sun, 28 Sep 2025 00:25:46 +0000 (00:25 +0000)] 
Daily bump.

5 weeks agoDaily bump.
GCC Administrator [Sat, 27 Sep 2025 00:25:33 +0000 (00:25 +0000)] 
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6 weeks agoLoongArch: Implement TARGET_CAN_INLINE_P[PR121875].
Lulu Cheng [Wed, 24 Sep 2025 06:49:53 +0000 (14:49 +0800)] 
LoongArch: Implement TARGET_CAN_INLINE_P[PR121875].

Because LoongArch does not implement TARGET_CAN_INLINE_P,
functions with the target attribute set and those without
it cannot be inlined.  At the same time, setting the
always_inline attribute will cause compilation failure.

To solve this problem, I implemented this hook. During the
implementation process, it checks the status of the target
special options of the caller and callee, such as the ISA
extension.

PR target/121875

gcc/ChangeLog:

* config/loongarch/loongarch.cc
(loongarch_can_inline_p): New function.
(TARGET_CAN_INLINE_P): Define.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/can_inline_1.c: New test.
* gcc.target/loongarch/can_inline_2.c: New test.
* gcc.target/loongarch/can_inline_3.c: New test.
* gcc.target/loongarch/can_inline_4.c: New test.
* gcc.target/loongarch/can_inline_5.c: New test.
* gcc.target/loongarch/can_inline_6.c: New test.
* gcc.target/loongarch/pr121875.c: New test.

(cherry picked from commit d6ee89a65bd98b14940245ec79814ae3d38b0121)

6 weeks agoDaily bump.
GCC Administrator [Fri, 26 Sep 2025 00:25:10 +0000 (00:25 +0000)] 
Daily bump.

6 weeks agomatch.pd: Add missing type check to reduc(ctor) pattern [PR121772]
Alex Coplan [Tue, 9 Sep 2025 11:57:14 +0000 (12:57 +0100)] 
match.pd: Add missing type check to reduc(ctor) pattern [PR121772]

In this PR we have a reduction of a vector constructor, where the
type of the constructor is int16x8_t and the elements are int16x4_t;
i.e. it is representing a concatenation of two vectors.

This triggers a match.pd pattern which looks like it was written to
handle reductions of vector constructors where the elements of the ctor
are scalars, not vectors.  There is no type check to enforce this
property, which leads to the pattern replacing a reduction to scalar
with an int16x4_t vector in this case, which of course is a type error,
leading to an invalid GIMPLE ICE.

This patch adds a type check to the pattern, only going ahead with the
transformation if the element type of the ctor matches that of the
reduction.

gcc/ChangeLog:

PR tree-optimization/121772
* match.pd: Add type check to reduc(ctor) pattern.

gcc/testsuite/ChangeLog:

PR tree-optimization/121772
* gcc.target/aarch64/torture/pr121772.c: New test.

(cherry picked from commit a7a9b7badc0ba95b510c7e61da6439fca78e31d3)

6 weeks agoc++/modules: Remove incorrect assertion [PR122015,PR122019]
Nathaniel Shead [Thu, 25 Sep 2025 11:05:40 +0000 (21:05 +1000)] 
c++/modules: Remove incorrect assertion [PR122015,PR122019]

This assertion, despite what I said in r16-4070, is not valid: we can
reach here when deduping a VAR_DECL that didn't get a LANG_SPECIFIC in
the current TU.  It's still correct to always use lang_cplusplus however
as for anything else the decl would have been created with an
appropriate LANG_SPECIFIC to start with.

PR c++/122015
PR c++/122019

gcc/cp/ChangeLog:

* module.cc (trees_in::install_entity): Remove incorrect
assertion.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
(cherry picked from commit 4f9f1269f4e929ee471b717b47c33d2d5a3db0d3)

6 weeks agoOpenMP: Unshare expr in context-selector condition [PR121922]
Tobias Burnus [Thu, 18 Sep 2025 09:07:50 +0000 (11:07 +0200)] 
OpenMP: Unshare expr in context-selector condition [PR121922]

As the testcase shows, a missing unshare_expr caused that the condition
was only evaluated once instead of every time when a 'declare variant'
was resolved.

PR middle-end/121922

gcc/ChangeLog:

* omp-general.cc (omp_dynamic_cond): Use 'unshare_expr' for
the user condition.

libgomp/ChangeLog:

* testsuite/libgomp.c-c++-common/declare-variant-1.c: New test.

Co-authored-by: Sandra Loosemore <sloosemore@baylibre.com>
(cherry picked from commit 97c1d2fa97afc59b02d2894b88069136145603e2)

6 weeks agoDaily bump.
GCC Administrator [Thu, 25 Sep 2025 00:28:17 +0000 (00:28 +0000)] 
Daily bump.

6 weeks agolibstdc++/testsuite: Unpoison 'u' on s390x in names.cc test
Patrick Palka [Wed, 24 Sep 2025 02:41:26 +0000 (22:41 -0400)] 
libstdc++/testsuite: Unpoison 'u' on s390x in names.cc test

This is the s390 counterpart to r11-7364-gd0453cf5c68b6a, and fixes the
following names.cc failure caused by a use of a poisoned identifier.
If we look at the corresponding upstream header[1] it's clear that the
problematic identifier is 'u'.

In file included from /usr/include/linux/types.h:5,
                 from /usr/include/linux/sched/types.h:5,
                 from /usr/include/bits/sched.h:61,
                 from /usr/include/sched.h:43,
                 from /usr/include/pthread.h:22,
                 from /usr/include/c++/14/s390x-redhat-linux/bits/gthr-default.h:35,
                 from /usr/include/c++/14/s390x-redhat-linux/bits/gthr.h:157,
                 from /usr/include/c++/14/ext/atomicity.h:35,
                 from /usr/include/c++/14/bits/ios_base.h:39,
                 from /usr/include/c++/14/streambuf:43,
                 from /usr/include/c++/14/bits/streambuf_iterator.h:35,
                 from /usr/include/c++/14/iterator:66,
                 from /usr/include/c++/14/s390x-redhat-linux/bits/stdc++.h:54,
                 from /root/rpmbuild/BUILD/gcc-14.3.1-20250617/libstdc++-v3/testsuite/17_intro/names.cc:384:
/usr/include/asm/types.h:24: error: expected unqualified-id before '[' token
/usr/include/asm/types.h:24: error: expected ')' before '[' token
/root/rpmbuild/BUILD/gcc-14.3.1-20250617/libstdc++-v3/testsuite/17_intro/names.cc:101: note: to match this '('
compiler exited with status 1
FAIL: 17_intro/names.cc  -std=gnu++98 (test for excess errors)
Excess errors:
/usr/include/asm/types.h:24: error: expected unqualified-id before '[' token
/usr/include/asm/types.h:24: error: expected ')' before '[' token

[1]: https://github.com/torvalds/linux/blob/master/arch/s390/include/uapi/asm/types.h

libstdc++-v3/ChangeLog:

* testsuite/17_intro/names.cc: Undefine 'u' on s390*-linux.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
(cherry picked from commit e9f3138f38067664bae25947ebabc0e8fa223d43)

6 weeks agoc++: find_template_parameters and NTTPs [PR121981]
Patrick Palka [Sat, 20 Sep 2025 14:45:22 +0000 (10:45 -0400)] 
c++: find_template_parameters and NTTPs [PR121981]

Here the normal form of the two immediately-declared D<<placeholder>, V>
constraints is the same, so we rightfully share the normal form between
them.  We first compute the normal form from the context of auto deduction
for W in which case the placeholder has level 2 where the set of
in-scope template parameters has depth 2 (a dummy level is added from
normalize_placeholder_type_constraints).

Naturally the atomic constraint only depends on the template parameter
V of depth 1 index 0.  The depth 2 of current_template_parms however
means that find_template_parameters when it sees V within the atomic
constraint will recurse into its TREE_TYPE, an auto of level 2, and mark
the atomic constraint as also depending on the template parameter of
depth 2 index 0, which is clearly wrong.  Later during constraint
checking for B we ICE within the satisfaction cache since we lack two
levels of template arguments supposedly needed by the cached atomic
constraint.

I think when find_template_parameters sees an NTTP, it doesn't need to
walk its TREE_TYPE because NTTP substitution is done obliviously with
respect to its type -- only the corresponding NTTP argument matters,
not other template arguments possibly used within its type.  This is
most clearly true for (unconstrained) auto NTTPs as in the testcase, but
also true for other NTTPs.  Doing so fixes the testcase because we no
longer record any depth 2 when walking V within the atomic constraint.

PR c++/121981

gcc/cp/ChangeLog:

* pt.cc (any_template_parm_r) <case TEMPLATE_TYPE_PARM>:
Don't walk TREE_TYPE.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-placeholder15.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 396e9118849c4b918eaf3edcfa60d36e2b973019)

6 weeks agoopenmp: Fix up ICE in lower_omp_regimplify_operands_p [PR121977]
Jakub Jelinek [Thu, 18 Sep 2025 14:41:32 +0000 (16:41 +0200)] 
openmp: Fix up ICE in lower_omp_regimplify_operands_p [PR121977]

The following testcase ICEs in functions called from
lower_omp_regimplify_operands_p, because maybe_lookup_decl returns
NULL for this (on the outer taskloop context) when regimplifying the
taskloop pre body.  If it isn't found in current context, we should
look in outer ones.

2025-09-18  Jakub Jelinek  <jakub@redhat.com>

PR c++/121977
* omp-low.cc (lower_omp_regimplify_operands_p): If maybe_lookup_decl
returns NULL, use maybe_lookup_decl_in_outer_ctx as fallback.

* g++.dg/gomp/pr121977.C: New test.

(cherry picked from commit b49f1dad54d3638384780c11ed17ab43f6d5d86f)

6 weeks agodocs: Adjust -Wimplicit-fallthrough= documentation for C23
Jakub Jelinek [Tue, 16 Sep 2025 17:25:58 +0000 (19:25 +0200)] 
docs: Adjust -Wimplicit-fallthrough= documentation for C23

I've noticed in -Wimplicit-fallthrough= documentation we talk about
[[fallthrough]]; for C++17 but don't mention that it is also standard
way to suppress the warning for C23.

2025-09-16  Jakub Jelinek  <jakub@redhat.com>

* doc/invoke.texi (Wimplicit-fallthrough=): Document that also C23
provides a standard way to suppress the warning with [[fallthrough]];.

(cherry picked from commit 5eb86c29d29fa25f8ad81d75730a993bb03fb558)

6 weeks agotestsuite: Only scan for known file extensions in lto.exp
Jakub Jelinek [Wed, 10 Sep 2025 10:39:11 +0000 (12:39 +0200)] 
testsuite: Only scan for known file extensions in lto.exp

This is something that has bothered me for a few years but I've only found
time for it now.
The glob used for finding *_1.* etc. counterparts to the *_0.* tests is too
broad, so if one has say next to *_1.c file also *_1.c~ or *_1.c.~1~
or *_1.c.orig or *_1.c.bak etc. files, lto.exp will report a warning and the
test will fail.
So, e.g. in rpm build if some backported commit in patch form adds some
gcc/testsuite/*.dg/lto/ test and one uses -b option to patch, if one doesn't
remove the backup files, the test will fail.

Looking through all the *.dg/lto/ directories, I only see c, C, ii, f, f90
and d extensions used right now for the *_1.* files (and higher), while for
the *_0.* files also m, mm and f03 extensions are used.

So, the following patch only searches for those (plus for Fortran uses the
extensions searched by the gfortran.dg/lto/ driver, i.e. \[fF\]{,90,95,03,08}
, not just f, f90 and f03).

Tested on x86_64-linux and verified I got exactly the same number of
grep '^Executing.on.host.*_[1-9]\.' testsuite/*/*.log
before/after this patch when doing make check RUNTESTFLAGS=lto.exp
except for 2 new ones which were previously failed because I had backup
files for 2 tests.

2025-09-10  Jakub Jelinek  <jakub@redhat.com>

* lib/lto.exp (lto-execute-1): Search for _1.* etc. files
only with a list of known extensions.

(cherry picked from commit 2bb8cd3609f5997b5a22925267b675808127311a)

6 weeks agobitint: Fix up lowering optimization of .*_OVERFLOW ifns [PR121828]
Jakub Jelinek [Wed, 10 Sep 2025 10:34:50 +0000 (12:34 +0200)] 
bitint: Fix up lowering optimization of .*_OVERFLOW ifns [PR121828]

THe lowering of .{ADD,SUB,MUL}_OVERFLOW ifns is optimized, so that we don't
in the common cases uselessly don't create a large _Complex _BitInt
temporary with the first (real) part being the result and second (imag) part
just being a huge 0 or 1, although we still do that if it can't be done.
The optimizable_arith_overflow function checks when that is possible, like
whether the ifn result is used at most twice, once in REALPART_EXPR and once
in IMAGPART_EXPR in the same bb, etc.  For IMAGPART_EXPR it then checks
if it has a single use which is a cast to some integral non-bitint type
(usually bool or int etc.).  The final check is whether that cast stmt
appears after the REALPART_EXPR (the usual case), in that case it is
optimizable, otherwise it is not (because the lowering for optimizable
ifns of this kind is done at the location of the REALPART_EXPR and it
tweaks the IMAGPART_EXPR cast location at that point, so otherwise it
would be set after use.

Now, we also have an optimization for the REALPART_EXPR lhs being used
in a single stmt - store in the same bb, in that case we don't have to
store the real part result in a temporary but it can go directly into
memory.
Except that nothing checks for the IMAGPART_EXPR cast being before or after
the store in this case, so the following testcase ICEs because we have
a use before a def stmt.

In bar (the function handled right already before this patch) we have
  _6 = .SUB_OVERFLOW (y_4(D), x_5(D));
  _1 = REALPART_EXPR <_6>;
  _2 = IMAGPART_EXPR <_6>;
  a = _1;
  _3 = (int) _2;
  baz (_3);
before the lowering, so we can just store the limbs of the .SUB_OVERFLOW
into the limbs of a variable and while doing that compute the value we
eventually store into _3 instead of the former a = _1; stmt.
In foo we have
  _5 = .SUB_OVERFLOW (y_3(D), x_4(D));
  _1 = REALPART_EXPR <_5>;
  _2 = IMAGPART_EXPR <_5>;
  t_6 = (int) _2;
  baz (t_6);
  a = _1;
and we can't do that because the lowering would be at the a = _1; stmt
and would try to set t_6 to the overflow flag at that point.  We don't
need to punt completely and mark _5 as _Complex _BitInt VAR_DECL though
in this case, all we need is not merge the a = _1; store with the
.SUB_OVERFLOW and REALPART_EXPR/IMAGPART_EXPR lowering.  So, add _1
to m_names and lower the first 3 stmts at the _1 = REALPART_EXPR <_5>;
location, optimizable_arith_overflow returned non-zero and so the
cast after IMAGPART_EXPR was after it and then a = _1; will copy from
the temporary VAR_DECL to memory.

2025-09-10  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/121828
* gimple-lower-bitint.cc (gimple_lower_bitint): For REALPART_EXPR
consumed by store in the same bb and with REALPART_EXPR from
optimizable_arith_overflow, don't add REALPART_EXPR lhs to
the m_names bitmap only if the cast from IMAGPART_EXPR doesn't
appear in between the REALPART_EXPR and the store.

* gcc.dg/bitint-126.c: New test.

(cherry picked from commit 29a8ce3b0bb117ed7f4b998462fe917f2a17f168)

6 weeks agoexpr: Handle RAW_DATA_CST in store_constructor [PR121831]
Jakub Jelinek [Wed, 10 Sep 2025 10:33:14 +0000 (12:33 +0200)] 
expr: Handle RAW_DATA_CST in store_constructor [PR121831]

I thought this wouldn't be necessary because RAW_DATA_CST can only appear
inside of (array) CONSTRUCTORs within DECL_INITIAL of TREE_STATIC vars,
so there shouldn't be a need to expand it.  Except that we have an
optimization when reading ARRAY_REF from such a CONSTRUCTOR which will
try to expand the constructor if it either can be stored by pieces
(I think that is just fine) or if it is mostly zeros (which is at least
75% of the initializer zeros).  Now the second case is I think in some
cases desirable (say 256MB initializer and just 20 elements out of that
non-zero, so clear everything and store 20 elements must be fastest and
short), but could be really bad as well (say 40GB initializer with
10GB non-zero in it, especially if it doesn't result in the original
variable being optimized away).  Maybe it would help if expand_constructor
and store_constructor* etc. had some optional argument with addresses into
the original VAR_DECL so that it could be copying larger amounts of data
like larger RAW_DATA_CSTs from there instead of pushing those into new
.rodata again.  And another problem is that we apparently expand the
initializes twice, expand_constructor in store_constructor can expand
the stores one and if expand_constructor returns non-NULL, we then
expand_expr the CONSTRUCTOR again. to the same location.

This patch doesn't address either of those issues, just adds RAW_DATA_CST
support to store_constructor for now.  For the can_store_by_pieces
cases it stores those by pieces using a new callback very similar to
string_cst_read_str, for the rest (unfortunately) forces it into a memory
and copies from there.

2025-09-10  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/121831
* expr.cc (raw_data_cst_read_str): New function.
(store_constructor) <case ARRAY_TYPE>: Handle RAW_DATA_CST.

* g++.dg/lto/pr121831_0.C: New test.
* g++.dg/lto/pr121831_1.C: New test.

(cherry picked from commit 225d13c01d4e231bfabfda1c1c9135e36f55946a)

6 weeks agolibstdc++: Fix up <ext/pointer.h> [PR121827]
Jakub Jelinek [Mon, 8 Sep 2025 09:49:58 +0000 (11:49 +0200)] 
libstdc++: Fix up <ext/pointer.h> [PR121827]

During the tests mentioned in
https://gcc.gnu.org/pipermail/gcc-patches/2025-August/692482.html
(but dunno why I haven't noticed it back in August but only when testing
https://gcc.gnu.org/pipermail/gcc-patches/2025-September/694527.html )
I've noticed two ext header problems.
One is that #include <ext/pointer.h> got broken with the
r13-3037-g18f176d0b25591e28 change and since then is no longer
self-contained, as it includes iosfwd only if _GLIBCXX_HOSTED is defined
but doesn't actually include bits/c++config.h to make sure it is defined,
then includes a bunch of headers which do include bits/c++config.h and
finally uses in #if _GLIBCXX_HOSTED guarded code what is declared in iosfwd.
The other problem is that ext/cast.h is also not a self-contained header,
but that one has
/** @file ext/cast.h
 *  This is an internal header file, included by other library headers.
 *  Do not attempt to use it directly. @headername{ext/pointer.h}
 */
comment, so I think we just shouldn't include it in extc++.h and let
ext/pointer.h include it.

2025-09-08  Jakub Jelinek  <jakub@redhat.com>

PR libstdc++/121827
* include/precompiled/extc++.h: Don't include ext/cast.h which is an
internal header.
* include/ext/pointer.h: Include bits/c++config.h before
#if _GLIBCXX_HOSTED.

(cherry picked from commit 592bafb26eb1fd50979f6cdf2176897c4a02c281)

6 weeks agotestsuite, powerpc, v2: Fix vsx-vectorize-* after alignment peeling [PR118567]
Jakub Jelinek [Fri, 5 Sep 2025 08:59:42 +0000 (10:59 +0200)] 
testsuite, powerpc, v2: Fix vsx-vectorize-* after alignment peeling [PR118567]

On Tue, Jul 01, 2025 at 02:50:40PM -0500, Segher Boessenkool wrote:
> No tests become good tests without effort.  And tests that are not good
> tests require constant maintenance!

Here are two patches, either just the first one or both can be used
and both were tested on powerpc64le-linux.

The second one adds further 8 tests, which are dg-do run which #include
the former tests, don't do any dump tests and just define the checking/main
for those.

2025-09-05  Jakub Jelinek  <jakub@redhat.com>

PR testsuite/118567
* gcc.target/powerpc/vsx-vectorize-9.c: New test.
* gcc.target/powerpc/vsx-vectorize-10.c: New test.
* gcc.target/powerpc/vsx-vectorize-11.c: New test.
* gcc.target/powerpc/vsx-vectorize-12.c: New test.
* gcc.target/powerpc/vsx-vectorize-13.c: New test.
* gcc.target/powerpc/vsx-vectorize-14.c: New test.
* gcc.target/powerpc/vsx-vectorize-15.c: New test.
* gcc.target/powerpc/vsx-vectorize-16.c: New test.

(cherry picked from commit 8d8b6249d83609e56752ee51d2686b2f5fb062e6)

6 weeks agotestsuite, powerpc, v2: Fix vsx-vectorize-* after alignment peeling [PR118567]
Jakub Jelinek [Fri, 5 Sep 2025 08:54:53 +0000 (10:54 +0200)] 
testsuite, powerpc, v2: Fix vsx-vectorize-* after alignment peeling [PR118567]

On Tue, Jul 01, 2025 at 02:50:40PM -0500, Segher Boessenkool wrote:
> No tests become good tests without effort.  And tests that are not good
> tests require constant maintenance!

Here are two patches, either just the first one or both can be used
and both were tested on powerpc64le-linux.

The first one removes all the checking etc. stuff from the testcases,
as they are just dg-do compile, for the vectorize dump checks all we
care about are the vectorized loops they want to test.

2025-09-05  Jakub Jelinek  <jakub@redhat.com>

PR testsuite/118567
* gcc.target/powerpc/vsx-vectorize-1.c: Remove includes, checking
part of main1 and main.
* gcc.target/powerpc/vsx-vectorize-2.c: Remove includes, replace
bar definition with declaration, remove main.
* gcc.target/powerpc/vsx-vectorize-3.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-4.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-5.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-6.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-7.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-8.c: Likewise.

(cherry picked from commit 193b28649933685f4dd3824c01aee4f843cc66b5)

6 weeks agoomp-expand: Initialize fd->loop.n2 if needed for the zero iter case [PR121453]
Jakub Jelinek [Mon, 25 Aug 2025 22:28:10 +0000 (00:28 +0200)] 
omp-expand: Initialize fd->loop.n2 if needed for the zero iter case [PR121453]

When expand_omp_for_init_counts is called from expand_omp_for_generic,
zero_iter1_bb is NULL and the code always creates a new bb in which it
clears fd->loop.n2 var (if it is a var), because it can dominate code
with lastprivate guards that use the var.
When called from other places, zero_iter1_bb is non-NULL and so we don't
insert the clearing (and can't, because the same bb is used also for the
non-zero iterations exit and in that case we need to preserve the iteration
count).  Clearing is also not necessary when e.g. outermost collapsed
loop has constant non-zero number of iterations, in that case we initialize the
var to something already earlier.  The following patch makes sure to clear
it if it hasn't been initialized yet before the first check for zero iterations.

2025-08-26  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/121453
* omp-expand.cc (expand_omp_for_init_counts): Clear fd->loop.n2
before first zero count check if zero_iter1_bb is non-NULL upon
entry and fd->loop.n2 has not been written yet.

* gcc.dg/gomp/pr121453.c: New test.

(cherry picked from commit 948f20cc520e50968f8759b173096358dcbba3de)

6 weeks agoc++: Fix up build_cplus_array_type [PR121524]
Jakub Jelinek [Thu, 14 Aug 2025 20:30:45 +0000 (22:30 +0200)] 
c++: Fix up build_cplus_array_type [PR121524]

The following testcase is miscompiled since my r15-3046 change
to properly apply std attributes after closing ] for arrays to the
array type.
Array type is not a class type, so when cplus_decl_attribute is
called on the ARRAY_TYPE, it doesn't do ATTR_FLAG_TYPE_IN_PLACE.
Though, for alignas/gnu::aligned/deprecated/gnu::unavailable/gnu::unused
attributes the handlers of those attributes for non-ATTR_FLAG_TYPE_IN_PLACE
on types call build_variant_type_copy and modify some flags on the new
variant type.  They also usually don't clear *no_add_attrs, so the caller
then checks if the attributes are present on the new type and if not, calls
build_type_attribute_variant.
On the following testcase, it results in the B::foo type to be properly
32 byte aligned.
The problem happens later when we build_cplus_array_type for C::a.
elt_type is T (typedef, or using works likewise), we get as m
main variant type with unsigned int element type but because elt_type
is different, build_cplus_array_type searches the TYPE_NEXT_VARIANT chain
to find if there isn't already a useful ARRAY_TYPE to reuse.
It checks for NULL TYPE_NAME, NULL TYPE_ATTRIBUTES and the right TREE_TYPE.
Unfortunately this is not good enough, build_variant_type_copy above created
a variant type on which it modified TYPE_USER_ALIGN and TYPE_ALIGN, but
TYPE_ATTRIBUTES is still NULL, only the build_type_attribute_variant call
later adds attributes.
The problem is that the intermediate type is found in the TYPE_NEXT_VARIANT
chain and reused.

The following patch adds conditions to prevent problems with the affected
attributes (except gnu::unused, I think whether TREE_USED is set or not
shouldn't prevent sharing).  In particular, if TYPE_USER_ALIGN is not
set on the variant, it wasn't user realigned, if it is set, it verifies
it has it set because the elt_type has been user aligned and TYPE_ALIGN
is the expected one.  For deprecated it punts on the flag being set and
for gnu::unavailable as well.

2025-08-14  Jakub Jelinek  <jakub@redhat.com>

PR c++/121524
* tree.cc (build_cplus_array_type): Don't reuse variant type
if it has TREE_DEPRECATED or TREE_UNAVAILABLE flags set or,
unless elt_type has TYPE_USER_ALIGN set and TYPE_ALIGN is
TYPE_ALIGN of elt_type, TYPE_USER_ALIGN is not set.

* g++.dg/cpp0x/gen-attrs-89.C: New test.

(cherry picked from commit b125eee2d8526538476834773fb8216035d08598)

6 weeks agotree-optimization/122016 - PRE insertion breaks abnormal coalescing
Richard Biener [Mon, 22 Sep 2025 08:14:31 +0000 (10:14 +0200)] 
tree-optimization/122016 - PRE insertion breaks abnormal coalescing

When PRE asks VN to simplify a NARY but not insert, that bypasses
the abnormal guard in maybe_push_res_to_seq and we blindly accept
new uses of abnormals.  The following fixes this.

PR tree-optimization/122016
* tree-ssa-sccvn.cc (vn_nary_simplify): Do not use the
simplified expression when it references abnormals.

* gcc.dg/torture/pr122016.c: New testcase.

(cherry picked from commit 52b53cfb5392257536fce8dd22ea60412ceaee7d)

6 weeks agoDeal with prior EH/abormal cleanup when fixing up noreturn calls
Richard Biener [Wed, 10 Sep 2025 15:14:07 +0000 (17:14 +0200)] 
Deal with prior EH/abormal cleanup when fixing up noreturn calls

When a dead EH or abnormal edge makes a call queued for noreturn fixup
unreachable, just skip processing it.

PR tree-optimization/121870
* tree-ssa-propagate.cc
(substitute_and_fold_engine::substitute_and_fold): Skip
removed stmts from noreturn fixup.

* g++.dg/torture/pr121870.C: New testcase.

(cherry picked from commit 5c4f1313e753aeb6920a48c62c7c99ad36e1adae)

6 weeks agotree-optimization/121844 - IVOPTs and asm goto in latch
Richard Biener [Mon, 8 Sep 2025 12:32:38 +0000 (14:32 +0200)] 
tree-optimization/121844 - IVOPTs and asm goto in latch

When there's an asm goto in the latch of a loop we may not use
IP_END IVs since instantiating those would (need to) split the
latch edge which in turn invalidates IP_NORMAL position handling.
This is a revision of the PR107997 fix.

PR tree-optimization/107997
PR tree-optimization/121844
* tree-ssa-loop-ivopts.cc (allow_ip_end_pos_p): Do not allow
IP_END for latches ending with a control stmt.
(create_new_iv): Do not split the latch edge, instead assert
that's not necessary.

* gcc.dg/torture/pr121844.c: New testcase.

(cherry picked from commit 00cd34b1046076a3272f8e8e85c97dc8f4d2ea44)

6 weeks agotree-optimization/121659 - bogus swap of reduction operands
Richard Biener [Tue, 26 Aug 2025 08:34:01 +0000 (10:34 +0200)] 
tree-optimization/121659 - bogus swap of reduction operands

The following addresses a bogus swapping of SLP operands of a
reduction operation which gets STMT_VINFO_REDUC_IDX out of sync
with the SLP operand order.  In fact the most obvious mistake is
that we simply swap operands even on the first stmt even when
there's no difference in the comparison operators (for == and !=
at least).  But there are more latent issues that I noticed and
fixed up in the process.

PR tree-optimization/121659
* tree-vect-slp.cc (vect_build_slp_tree_1): Do not allow
matching up comparison operators by swapping if that would
disturb STMT_VINFO_REDUC_IDX.  Make sure to only
actually mark operands for swapping when there was a
mismatch and we're not processing the first stmt.

* gcc.dg/vect/pr121659.c: New testcase.

(cherry picked from commit 68e692eed9e8e8c47d83586ee08f40c27fa3a78d)

6 weeks agotree-optimization/121527 - wrong SRA with aggregate copy
Richard Biener [Mon, 18 Aug 2025 11:38:37 +0000 (13:38 +0200)] 
tree-optimization/121527 - wrong SRA with aggregate copy

SRA handles outermost VIEW_CONVERT_EXPRs but it wrongly ignores
those when building an access which leads to the wrong size
used when the VIEW_CONVERT_EXPR does not have the same size as
its operand which is valid GENERIC and is used by Ada upcasting.

PR tree-optimization/121527
* tree-sra.cc (build_access_from_expr_1): Do not strip an
outer VIEW_CONVERT_EXPR as it's relevant for the size of
the access.
(get_access_for_expr): Likewise.

(cherry picked from commit 1d0a0173cd3e48f1c7c7e98893d440527fc198d0)

6 weeks agotree-optimization/121370 - avoid UB in building a CHREC
Richard Biener [Tue, 5 Aug 2025 06:59:18 +0000 (08:59 +0200)] 
tree-optimization/121370 - avoid UB in building a CHREC

When there is obvious UB involved in the process of re-associating
a series of IV increments to build up a CHREC, fail.  This catches
a few degenerate cases where SCEV introduces UB with its inherent
re-associating of IV increments.

PR tree-optimization/121370
* tree-scalar-evolution.cc (scev_dfs::add_to_evolution_1):
Avoid UB integer overflow in accumulating CHREC_RIGHT.

* gcc.dg/torture/pr121370.c: New testcase.

(cherry picked from commit afafae097232e700bb7a74a453a048b83ebefccd)

6 weeks agoc++/modules: Fix language linkage handling [PR122019]
Nathaniel Shead [Mon, 22 Sep 2025 09:16:01 +0000 (19:16 +1000)] 
c++/modules: Fix language linkage handling [PR122019]

The ICE in the linked PR is caused because when current_lang_name is
lang_name_c, set_decl_linkage calls decl_linkage on the retrofitted
declaration.  This is problematic because at this point we haven't
finished streaming the declaration, and so we crash when attempting to
access these missing bits (such as the type).

The only declarations we can reach here will be things like types that
don't get a language linkage anyway, so it seems reasonable to just
hardcode a C++ language linkage here to work around the issue.

An alternative fix would be to override current_lang_name in
lazy_load_binding instead, but this is potentially confusing if we ever
deliberately implement `extern "C" import "header_unit.hpp";` to
override the language linkage of imported declarations, so I went with
this approach instead.  (Though it seems we never will do this.)

While testing this I found that we don't currently complain about
mismatching language linkages for variables, and module_may_redeclare
doesn't cope well with implementation units, so this patch also fixes
those issues.

PR c++/122019

gcc/cp/ChangeLog:

* module.cc (trees_in::install_entity): Don't be affected by
global language linkage state.
(trees_in::is_matching_decl): Check mismatching language linkage
for variables too.
(module_may_redeclare): Report the correct module name for
partitions and implementation units.

gcc/testsuite/ChangeLog:

* g++.dg/modules/lang-4_a.C: New test.
* g++.dg/modules/lang-4_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit fe2f86a960435a7c8c4e5134a0dfc64dd6062157)

6 weeks agoDaily bump.
GCC Administrator [Wed, 24 Sep 2025 00:28:42 +0000 (00:28 +0000)] 
Daily bump.

6 weeks agoFortran: Use associated TBP subroutine not found [PR89092]
Paul Thomas [Wed, 13 Aug 2025 06:16:31 +0000 (07:16 +0100)] 
Fortran: Use associated TBP subroutine not found [PR89092]

2025-08-13  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/89092
* resolve.cc (was_declared): Add subroutine attribute.

gcc/testsuite/
PR fortran/89092
* gfortran.dg/pr89092.f90: New test.

(cherry picked from commit e6f4543f63366433493b3870845b555fd00be7e6)

6 weeks agoc++: Fix canonical type for lambda pack captures [PR122015]
Nathaniel Shead [Mon, 22 Sep 2025 14:18:43 +0000 (00:18 +1000)] 
c++: Fix canonical type for lambda pack captures [PR122015]

comp_template_parms_position uses whether a TEMPLATE_TYPE_PARM is a pack
to determine equivalency.  This in turn affects whether
canonical_type_parameter finds a pre-existing auto type as equivalent.

When generating the 'auto...' type for a lambda pack capture, we only
mark it as a pack after generating the node (and calculating its
canonical); this means that later when comparing a version streamed in
from a module we think that two equivalent types have different
TYPE_CANONICAL, because the latter already had
TEMPLATE_PARM_PARAMETER_PACK set before calculating its canonical.

This patch fixes this by using a new 'make_auto_pack' function to ensure
that packness is set before the canonical is looked up.

PR c++/122015

gcc/cp/ChangeLog:

* cp-tree.h (make_auto_pack): Declare.
* lambda.cc (lambda_capture_field_type): Use make_auto_pack to
ensure TYPE_CANONICAL is set correctly.
* pt.cc (make_auto_pack): New function.

gcc/testsuite/ChangeLog:

* g++.dg/modules/lambda-11.h: New test.
* g++.dg/modules/lambda-11_a.H: New test.
* g++.dg/modules/lambda-11_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Patrick Palka <ppalka@redhat.com>
(cherry picked from commit cc79849cc883146964f0001f33c8b7eb576825c4)

6 weeks agoDaily bump.
GCC Administrator [Tue, 23 Sep 2025 00:27:13 +0000 (00:27 +0000)] 
Daily bump.

6 weeks agoAda: Fix internal error on use clause present in generic formal part
Eric Botcazou [Mon, 22 Sep 2025 09:08:34 +0000 (11:08 +0200)] 
Ada: Fix internal error on use clause present in generic formal part

This is a regression present on the mainline and 15 branch: the compiler
aborts on a use clause present in the formal part of a generic unit because
of an oversight in the new inference code for generic actual parameters.

The fix also adds a missing test to Analyze_Dimension_Array_Aggregate.

gcc/ada/
PR ada/121968
* sem_ch12.adb (Associations.Find_Assoc): Add guard for clauses.
* sem_dim.adb (Analyze_Dimension_Array_Aggregate): Add test for
N_Iterated_Component_Association nodes.

6 weeks agoDaily bump.
GCC Administrator [Mon, 22 Sep 2025 00:26:58 +0000 (00:26 +0000)] 
Daily bump.

6 weeks agoDaily bump.
GCC Administrator [Sun, 21 Sep 2025 00:24:25 +0000 (00:24 +0000)] 
Daily bump.

6 weeks ago[MicroBlaze][PR target/118280] Fix __atomic_test_and_set
Michael Eager [Fri, 19 Sep 2025 16:53:28 +0000 (09:53 -0700)] 
[MicroBlaze][PR target/118280] Fix __atomic_test_and_set

Atomic support enhanced to fix existing atomic_compare_and_swapsi pattern
to handle side effects; new patterns atomic_fetch_op and atomic_test_and_set
added. As MicroBlaze has no QImode test/set instruction, use shift magic
to implement atomic_test_and_set.

PR target/118280
gcc/
* config/microblaze/iterators.md: New.
* config/microblaze/microblaze-protos.h: Add
microblaze_subword_address.
* config/microblaze/microblaze.cc: Ditto.
* config/microblaze/microblaze.md: constants: Add UNSPECV_CAS_BOOL,
UNSPECV_CAS_MEM, UNSPECV_CAS_VAL, UNSPECV_ATOMIC_FETCH_OP
type: add atomic
* config/microblaze/sync.md: Add atomic_fetch_<atomic_optab>si
atomic_test_and_set

Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Gopi Kumar Bulusu <gopi@sankhya.com>
Signed-off-by: Michael Eager <eager@eagercon.com>
6 weeks agoDaily bump.
GCC Administrator [Sat, 20 Sep 2025 00:25:46 +0000 (00:25 +0000)] 
Daily bump.

7 weeks agoDaily bump.
GCC Administrator [Fri, 19 Sep 2025 00:27:53 +0000 (00:27 +0000)] 
Daily bump.

7 weeks agolibstdc++: Explicitly pass -Wsystem-headers in tests that need it
Patrick Palka [Wed, 17 Sep 2025 00:59:10 +0000 (20:59 -0400)] 
libstdc++: Explicitly pass -Wsystem-headers in tests that need it

When running libstdc++ tests using an installed gcc (as opposed to an
in-tree gcc), we naturally use system stdlib headers instead of the
in-tree headers.  But warnings from within system headers are suppressed
by default, so tests that check for such warnings spuriously fail in such
a setup.  This patch makes us compile such tests with -Wsystem-headers so
that they consistently pass.

libstdc++-v3/ChangeLog:

* testsuite/20_util/bind/dangling_ref.cc: Compile with
-Wsystem-headers.
* testsuite/20_util/ratio/operations/ops_overflow_neg.cc: Likewise.
* testsuite/20_util/unique_ptr/lwg4148.cc: Likewise.
* testsuite/29_atomics/atomic/operators/pointer_partial_void.cc:
Likewise.
* testsuite/30_threads/packaged_task/cons/dangling_ref.cc:
Likewise.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
(cherry picked from commit e690b97761e18daccb4fff0151c97c1d0115b55f)

7 weeks agoRemove SPR/GNR/DMR from avx512_{move,store}_by pieces tune.
hongtao.liu [Tue, 16 Sep 2025 01:23:45 +0000 (03:23 +0200)] 
Remove SPR/GNR/DMR from avx512_{move,store}_by pieces tune.

Align move_max with prefer_vector_width for SPR/GNR/DMR similar as
below commit.

commit 6ea25c041964bf63014fcf7bb68fb1f5a0a4e123
Author: liuhongt <hongtao.liu@intel.com>
Date:   Thu Aug 15 12:54:07 2024 +0800

    Align ix86_{move_max,store_max} with vectorizer.

    When none of mprefer-vector-width, avx256_optimal/avx128_optimal,
    avx256_store_by_pieces/avx512_store_by_pieces is specified, GCC will
    set ix86_{move_max,store_max} as max available vector length except
    for AVX part.

                  if (TARGET_AVX512F_P (opts->x_ix86_isa_flags)
                      && TARGET_EVEX512_P (opts->x_ix86_isa_flags2))
                    opts->x_ix86_move_max = PVW_AVX512;
                  else
                    opts->x_ix86_move_max = PVW_AVX128;

    So for -mavx2, vectorizer will choose 256-bit for vectorization, but
    128-bit is used for struct copy, there could be a potential STLF issue
    due to this "misalign".

gcc/ChangeLog:

* config/i386/x86-tune.def (X86_TUNE_AVX512_MOVE_BY_PIECES):
Remove SPR/GNR/DMR.
(X86_TUNE_AVX512_STORE_BY_PIECES): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pieces-memcpy-18.c: Use -mtune=znver5
instead of -mtune=sapphirerapids.
* gcc.target/i386/pieces-memcpy-21.c: Ditto.
* gcc.target/i386/pieces-memset-46.c: Ditto.
* gcc.target/i386/pieces-memset-49.c: Ditto.

(cherry picked from commit dd713d0f3fc88778a9b3d4f8f1895a3cd6c145ca)

7 weeks agoDaily bump.
GCC Administrator [Thu, 18 Sep 2025 00:27:15 +0000 (00:27 +0000)] 
Daily bump.

7 weeks agotestsuite: arm: Simplify fp16-aapcs tests
Torbjörn SVENSSON [Wed, 27 Aug 2025 14:25:14 +0000 (16:25 +0200)] 
testsuite: arm: Simplify fp16-aapcs tests

Reduce fp16-aapcs testcases to return value testing since parameter
passing are already tested in aapcs/vfp*.c

gcc/testsuite/ChangeLog:
* gcc.target/arm/fp16-aapcs.c: New test.
* gcc.target/arm/fp16-aapcs-1.c: Removed.
* gcc.target/arm/fp16-aapcs-2.c: Likewise.
* gcc.target/arm/fp16-aapcs-3.c: Likewise.
* gcc.target/arm/fp16-aapcs-4.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 1cf8cb45d872a5f09d65c63c891c091710c37432)

7 weeks agoDaily bump.
GCC Administrator [Wed, 17 Sep 2025 00:26:44 +0000 (00:26 +0000)] 
Daily bump.

7 weeks agoFix latent LRA bug
Jeff Law [Fri, 12 Sep 2025 22:08:38 +0000 (16:08 -0600)] 
Fix latent LRA bug

Shreya's work to add the addptr pattern on the RISC-V port exposed a latent bug
in LRA.

We lazily allocate/reallocate the ira_reg_equiv structure and when we do
(re)allocation we'll over-allocate and zero-fill so that we don't have to
actually allocate and relocate the data so often.

In the case exposed by Shreya's work we had N requested entries at the last
rellocation step.  We actually allocate N+M entries.  During LRA we allocate
enough new pseudos and thus have N+M+1 pseudos.

In get_equiv we read ira_reg_equiv[regno] without bounds checking so we read
past the allocated part of the array and get back junk which we use and
depending on the precise contents we fault in various fun and interesting ways.

We could either arrange to re-allocate ira_reg_equiv again on some path through
LRA (possibly in get_equiv itself).  We could also just insert the bounds check
in get_equiv like is done elsewhere in LRA.  Vlad indicated no strong
preference in an email last week.

So this just adds the bounds check in a manner similar to what's done elsewhere
in LRA.  Bootstrapped and regression tested on x86_64 as well as RISC-V with
Shreya's work enabled and regtested across the various embedded targets.

gcc/
* lra-constraints.cc (get_equiv): Bounds check before accessing
data in ira_reg_equiv.

(cherry picked from commit 0c6ad3f5dfbd45150eeef2474899ba7ef0d8e592)

7 weeks agoaarch64: Force vector in SVE gimple_folder::fold_active_lanes_to.
Jennifer Schmitz [Thu, 28 Aug 2025 10:10:27 +0000 (03:10 -0700)] 
aarch64: Force vector in SVE gimple_folder::fold_active_lanes_to.

An ICE was reported in the following test case:
svint8_t foo(svbool_t pg, int8_t op2) {
      return svmul_n_s8_z(pg, svdup_s8(1), op2);
}
with a type mismatch in ‘vec_cond_expr’:
_4 = VEC_COND_EXPR <v16_2(D), v32_3(D), { 0, ... }>;

The reason is that svmul_impl::fold folds calls where one of the operands
is all ones to the other operand using
gimple_folder::fold_active_lanes_to. However, we implicitly assumed
that the argument that is passed to fold_active_lanes_to is a vector
type. In the given test case op2 is a scalar type, resulting in the type
mismatch in the vec_cond_expr.

This patch fixes the ICE by forcing a vector type of the argument
in fold_active_lanes_to before the statement with the vec_cond_expr.

In the initial version of this patch, the force_vector statement was placed in
svmul_impl::fold, but it was moved to fold_active_lanes_to to align it with
fold_const_binary which takes care of the fixup from scalar to vector
type using vector_const_binop.

The patch was bootstrapped and tested on aarch64-linux-gnu, no regression.
OK for trunk?
OK to backport to GCC 15?

Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com>
gcc/
PR target/121602
* config/aarch64/aarch64-sve-builtins.cc
(gimple_folder::fold_active_lanes_to): Add force_vector
statement.

gcc/testsuite/
PR target/121602
* gcc.target/aarch64/sve/acle/asm/mul_s16.c: New test.
* gcc.target/aarch64/sve/acle/asm/mul_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mul_u8.c: Likewise.

7 weeks agoarm: Fix operand check for __arm_{mrrc{2},mcrr{2]} intrinsics [PR 121464]
Andre Vieira [Mon, 11 Aug 2025 08:49:18 +0000 (09:49 +0100)] 
arm: Fix operand check for __arm_{mrrc{2},mcrr{2]} intrinsics [PR 121464]

Fix the bound checking for the opc1  operand of the following intrinsics:
  __arm_mcrr
  __arm_mcrr2
  __arm_mrrc
  __arm_mrrc2

gcc/ChangeLog:

PR target/121464
* config/arm/arm.md (arm_<mrrc>, arm_<mcrr>): Fix operand check.

gcc/testsuite/ChangeLog:

PR target/121464
* gcc.target/arm/acle/mcrr.c: Update testcase.
* gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc.target/arm/acle/mrrc.c: Likewise.
* gcc.target/arm/acle/mrrc2.c: Likewise.

(cherry picked from commit b29abdc333cce9acbc9537a1df8a4ec09444658f)

7 weeks agoDaily bump.
GCC Administrator [Tue, 16 Sep 2025 00:27:37 +0000 (00:27 +0000)] 
Daily bump.

7 weeks agoada: Fix internal error on aspect in complex object declaration
Eric Botcazou [Fri, 22 Aug 2025 12:51:58 +0000 (14:51 +0200)] 
ada: Fix internal error on aspect in complex object declaration

The sufficient conditions are that the aspect be deferred and the object be
rewritten as a renaming because of the complex initialization expression.

gcc/ada/ChangeLog:

* gcc-interface/trans.cc (gnat_to_gnu)
<N_Object_Renaming_Declaration>: Deal with objects whose elaboration
is deferred.
(process_freeze_entity): Deal with renamed objects whose elaboration
is deferred.

7 weeks agoada: Fix wrong finalization of aliased array of bounded vector
Eric Botcazou [Wed, 3 Sep 2025 07:17:39 +0000 (09:17 +0200)] 
ada: Fix wrong finalization of aliased array of bounded vector

The problem is that Apply_Discriminant_Check introduces an unnecessary
temporary for an assignment where both sides have the same constrained
subtype but the left-hand side is an aliased component.

This comes from an approximation in the implementation introduced long
time ago to deal with aliased unconstrained objects in Ada 95, more
specifically to still generate a check when both sides have the same
unconstrained subtype in this case; it is replaced by an explicit test
that the common subtype is constrained.

gcc/ada/ChangeLog:

* checks.adb (Apply_Discriminant_Check): Remove undocumented test
on Is_Aliased_View applied to the left-hand side to skip the check
in the case where the subtypes are the same, and replace it with a
test that the subtypes are constrained.

7 weeks agoada: Fix crash on iterator of type with Constant_Indexing aspect
Eric Botcazou [Fri, 29 Aug 2025 07:24:33 +0000 (09:24 +0200)] 
ada: Fix crash on iterator of type with Constant_Indexing aspect

This happens when the type returned by the indexing function is a private
type whose completion is derived from another private type, because the
Finalize_Address routine cannot correctly fetch the actual root type.

gcc/ada/ChangeLog:

* exp_util.adb (Finalize_Address): In an untagged derivation, call
Root_Type on the full view of the base type if the partial view is
itself not a derived type.
(Is_Untagged_Derivation): Minor formatting tweak.

7 weeks agoaarch64: PR target/121749: Use dg-assemble in testcase
Kyrylo Tkachov [Wed, 3 Sep 2025 15:43:40 +0000 (08:43 -0700)] 
aarch64: PR target/121749: Use dg-assemble in testcase

Committing as obvious.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/testsuite/

PR target/121749
* gcc.target/aarch64/simd/pr121749.c: Use dg-assemble directive.

(cherry picked from commit 2b8256d0ce18ed4d00868c78f5128d32884ccfa1)

7 weeks agoaarch64: PR target/121749: Use correct predicate for narrowing shift amounts
Kyrylo Tkachov [Tue, 2 Sep 2025 07:43:14 +0000 (00:43 -0700)] 
aarch64: PR target/121749: Use correct predicate for narrowing shift amounts

With g:d20b2ad845876eec0ee80a3933ad49f9f6c4ee30 the narrowing shift instructions
are now represented with standard RTL and more merging optimisations occur.
This exposed a wrong predicate for the shift amount operand.
The shift amount is the number of bits of the narrow destination, not the input
sources.
Correct this by using the vn_mode attribute when specifying the predicate, which
exists for this purpose.

I've spotted a few more narrowing shift patterns that need the restriction, so
they are updated as well.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/

PR target/121749
* config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn_n<mode>):
Use aarch64_simd_shift_imm_offset_<vn_mode> instead of
aarch64_simd_shift_imm_offset_<ve_mode> predicate.
(aarch64_<shrn_op>shrn_n<mode> VQN define_expand): Likewise.
(*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
(aarch64_<shrn_op>rshrn_n<mode>): Likewise.
(aarch64_<shrn_op>rshrn_n<mode> VQN define_expand): Likewise.
(aarch64_sqshrun_n<mode>_insn): Likewise.
(aarch64_sqshrun_n<mode>): Likewise.
(aarch64_sqshrun_n<mode> VQN define_expand): Likewise.
(aarch64_sqrshrun_n<mode>_insn): Likewise.
(aarch64_sqrshrun_n<mode>): Likewise.
(aarch64_sqrshrun_n<mode>): Likewise.
* config/aarch64/iterators.md (vn_mode): Handle DI, SI, HI modes.

gcc/testsuite/

PR target/121749
* gcc.target/aarch64/simd/pr121749.c: New test.

(cherry picked from commit cb508e54140687a50790059fac548d87515df6be)

7 weeks agoAVR: Support AVR32EB14/20/28/32.
Georg-Johann Lay [Mon, 15 Sep 2025 12:20:59 +0000 (14:20 +0200)] 
AVR: Support AVR32EB14/20/28/32.

Add support for some recent AVR devices.

gcc/
* config/avr/avr-mcus.def: Add avr32eb14, avr32eb20,
avr32eb28, avr32eb32.
* doc/avr-mmcu.texi: Rebuild.

(cherry picked from commit 45f605a74fd7e96294477db064cc58033c3fba49)

7 weeks agoLoongArch: Fix wrong code from bstrpick split
Xi Ruoyao [Fri, 12 Sep 2025 07:57:08 +0000 (15:57 +0800)] 
LoongArch: Fix wrong code from bstrpick split

After late-combine is added, split1 can see an input like

    (insn 56 55 169 5
      (set (reg/v:DI 87 [ n ])
        (ior:DI (and:DI (reg/v:DI 87 [ n ])
                        (const_int 281474976710655 [0xffffffffffff]))
                (and:DI (reg:DI 131 [ _45 ])
                        (const_int -281474976710656 [0xffff000000000000]))))
      "pr121906.c":22:8 108 {*bstrins_di_for_ior_mask}
      (nil))

And the splitter ends up emitting

    (insn 184 55 185 5
      (set (reg/v:DI 87 [ n ])
           (reg:DI 131 [ _45 ]))
      "pr121906.c":22:8 -1
      (nil))
    (insn 185 184 169 5
      (set (zero_extract:DI (reg/v:DI 87 [ n ])
                            (const_int 48 [0x30])
                            (const_int 0 [0]))
           (reg/v:DI 87 [ n ]))
      "pr121906.c":22:8 -1
      (nil))

which obviously lost everything in r87, instead of retaining its lower
bits as we expect.  It's because the splitter didn't anticipate the
output register may be one of the input registers.

PR target/121906

gcc/

* config/loongarch/loongarch.md (*bstrins_<mode>_for_ior_mask):
Always create a new pseudo for the input register of the bstrins
instruction.

gcc/testsuite/

* gcc.target/loongarch/pr121906.c: New test.

(cherry picked from commit 290851e63a5b99c99eb196f2823ea3051c0f0214)

7 weeks agoc++: Fix mangling of _Float16 template args [PR121801]
Matthias Kretz [Fri, 5 Sep 2025 10:16:34 +0000 (12:16 +0200)] 
c++: Fix mangling of _Float16 template args [PR121801]

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
gcc/testsuite/ChangeLog:

PR c++/121801
* g++.dg/abi/pr121801.C: New test.

gcc/cp/ChangeLog:

PR c++/121801
* mangle.cc (write_real_cst): Handle 16-bit real and assert
that reals have 16 bits or a multiple of 32 bits.

(cherry picked from commit 19d1c7c28f4fd0557dd868a7a4041b00ceada890)

7 weeks agoDaily bump.
GCC Administrator [Mon, 15 Sep 2025 00:24:05 +0000 (00:24 +0000)] 
Daily bump.

7 weeks agoDaily bump.
GCC Administrator [Sun, 14 Sep 2025 00:25:41 +0000 (00:25 +0000)] 
Daily bump.

7 weeks agoDaily bump.
GCC Administrator [Sat, 13 Sep 2025 00:25:04 +0000 (00:25 +0000)] 
Daily bump.

8 weeks agolibstdc++: Fix memory leak in PSTL TBB backend [PR117276]
Jonathan Wakely [Fri, 12 Sep 2025 11:49:39 +0000 (12:49 +0100)] 
libstdc++: Fix memory leak in PSTL TBB backend [PR117276]

Backport of upstream patch:
https://github.com/uxlfoundation/oneDPL/pull/1589

libstdc++-v3/ChangeLog:

PR libstdc++/117276
* include/pstl/parallel_backend_tbb.h (__func_task::finalize):
Make deallocation unconditional.

(cherry picked from commit d8f1655a781a76f5c86b3545b181b2005e585d29)

8 weeks agoc++: pack indexing is a non-deduced context [PR121795]
Patrick Palka [Fri, 12 Sep 2025 18:21:25 +0000 (14:21 -0400)] 
c++: pack indexing is a non-deduced context [PR121795]

We weren't explicitly treating a pack index specifier as a non-deduced
context (as per [temp.deduct.type]/5), leading to an ICE for the first
testcase below.

PR c++/121795

gcc/cp/ChangeLog:

* pt.cc (unify) <case PACK_INDEX_TYPE>: New non-deduced context
case.

gcc/testsuite/ChangeLog:

* g++.dg/cpp26/pack-indexing17.C: New test.
* g++.dg/cpp26/pack-indexing17a.C: New test.

Reviewed-by: Marek Polacek <polacek@redhat.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 8e3230f4fed0d41e790d68c2534c057911bab35c)

8 weeks agoDaily bump.
GCC Administrator [Fri, 12 Sep 2025 00:26:03 +0000 (00:26 +0000)] 
Daily bump.

8 weeks agoc++: constant non-dep init folding vs FIELD_DECL access [PR97740]
Patrick Palka [Wed, 3 Sep 2025 14:10:00 +0000 (10:10 -0400)] 
c++: constant non-dep init folding vs FIELD_DECL access [PR97740]

Here although the local templated variables x and y have the same
reduced constant value, only x's initializer {a.get()} is well-formed
as written since A::m has private access.  We correctly reject y's
initializer {&a.m} (at instantiation time), but we also reject x's
initializer because we happen to constant fold it ahead of time, which
means at instantiation time it's already represented as a COMPONENT_REF
to a FIELD_DECL, and so when substituting this COMPONENT_REF we naively
double check that the given FIELD_DECL is accessible, which fails.

This patch sidesteps around this particular issue by not checking access
when substituting a COMPONENT_REF to a FIELD_DECL.  If the target of a
COMPONENT_REF is already a FIELD_DECL (i.e. before substitution), then I
think we can assume access has been already checked appropriately.

PR c++/97740

gcc/cp/ChangeLog:

* pt.cc (tsubst_expr) <case COMPONENT_REF>: Don't check access
when the given member is already a FIELD_DECL.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/constexpr-97740a.C: New test.
* g++.dg/cpp0x/constexpr-97740b.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 3e2077d8c7a0acba2d54bd0666ae578fe114cd72)

8 weeks agortl-ssa: Maintain clobber_group invariant [PR121757]
Richard Sandiford [Thu, 11 Sep 2025 16:32:38 +0000 (17:32 +0100)] 
rtl-ssa: Maintain clobber_group invariant [PR121757]

In order to reduce time complexity, rtl-ssa groups consecutive
clobbers together.  Each group of clobbers has a splay tree for
lookup and manipulation purposes.

This arrangement means that we might need to split a group (when
inserting a new non-clobber definition between two clobbers) or
to join consecutive groups together (when deleting an intervening
non-clobber definition).  To reduce the time complexity of these updates,
the back pointer from a clobber to its group is only updated lazily.
The invariant is supposed to be that the first clobber, last clobber,
and splay tree root have the right group at all times, whereas other
members of the group can have identifiably stale group pointers.

However, a lack of abstraction meant that only some splay tree lookups
correctly maintained this invariant.  Others did not update the group
pointer after installing a new root.

This patch adds a helper that maintains the invariant and uses it in
three places, one that was already correct and two that were wrong.
The original lookup_clobber is still used in other code that
manipulates groups as a whole.

gcc/
PR rtl-optimization/121757
* rtl-ssa/accesses.h (clobber_group::lookup_clobber): New member
function.
* rtl-ssa/accesses.cc (clobber_group::lookup_clobber): Likewise.
(clobber_group::prev_clobber, clobber_group::next_clobber)
(function_info::add_clobber): Use it.

gcc/testsuite/
PR rtl-optimization/121757
* g++.dg/pr121757.C: New test.

8 weeks agoada: Compiler crash on container aggregate association with nonstatic key choice
Gary Dismukes [Thu, 21 Aug 2025 18:48:12 +0000 (18:48 +0000)] 
ada: Compiler crash on container aggregate association with nonstatic key choice

The compiler blows up on a container aggregate with a container element
association that has a key_choice given by a nonstatic key expression.
This happens in the size computation for the aggregate due to calling
Update_Choices with the nonstatic expression.  The fix is simply to
condition the call to Update_Choices on whether the choice expression
is static.

gcc/ada/ChangeLog:

* exp_aggr.adb (Build_Container_Aggr_Code.Build_Size_Expr): In the case
of an association with a single choice, only call Update_Choices when
the choice expression is nonstatic.

8 weeks agoada: Spurious error on generalized prefix notation
Javier Miranda [Thu, 7 Aug 2025 09:42:15 +0000 (09:42 +0000)] 
ada: Spurious error on generalized prefix notation

The compiler reports a spurious error when a primitive function of
an untagged type that returns an array type is invoked using the
prefix notation, and the sources are compiled with language
extensions enabled.

gcc/ada/ChangeLog:

* sem_util.adb (Needs_One_Actual): Add support for untagged record
types when the sources are compiled with Core Extensions allowed.

8 weeks agoada: Create a pragma to emit a misplaced Storage_Size aspect error
Viljar Indus [Tue, 5 Aug 2025 09:04:18 +0000 (12:04 +0300)] 
ada: Create a pragma to emit a misplaced Storage_Size aspect error

We do not emit an error on misplaced Strorage_Size error when
the aspect is not applied to a task (or an access type). We
instead create an attribute definition which is ignored most of the
time. Create a temporary pragma for the aspect specification to
emit the same misplaced aspect error as we do for pragmas.

gcc/ada/ChangeLog:

* sem_ch13.adb (Analyze_Aspect_Definitions): Create a temporary
pragma for the non-task and access type cases.

8 weeks agoada: Typo fix in comment
Marc Poulhiès [Fri, 1 Aug 2025 14:46:10 +0000 (16:46 +0200)] 
ada: Typo fix in comment

gcc/ada/ChangeLog:

* s-pack.adb.tmpl: Typo fix in comment.

8 weeks agoada: Reject pragma Attach_Handler on procedures in protected bodies
Piotr Trojanek [Thu, 31 Jul 2025 15:07:48 +0000 (17:07 +0200)] 
ada: Reject pragma Attach_Handler on procedures in protected bodies

Pragma Attach_Handler and Interrupt_Handler are only legal for procedures
declared in protected definition. When given for procedures declared in
protected body, they were wrongly accepted and triggered an odd error message
from expansion.

gcc/ada/ChangeLog:

* sem_prag.adb (Check_Interrupt_Or_Attach_Handler): Refine test for
protected procedures; fix typo in comment.

8 weeks agoada: Fix crash with global No_Tasking and async delays
Denis Mazzucato [Tue, 8 Jul 2025 11:00:08 +0000 (13:00 +0200)] 
ada: Fix crash with global No_Tasking and async delays

When optimizations are enabled, the runtime for delays is inlined and expanded.
If No_Tasking is set globally, for instance via a configuration file, then the
initialization of _Master, _Chain, and _Task_Name formals is skipped for task
entities. Later during expansion, these identifiers are expected but won't be
found, crashing the compiler. This patch fixes Init_Formals by removing the
check on Global_No_Tasking. If a No_Tasking restriction applies, then a
violation error will be raised when analyzing the task type.

gcc/ada/ChangeLog:

* exp_ch3.adb (Init_Formals): Remove the check on Global_No_Tasking.
* sem.adb: Fix typo.