Zynqmp DMA driver expects two clocks (main clock and apb clock)
For LPDDMA channels the two clocks are missing in the
Dma node resulting probe failure.
xilinx-zynqmp-dma ffa80000.dma: main clock not found.
xilinx-zynqmp-dma ffa80000.dma: Probing channel failed
xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dma: zynqmp: Add description for LPDDMA channel usage
LPDDMA default allows only secured access.
inorder to enable these dma channels,
one should ensure that it allows non secure access.
This patch updates the same.
Reported-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
PCI: Xilinx NWL PCIe: Adding prefetchable memory space to device tree
Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Filip Drazic [Mon, 29 Aug 2016 17:32:59 +0000 (19:32 +0200)]
ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domain
Previously, it was assumed that there is a 1:1 mapping between
PM ID defined in the platform firmware and a PM domain. However, there
can be a situation where multiple PM IDs belong to a single PM domain
(e.g. PM IDs for GPU and two pixel processors correspond to a single
PM domain).
This patch adds support for assigning more than one PM ID to
a single PM domain.
Updated documentation accordingly.
Assigned pixel processors PM IDs to GPU PM domain.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Filip Drazic [Thu, 25 Aug 2016 16:58:49 +0000 (18:58 +0200)]
ARM64: zynqmp: DT: Remove unused DDR PM domain
DDR power states are handled by the PM firmware, so this domain is
redundant. Also, since there is no device using this PM domain,
it will be powered off during boot, which is wrong.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 14 Oct 2016 12:06:28 +0000 (14:06 +0200)]
ARM64: zynqmp: Decrease MALLOC size for SPL
Decrease malloc size to 1MB from 256MB. Huge malloc
space is adding huge delay in mem_malloc_init() because
we are enabling CONFIG_SYS_MALLOC_CLEAR_ON_INIT
which clear the whole malloc space.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 7 Oct 2016 20:13:44 +0000 (13:13 -0700)]
ARM64: zynqmp: Fix ddr init for zcu100
Use prog_reg_ddr() instead of prog_reg() which has different
shift and mask parameters position. It is caused somewhere between
DDR team and PCW.
Also forbit prog_reg_ddr() inlining which saves 276B.
Also remove variables wdqsl_b2, wdqsl_b3, lcdl_b2, lcdl_b3, calc12, calc13
which were generated in DDR init snipset but they were completely unused
which generated compilation warnings.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: zynqmp_qspi: Perform timeout irrespective of processor speed
Perform QSPI timeout irrespective of processor speed. With this
the timeout is set to 100 seconds. This solves issue of timeout
on some boards with different processor speeds
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Tue, 20 Sep 2016 09:37:24 +0000 (11:37 +0200)]
tools: mkimage: Add support for initialization table for Zynq and ZynqMP
The Zynq/ZynqMP boot.bin file contains a region for register initialization
data. Filling in proper values in this table can reduce boot time
(e.g. about 50ms faster on QSPI boot) and also reduce the size of
the SPL binary.
The table is a simple text file with register+data on each line. Other
lines are simply skipped. The file can be passed to mkimage using the
"-R" parameter.
It is recommended to add reg init file to board folder.
For example:
CONFIG_BOOT_INIT_FILE="board/xilinx/zynqmp/xilinx_zynqmp_zcu102/reg.int
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM64: zynqmp: Enable fastboot for first SD/MMC/EMMC device
DNL numbers are not changed that's why fastboot needs to be called with
-i parameter (Xilinx vendor id).
- Show available devices
sudo fastboot -i 0x03fd devices
xilinx_zynqmp_zcu100 fastboot
- Stop fastboot and go back to U-Boot prompt
sudo fastboot -i 0x03fd continue
- Reboot the board
sudo fastboot -i 0x03fd reboot
- Get internal variables
sudo fastboot -i 0x3fd getvar bootloader-version
bootloader-version: U-Boot 2016.07-00026-g19bd53044817
sudo fastboot -i 0x3fd getvar downloadsize
downloadsize: 0x06000000
sudo fastboot -i 0x3fd getvar version
version: 0.4
(regular variables needs to have fastboot. prefix - there is also
serialno variable which should be define as serial#)
- Format SD/MMC/EMMC card
sudo fastboot -i 0x3fd oem format
- Write images to boot and Linux partition
sudo fastboot -i 0x3fd flash boot sd.img
sudo fastboot -i 0x3fd flash Linux os.img
Michal Simek [Tue, 30 Aug 2016 14:17:27 +0000 (16:17 +0200)]
ARM64: zynqmp: Force certain bootmode for SPL
ZynqMP provides an option to overwrite bootmode setting which
can change SPL behavior.
For example: boot SPL via JTAG and then SPL loads images from SD.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 1 Sep 2016 10:51:27 +0000 (12:51 +0200)]
spi: zynq: Use variable to remove u32 to u64 conversions
Current code generates warning when it is compiled for arm64:
Warnings:
In file included from drivers/spi/zynq_spi.c:14:0:
drivers/spi/zynq_spi.c: In function ‘zynq_spi_init_hw’:
drivers/spi/zynq_spi.c:95:9: warning: large integer implicitly truncated
to unsigned type [-Woverflow]
writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr);
^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro
‘writel’
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v;
})
^
drivers/spi/zynq_spi.c: In function ‘zynq_spi_release_bus’:
drivers/spi/zynq_spi.c:177:9: warning: large integer implicitly
truncated to unsigned type [-Woverflow]
writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr);
^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro
‘writel’
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v;
})
^
This patch is using one variable to do conversion via u32 variable.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 19 Aug 2016 12:14:52 +0000 (14:14 +0200)]
ARM64: zynqmp: Add support for DFU from SPL
SPL needs to have bigger stack size because of USB.
Simple malloc needs to be disabled because dfu code requires different
allocation functions. There is no space in OCM that's why random place
in DDR is used.
BOOTD must be disabled because it is causing compilation error.
All variables are disabled and used only variables valid for DFU because
they are simple huge. Including automatic variables added by
CONFIG_ENV_VARS_UBOOT_CONFIG.
Hardcode addresses for u-boot, atf, kernel and dtb
just for SPL DFU code.
Enable SPL DFU for zcu100.
Create new usb_dfu_spl variable just to run Linux kernel loaded in SPL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
B, Ravi [Thu, 28 Jul 2016 12:09:14 +0000 (17:39 +0530)]
spl: dfu: add dfu support in SPL
Traditionally the DFU support is available only
as part 2nd stage boot loader(u-boot) and DFU
is not supported in SPL.
The SPL-DFU feature is useful for boards which
does not have MMC/SD, ethernet boot mechanism
to boot the board and only has USB inteface.
This patch add DFU support in SPL with RAM
memory device support to load and execute u-boot.
And then leverage full functionality DFU in
u-boot to flash boot inital binary images to
factory or bare-metal boards to memory devices
like SPI, eMMC, MMC/SD card using USB interface.
This SPL-DFU support can be enabled through
Menuconfig->Boot Images->Enable SPL-DFU support
Signed-off-by: Ravi Babu <ravibabu@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
qspi: zynqmp: Restrict baud rate value to max value
Restrict baud rate disvisor value to max possible
baud rate value. This fixes the baud rate value overflow
condition which results in programming the incorrect baud
rate divisor value.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: xilinx_spi: Correct the fifo-depth calculation
Correctly fill the fifo depth by passing correct node in getting
it from device tree. This fixes the issue of hanging in a loop while
reading environment from spi flash during boot up which is caused by
commit "spi: xilinx_spi: Modify transfer logic for quad mode"
(sha1: c638e0e80e5ddfac2999692f4aa824021bf3f196)
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
nand: arasan_nfc: Clear ecc on bit while sending read command
Clear ecc ON bit while sending read command as all types
of read command(like reading spare) doesnt need ECC to be
enabled. It has been anyway taken care in other places
whereever required using arasan_nand_enable_ecc().
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: xilinx_spi: Modify transfer logic for quad mode
Modify the transfer logic to get it working for both single
and quad modes. The controller expects 4 dummy bytes for
quad read and also expects the txfifo filled with full command
and required args before starting the transfer. This fixes
an issue in reading from device using quad read command.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 8 Aug 2016 08:26:49 +0000 (10:26 +0200)]
ARM64: Add early support for zcu100
DTS file contains a lot of FIXMEs which need to be validated prior board
bring-up.
Board has 1GB memory
Uart over extension connector MIO 8/9.
DP - used fixed clock for LG monitor.
Enable SPL: (Generated May 25th)
/group/siv2/work/ronaldo/kevant/alto/vnc/vnc1_0/hw/hwflow_local/clk/
Vivado:
/proj/xbuilds/2016.3_0513_1/installs/lin64/Vivado/2016.3/settings64.sh
Disabled DDR init from psu_init - broken.
Also with disabled internal pull-ups on pin 76 and 77.
GT description for USBs and DP.
Reference input clock for USB is commit from CLK lane 0
and for DP from lane 1 that's why LANE_NUM reflects that.
Lane 0 - PS_MGTREFCLK0, Lane 1 - PS_MGTREFCLK1.
USB GTs are disabled because ULPI PHY reset in Linux also causing reset
for spi/wifi/bt chips.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 15 Aug 2016 07:41:36 +0000 (09:41 +0200)]
ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
Mode pins can be used as output for reset. Xilinx boards are using
this feature as additional way how to reset USB phys and also others
chips on the boards.
Mode1 is used on all these boards for this feature.
Let SPL toggle reset on this pin by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---8<---
In file included from tools/common/image-fit.c:1:
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: warning: use of logical '||' with constant operand [-Wconstant-logical-operand]
os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
^ ~~~~~~~~~~~~
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: note: use '|' for a bitwise operation
os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
^~
|
1 warning generated.
--->8---
Signed-off-by: Andreas Bießmann <andreas@biessmann.org> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 07:06:41 +0000 (09:06 +0200)]
libfdt: Introduce new ARCH_FIXUP_FDT option
Add new Kconfig option to disable arch_fixup_fdt() calls for cases where
U-Boot shouldn't update memory setup in DTB file.
One example of usage of this option is to boot OS with different memory
setup than U-Boot use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
Mike Looijmans [Fri, 29 Jul 2016 08:07:57 +0000 (10:07 +0200)]
xilinx_zynqmp_zcu102: Set QSPI clock divisor to "9"
The zynqmp_qspi driver assumes that the QSPI clock runs at 166666666 Hz,
set the divisor such that this is true. The IOPLL runs at 1500, so a
divisor of 0x0c would results in 125MHz.
The optimal divisor for the zcu102 would be "7", which would run the
clock at 214MHz and could thus generate almost 108MHz which is the max
clock rate for the flash chips on the board.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 05:58:50 +0000 (07:58 +0200)]
ARM: zynq: Remove untested RSA configuration
It is getting hard and hard to keep all defconfigs
up2date that's why remove all RSA defconfigs which are not regularly
tested. Keep only zc702 with RSA support.
Any board can support it by enabling
CONFIG_CMD_ZYNQ_AES=y
CONFIG_CMD_ZYNQ_RSA=y
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 27 Jul 2016 12:45:25 +0000 (14:45 +0200)]
ARM64: zynqmp: Remove undef from mini configuration
The patch:
"ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP"
(sha1: a8b6a156c0f7fb99502229e454bc9c3b38645280)
removed symbol that's why there is no need to have undef
in mini configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Thu, 21 Jul 2016 13:55:02 +0000 (15:55 +0200)]
ARM64: zynqmp: Make booting from SD possible without uEnv.txt
When booting from SD card, the kernel cannot find any rootfs.
It only works if you provide a "uEnv.txt" file on the SD card that
patches the bootargs.
If uEnv.txt does not exist, assume that the rootfs is on the second
partition of the SD card (or mmc device). To make this work, rename
"sdroot" to "sdroot0" so a simple script can switch between sd0 and sd1.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
projects / thirdparty / u-boot.git / log
