Jakub Jelinek [Wed, 15 Feb 2017 17:10:40 +0000 (18:10 +0100)]
re PR c++/79301 (With -Werror=pedantic outside C++17 mode, __has_cpp_attribute(fallthrough) is nonzero but [[fallthrough]] fails)
PR c++/79301
* parser.c (cp_parser_std_attribute): Don't pedwarn about
[[deprecated]] with -std=c++11 and [[fallthrough]] with
-std=c++11 and -std=c++14.
* g++.dg/cpp1y/feat-cxx11-neg.C: Remove (with pedwarn) from
[[deprecated]] comment.
* g++.dg/cpp1y/feat-cxx98-neg.C: Likewise.
* g++.dg/cpp1y/feat-cxx11.C: Likewise.
* g++.dg/cpp1y/attr-deprecated-neg.C: Don't expect warnings for
[[deprecated]] in -std=c++11.
* g++.dg/cpp0x/fallthrough2.C: Don't expect warnings for
[[fallthrough]] in -std=c++11 and -std=c++14.
Tim Shen [Wed, 15 Feb 2017 07:38:20 +0000 (07:38 +0000)]
re PR libstdc++/79513 (std::visit doesn't handle references)
PR libstdc++/79513
* include/std/variant (visit()): Forward variant types to the return
type detection code.
* testsuite/20_util/variant/compile.cc: Add test cases.
Andrew Pinski [Wed, 15 Feb 2017 00:09:28 +0000 (00:09 +0000)]
aarch64-cores.def (thunderx2t99): Move to under 'C" cores and change the partno/implementer to be correct.
2017-02-14 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cores.def (thunderx2t99): Move to under 'C"
cores and change the partno/implementer to be correct.
(thunderx2t99p1): New core which replaces thunderx2t99 and still has
the 'B" as the implementer.
* config/aarch64/aarch64-tune.md: Regenerate.
Carl Love [Tue, 14 Feb 2017 23:11:19 +0000 (23:11 +0000)]
rs6000.c: Add case statement entry to make the xvcvuxdsp built-in argument unsigned.
gcc/ChangeLog:
2017-02-14 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000.c: Add case statement entry to make the
xvcvuxdsp built-in argument unsigned.
* config/rs6000/vsx.md: Fix the source and return operand types so they
match the instruction definitions from the ISA document. Fix typo
in the instruction generation for the (define_insn "vsx_xvcvuxdsp"
statement.
gcc/testsuite/ChangeLog:
2017-01-14 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/vsx-builtin-3.c: Add missing test case for the
xvcvsxdsp and xvcvuxdsp instructions.
Vladimir Makarov [Tue, 14 Feb 2017 22:17:19 +0000 (22:17 +0000)]
re PR target/79282 ([7 Regresion] FAIL: gcc.target/arm/neon-for-64bits-1.c scan-assembler-times vshr 0)
2017-02-14 Vladimir Makarov <vmakarov@redhat.com>
PR target/79282
* lra-int.h (struct lra_operand_data, struct lra_insn_reg): Add
member early_clobber_alts.
* lra-lives.c (reg_early_clobber_p): New.
(process_bb_lives): Use it.
* lra.c (new_insn_reg): New arg early_clobber_alts. Use it.
(debug_operand_data): Initialize early_clobber_alts.
(setup_operand_alternative): Set up early_clobber_alts.
(collect_non_operand_hard_regs): Ditto. Pass early clobber
alternatives to new_insn_reg.
(add_regs_to_insn_regno_info): Add arg early_clobber_alts. Use
it.
(lra_update_insn_regno_info): Pass the new arg.
H.J. Lu [Tue, 14 Feb 2017 16:53:22 +0000 (16:53 +0000)]
Properly store 128-bit constant in large model
When converting TI store with CONST_INT to V1TI store with CONST_VECTOR
in large model, an extra instruction may be needed to load CONST_VECTOR
into a register. Insert the extra instruction to the right place.
gcc/
PR target/79498
* config/i386/i386.c (timode_scalar_chain::convert_insn): Insert
the extra instruction to the right place to store 128-bit constant
when needed.
gcc/testsuite/
PR target/79498
* gcc.target/i386/pr79498.c: New test.
PR middle-end/79448
* gcc.dg/tree-ssa/builtin-snprintf-warn-3.c: New test.
* gcc.dg/tree-ssa/pr79448-2.c: New test.
* gcc.dg/tree-ssa/pr79448.c: New test.
gcc/ChangeLog:
PR middle-end/79448
* gimple-ssa-sprintf.c (format_directive): Avoid issuing INT_MAX
warning for strings of unknown length.
rs6000: Synchronize the --with-cpu list in config.gcc with reality
power, power2, rios, rios1, rios2, rsc, rsc2 support was removed.
rs64a never was a supported option; it's spelled rs64.
power5+ and powerpc64le are supported options but could not be set as
default.
Jeff Law [Tue, 14 Feb 2017 15:54:09 +0000 (08:54 -0700)]
re PR tree-optimization/79095 (spurious stringop-overflow warning)
PR tree-optimization/79095
* tree-vrp.c (extract_range_from_binary_expr_1): For EXACT_DIV_EXPR,
if the numerator has the range ~[0,0] make the resultant range ~[0,0].
(extract_range_from_binary_expr): For MINUS_EXPR with no derived range,
if the operands are known to be not equal, then the resulting range
is ~[0,0].
(intersect_ranges): If the new range is ~[0,0] and the old range is
wide, then prefer ~[0,0].
* tree-vrp.c (overflow_comparison_p_1): New function.
(overflow_comparison_p): New function.
* tree-vrp.c (register_edge_assert_for_2): Register additional asserts
if NAME is used in an overflow test.
(vrp_evaluate_conditional_warnv_with_ops): If the ops represent an
overflow check that can be expressed as an equality test, then adjust
ops to be that equality test.
PR tree-optimization/79095
* g++.dg/pr79095-1.C: New test
* g++.dg/pr79095-2.C: New test
* g++.dg/pr79095-3.C: New test
* g++.dg/pr79095-4.C: New test
* g++.dg/pr79095-5.C: New test
* gcc.c-torture/execute/arith-1.c: Update with more cases.
* gcc.dg/tree-ssa/pr79095-1.c: New test.
Andreas Krebbel [Tue, 14 Feb 2017 15:38:02 +0000 (15:38 +0000)]
S/390: Cleanup: Remove builtin type flags.
With the target attribute stuff the only user of the builtin types
flags value has been removed. So drop that value from the builtin
types list entirely.
gcc/ChangeLog:
2017-02-14 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Jakub Jelinek [Tue, 14 Feb 2017 08:26:26 +0000 (09:26 +0100)]
re PR tree-optimization/79408 (Missed VRP optimization of integer modulo)
PR tree-optimization/79408
* tree-vrp.c (simplify_div_or_mod_using_ranges): Handle also the
case when on TRUNC_MOD_EXPR op0 is INTEGER_CST.
(simplify_stmt_using_ranges): Call simplify_div_or_mod_using_ranges
also if rhs1 is INTEGER_CST.
Richard Biener [Tue, 14 Feb 2017 07:58:12 +0000 (07:58 +0000)]
re PR tree-optimization/79432 (ICE: verify_ssa failed)
2017-02-14 Richard Biener <rguenther@suse.de>
PR middle-end/79432
* tree-into-ssa.c (insert_phi_nodes): When the function can
have abnormal edges rewrite SSA names with broken use-def
dominance out of SSA and register them for PHI insertion.
Martin Sebor [Tue, 14 Feb 2017 04:38:54 +0000 (04:38 +0000)]
PR middle-end/79496 - call to snprintf with zero size eliminated with -Wformat-truncation=2
gcc/ChangeLog:
PR middle-end/79496
* gimple-ssa-sprintf.c (pass_sprintf_length::handle_gimple_call): Avoid
clearing info.nowrite flag when snprintf size argument is a range.
gcc/testsuite/ChangeLog:
PR middle-end/79496
* gcc.dg/tree-ssa/builtin-snprintf-2.c: New test.
Jakub Jelinek [Mon, 13 Feb 2017 19:31:14 +0000 (20:31 +0100)]
re PR c++/79232 (error: invalid rhs for gimple memory store)
PR c++/79232
* typeck.c (cp_build_modify_expr): Handle properly COMPOUND_EXPRs
on lhs that have {PRE{DEC,INC}REMENT,MODIFY,MIN,MAX,COND}_EXPR
in the rightmost operand.
* g++.dg/cpp1z/eval-order4.C: New test.
* g++.dg/other/pr79232.C: New test.
These are a runtime testcases so they should test p8vector_hw instead of
powerpc_p8vector_ok, or they will fail with an illegal instruction on
older processors.
Also they run on any PowerPC, not with just those compilers that were
configured to default to 64-bit targets.
gcc/testsuite/
* gcc.target/powerpc/vec-adde-int128.c: Use p8vector_hw instead of
powerpc_p8vector_ok.
* gcc.target/powerpc/vec-addec-int128.c: Ditto.
Jakub Jelinek [Mon, 13 Feb 2017 15:39:59 +0000 (16:39 +0100)]
re PR rtl-optimization/79388 (wrong code with -O -fno-tree-coalesce-vars)
PR rtl-optimization/79388
PR rtl-optimization/79450
* combine.c (distribute_notes): When removing TEM_INSN for which
corresponding dest has last value recorded, invalidate that last
value.
* gcc.c-torture/execute/pr79388.c: New test.
* gcc.c-torture/execute/pr79450.c: New test.
Thomas Koenig [Sun, 12 Feb 2017 16:10:22 +0000 (16:10 +0000)]
re PR fortran/65542 (SPREAD intrinsic incorrectly accepted in initialization expressions with -std=f95)
2017-02-12 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/65542
* intrinsic.c (gfc_intrinsic_func_interface): Return an error
for -std=f95 for disallowed transformational functions in
initialization expressions.
2017-02-12 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/65542
* gfortran.dg/spread_init_expr_2.f90: New test case.
Jason Merrill [Sun, 12 Feb 2017 03:31:02 +0000 (22:31 -0500)]
PR c++/77659 - ICE with new and C++14 aggregate NSDMI
* init.c (build_new): Make backups of any CONSTRUCTORs in init.
(build_new_1): Use replace_placeholders.
* tree.c (replace_placeholders_t): Also track whether we've seen a
placeholder.
(replace_placeholders, replace_placeholders_r): Adjust.
* cp-tree.h: Adjust.
gcc/
* doc/cpp.texi: Replace "stringify"/"stringification" with C
standard terminology "stringize"/"stringizing" throughout.
* doc/cppinternals.texi: Likewise.
Jan Hubicka [Sat, 11 Feb 2017 16:11:57 +0000 (17:11 +0100)]
re PR tree-optimization/79224 (Large C-Ray slowdown)
PR ipa/79224
* ipa-inline-analysis.c (get_minimal_bb): New function.
(record_modified): Use it.
(remap_edge_change_prob): Handle also ancestor functions.
Jakub Jelinek [Sat, 11 Feb 2017 08:15:30 +0000 (09:15 +0100)]
re PR middle-end/79454 (c-c++-common/ubsan/overflow-vec-*.c FAILs on some 64-bit BE targets)
PR middle-end/79454
* internal-fn.c (expand_vector_ubsan_overflow): Use piece-wise
result computation whenever lhs doesn't have vector mode, not
just when it has BLKmode.
Gerald Pfeifer [Fri, 10 Feb 2017 16:08:46 +0000 (16:08 +0000)]
install.texi (Specific): Use https for blackfin.uclinux.org.
* doc/install.texi (Specific): Use https for blackfin.uclinux.org.
(Specific): Update mingw-w64 reference.
(Binaries): Ditto.
(Specific): Remove broken link to Renesas RX processor.
Richard Biener [Fri, 10 Feb 2017 14:28:11 +0000 (14:28 +0000)]
toplev.c (process_options): Do not mention obsolete graphite options when...
2017-02-10 Richard Biener <rguenther@suse.de>
* toplev.c (process_options): Do not mention obsolete graphite
options when printing sorry message about missing graphite support.
Mention -floop-nest-optimize.