mmc: msm_sdhci: Use max-frequency to get clock rate
msm_sdc_clk_init() uses clock-frequency to get the clock rate for SDC
clocks. However, the DT files seem to use max-frequency for the same.
Since msm_sdc_clk_init() doesn't find clock-frequency in the DT, it sets 201500000 as the clock rate and this results in timeout errors on IPQ
platforms.
Additionally, clock-frequency is not DT bindings compliant. Hence, get
clock rate using DT bindings compliant max-frequency.
Peng Fan [Sat, 18 Apr 2026 12:37:35 +0000 (20:37 +0800)]
power: regulator: Correct Kconfig for PFUZE100
Use CONFIG_$(PHASE_)DM_REGULATOR_PFUZE100 as the build condition for
pfuze100 regulator driver.
Add Kconfig option for SPL_DM_REGULATOR_PFUZE100.
To avoid break current platforms, set the Kconfig default value same
as PMIC_PFUZE100.
Peng Fan [Sat, 18 Apr 2026 12:37:34 +0000 (20:37 +0800)]
power: regulator: pfuze100: support non-independent mode
Some BUCKs could work in single/dual phase mode, not in independent
mode. In single/dual phase mode, registers of both regulators,
must be identically set. So configure mode and value for both BUCKs.
CONF registers are not touched, leave them as default OTP settings.
PFUZE100/200 SW3A/B, could work in single/dual phase mode, so introduce
a new macro by adding a pointer to the SW3B descriptor.
Peng Fan [Sat, 18 Apr 2026 12:37:33 +0000 (20:37 +0800)]
power: regulator: pfuze100: support high output voltage mode
Some PFUZE regulators can operate in either low or high output voltage mode,
with different minimum voltages and voltage step sizes selected by a hardware
control bit. However, the current PFUZE100 regulator driver assumes low output
voltage mode only, resulting in incorrect voltage calculation and programming
when high voltage mode is enabled.
Extend the regulator descriptor to describe high output voltage mode by adding
a mask to detect the mode and a dedicated voltage description (min_uV and
step size). Update voltage get/set handling to dynamically select the correct
voltage parameters based on the high voltage mode bit.
Peng Fan [Sat, 18 Apr 2026 12:37:32 +0000 (20:37 +0800)]
power: regulator: pfuze100: Fix min_uV usage
regulator-min-microvolt in device tree is not always match the minimal
voltage in the pmic datasheet, direclty using the min value from device
tree as base may cause wrong voltage settings being written.
Directly use the min_uV from datasheet to avoid wrong settings.
Depending on the phase selection (single or multi), the FPWM bits
configured forces the regulator to operate in PWM mode. In case of
multi-phase selection, the FPWM_MP bits enforce the regulator to also
operate in multi-phase. This fixes correct multi-phase operation.
While at this, correct incorrect macro alignment as well.
Tom Rini [Tue, 5 May 2026 16:37:16 +0000 (10:37 -0600)]
Merge patch series "binman: Fix preload signing with encrypted FIT"
Yan WANG <yan.wang@softathome.com> says:
This series improves the reliability and efficiency of binman preload
header generation and test it against an encrypted FIT image signed with
a preload header.
When a preload header references other entries (e.g. an encrypted FIT)
through the collection etype, the referenced entries may be rebuilt
multiple times during binman processing. This becomes problematic when
the referenced entry produces non-deterministic output, such as FIT
encryption using random IVs or timestamps, since rebuilding the entry
changes the data.
This series ensures that referenced entries are built only once and that
preload signing is performed after all data is collected. It also avoids
unnecessary repacking or repeated signing operations by the preload.
The changes include:
* generate preload header placeholders in ObtainContents() and sign
data only once in ProcessContentsUpdate()
* mark referenced entries as build_done in the collection etype to
avoid rebuilding data
* add a functional test for signing an encrypted FIT with a preload
header
Paul HENRYS [Fri, 17 Apr 2026 08:30:50 +0000 (10:30 +0200)]
tools: binman: Test signing an encrypted FIT with a preload header
Add a test to verify the preload header correctly signs an encrypted
FIT. This test exercises the case where encryption uses random IVs that
would change between mkimage calls.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
yan wang [Fri, 17 Apr 2026 08:30:49 +0000 (10:30 +0200)]
binman: collection: Set build_done on referenced entries
The collection etype uses phandles in the 'content' property to
reference other entries. Mark each referenced entry with build_done
to avoid rebuilding the same entry data multiple times.
This is important for cases where rebuilding may change the data
content, e.g. due to timestamps or random IVs in encryption.
Refactor GetContentsByPhandle() to return both the entry object and
its data.
Signed-off-by: yan wang <yan.wang@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Paul HENRYS [Fri, 17 Apr 2026 08:30:48 +0000 (10:30 +0200)]
binman: Generate preload header and sign data only once
To optimize preload generation, generate the header and signatures only
after all data has been collected in ProcessContentsUpdate(). This
avoids signing the data multiple times.
Since header_size is known upfront (from __init__), create a placeholder
in `ObtainContents()` to avoid an extra packing pass when
ProcessContentsUpdate() detects a size change.
This reduces unnecessary repacking and signing operations.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 5 May 2026 16:36:08 +0000 (10:36 -0600)]
Merge patch series "configs: toradex: Enable EFI"
Francesco Dolcini <francesco.dolcini@toradex.com> says:
Enable standard EFI support for all the arm64 Toradex boards, as
required for booting standard aarch64 Linux distribution, following the
ARM recommendations for SystemReady compliance.
The RTC used on these boards is not currently supported by U-Boot,
therefore it is not enabled at the moment.
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
configs: verdin-imx8mp: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
configs: verdin-imx8mm: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
configs: toradex-smarc-imx95: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
configs: toradex-smarc-imx8mp: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
Enable standard EFI support, as required for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
Enable standard EFI support, as required for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].
The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.
Marek Vasut [Mon, 27 Apr 2026 01:10:15 +0000 (03:10 +0200)]
arm64: renesas: Add Cortex-M33 build option to R-Car Gen5
The R-Car Gen5 SoCs contains Cortex-M33, Cortex-R52 and Cortex-A720AE
cores. Add U-Boot build options for the Cortex-M33 core.
Since the Cortex-M33 core is a 32bit core, select V8M and ARM64 for
RCAR64 accordingly. Select TMU timer on the 32bit core, where it is
used instead of the ARMv8 timer. Adjust TMU timer base address to match
the address map of the Cortex-M33 core. Disable unused OF_BOARD_SETUP
as well as unavailable POSITION_INDEPENDENT configuration options.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Add support of Renesas R-Car Gen5 window watchdog timer. Timeout
configuration is derived from CONFIG_WATCHDOG_TIMEOUT_MSECS, which
is more accurate than the 1-second granularity 'timeout' passed to
.start callback.
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add R-Car Gen5 RSIP controller remoteproc driver capable of starting
the SCP, Cortex-R52 and Cortex-A720 cores in Renesas R-Car R8A78000
X5H SoC. The SCP core is started by releasing the core from reset,
the Cortex-R52 and Cortex-A720 are started using the SCP SCMI call.
The entry point for SCP core is fixed to its STCM, entry points for
Cortex-R52 and Cortex-A720 are set during rproc load.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 20 Apr 2026 01:22:12 +0000 (03:22 +0200)]
arm: dts: renesas: Remove duplicate AVB pinmux assignment on V3M
Both R-Car V3M Eagle and V3MSK U-Boot DT extras contain AVB pinmux
assignment, which is a leftover from before the same pinmux was part
of upstream DTs. Remove the duplicate AVB pinmux assignment in favor
of the upstream DT content. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 20 Apr 2026 01:21:10 +0000 (03:21 +0200)]
arm: dts: renesas: Clean up RPC DT nodes
Remove duplicate properties which are present both in arch/arm/dts/
and upstream dts/upstream/src/arm64/renesas/ in favor of those in
upstream DTs. Since those are duplicates, this causes no functional
change. Remove unused num-cs and bank-width DT properties.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
m68k: set proper u-boot image size for initial boot
There is a value of 256K hardcoded as u-boot image size. This
produce bank tty as soon as the image size grows over the limit.
Fix it by using value preset by CONFIG_SYS_MONITOR_LEN.
Some NXP imx hardware ip module as the esdhc controller are exactly the
same in some new ColdFire cpus. For the specific case, mcf5441x needs to
use the existing fsl_esdhc_imx.c driver for the esdhc device.
Create a stub to be able to use NXP "imx" serie drivers as the
fsl_esdhc_imx in the ColdFire architecture.
common: memsize: fix occasionally failing alias probing
probe_ram_size_by_alias() detects whether a probe address still aliases
a lower address by writing through one address and reading through the
other.
On i.MX95 this occasionally reported a false non-alias when the alias
read happened immediately after the write.
A memory barrier alone, mb(), was tested but did not make the failure go
away. This suggests that ordering the CPU accesses is not sufficient for
this probe, likely because the issue is in the path to the memory
controller rather than in the core itself.
Read the written address back before checking the alias address. This
appears to force the write to become observable at the probe address
before using the alias read to decide whether the tested address range
exists.
If the readback does not match the written pattern, restore the saved
value and continue with the next check. This keeps the probe robust for
addresses that do not reliably retain the test pattern.
Fixes: 0977448b45e2 ("common: memsize: add RAM size probe based on alias detection") Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 29 Apr 2026 06:29:53 +0000 (08:29 +0200)]
bloblist: fix pointer comparison in bloblist_apply_blobs()
The rec_from_blob() function returns a pointer, but the code was
comparing it using "rec <= 0" which is incorrect for pointer types.
Pointers should be compared using "== NULL" or "!= NULL".
Addresses-Coverity-ID: CID 645841: Incorrect expression (BAD_COMPARE) Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
Michal Simek [Wed, 29 Apr 2026 06:22:08 +0000 (08:22 +0200)]
fdt: check fdt_pack() return value in fdtdec_apply_bloblist_dtos()
The fdt_pack() function can return an error code, but its return value
was not being checked. Add proper error handling to propagate any
failure.
Also fix typo in comment: "Shink" -> "Shrink".
Addresses-Coverity-ID: CID 645839: Error handling issues (CHECKED_RETURN) Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
Franz Schnyder [Tue, 31 Mar 2026 08:10:10 +0000 (10:10 +0200)]
board: toradex: Quote variables in `test` cmd expression
With correct POSIX handling, unquoted empty variables can turn the
expression like
test -n ${fdtfile}
into
test -n
The POSIX handling for single argument `test` evaluates it as true,
so the fallback initialization will be skipped unexpectedly.
Quoting variable expansions in `test` expressions will always result in
correct behavior for empty and non-empty values.
This change was triggered by
commit 8b0619579b22 ("cmd: test: fix handling of single-argument form of test")
The aim is to have a less fragile codebase that is not dependent on a
quirk of the shell implementation.
Use quoted variable expansions in `test` expressions throughout.
Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com> Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 1 May 2026 14:12:31 +0000 (08:12 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Apologies for the delay, but please pull those sunxi changes into
v2026.07. Nothing earth shattering, mostly minor improvements like
better SPL power LED support, and fixes to some H616 DRAM setup. Also
some more forward looking enhancement for the SPI code. I also pulled in
Richard's raw NAND flash improvements for the H6/H616 SoC, though this
lacks proper peer testing due to the lack of mainline support for any
board actually employing those chips.
* .clang-format description
* qemu-arm: describe secure state steps
* mention that CONFIG_BOOTSTD_DEFAULTS provides network features when NET=y
* ti: k3: describe fTPM support
UEFI:
* cmd/bootefi: move efi_init_obj_list() to the start of do_bootefi
* correct return value of efi_bootmgr_run()
* correct efi_binary_run_dp() return value
* centralize messaging for efi_init_obj_list
* correct Kconfig dependencies for EFI_HTTP_BOOT
Others:
* .clang-format: add U-Boot specific for each macros
# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmn0hjwACgkQxIHbvCwF
# GsRDVQ/+LADSJv/WxhsEayOe1f0H0wp42bssPZikyUxHGr6azNHjgngw2sExfFt0
# YE9j3HUclZy0LLlsykUk8f6uzHsL4DTLS1pqwoi1tYX/szotvW6fP5eUUxkUD06Y
# GYx8ub+Niq8F5/wT7VYj4cBxs8Pl3Zql4vp0nlBFdgxH0D9APH6ORucjNawa+vCv
# a7yqzSv9vyJXdsOKxpusfrcsz8pdd8UqXRmTwgPxarc8g0gqieLAwP/bECEeq5ZR
# FSKrWF9qYrLUEBVlwUx6jEVgq9JvzL1FP8p9w+WMdP++ani7ytaqL40KGorHm1mU
# JAwaDdWiRgodYGRNoP5aPZNvx1o+e0dRoioF2cL9Eob+6pXG053dN5VVZUgMfGPf
# 9xHfpAI47y+EvSPZEe1T/m7wAIOTBCP58rJGgTXvlCL1+dc3X4Ez68x5zcDMrJF/
# 0QnuAoaZS+XgyWwsCOR9cGHSzNT3rR3Wx/f2lKXklbCMQ+C+sp5UkRFNvYrhCqnk
# tg+sWH54oEKKQ0dTwGG+tsFhn8lsdXzhRKl1jN7w4DVY/R9YZu776biU3yzortfI
# ymbFmfOGmcPSD+lO7S1w+64zjvwnJT+rAzMLuYr3bIuhWpS4rd2phsEyLfcDSXwc
# 51imC2PSnp7Mx51F5qjCXligYC0kHh3BHpxxZok/fHjUVzx2c98=
# =RLJL
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 01 May 2026 04:53:48 AM CST
# gpg: using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg: aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
Richard Genoud [Fri, 27 Mar 2026 14:05:07 +0000 (15:05 +0100)]
mtd: rawnand: sunxi: introduce variable user data length
In Allwinner SoCs, user data can be added in OOB before each ECC data.
For older SoCs like A10, the user data size was the size of a register
(4 bytes) and was mandatory before each ECC step.
So, the A10 OOB Layout is:
[4Bytes USER_DATA_STEP0] [ECC_STEP0 bytes]
[4bytes USER_DATA_STEP1] [ECC_STEP1 bytes]
...
NB: the BBM is stored at the beginning of the USER_DATA_STEP0.
Now, for H6/H616 NAND flash controller, this user data can have a
different size for each step.
So, we are maximizing the user data length to use as many OOB bytes as
possible.
Fixes: 7d1de9801151 ("mtd: rawnand: sunxi_spl: add support for H6/H616 nand controller") Fixes: f163da5e6d26 ("mtd: rawnand: sunxi: add support for H6/H616 nand controller") Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
.clang-format: add U-Boot specific for each macros
Formatting via clang-format is controlled by .clang-format.
For each statements should be formatted with a brace at the line end:
for_each() {
}
This requires clang-format to know that the symbol is not a function
but a for each macro. We use some for each macros which don't exist in
Linux. Add these to file .clang-format.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
doc: bootstd: specify CONFIG_BOOTSTD_DEFAULTS provides network features when NET=y
In the past, we only had one network stack which was called NET. The
network features were enabled for the legacy (and then only) networking
stack since commit 22353fa6b585 ("bootstd: Add some default filesystems
and commands"). Then instead on relying on NET legacy stack for enabling
networking features, the dependencies were (mostly) changed to depend on
CMD_NET in commit a0c739c184ca ("boot: Create a common BOOT_DEFAULTS for
distro and bootstd"). Then a new stack (lwIP) appeared, then CMD_NET was
made available with this new stack in commit 98ad145db61a ("net: lwip:
add DHCP support and dhcp commmand") making the networking features
possible to enable and finally commit f1e978fd54d9 ("boot: Update tests
around network symbols in BOOT_DEFAULTS_CMDS") made it explicit that we
need *a* network stack to enable some networking features.
Align the bootstd documentation with what's actually implemented as
Kconfig dependencies. Note that BOOTSTD_DEFAULTS selects BOOT_DEFAULTS
which selects BOOT_DEFAULTS_CMDS which then selects network features.
The CMDLINE symbol needs to be enabled as well for BOOT_DEFAULTS to
select BOOT_DEFAULTS_CMDS, but I don't think we need to go that far into
explaining what's required to enable some commands.
Reported-by: Simon Glass <sjg@chromium.org> Closes: https://lore.kernel.org/u-boot/CAFLszTgZC1FGy8965pHiG-u=FhrguftRv41ghQ_Qb_RRXx6tyg@mail.gmail.com/ Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
doc: board: ti: k3: Add fTPM support documentation
Add fTPM support documentation including an overview, configuration
steps for RPMB provisioning, OP-TEE TA build instructions, and
verification procedure.
efi_loader: centralize messaging for efi_init_obj_list
If efi_init_obj_list() fails we cannot use the UEFI sub-system.
* Instead of having messages for this everywhere write an error message
in efi_init_obj_list().
* Always use (ret != EFI_SUCCESS) when checking the return value of
efi_init_obj_list().
* Remove the return code from the error message as it does not help
users to understand which initialization went wrong.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add build steps for building U-Boot in secure state with
TF-A and OP-TEE. It includes the full steps for building
OP-TEE and TF-A to use with U-Boot. Also a short description
how to invoke QEMU with enabled EL3 and EL2. EL3 (machine
option secure=on) is required to run TF-A.
Signed-off-by: Johannes Krottmayer <krotti83@proton.me> Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Tom Rini [Tue, 17 Mar 2026 01:24:49 +0000 (19:24 -0600)]
EFI Loader: Correct dependencies for EFI_HTTP_BOOT
As exposed by "make randconfig", we have an issue with the dependencies
for EFI_HTTP_BOOT. As this is implemented by running commands (as seen
by what it selects) it must depend on CMDLINE as well.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Richard Genoud [Fri, 27 Mar 2026 14:05:05 +0000 (15:05 +0100)]
mtd: rawnand: sunxi: make the code mode self-explanatory
In sunxi_nfc_hw_ecc_{read,write}_chunk(), the ECC step was force to 0,
the reason is not trivial to get when reading the code.
The explanation is that, from the NAND flash controller perspective, we
are indeed at step 0 for user data length and ECC errors.
Just add a const value with an explanation to clarify things.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Andre Przywara <andre.przywara@arm.com>
Richard Genoud [Fri, 27 Mar 2026 14:05:04 +0000 (15:05 +0100)]
mtd: rawnand: sunxi: Replace hard coded value by a define
The user data length (4) used all over the code hard coded.
And sometimes, it's not that trivial to know that it's the user data
length and not something else.
Moreover, for the H6/H616 this value is no more fixed by hardware, but
could be modified.
Using a define here makes the code more readable.
Suggested-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Acked-by: Andre Przywara <andre.przywara@arm.com>
Yixun Lan [Tue, 21 Apr 2026 04:47:50 +0000 (04:47 +0000)]
spi: sunxi: wait for TX/RX fifo reset done
Once reset SPI TX or RX fifo, the underlying hardware need to take
some time to actually settle down, the two bits will automatically
clear to 0, so use a poll mechanism to check status bits to make sure
it's done correctly.
On Cubie A7A board which using A733 SoC, we encoutered a SPI nor flash
timeout issue, it turns out that the SPI fifo reset take a few time to
settle down, Add a loop to poll the status.
This was the error message shows on A7A board once this issue happened.
=> sf probe
ERROR: sun4i_spi: Timeout transferring data
Failed to initialize SPI flash at 0:0 (error -2)
Signed-off-by: Yixun Lan <dlan@gentoo.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Mon, 27 Apr 2026 13:29:50 +0000 (15:29 +0200)]
sunxi: H616: dram: drop default TPR6 Kconfig value
CONFIG_DRAM_SUNXI_TPR6 is the only DRAM config parameter that has a
non-zero default value. Since we need to provide a value for all the
other parameters anyway, avoiding TPR6 makes no real difference.
To make matters worse, TPR6 is a compound value covering multiple DRAM
types, but also spans over three SoCs, which makes it hard to find one
good default value.
Drop the default from Kconfig, and put some explicit values in the
defconfigs for the few boards that were relying on the default so far.
The value is taken from one BSP, only the lower byte matters anyway for
those boards, all using DDR3 DRAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Allwinner's DRAM initialisation code defines a parameter named TPR6,
presumably containing some "Vref" parameter, but containing values for
*all* DRAM types. The runtime code selects one byte based on the DRAM
type used.
This selection code was wrong for LPDDR3, the value is encoded in
bits [23:16], not [15:8]. Fix that in the code, which also aligns it
with the very similar code for the A133 and A523.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reported-by: Philippe Simons <simons.philippe@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Lukas Schmid [Wed, 25 Mar 2026 19:26:09 +0000 (20:26 +0100)]
pinctrl: sunxi: add I2C3 mux for D1/T113-s3 (PG10/PG11)
Boards based on the Allwinner D1/T113-s3, such as the
NetCube Systems Nagami, can expose a third I2C controller
on PG10/PG11. However, the sun20i_d1 pinctrl function table
lacked an entry for this mux.
Add the "i2c3" function with mux value 3 on PG10/PG11, allowing device
trees to enable the I2C3 controller.
Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Tue, 7 Apr 2026 22:34:47 +0000 (00:34 +0200)]
sunxi: configs: enable power LEDs on 64-bit boards
We recently gained a simple way to enable a power LED very early in the
SPL boot, through simple Kconfig variables.
Add those symbols to those boards' defconfigs where the DT indicates a
default-on power LED. The number used is <port bank> * 32 + <pin no>,
an active low setup means CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH must be
undefined.
This will light up the power LED very early in the (SPL) boot phase on
those 64-bit boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Andre Przywara [Tue, 7 Apr 2026 22:34:46 +0000 (00:34 +0200)]
sunxi: configs: enable power LEDs on 32-bit boards
We recently gained a simple way to enable a power LED very early in the
SPL boot, through simple Kconfig variables.
Add those symbols to those boards' defconfigs where the DT indicates a
default-on power LED. The number used is <port bank> * 32 + <pin no>,
an active low setup means CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH must be
undefined. Since its default is "high", we can skip the symbol in the
defconfig in this case.
This will light up the power LED very early in the (SPL) boot phase on
those 32-bit boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Andre Przywara [Tue, 7 Apr 2026 22:34:45 +0000 (00:34 +0200)]
sunxi: spl: fix SPL_SUNXI_LED active low configuration
The newly introduced Allwinner SPL LED "framework" defined a
SPL_SUNXI_LED_STATUS_STATE Kconfig symbol, that was supposed to denote
the active-low vs. active-high polarity of the LED. However this is
a bool symbol, so it will simply vanish if not defined, and we cannot use
it directly inside a C statement.
Filter the symbol through the IS_ENABLED() macro, which will return 0 if
the symbol is not defined, which is the intended value here.
Since the STATUS_STATE name is a bit confusing, rename it to ACTIVE_HIGH
on the way, because that is its real meaning. Also the LED_STATUS_BIT
name for the GPIO number is similarly a remnant of the old status LED
code, so rename it to LED_STATUS_GPIO as well.
This fixes configuring LEDs with active-low polarity.
Fixes: 256557dd9aae ("sunxi: remove usage of legacy LED API") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io> Closes: https://lore.kernel.org/u-boot/adfMQBPdntWy1KIq@shepard/ Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
sunxi: use vendor prefix for $fdtfile on RISC-V too
Once we complete the support for RISC-V Allwinner D1 (sun20i), we will need
to prefix $fdtfile with the vendor prefix to match the Linux device-tree
directory structure.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Andre Przywara <andre.przywara@arm.com>
gpio: 74x164: use dev_read_* APIs for live-tree compatibility
With CONFIG_OF_LIVE=y, dev_of_offset(dev) does not return a valid
flat-FDT offset, so fdtdec_get_int(gd->fdt_blob, offset, ...) inside
gen_74x164_probe() fails to locate the "registers-number" property and
always falls back to the default value of 1. This results in a 4-chip
74HC595 daisy chain being exposed as only 8 GPIOs instead of 32, and
any consumer referencing offsets >= 8 fails to bind with -ENOENT
("GPIO ... not found" / Error -22).
The "registers-default" property is ignored for the same reason, so
any configured power-on output pattern is silently discarded.
Replace the flat-FDT helpers with dev_read_u32_default() and
dev_read_u8_array_ptr(), which correctly walk both live and flat
trees. This matches how other DM GPIO drivers (e.g. pca953x_gpio.c)
read their per-device properties.
With gd->fdt_blob no longer referenced, also drop the now-unused
DECLARE_GLOBAL_DATA_PTR and <asm/global_data.h> include.
Tested on stm32mp153d-ssonic (CONFIG_OF_LIVE=y) with a 4-chip 74HC595
chain: all 32 GPIOs are now exposed, and 16 consumer LED nodes at
offsets 0..31 bind successfully.
The build issues found in dtc/yamltree were partially mitigated by a
previous commit (807bcd844a: "scripts/dtc: Fix pkg-config behavior under
sysroot"), but upstream dtc simply disabled yaml, and the same should be
done here in order to permanently avoid those issues.
Backport the change below from Linux v5.18 [1]:
ef8795f3f1c ("dt-bindings: kbuild: Use DTB files for validation")
I tested this patch with a couple Yocto builds: u-boot and u-boot-tools,
using the current master branch (rev. "c53b0708f9"), having removed
libyaml-native from u-boot-tools's dependencies.
Dario Binacchi [Wed, 25 Feb 2026 16:17:00 +0000 (17:17 +0100)]
video: support Rocktech RK050HR345-CT106A panel
Add support for the Rocktech RK050HR345-CT106A RGB panel. This model
uses an Ilitek ILI9806E controller over the SPI bus for initialization
and register configuration only.
The driver is designed to be easily extensible to support other panels
with different sequences and timings by providing a specific descriptor
structure for each model.
Dario Binacchi [Wed, 25 Feb 2026 16:16:58 +0000 (17:16 +0100)]
spi: stm32: add support for bits-per-word setting
Implement the set_wordlen operation to allow dynamic bus width
configuration. This is required for peripherals with non-standard
requirements, such as display panels that need 9-bit word transfers
during the initialization and setup phase.
Dario Binacchi [Wed, 25 Feb 2026 16:16:57 +0000 (17:16 +0100)]
spi: stm32: add stm32_spi_is_enabled() helper
Add a helper to check the SPE (SPI Enable) bit and replace the
open-coded bitwise check in stm32_spi_stopxfer() with this helper to
improve readability and consistency.
This is also a preparatory step for future driver updates that require
checking the SPI enable state across different code paths.
Dario Binacchi [Wed, 25 Feb 2026 16:16:55 +0000 (17:16 +0100)]
test: dm: spi: add testcase for spi_set_wordlen()
Add a unit test to verify that the SPI word length configuration is
correctly handled by the SPI uclass and successfully passed down to
the sandbox driver.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Dario Binacchi [Wed, 25 Feb 2026 16:16:52 +0000 (17:16 +0100)]
spi: add support for bits-per-word setting
Allow dynamic configuration of the SPI word length. This is required
for controllers and slaves that need to operate with non-standard
word lengths, such as 9-bit wide transfers.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Tom Rini [Wed, 25 Mar 2026 19:00:27 +0000 (13:00 -0600)]
arm: stm32mp: Drop unnecessary BOARD_EARLY_INIT_F usage
All of these platforms enable CONFIG_BOARD_EARLY_INIT_F and then have a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Fix the following errors yielded by Coverity Scan:
CID 644836: Error handling issues (CHECKED_RETURN)
Calling device_chld_unbind without checking return value (as is done elsewhere 6 out of 7 times)
CID 644834: Error handling issues (CHECKED_RETURN)
Calling device_chld_remove without checking return value (as is done elsewhere 4 out of 5 times).
Link: https://lore.kernel.org/r/20260309212331.GF1388590@bill-the-cat/ Fixes: a6d047c0a86b ("video: stm32: remove all child of DSI bridge when its probe failed") Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Depending of plugged power source (computer, wall charger, ...) it can
happen that we got the following message:
"****************************************************"
"* USB TYPE-C charger not compliant with *"
"* specification *"
"****************************************************"
" "
"### ERROR ### Please RESET the board ### "
This issue has been detected on STM32MP135f-DK board.
It's due to max_uV and min_uV value are initialized at beginning of
board_check_usb_power() and can then be used for the 2 iteration of
adc_measurement().
max_uV/min_uV values issued of the first adc_measurement() iteration
are used as input of the second adc_measurement() iteration, which
can lead to incoherent pair of min_uV/max_uV values.
To ensure that adc_measurement() returns coherent value for max_uV and
min_uV, initialize max_uV and min_uV at each loop start.
Tom Rini [Wed, 29 Apr 2026 20:49:24 +0000 (14:49 -0600)]
Merge tag 'mediatek-for-master-2026-04-29' of https://source.denx.de/u-boot/custodians/u-boot-mediatek
* MMC fixes for Genio 520/720 (mt8189)
* SPI NOR Flash controller fixes
* SPI NOR Flash support for Genio 520/720
* PMIC controller fixes
* PMIC support for Genio 1200 (mt8195)
* Drop CONFIG_IDENT_STRING to be consistent across the platform
* Remove empty header on mt7622
David Lechner [Thu, 9 Apr 2026 20:30:38 +0000 (15:30 -0500)]
power: pmic: mtk-pwrap: use pmic compatible to select child info
Change the logic for selecting pmic_children_info to use the compatible
string from the devicetree instead of expecting the pwrap (part of the
MCU) to correspond to the separate PMIC chip.
In addition to being more correct, it also saves a few lines of code for
each MCU type that is added by dropping the enum and type field.
projects / thirdparty / u-boot.git / log
