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3 years agoARM: 9209/1: Spectre-BHB: avoid pr_info() every time a CPU comes out of idle
Ard Biesheuvel [Tue, 31 May 2022 08:53:42 +0000 (09:53 +0100)] 
ARM: 9209/1: Spectre-BHB: avoid pr_info() every time a CPU comes out of idle

Jon reports that the Spectre-BHB init code is filling up the kernel log
with spurious notifications about which mitigation has been enabled,
every time any CPU comes out of a low power state.

Given that Spectre-BHB mitigations are system wide, only a single
mitigation can be enabled, and we already print an error if two types of
CPUs coexist in a single system that require different Spectre-BHB
mitigations.

This means that the pr_info() that describes the selected mitigation
does not need to be emitted for each CPU anyway, and so we can simply
emit it only once.

In order to clarify the above in the log message, update it to describe
that the selected mitigation will be enabled on all CPUs, including ones
that are unaffected. If another CPU comes up later that is affected and
requires a different mitigation, we report an error as before.

Fixes: b9baf5c8c5c3 ("ARM: Spectre-BHB workaround")
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
3 years agodrm/i915/guc: Asynchronous flush of GuC log regions
Alan Previn [Tue, 7 Jun 2022 00:23:14 +0000 (17:23 -0700)] 
drm/i915/guc: Asynchronous flush of GuC log regions

Both error-capture and relay-logging mechanism use the GuC
log infrastructure. That means the KMD must send a log flush
complete notification back to GuC after reading the data out.
This call is currently being sent synchronously.
However, synchronous H2Gs cause problems when the system is
backed up. There is no need for this to be synchronous. The
KMD wasn't even looking at the return status from it. So make
it asynchronous and then there is no issue about time outs.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220607002314.1451656-2-alan.previn.teres.alexis@intel.com
3 years agoiov_iter: massage calling conventions for first_{iovec,bvec}_segment()
Al Viro [Tue, 21 Jun 2022 20:10:37 +0000 (16:10 -0400)] 
iov_iter: massage calling conventions for first_{iovec,bvec}_segment()

Pass maxsize by reference, return length via the same.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agoiov_iter: first_{iovec,bvec}_segment() - simplify a bit
Al Viro [Tue, 21 Jun 2022 19:55:19 +0000 (15:55 -0400)] 
iov_iter: first_{iovec,bvec}_segment() - simplify a bit

We return length + offset in page via *size.  Don't bother - the caller
can do that arithmetics just as well; just report the length to it.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agoARM: dts: qcom: msm8974: rename GPU's OPP table node
Dmitry Baryshkov [Wed, 6 Jul 2022 14:54:12 +0000 (17:54 +0300)] 
ARM: dts: qcom: msm8974: rename GPU's OPP table node

Rename the GPU's opp table node to make it follow the
display/msm/gpu.yaml schema.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706145412.1566011-6-dmitry.baryshkov@linaro.org
3 years agoARM: dts: qcom: apq8064: disable DSI and DSI PHY by default
Dmitry Baryshkov [Wed, 6 Jul 2022 14:54:11 +0000 (17:54 +0300)] 
ARM: dts: qcom: apq8064: disable DSI and DSI PHY by default

Disable DSI and DSI PHY devices by default. The only actual user,
Nexus 7, already contains `status = "okay"` property in the respective
devices nodes.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706145412.1566011-5-dmitry.baryshkov@linaro.org
3 years agoARM: dts: qcom: apq8064: rename DSI PHY iface clock
Dmitry Baryshkov [Wed, 6 Jul 2022 14:54:10 +0000 (17:54 +0300)] 
ARM: dts: qcom: apq8064: rename DSI PHY iface clock

Follow the usual scheme and use name 'iface' rather than 'iface_clk' for
the interface clock. The DSI PHY driver can cope with both of them, so
there is no breakage.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706145412.1566011-4-dmitry.baryshkov@linaro.org
3 years agoarm64: defconfig: enable Qualcomm Bandwidth Monitor
Krzysztof Kozlowski [Mon, 4 Jul 2022 12:17:29 +0000 (14:17 +0200)] 
arm64: defconfig: enable Qualcomm Bandwidth Monitor

Enable the Qualcomm Bandwidth Monitor to allow scaling interconnects
depending on bandwidth usage between CPU and memory.  This is used
already on Qualcomm SDM845 SoC.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220704121730.127925-4-krzysztof.kozlowski@linaro.org
3 years agosoc: qcom: icc-bwmon: Add bandwidth monitoring driver
Krzysztof Kozlowski [Mon, 4 Jul 2022 12:17:28 +0000 (14:17 +0200)] 
soc: qcom: icc-bwmon: Add bandwidth monitoring driver

Bandwidth monitoring (BWMON) sits between various subsytems like CPU,
GPU, Last Level caches and memory subsystem.  The BWMON can be
configured to monitor the data throuhput between memory and other
subsytems.  The throughput is measured within specified sampling window
and is used to vote for corresponding interconnect bandwidth.

Current implementation brings support for BWMON v4, used for example on
SDM845 to measure bandwidth between CPU (gladiator_noc) and Last Level
Cache (memnoc).  Usage of this BWMON allows to remove fixed bandwidth
votes from cpufreq (CPU nodes) thus achieve high memory throughput even
with lower CPU frequencies.

The driver was tested on SDM845.

Co-developed-by: Thara Gopinath <thara.gopinath@gmail.com>
Signed-off-by: Thara Gopinath <thara.gopinath@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220704121730.127925-3-krzysztof.kozlowski@linaro.org
3 years agodt-bindings: interconnect: qcom,msm8998-cpu-bwmon: add BWMON device
Krzysztof Kozlowski [Mon, 4 Jul 2022 12:17:27 +0000 (14:17 +0200)] 
dt-bindings: interconnect: qcom,msm8998-cpu-bwmon: add BWMON device

Add bindings for the Qualcomm Bandwidth Monitor device providing
performance data on interconnects.  The bindings describe only BWMON CPU
(version 4), e.g. the instance which appeared for the first on Qualcomm
MSM8998 SoC and is also used on SDM845.  This BWMON device sits between
CPU and Last Level Cache Controller.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Georgi Djakov <djakov@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220704121730.127925-2-krzysztof.kozlowski@linaro.org
3 years agoARM: dts: qcom: extend scm compatible to match dt-schema
David Heidelberg [Sun, 26 Jun 2022 18:32:45 +0000 (20:32 +0200)] 
ARM: dts: qcom: extend scm compatible to match dt-schema

First device specific compatible, then general one.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220626183247.142776-1-david@ixit.cz
3 years agoiov_iter: lift dealing with maxpages out of first_{iovec,bvec}_segment()
Al Viro [Sat, 11 Jun 2022 00:53:17 +0000 (20:53 -0400)] 
iov_iter: lift dealing with maxpages out of first_{iovec,bvec}_segment()

caller can do that just as easily

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agoMerge tag 'dt-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Wed, 6 Jul 2022 20:34:02 +0000 (22:34 +0200)] 
Merge tag 'dt-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Cleanup of ARM DTS for v5.20, part two

Series of cleanups for ARM DTS - white-spaces, gpio-key subnode names
and gpio-key properties for more boards: TI, Marvell, AT91 and Aspeed.

* tag 'dt-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: aspeed: correct gpio-keys properties
  ARM: dts: aspeed: align gpio-key node names with dtschema
  ARM: dts: at91: drop unneeded status from gpio-keys
  ARM: dts: at91: correct gpio-keys properties
  ARM: dts: at91: align gpio-key node names with dtschema
  ARM: dts: omap: correct gpio-keys properties
  ARM: dts: omap: align gpio-key node names with dtschema
  ARM: dts: marvell: correct gpio-keys properties
  ARM: dts: marvell: align gpio-key node names with dtschema
  ARM: dts: omap: adjust whitespace around '='
  ARM: dts: ti: adjust whitespace around '='

Link: https://lore.kernel.org/r/20220706163754.33064-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agodt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
Dmitry Baryshkov [Mon, 20 Jun 2022 07:19:33 +0000 (10:19 +0300)] 
dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources

Add additional GCC clock sources. This includes PCIe and USB PIPE and
UFS symbol clocks.

Fixes: 2a8aa18c1131 ("dt-bindings: clk: qcom: Fix self-validation, split, and clean cruft")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620071936.1558906-2-dmitry.baryshkov@linaro.org
3 years agoMerge tag 'dt64-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Wed, 6 Jul 2022 20:32:51 +0000 (22:32 +0200)] 
Merge tag 'dt64-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Cleanup of ARM64 DTS for v5.20, part two

Remaining cleanups for ARM64 DTS: gpio-keys and led node names on Marvel
platforms.

* tag 'dt64-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: marvell: armada-3720: align lednode names with dtschema
  arm64: dts: marvell: align gpio-key node names with dtschema

Link: https://lore.kernel.org/r/20220706163754.33064-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoarm64: dts: qcom: sm6125: Add DLL/DDR configuration on SDHCI 1/2
Marijn Suijten [Sun, 8 May 2022 10:03:35 +0000 (12:03 +0200)] 
arm64: dts: qcom: sm6125: Add DLL/DDR configuration on SDHCI 1/2

These config values have been extracted from CodeLinaro's most recent
trinket/sm6125 tag:
https://git.codelinaro.org/clo/la/kernel/msm-4.14/-/blob/LA.UM.9.11.r1-05600-NICOBAR.QSSI12.0/arch/arm64/boot/dts/qcom/trinket.dtsi

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508100336.127176-3-marijn.suijten@somainline.org
3 years agoarm64: dts: qcom: sm6125: Append -state suffix to pinctrl nodes
Marijn Suijten [Sun, 8 May 2022 10:03:34 +0000 (12:03 +0200)] 
arm64: dts: qcom: sm6125: Append -state suffix to pinctrl nodes

According to qcom,sm6125-pinctrl.yaml all nodes inside the tlmm must be
suffixed by -state:

    qcom/sm6125-sony-xperia-seine-pdx201.dtb: pinctrl@500000: 'sdc2-off', 'sdc2-on' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+'

The label names have been updated to match, going from sdc2_state_X to
sdc2_X_state.

Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Fixes: 82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508100336.127176-2-marijn.suijten@somainline.org
3 years agoarm64: dts: qcom: sm6125: Move sdc2 pinctrl from seine-pdx201 to sm6125
Marijn Suijten [Sun, 8 May 2022 10:03:33 +0000 (12:03 +0200)] 
arm64: dts: qcom: sm6125: Move sdc2 pinctrl from seine-pdx201 to sm6125

Both the sdc2-on and sdc2-off pinctrl nodes are used by the
sdhci@4784000 node in sm6125.dtsi.  Surprisingly sdc2-off is defined in
sm6125, yet its sdc2-on counterpart is only defined in board-specific DT
for the Sony Seine PDX201 board/device resulting in an "undefined label
&sdc2_state_on" error if sm6125.dtsi were included elsewhere.
This sm6125 base dtsi should not rely on externally defined labels; the
properties referencing it should then also be written externally.
Since the sdc2-on pin configuration is board-independent just like
sdc2-off, move it from seine-pdx201.dts into sm6125.dtsi.

The SDCard-detect pin (gpio98) is however board-specific, and remains as
an overwrite in seine-pdx201.dts for both the on and off state.

As a drive-by cleanup, reorder bias- and drive-strength properties.

Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Fixes: 82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508100336.127176-1-marijn.suijten@somainline.org
3 years agoiov_iter_get_pages{,_alloc}(): cap the maxsize with MAX_RW_COUNT
Al Viro [Sat, 11 Jun 2022 20:44:21 +0000 (16:44 -0400)] 
iov_iter_get_pages{,_alloc}(): cap the maxsize with MAX_RW_COUNT

All callers can and should handle iov_iter_get_pages() returning
fewer pages than requested.  All in-kernel ones do.  And it makes
the arithmetical overflow analysis much simpler...

Reviewed-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agoiov_iter_bvec_advance(): don't bother with bvec_iter
Al Viro [Tue, 7 Jun 2022 03:44:33 +0000 (23:44 -0400)] 
iov_iter_bvec_advance(): don't bother with bvec_iter

do what we do for iovec/kvec; that ends up generating better code,
AFAICS.

Reviewed-by: Jeff Layton <jlayton@kernel.org>
Reviewed-by: Christian Brauner (Microsoft) <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agoPCI: endpoint: Don't stop controller when unbinding endpoint function
Shunsuke Mie [Wed, 22 Jun 2022 04:09:24 +0000 (13:09 +0900)] 
PCI: endpoint: Don't stop controller when unbinding endpoint function

Unbinding an endpoint function from the endpoint controller shouldn't stop
the controller.  This is especially a problem for multi-function endpoints
where other endpoints may still be active.

Don't stop the controller when unbinding one of its endpoints.  Normally
the controller is stopped via configfs.

Fixes: 349e7a85b25f ("PCI: endpoint: functions: Add an EP function to test PCI")
Link: https://lore.kernel.org/r/20220622040924.113279-1-mie@igel.co.jp
Signed-off-by: Shunsuke Mie <mie@igel.co.jp>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
3 years agoarm64: dts: qcom: db820c: Add user LEDs
Bjorn Andersson [Thu, 5 May 2022 02:27:06 +0000 (19:27 -0700)] 
arm64: dts: qcom: db820c: Add user LEDs

The db820c has 4 "user LEDs", all connected to the PMI8994. The first
three are connected to the three current sinks provided by the TRILED
and the fourth is connected to MPP2.

By utilizing the DTEST bus the MPP is fed the control signal from the
fourth LPG block, providing a consistent interface to the user.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20220505022706.1692554-5-bjorn.andersson@linaro.org
3 years agoarm64: dts: qcom: pmi8994: Define MPP block
Bjorn Andersson [Thu, 5 May 2022 02:27:05 +0000 (19:27 -0700)] 
arm64: dts: qcom: pmi8994: Define MPP block

The pmi8994 has 4 multi-purpose-pins, add these to the definition.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20220505022706.1692554-4-bjorn.andersson@linaro.org
3 years agoarm64: dts: qcom: sdm845: Enable user LEDs on DB845c
Bjorn Andersson [Thu, 5 May 2022 02:27:04 +0000 (19:27 -0700)] 
arm64: dts: qcom: sdm845: Enable user LEDs on DB845c

The DB845c has 4 "user LEDs", the last one is already supported as it's
just wired to a gpio. Now that the LPG binding is in place we can wire
up the other 3 LEDs as well.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20220505022706.1692554-3-bjorn.andersson@linaro.org
3 years agoarm64: dts: qcom: Add LPG to pm8916, pm8994, pmi8994 and pmi8998
Bjorn Andersson [Thu, 5 May 2022 02:27:03 +0000 (19:27 -0700)] 
arm64: dts: qcom: Add LPG to pm8916, pm8994, pmi8994 and pmi8998

Add PWM/LPG nodes to the PMICs currently supported by the binding.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20220505022706.1692554-2-bjorn.andersson@linaro.org
3 years agoarm64: dts: qcom: sm8350: Replace integers with rpmpd defines
Robert Foss [Wed, 6 Jul 2022 15:28:30 +0000 (17:28 +0200)] 
arm64: dts: qcom: sm8350: Replace integers with rpmpd defines

Replace &rpmhpd power domain integers with their respective defines
in order to improve legibility.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706152830.2021197-1-robert.foss@linaro.org
3 years agoarm64: dts: qcom: sm8350: Add DISPCC node
Robert Foss [Wed, 6 Jul 2022 15:43:37 +0000 (17:43 +0200)] 
arm64: dts: qcom: sm8350: Add DISPCC node

Add the dispcc clock-controller DT node for sm8350.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-6-robert.foss@linaro.org
3 years agoMerge branch '20220706154337.2026269-1-robert.foss@linaro.org' into arm64-for-5.20
Bjorn Andersson [Wed, 6 Jul 2022 20:16:51 +0000 (15:16 -0500)] 
Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into arm64-for-5.20

3 years agoarm64: dts: qcom: sm8450: Add description of camera clock controller
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:26:22 +0000 (09:26 +0300)] 
arm64: dts: qcom: sm8450: Add description of camera clock controller

The change adds description of Qualcomm SM8450 camera clock controller.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-3-vladimir.zapolskiy@linaro.org
3 years agoMerge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into arm64...
Bjorn Andersson [Wed, 6 Jul 2022 20:22:54 +0000 (15:22 -0500)] 
Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into arm64-for-5.20

3 years agoclk: qcom: add support for SM8350 DISPCC
Jonathan Marek [Wed, 6 Jul 2022 15:43:36 +0000 (17:43 +0200)] 
clk: qcom: add support for SM8350 DISPCC

Add support to the SM8350 display clock controller by extending the SM8250
display clock controller, which is almost identical but has some minor
differences.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-5-robert.foss@linaro.org
3 years agoclk: qcom: add support for SM8350 GPUCC
Robert Foss [Wed, 6 Jul 2022 15:43:34 +0000 (17:43 +0200)] 
clk: qcom: add support for SM8350 GPUCC

The GPUCC manages the clocks for the Adreno GPU found on the
sm8350 SoCs.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-3-robert.foss@linaro.org
3 years agoMerge branch '20220706154337.2026269-1-robert.foss@linaro.org' into clk-for-5.20
Bjorn Andersson [Wed, 6 Jul 2022 20:16:12 +0000 (15:16 -0500)] 
Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into clk-for-5.20

3 years agoclk: qcom: add camera clock controller driver for SM8450 SoC
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:27:44 +0000 (09:27 +0300)] 
clk: qcom: add camera clock controller driver for SM8450 SoC

Add  camera clock controller driver found on Qualcomm SM8450 SoC.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062744.2757931-1-vladimir.zapolskiy@linaro.org
3 years agoclk: qcom: clk-alpha-pll: add Rivian EVO PLL configuration interfaces
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:27:39 +0000 (09:27 +0300)] 
clk: qcom: clk-alpha-pll: add Rivian EVO PLL configuration interfaces

Add and export Rivian EVO PLL configuration and control functions to
clock controller drivers, the PLL is used by SM8450 camera clock
controller.

Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062739.2757912-1-vladimir.zapolskiy@linaro.org
3 years agoclk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:27:29 +0000 (09:27 +0300)] 
clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces

Add controls for Lucid EVO PLL configuration and export control functions
to clock controller drivers, the PLL is used by Qualcomm SM8450 camera
and display clock controllers.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062729.2757893-1-vladimir.zapolskiy@linaro.org
3 years agoclk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:27:20 +0000 (09:27 +0300)] 
clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code

Unify all exported PLL clock configuration functions and data structures
as GPL symbols.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062720.2757874-1-vladimir.zapolskiy@linaro.org
3 years agoclk: qcom: clk-alpha-pll: fix clk_trion_pll_configure description
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:27:11 +0000 (09:27 +0300)] 
clk: qcom: clk-alpha-pll: fix clk_trion_pll_configure description

After merging lucid and trion pll functions in commit 0b01489475c6
("clk: qcom: clk-alpha-pll: same regs and ops for trion and lucid")
the function clk_trion_pll_configure() is left with an old description
header, which results in a W=2 compile time warning, fix it.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062711.2757855-1-vladimir.zapolskiy@linaro.org
3 years agoMerge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into clk-for...
Bjorn Andersson [Wed, 6 Jul 2022 20:20:51 +0000 (15:20 -0500)] 
Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into clk-for-5.20

3 years agodt-bindings: clock: add QCOM SM8450 camera clock bindings
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:26:21 +0000 (09:26 +0300)] 
dt-bindings: clock: add QCOM SM8450 camera clock bindings

The change adds device tree bindings for camera clock controller
found on SM8450 SoC.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-2-vladimir.zapolskiy@linaro.org
3 years agodt-bindings: clock: Add Qcom SM8350 DISPCC bindings
Jonathan Marek [Wed, 6 Jul 2022 15:43:35 +0000 (17:43 +0200)] 
dt-bindings: clock: Add Qcom SM8350 DISPCC bindings

Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250
bindings. Update the documentation with the new compatible.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-4-robert.foss@linaro.org
3 years agodt-bindings: clock: Add Qcom SM8350 GPUCC bindings
Robert Foss [Wed, 6 Jul 2022 15:43:33 +0000 (17:43 +0200)] 
dt-bindings: clock: Add Qcom SM8350 GPUCC bindings

Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8350 SoCs.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmityr.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-2-robert.foss@linaro.org
3 years agodrm: xlnx: add <linux/io.h> for readl/writel
Randy Dunlap [Wed, 6 Jul 2022 18:42:24 +0000 (11:42 -0700)] 
drm: xlnx: add <linux/io.h> for readl/writel

Add a header file to prevent build errors:

../drivers/gpu/drm/xlnx/zynqmp_dp.c: In function ‘zynqmp_dp_write’:
../drivers/gpu/drm/xlnx/zynqmp_dp.c:335:9: error: implicit declaration of function ‘writel’ [-Werror=implicit-function-declaration]
  335 |         writel(val, dp->iomem + offset);
../drivers/gpu/drm/xlnx/zynqmp_dp.c: In function ‘zynqmp_dp_read’:
../drivers/gpu/drm/xlnx/zynqmp_dp.c:340:16: error: implicit declaration of function ‘readl’ [-Werror=implicit-function-declaration]
  340 |         return readl(dp->iomem + offset);

Fixes: a204f9743b68 ("drm: Remove linux/i2c.h from drm_crtc.h")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Hyun Kwon <hyun.kwon@xilinx.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220706184224.29116-1-rdunlap@infradead.org
3 years agospi: Merge AMD fix
Mark Brown [Wed, 6 Jul 2022 19:37:43 +0000 (20:37 +0100)] 
spi: Merge AMD fix

Work around problems with large transfers.

3 years agospi: AMD SPI controller driver bug fix and cleanups
Mark Brown [Wed, 6 Jul 2022 19:37:03 +0000 (20:37 +0100)] 
spi: AMD SPI controller driver bug fix and cleanups

Merge series from Cristian Ciocaltea <cristian.ciocaltea@collabora.com>:

This patch series addresses an issue in the spi-amd driver and, while
there, performs some additional cleanups, like simplifying the error
handling in the probe function and removing an unused struct member.

For improving code readability, it also adds some kernel-doc comments.

3 years agoPCI: Drop of_match_ptr() to avoid unused variables
Bjorn Helgaas [Wed, 6 Jul 2022 19:27:21 +0000 (14:27 -0500)] 
PCI: Drop of_match_ptr() to avoid unused variables

We have stubs for most OF interfaces even when CONFIG_OF is not set, so we
allow building of most controller drivers in that case for compile testing.

When CONFIG_OF is not set, "of_match_ptr(<match_table>)" compiles to NULL,
which leaves <match_table> unused, resulting in errors like this:

  $ make W=1
  drivers/pci/controller/pci-xgene.c:636:34: error: ‘xgene_pcie_match_table’ defined but not used [-Werror=unused-const-variable=]

Drop of_match_ptr() to avoid the unused variable warning.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
3 years agovfio/pci: fix the wrong word
Bo Liu [Mon, 4 Jul 2022 02:36:49 +0000 (22:36 -0400)] 
vfio/pci: fix the wrong word

This patch fixes a wrong word in comment.

Signed-off-by: Bo Liu <liubo03@inspur.com>
Link: https://lore.kernel.org/r/20220704023649.3913-1-liubo03@inspur.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
3 years agodrm/i915: Nuke PCH_JSP
Ville Syrjälä [Thu, 30 Jun 2022 15:06:00 +0000 (18:06 +0300)] 
drm/i915: Nuke PCH_JSP

JSP is based on ICP and we don't really need to differentiate
between the two. So let's just delcare JSP to be ICP.

The only slight change here is for Wa_14011294188 which we
used to apply for JSP but now we'll only apply to MCC. This
should be fine since the issue being dealt with was introduced
in TGP and inherited into MCC. JSP being derived from ICP
should not need this workaround.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
3 years agodrm/i915: Nuke PCH_MCC
Ville Syrjälä [Thu, 30 Jun 2022 15:05:59 +0000 (18:05 +0300)] 
drm/i915: Nuke PCH_MCC

MCC is derived from TGP, and we have no real need to
differentiate between the two. Thus remove PCH_MCC and
just declare it to be PCH_TGP compatible.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
3 years agodrm/i915: Use short PCH names consistently
Ville Syrjälä [Thu, 30 Jun 2022 15:05:58 +0000 (18:05 +0300)] 
drm/i915: Use short PCH names consistently

The comments regarding PCH compatibility use long vs.
short names inconsistently. Just use short names always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
3 years agostep_into(): move fetching ->d_inode past handle_mounts()
Al Viro [Mon, 4 Jul 2022 02:35:56 +0000 (22:35 -0400)] 
step_into(): move fetching ->d_inode past handle_mounts()

... and lose messing with it in __follow_mount_rcu()

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agolookup_fast(): don't bother with inode
Al Viro [Mon, 4 Jul 2022 02:20:20 +0000 (22:20 -0400)] 
lookup_fast(): don't bother with inode

Note that validation of ->d_seq after ->d_inode fetch is gone, along
with fetching of ->d_inode itself.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agofollow_dotdot{,_rcu}(): don't bother with inode
Al Viro [Mon, 4 Jul 2022 02:18:11 +0000 (22:18 -0400)] 
follow_dotdot{,_rcu}(): don't bother with inode

step_into() will fetch it, TYVM.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agostep_into(): lose inode argument
Al Viro [Mon, 4 Jul 2022 02:07:32 +0000 (22:07 -0400)] 
step_into(): lose inode argument

make handle_mounts() always fetch it.  This is just the first step -
the callers of step_into() will stop trying to calculate the sucker,
etc.

The passed value should be equal to dentry->d_inode in all cases;
in RCU mode - fetched after we'd sampled ->d_seq.  Might as well
fetch it here.  We do need to validate ->d_seq, which duplicates
the check currently done in lookup_fast(); that duplication will
go away shortly.

After that change handle_mounts() always ignores the initial value of
*inode and always sets it on success.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agonamei: stash the sampled ->d_seq into nameidata
Al Viro [Mon, 4 Jul 2022 22:12:39 +0000 (18:12 -0400)] 
namei: stash the sampled ->d_seq into nameidata

New field: nd->next_seq.  Set to 0 outside of RCU mode, holds the sampled
value for the next dentry to be considered.  Used instead of an arseload
of local variables, arguments, etc.

step_into() has lost seq argument; nd->next_seq is used, so dentry passed
to it must be the one ->next_seq is about.

There are two requirements for RCU pathwalk:
1) it should not give a hard failure (other than -ECHILD) unless
non-RCU pathwalk might fail that way given suitable timings.
2) it should not succeed unless non-RCU pathwalk might succeed
with the same end location given suitable timings.

The use of seq numbers is the way we achieve that.  Invariant we want
to maintain is:
if RCU pathwalk can reach the state with given nd->path, nd->inode
and nd->seq after having traversed some part of pathname, it must be possible
for non-RCU pathwalk to reach the same nd->path and nd->inode after having
traversed the same part of pathname, and observe the nd->path.dentry->d_seq
equal to what RCU pathwalk has in nd->seq

For transition from parent to child, we sample child's ->d_seq
and verify that parent's ->d_seq remains unchanged.  Anything that
disrupts parent-child relationship would've bumped ->d_seq on both.
For transitions from child to parent we sample parent's ->d_seq
and verify that child's ->d_seq has not changed.  Same reasoning as
for the previous case applies.
For transition from mountpoint to root of mounted we sample
the ->d_seq of root and verify that nobody has touched mount_lock since
the beginning of pathwalk.  That guarantees that mount we'd found had
been there all along, with these mountpoint and root of the mounted.
It would be possible for a non-RCU pathwalk to reach the previous state,
find the same mount and observe its root at the moment we'd sampled
->d_seq of that
For transitions from root of mounted to mountpoint we sample
->d_seq of mountpoint and verify that mount_lock had not been touched
since the beginning of pathwalk.  The same reasoning as in the
previous case applies.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agonvme: use struct group for generic command dwords
Keith Busch [Wed, 6 Jul 2022 17:05:05 +0000 (10:05 -0700)] 
nvme: use struct group for generic command dwords

This will allow the trace event to know the full size of the data
intended to be copied and silence read overflow checks.

Reported-by: John Garry <john.garry@huawei.com>
Suggested-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Christoph Hellwig <hch@lst.de>
3 years agoMerge tag 'for-linus' of https://github.com/openrisc/linux
Linus Torvalds [Wed, 6 Jul 2022 17:10:26 +0000 (10:10 -0700)] 
Merge tag 'for-linus' of https://github.com/openrisc/linux

Pull OpenRISC fixes from Stafford Horne:
 "Fixups for OpenRISC found during recent testing:

   - An OpenRISC irqchip fix to stop acking level interrupts which was
     causing issues on SMP platforms

   - A comment typo fix in our unwinder code"

* tag 'for-linus' of https://github.com/openrisc/linux:
  openrisc: unwinder: Fix grammar issue in comment
  irqchip: or1k-pic: Undefine mask_ack for level triggered hardware

3 years agoMerge tag 'sound-5.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
Linus Torvalds [Wed, 6 Jul 2022 17:01:00 +0000 (10:01 -0700)] 
Merge tag 'sound-5.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
 "This became largish as it includes the pending ASoC fixes.

  Almost all changes are device-specific small fixes, while many of them
  are coverage for mixer issues that were detected by selftest. In
  addition, usual suspects for HD/USB-audio are there"

* tag 'sound-5.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (43 commits)
  ALSA: cs46xx: Fix missing snd_card_free() call at probe error
  ALSA: usb-audio: Add quirk for Fiero SC-01 (fw v1.0.0)
  ALSA: usb-audio: Add quirk for Fiero SC-01
  ALSA: hda/realtek: Add quirk for Clevo L140PU
  ALSA: usb-audio: Add quirks for MacroSilicon MS2100/MS2106 devices
  ASoC: madera: Fix event generation for rate controls
  ASoC: madera: Fix event generation for OUT1 demux
  ASoC: cs47l15: Fix event generation for low power mux control
  ASoC: cs35l41: Add ASP TX3/4 source to register patch
  ASoC: dapm: Initialise kcontrol data for mux/demux controls
  ASoC: rt711-sdca: fix kernel NULL pointer dereference when IO error
  ASoC: cs35l41: Correct some control names
  ASoC: wm5110: Fix DRE control
  ASoC: wm_adsp: Fix event for preloader
  MAINTAINERS: update ASoC Qualcomm maintainer email-id
  ASoC: rockchip: i2s: switch BCLK to GPIO
  ASoC: SOF: Intel: disable IMR boot when resuming from ACPI S4 and S5 states
  ASoC: SOF: pm: add definitions for S4 and S5 states
  ASoC: SOF: pm: add explicit behavior for ACPI S1 and S2
  ASoC: SOF: Intel: hda: Fix compressed stream position tracking
  ...

3 years agophy: qcom-edp: add regulator_set_load to edp phy
Kuogee Hsieh [Tue, 5 Jul 2022 16:29:14 +0000 (09:29 -0700)] 
phy: qcom-edp: add regulator_set_load to edp phy

This patch add regulator_set_load() before enable regulator at
eDP phy driver.

Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/1657038556-2231-2-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: qcom: Enable software clock gating requirement flag
Srinivasa Rao Mandadapu [Fri, 1 Jul 2022 07:17:07 +0000 (12:47 +0530)] 
soundwire: qcom: Enable software clock gating requirement flag

Enable software clock gating flag in private data for SC7280
based platforms, which are soundwire 1.6.0 version based.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
[vkoul: fix patch subystem tag]
Link: https://lore.kernel.org/r/1656659827-27450-3-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: qcom: Check device status before reading devid
Srinivas Kandagatla [Wed, 6 Jul 2022 09:56:44 +0000 (10:56 +0100)] 
soundwire: qcom: Check device status before reading devid

As per hardware datasheet its recommended that we check the device
status before reading devid assigned by auto-enumeration.

Without this patch we see SoundWire devices with invalid enumeration
addresses on the bus.

Cc: stable@vger.kernel.org
Fixes: a6e6581942ca ("soundwire: qcom: add auto enumeration support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220706095644.5852-1-srinivas.kandagatla@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agonamei: move clearing LOOKUP_RCU towards rcu_read_unlock()
Al Viro [Wed, 6 Jul 2022 16:40:31 +0000 (12:40 -0400)] 
namei: move clearing LOOKUP_RCU towards rcu_read_unlock()

try_to_unlazy()/try_to_unlazy_next() drop LOOKUP_RCU in the
very beginning and do rcu_read_unlock() only at the very end.
However, nothing done in between even looks at the flag in
question; might as well clear it at the same time we unlock.

Note that try_to_unlazy_next() used to call legitimize_mnt(),
which might drop/regain rcu_read_lock() in some cases.  This
is no longer true, so we really have rcu_read_lock() held
all along until the end.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
3 years agoMerge tag 'irqchip-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git...
Thomas Gleixner [Wed, 6 Jul 2022 16:31:59 +0000 (18:31 +0200)] 
Merge tag 'irqchip-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent

Pull irqchip fixes from Marc Zygnier:

 - Gracefully handle failure to request MMIO resources in the GICv3 driver

 - Make a static key static in the Apple AIC driver

 - Fix the Xilinx intc driver dependency on OF_ADDRESS

Link: https://lore.kernel.org/all/20220701133531.1545319-1-maz@kernel.org
3 years agodmaengine: altera-msgdma: Fixed some inconsistent function name descriptions
Jiapeng Chong [Wed, 6 Jul 2022 08:26:05 +0000 (16:26 +0800)] 
dmaengine: altera-msgdma: Fixed some inconsistent function name descriptions

Inconsistent function names describing msgdma_chan_remove() and
msgdma_dma_remove are modified to msgdma_dev_remove() and msgdma_remove().

Remove some warnings found by running scripts/kernel-doc, which is caused
by using 'make W=1'.

drivers/dma/altera-msgdma.c:927: warning: expecting prototype for msgdma_dma_remove(). Prototype was for msgdma_remove() instead.
drivers/dma/altera-msgdma.c:758: warning: expecting prototype for msgdma_chan_remove(). Prototype was for msgdma_dev_remove() instead.

Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Link: https://lore.kernel.org/r/20220706082605.114907-1-jiapeng.chong@linux.alibaba.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodmaengine: imx-sdma: Add missing struct documentation
Shengjiu Wang [Wed, 6 Jul 2022 05:45:09 +0000 (13:45 +0800)] 
dmaengine: imx-sdma: Add missing struct documentation

Fix compile warning that 'Function parameter or member not described'
with 'W=1' option:

Add missing description for struct sdma_desc

There is not any description for struct sdma_script_start_addrs,
so use /* instead of /**

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1657086309-7964-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: dma: allwinner,sun50i-a64-dma: Fix min/max typo
Samuel Holland [Sat, 2 Jul 2022 03:19:02 +0000 (22:19 -0500)] 
dt-bindings: dma: allwinner,sun50i-a64-dma: Fix min/max typo

The conditional block for variants with a second clock should have set
minItems, not maxItems, which was already 2. Since clock-names requires
two items, this typo should not have caused any problems.

Fixes: edd14218bd66 ("dt-bindings: dmaengine: Convert Allwinner A31 and A64 DMA to a schema")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220702031903.21703-1-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: soc: samsung: exynos-pmu: add reboot-mode
Krzysztof Kozlowski [Wed, 6 Jul 2022 16:02:57 +0000 (18:02 +0200)] 
dt-bindings: soc: samsung: exynos-pmu: add reboot-mode

ExynosAutov9 gained a reboot-mode node, so document the property to fix
warning:

  exynosautov9-sadk.dtb: system-controller@10460000: 'reboot-mode' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220706160257.27579-3-krzysztof.kozlowski@linaro.org
3 years agodt-bindings: soc: samsung: exynos-pmu: use abolute ref paths
Krzysztof Kozlowski [Wed, 6 Jul 2022 16:02:56 +0000 (18:02 +0200)] 
dt-bindings: soc: samsung: exynos-pmu: use abolute ref paths

Preferred coding for referencing other schemas is to use absolute path.
Quotes over path are also not needed.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220706160257.27579-2-krzysztof.kozlowski@linaro.org
3 years agodt-bindings: soc: samsung: exynos-pmu: cleanup assigned clocks
Krzysztof Kozlowski [Wed, 6 Jul 2022 16:02:55 +0000 (18:02 +0200)] 
dt-bindings: soc: samsung: exynos-pmu: cleanup assigned clocks

"assigned-clocks" are not needed in the device schema as they come from
core schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220706160257.27579-1-krzysztof.kozlowski@linaro.org
3 years agonvme-pci: phison e16 has bogus namespace ids
Keith Busch [Tue, 5 Jul 2022 17:21:02 +0000 (10:21 -0700)] 
nvme-pci: phison e16 has bogus namespace ids

Add the quirk.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=216049
Reported-by: Chris Egolf <cegolf@ugholf.net>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
3 years agoMerge tag 'tags/ib-mfd-soc-bcm-v5.20' into drivers/next
Florian Fainelli [Wed, 6 Jul 2022 16:18:05 +0000 (09:18 -0700)] 
Merge tag 'tags/ib-mfd-soc-bcm-v5.20' into drivers/next

Immutable branch between MFD and SoC due for the v5.20 merge window

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
3 years agodt-bindings: samsung: document preferred compatible naming
Krzysztof Kozlowski [Tue, 5 Jul 2022 16:13:40 +0000 (18:13 +0200)] 
dt-bindings: samsung: document preferred compatible naming

Compatibles can come in two formats.  Either "vendor,ip-soc" or
"vendor,soc-ip".  Add a DT schema documenting preferred policy and
enforcing it for all new compatibles, except few existing patterns.  The
schema also disallows wild-cards used in SoC compatibles.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220705161340.493474-1-krzysztof.kozlowski@linaro.org
3 years agodrm/msm/mdp5: move iommu_domain_alloc() call close to its usage
Dmitry Baryshkov [Thu, 16 Jun 2022 08:11:03 +0000 (11:11 +0300)] 
drm/msm/mdp5: move iommu_domain_alloc() call close to its usage

Move iommu_domain_alloc() in front of adress space/IOMMU initialization.
This allows us to drop final bits of struct mdp5_cfg_platform which
remained from the pre-DT days.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/489695/
Link: https://lore.kernel.org/r/20220616081106.350262-3-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm/dpu: check both DPU and MDSS devices for the IOMMU
Dmitry Baryshkov [Thu, 16 Jun 2022 08:11:02 +0000 (11:11 +0300)] 
drm/msm/dpu: check both DPU and MDSS devices for the IOMMU

Follow the lead of MDP5 driver and check both DPU and MDSS devices for
the IOMMU specifiers.

Historically DPU devices had IOMMU specified in the MDSS device tree
node, but as some of MDP5 devices are being converted to the supported
by the DPU driver, the driver should adapt and check both devices.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/489696/
Link: https://lore.kernel.org/r/20220616081106.350262-2-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agofs/ntfs3: Remove unnecessary 'NULL' values from pointers
Li kunyu [Mon, 4 Jul 2022 10:31:13 +0000 (18:31 +0800)] 
fs/ntfs3: Remove unnecessary 'NULL' values from pointers

There is no need to initialize with NULL as it'll be rewritten later.

Signed-off-by: Li kunyu <kunyu@nfschina.com>
Signed-off-by: Konstantin Komarov <almaz.alexandrovich@paragon-software.com>
3 years agodrm/msm: Fix %d vs %u
Rob Clark [Wed, 15 Jun 2022 16:35:28 +0000 (09:35 -0700)] 
drm/msm: Fix %d vs %u

In debugging fence rollover, I noticed that GPU state capture and
devcore dumps were showing me negative fence numbers.  Let's fix that
and some related signed vs unsigned confusion.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/489621/
Link: https://lore.kernel.org/r/20220615163532.3013035-1-robdclark@gmail.com
3 years agodrm/msm/dpu: move struct dpu_hw_blk definition to dpu_hw_utils.h
Dmitry Baryshkov [Wed, 1 Jun 2022 16:13:49 +0000 (19:13 +0300)] 
drm/msm/dpu: move struct dpu_hw_blk definition to dpu_hw_utils.h

There is little point in having a separate header just for a single
opaque struct definition. Drop it now and move the struct to the
dpu_hw_util.h header.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488016/
Link: https://lore.kernel.org/r/20220601161349.1517667-5-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm/dpu: merge base_off with blk_off in struct dpu_hw_blk_reg_map
Dmitry Baryshkov [Wed, 1 Jun 2022 16:13:48 +0000 (19:13 +0300)] 
drm/msm/dpu: merge base_off with blk_off in struct dpu_hw_blk_reg_map

There is little point in keeping a separate MDP address and block offset
in this struct. Merge them to form a new blk_addr field used for all
register access.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488017/
Link: https://lore.kernel.org/r/20220601161349.1517667-4-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm/dpu: drop length from struct dpu_hw_blk_reg_map
Dmitry Baryshkov [Wed, 1 Jun 2022 16:13:47 +0000 (19:13 +0300)] 
drm/msm/dpu: drop length from struct dpu_hw_blk_reg_map

We (nearly) do not use the length field from struct dpu_hw_blk_reg_map,
so we can drop it safely.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488013/
Link: https://lore.kernel.org/r/20220601161349.1517667-3-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm/dpu: drop xin_id from struct dpu_hw_blk_reg_map
Dmitry Baryshkov [Wed, 1 Jun 2022 16:13:46 +0000 (19:13 +0300)] 
drm/msm/dpu: drop xin_id from struct dpu_hw_blk_reg_map

Drop the unused field xin_id.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488011/
Link: https://lore.kernel.org/r/20220601161349.1517667-2-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm/adreno: Allow larger address space size
Rob Clark [Sun, 29 May 2022 18:04:23 +0000 (11:04 -0700)] 
drm/msm/adreno: Allow larger address space size

The restriction to 4G was strictly to work around 64b math bug in some
versions of SQE firmware.  This appears to be fixed in a650+ SQE fw, so
allow a larger address space size on these devices.

Also, add a modparam override for debugging and igt.

v2: Send the right version of the patch (ie. the one that actually
    compiles)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/487601/
Link: https://lore.kernel.org/r/20220529180428.2577832-1-robdclark@gmail.com
3 years agodrm/msm/adreno: Fix up formatting
Konrad Dybcio [Sat, 28 May 2022 16:03:51 +0000 (18:03 +0200)] 
drm/msm/adreno: Fix up formatting

Leading spaces are not something checkpatch likes, and it says so when
they are present. Use tabs consistently to indent function body and
unwrap a 83-char-long line, as 100 is cool nowadays.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/487592/
Link: https://lore.kernel.org/r/20220528160353.157870-4-konrad.dybcio@somainline.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm/a6xx: Add speedbin support for A619 GPU
Konrad Dybcio [Sat, 28 May 2022 16:03:50 +0000 (18:03 +0200)] 
drm/msm/a6xx: Add speedbin support for A619 GPU

There are various SKUs of A619, ranging from 565 MHz to 850 MHz, depending
on the bin. Add support for distinguishing them, so that proper frequency
ranges can be applied, depending on the HW.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/487590/
Link: https://lore.kernel.org/r/20220528160353.157870-3-konrad.dybcio@somainline.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm/adreno: Add A619 support
Konrad Dybcio [Sat, 28 May 2022 16:03:49 +0000 (18:03 +0200)] 
drm/msm/adreno: Add A619 support

Add support for the Adreno 619 GPU, as found in Snapdragon 690 (SM6350),
480 (SM4350) and 750G (SM7225).

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/487588/
Link: https://lore.kernel.org/r/20220528160353.157870-2-konrad.dybcio@somainline.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm/adreno: Remove dead code
Konrad Dybcio [Sat, 28 May 2022 16:03:48 +0000 (18:03 +0200)] 
drm/msm/adreno: Remove dead code

This BUG_ON will never be reached, and there is a comment 20 above
explaining why.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/487586/
Link: https://lore.kernel.org/r/20220528160353.157870-1-konrad.dybcio@somainline.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/msm: Avoid unclocked GMU register access in 6xx gpu_busy
Douglas Anderson [Fri, 10 Jun 2022 19:47:31 +0000 (12:47 -0700)] 
drm/msm: Avoid unclocked GMU register access in 6xx gpu_busy

From testing on sc7180-trogdor devices, reading the GMU registers
needs the GMU clocks to be enabled. Those clocks get turned on in
a6xx_gmu_resume(). Confusingly enough, that function is called as a
result of the runtime_pm of the GPU "struct device", not the GMU
"struct device". Unfortunately the current a6xx_gpu_busy() grabs a
reference to the GMU's "struct device".

The fact that we were grabbing the wrong reference was easily seen to
cause crashes that happen if we change the GPU's pm_runtime usage to
not use autosuspend. It's also believed to cause some long tail GPU
crashes even with autosuspend.

We could look at changing it so that we do pm_runtime_get_if_in_use()
on the GPU's "struct device", but then we run into a different
problem. pm_runtime_get_if_in_use() will return 0 for the GPU's
"struct device" the whole time when we're in the "autosuspend
delay". That is, when we drop the last reference to the GPU but we're
waiting a period before actually suspending then we'll think the GPU
is off. One reason that's bad is that if the GPU didn't actually turn
off then the cycle counter doesn't lose state and that throws off all
of our calculations.

Let's change the code to keep track of the suspend state of
devfreq. msm_devfreq_suspend() is always called before we actually
suspend the GPU and msm_devfreq_resume() after we resume it. This
means we can use the suspended state to know if we're powered or not.

NOTE: one might wonder when exactly our status function is called when
devfreq is supposed to be disabled. The stack crawl I captured was:
  msm_devfreq_get_dev_status
  devfreq_simple_ondemand_func
  devfreq_update_target
  qos_notifier_call
  qos_max_notifier_call
  blocking_notifier_call_chain
  pm_qos_update_target
  freq_qos_apply
  apply_constraint
  __dev_pm_qos_update_request
  dev_pm_qos_update_request
  msm_devfreq_idle_work

Fixes: eadf79286a4b ("drm/msm: Check for powered down HW in the devfreq callbacks")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/489124/
Link: https://lore.kernel.org/r/20220610124639.v4.1.Ie846c5352bc307ee4248d7cab998ab3016b85d06@changeid
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agoDocumentation: coresight: Expand branch broadcast documentation
James Clark [Wed, 11 May 2022 14:46:01 +0000 (15:46 +0100)] 
Documentation: coresight: Expand branch broadcast documentation

Now that there is a way of enabling branch broadcast via perf, mention
the possible use cases and known limitations.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach<mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220511144601.2257870-5-james.clark@arm.com
3 years agoDocumentation: coresight: Link config options to existing documentation
James Clark [Wed, 11 May 2022 14:46:00 +0000 (15:46 +0100)] 
Documentation: coresight: Link config options to existing documentation

In order to document the newly added branch_broadcast option, create a
table that links all of the config option formats to any existing docs.
That way when the branch broadcast docs are expanded they are accessible
from both places.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220511144601.2257870-4-james.clark@arm.com
3 years agoDocumentation: coresight: Turn numbered subsections into real subsections
James Clark [Wed, 11 May 2022 14:45:59 +0000 (15:45 +0100)] 
Documentation: coresight: Turn numbered subsections into real subsections

This is to allow them to be referenced in a later commit. There was
also a mistake where sysFS was introduced as section 2, but numbered
as section 1. And vice versa for 'Using perf framework'. This can't
happen with unnumbered sections.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220511144601.2257870-3-james.clark@arm.com
3 years agocoresight: Add config flag to enable branch broadcast
James Clark [Wed, 11 May 2022 14:45:58 +0000 (15:45 +0100)] 
coresight: Add config flag to enable branch broadcast

When enabled, all taken branch addresses are output, even if the branch
was because of a direct branch instruction. This enables reconstruction
of the program flow without having access to the memory image of the
code being executed.

Use bit 8 for the config option which would be the correct bit for
programming ETMv3. Although branch broadcast can't be enabled on ETMv3
because it's not in the define ETM3X_SUPPORTED_OPTIONS, using the
correct bit might help prevent future collisions or allow it to be
enabled if needed.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220511144601.2257870-2-james.clark@arm.com
3 years agovideo: of_display_timing.h: include errno.h
Hsin-Yi Wang [Thu, 30 Jun 2022 17:33:29 +0000 (01:33 +0800)] 
video: of_display_timing.h: include errno.h

If CONFIG_OF is not enabled, default of_get_display_timing() returns an
errno, so include the header.

Fixes: 422b67e0b31a ("videomode: provide dummy inline functions for !CONFIG_OF")
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Helge Deller <deller@gmx.de>
3 years agodt-bindings: hwinfo: samsung,s5pv210-chipid: add S5PV210 ChipID
Krzysztof Kozlowski [Tue, 5 Jul 2022 15:46:13 +0000 (17:46 +0200)] 
dt-bindings: hwinfo: samsung,s5pv210-chipid: add S5PV210 ChipID

Document already used S5PV210 ChipID block.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220705154613.453096-2-krzysztof.kozlowski@linaro.org
3 years agodt-bindings: hwinfo: group Chip ID-like devices
Krzysztof Kozlowski [Tue, 5 Jul 2022 15:46:12 +0000 (17:46 +0200)] 
dt-bindings: hwinfo: group Chip ID-like devices

Group devices like Chip ID or SoC information under "hwinfo" directory.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220705154613.453096-1-krzysztof.kozlowski@linaro.org
3 years agodrm/bridge: ti-sn65dsi86: Use atomic variants of drm_bridge_funcs
Sam Ravnborg [Sun, 3 Jul 2022 20:27:24 +0000 (22:27 +0200)] 
drm/bridge: ti-sn65dsi86: Use atomic variants of drm_bridge_funcs

Move away from the deprecated enable/disable operations in
drm_bridge_funcs and enable atomic use.

v3:
 - Drop use of DRM_BRIDGE_STATE_OPS

v2:
 - fix build (kernel test robot <lkp@intel.com>)

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Kieran Bingham <kieran.bingham@ideasonboard.com>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220703202724.9553-2-sam@ravnborg.org
3 years agofbdev: fbmem: Fix logo center image dx issue
Guiling Deng [Tue, 28 Jun 2022 16:36:41 +0000 (09:36 -0700)] 
fbdev: fbmem: Fix logo center image dx issue

Image.dx gets wrong value because of missing '()'.

If xres == logo->width and n == 1, image.dx = -16.

Signed-off-by: Guiling Deng <greens9@163.com>
Fixes: 3d8b1933eb1c ("fbdev: fbmem: add config option to center the bootup logo")
Cc: stable@vger.kernel.org # v5.0+
Signed-off-by: Helge Deller <deller@gmx.de>
3 years agodrm/mediatek: dpi: Add dp_intf support
Guillaume Ranquet [Tue, 5 Jul 2022 10:25:30 +0000 (18:25 +0800)] 
drm/mediatek: dpi: Add dp_intf support

Dpintf is the displayport interface hardware unit. This unit is similar
to dpi and can reuse most of the code.

This patch adds support for mt8195-dpintf to this dpi driver. Main
differences are:
 - 4 pixels for one iteration for dp_intf while dpi is 1 pixel for one
   iteration.
 - Input of dp_intf is two pixels per iteration.
 - Some register contents differ slightly between the two components.

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-6-rex-bc.chen@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
3 years agolibbpf: Remove unnecessary usdt_rel_ip assignments
Andrii Nakryiko [Tue, 5 Jul 2022 22:48:18 +0000 (15:48 -0700)] 
libbpf: Remove unnecessary usdt_rel_ip assignments

Coverity detected that usdt_rel_ip is unconditionally overwritten
anyways, so there is no need to unnecessarily initialize it with unused
value. Clean this up.

Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Yonghong Song <yhs@fb.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Link: https://lore.kernel.org/bpf/20220705224818.4026623-4-andrii@kernel.org
3 years agoselftests/bpf: Fix few more compiler warnings
Andrii Nakryiko [Tue, 5 Jul 2022 22:48:17 +0000 (15:48 -0700)] 
selftests/bpf: Fix few more compiler warnings

When compiling with -O2, GCC detects few problems with selftests/bpf, so
fix all of them. Two are real issues (uninitialized err and nums
out-of-bounds access), but two other uninitialized variables warnings
are due to GCC not being able to prove that variables are indeed
initialized under conditions under which they are used.

Fix all 4 cases, though.

Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Yonghong Song <yhs@fb.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Link: https://lore.kernel.org/bpf/20220705224818.4026623-3-andrii@kernel.org
3 years agoselftests/bpf: Fix bogus uninitialized variable warning
Andrii Nakryiko [Tue, 5 Jul 2022 22:48:16 +0000 (15:48 -0700)] 
selftests/bpf: Fix bogus uninitialized variable warning

When compiling selftests/bpf in optimized mode (-O2), GCC erroneously
complains about uninitialized token variable:

  In file included from network_helpers.c:22:
  network_helpers.c: In function ‘open_netns’:
  test_progs.h:355:22: error: ‘token’ may be used uninitialized [-Werror=maybe-uninitialized]
    355 |         int ___err = libbpf_get_error(___res);                          \
        |                      ^~~~~~~~~~~~~~~~~~~~~~~~
  network_helpers.c:440:14: note: in expansion of macro ‘ASSERT_OK_PTR’
    440 |         if (!ASSERT_OK_PTR(token, "malloc token"))
        |              ^~~~~~~~~~~~~
  In file included from /data/users/andriin/linux/tools/testing/selftests/bpf/tools/include/bpf/libbpf.h:21,
                   from bpf_util.h:9,
                   from network_helpers.c:20:
  /data/users/andriin/linux/tools/testing/selftests/bpf/tools/include/bpf/libbpf_legacy.h:113:17: note: by argument 1 of type ‘const void *’ to ‘libbpf_get_error’ declared here
    113 | LIBBPF_API long libbpf_get_error(const void *ptr);
        |                 ^~~~~~~~~~~~~~~~
  cc1: all warnings being treated as errors
  make: *** [Makefile:522: /data/users/andriin/linux/tools/testing/selftests/bpf/network_helpers.o] Error 1

This is completely bogus becuase libbpf_get_error() doesn't dereference
pointer, but the only easy way to silence this is to allocate initialized
memory with calloc().

Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Yonghong Song <yhs@fb.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Link: https://lore.kernel.org/bpf/20220705224818.4026623-2-andrii@kernel.org
3 years agoxdp: Fix spurious packet loss in generic XDP TX path
Johan Almbladh [Tue, 5 Jul 2022 08:23:45 +0000 (10:23 +0200)] 
xdp: Fix spurious packet loss in generic XDP TX path

The byte queue limits (BQL) mechanism is intended to move queuing from
the driver to the network stack in order to reduce latency caused by
excessive queuing in hardware. However, when transmitting or redirecting
a packet using generic XDP, the qdisc layer is bypassed and there are no
additional queues. Since netif_xmit_stopped() also takes BQL limits into
account, but without having any alternative queuing, packets are
silently dropped.

This patch modifies the drop condition to only consider cases when the
driver itself cannot accept any more packets. This is analogous to the
condition in __dev_direct_xmit(). Dropped packets are also counted on
the device.

Bypassing the qdisc layer in the generic XDP TX path means that XDP
packets are able to starve other packets going through a qdisc, and
DDOS attacks will be more effective. In-driver-XDP use dedicated TX
queues, so they do not have this starvation issue.

Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20220705082345.2494312-1-johan.almbladh@anyfinetworks.com